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tegra30 tdm audio support

alsa-devel In review Ben Dooks 6 participants 91 messages Oct 18, 2019 – Mar 20, 2020

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Ben Dooks

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#0 lore raw

TDM audio support for tegra30 devices.

v2:
- moved edge-control and data-offset to the set_fmt callbacks
- fixed dev_dbg in set_tdm callback
- fixed dev_dbg message contents in set_tdm callback
- changed fsync width to be permanently 1 clock

v3:
- cleanup fsync patch
- fix rebase issue with tdm patch

v4:
- fix comment style issues
- change tdm-a to data-offset 1

v5:
- fix format on tdm-b

author
#1 lore raw

PATCH v5 1/7 ASoC: tegra: add a TDM configuration callback

From: Edward Cragg <[email protected]>

Add a callback to configure TDM settings for the Tegra30 I2S ASoC 'platform' driver.

[[email protected]: merge fix for power management]
[[email protected]: add review change for fsync of 1 clock]
---
 sound/soc/tegra/tegra30_i2s.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)
sound/soc/tegra/tegra30_i2s.c +29 -0
index ac6983c6bd72..73f0dddeaef3 100644
@@ -254,6 +254,34 @@ static int tegra30_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
 	return 0;
 }
 
+static int tegra30_i2s_set_tdm(struct snd_soc_dai *dai,
+			       unsigned int tx_mask, unsigned int rx_mask,
+			       int slots, int slot_width)
+{
+	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
+	unsigned int mask, val;
+
+	dev_dbg(dai->dev, "%s: txmask=0x%08x rxmask=0x%08x slots=%d width=%d\n",
+		 __func__, tx_mask, rx_mask, slots, slot_width);
+
+	mask = TEGRA30_I2S_SLOT_CTRL_TOTAL_SLOTS_MASK |
+	       TEGRA30_I2S_SLOT_CTRL_RX_SLOT_ENABLES_MASK |
+	       TEGRA30_I2S_SLOT_CTRL_TX_SLOT_ENABLES_MASK;
+
+	val = (tx_mask << TEGRA30_I2S_SLOT_CTRL_TX_SLOT_ENABLES_SHIFT) |
+	      (rx_mask << TEGRA30_I2S_SLOT_CTRL_RX_SLOT_ENABLES_SHIFT) |
+	      ((slots - 1) << TEGRA30_I2S_SLOT_CTRL_TOTAL_SLOTS_SHIFT);
+
+	pm_runtime_get_sync(dai->dev);
+	regmap_update_bits(i2s->regmap, TEGRA30_I2S_SLOT_CTRL, mask, val);
+	/* set the fsync width to minimum of 1 clock width */
+	regmap_update_bits(i2s->regmap, TEGRA30_I2S_CH_CTRL,
+			   TEGRA30_I2S_CH_CTRL_FSYNC_WIDTH_MASK, 0x0);
+	pm_runtime_put(dai->dev);
+
+	return 0;
+}
+
 static int tegra30_i2s_probe(struct snd_soc_dai *dai)
 {
 	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
@@ -268,6 +296,7 @@ static const struct snd_soc_dai_ops tegra30_i2s_dai_ops = {
 	.set_fmt	= tegra30_i2s_set_fmt,
 	.hw_params	= tegra30_i2s_hw_params,
 	.trigger	= tegra30_i2s_trigger,
+	.set_tdm_slot	= tegra30_i2s_set_tdm,
 };
 
 static const struct snd_soc_dai_driver tegra30_i2s_dai_template = {
Signature · 1 line
2.23.0
maintainer Reviewed-by on v5 1/7
#2 lore raw

Re: [alsa-devel] [PATCH v5 1/7] ASoC: tegra: add a TDM configuration callback

Quoted 53 lines · Ben Dooks

From: Edward Cragg <[email protected]>

Add a callback to configure TDM settings for the Tegra30 I2S ASoC 'platform' driver.

[[email protected]: merge fix for power management]
[[email protected]: add review change for fsync of 1 clock]
---
 sound/soc/tegra/tegra30_i2s.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)
sound/soc/tegra/tegra30_i2s.c +28 -0
index ac6983c6bd72..73f0dddeaef3 100644
@@ -254,6 +254,34 @@ static int tegra30_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
 	return 0;
 }
 
+static int tegra30_i2s_set_tdm(struct snd_soc_dai *dai,
+			       unsigned int tx_mask, unsigned int rx_mask,
+			       int slots, int slot_width)
+{
+	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
+	unsigned int mask, val;
+
+	dev_dbg(dai->dev, "%s: txmask=0x%08x rxmask=0x%08x slots=%d width=%d\n",
+		 __func__, tx_mask, rx_mask, slots, slot_width);
+
+	mask = TEGRA30_I2S_SLOT_CTRL_TOTAL_SLOTS_MASK |
+	       TEGRA30_I2S_SLOT_CTRL_RX_SLOT_ENABLES_MASK |
+	       TEGRA30_I2S_SLOT_CTRL_TX_SLOT_ENABLES_MASK;
+
+	val = (tx_mask << TEGRA30_I2S_SLOT_CTRL_TX_SLOT_ENABLES_SHIFT) |
+	      (rx_mask << TEGRA30_I2S_SLOT_CTRL_RX_SLOT_ENABLES_SHIFT) |
+	      ((slots - 1) << TEGRA30_I2S_SLOT_CTRL_TOTAL_SLOTS_SHIFT);
+
+	pm_runtime_get_sync(dai->dev);
+	regmap_update_bits(i2s->regmap, TEGRA30_I2S_SLOT_CTRL, mask, val);
+	/* set the fsync width to minimum of 1 clock width */
+	regmap_update_bits(i2s->regmap, TEGRA30_I2S_CH_CTRL,
+			   TEGRA30_I2S_CH_CTRL_FSYNC_WIDTH_MASK, 0x0);
+	pm_runtime_put(dai->dev);
+
+	return 0;
+}
+
 static int tegra30_i2s_probe(struct snd_soc_dai *dai)
 {
 	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);

sound/soc/tegra/tegra30_i2s.c static const struct snd_soc_dai_ops tegra30_i2s_dai_ops = { · line 302

Quoted 7 lines
sound/soc/tegra/tegra30_i2s.c +1 -0
@@ -268,6 +296,7 @@ static const struct snd_soc_dai_ops tegra30_i2s_dai_ops = {
 	.set_fmt	= tegra30_i2s_set_fmt,
 	.hw_params	= tegra30_i2s_hw_params,
 	.trigger	= tegra30_i2s_trigger,
+	.set_tdm_slot	= tegra30_i2s_set_tdm,
 };
 
 static const struct snd_soc_dai_driver tegra30_i2s_dai_template = {

Thanks!

Cheers
Jon

Signature · 1 line
nvpublic
maintainer
#3 lore raw

[alsa-devel] Applied "ASoC: tegra: add a TDM configuration callback" to the asoc tree

In reply to Ben Dooks

The patch

ASoC: tegra: add a TDM configuration callback

has been applied to the asoc tree at

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.5

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks,
Mark

From 07932563686a6c51b26266c8572901c46fd1cd55 Mon Sep 17 00:00:00 2001
From: Edward Cragg <[email protected]>
Date: Fri, 18 Oct 2019 16:48:27 +0100
Subject: [PATCH] ASoC: tegra: add a TDM configuration callback

Add a callback to configure TDM settings for the Tegra30 I2S ASoC 'platform' driver.

---
 sound/soc/tegra/tegra30_i2s.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)
sound/soc/tegra/tegra30_i2s.c +29 -0
index 48a09c9d60be..8f8924060d9d 100644
@@ -265,6 +265,34 @@ static int tegra30_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
 	return 0;
 }
 
+static int tegra30_i2s_set_tdm(struct snd_soc_dai *dai,
+			       unsigned int tx_mask, unsigned int rx_mask,
+			       int slots, int slot_width)
+{
+	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
+	unsigned int mask, val;
+
+	dev_dbg(dai->dev, "%s: txmask=0x%08x rxmask=0x%08x slots=%d width=%d\n",
+		 __func__, tx_mask, rx_mask, slots, slot_width);
+
+	mask = TEGRA30_I2S_SLOT_CTRL_TOTAL_SLOTS_MASK |
+	       TEGRA30_I2S_SLOT_CTRL_RX_SLOT_ENABLES_MASK |
+	       TEGRA30_I2S_SLOT_CTRL_TX_SLOT_ENABLES_MASK;
+
+	val = (tx_mask << TEGRA30_I2S_SLOT_CTRL_TX_SLOT_ENABLES_SHIFT) |
+	      (rx_mask << TEGRA30_I2S_SLOT_CTRL_RX_SLOT_ENABLES_SHIFT) |
+	      ((slots - 1) << TEGRA30_I2S_SLOT_CTRL_TOTAL_SLOTS_SHIFT);
+
+	pm_runtime_get_sync(dai->dev);
+	regmap_update_bits(i2s->regmap, TEGRA30_I2S_SLOT_CTRL, mask, val);
+	/* set the fsync width to minimum of 1 clock width */
+	regmap_update_bits(i2s->regmap, TEGRA30_I2S_CH_CTRL,
+			   TEGRA30_I2S_CH_CTRL_FSYNC_WIDTH_MASK, 0x0);
+	pm_runtime_put(dai->dev);
+
+	return 0;
+}
+
 static int tegra30_i2s_probe(struct snd_soc_dai *dai)
 {
 	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
@@ -279,6 +307,7 @@ static const struct snd_soc_dai_ops tegra30_i2s_dai_ops = {
 	.set_fmt	= tegra30_i2s_set_fmt,
 	.hw_params	= tegra30_i2s_hw_params,
 	.trigger	= tegra30_i2s_trigger,
+	.set_tdm_slot	= tegra30_i2s_set_tdm,
 };
 
 static const struct snd_soc_dai_driver tegra30_i2s_dai_template = {
Signature · 1 line
2.20.1
author
#4 lore raw

PATCH v5 2/7 ASoC: tegra: Allow 24bit and 32bit samples

In reply to Ben Dooks

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

---
 sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----
 1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +20 -5
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	struct device *dev = dai->dev;
 	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 	unsigned int mask, val, reg;
-	int ret, sample_size, srate, i2sclock, bitcnt;
+	int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
 	struct tegra30_ahub_cif_conf cif_conf;
 
 	if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	switch (params_format(params)) {
 	case SNDRV_PCM_FORMAT_S16_LE:
 		val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_16;
 		sample_size = 16;
 		break;
+	case SNDRV_PCM_FORMAT_S24_LE:
+		val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+		sample_size = 24;
+		break;
+	case SNDRV_PCM_FORMAT_S32_LE:
+		val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+		sample_size = 32;
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	cif_conf.threshold = 0;
 	cif_conf.audio_channels = 2;
 	cif_conf.client_channels = 2;
-	cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-	cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+	cif_conf.audio_bits = audio_bits;
+	cif_conf.client_bits = audio_bits;
 	cif_conf.expand = 0;
 	cif_conf.stereo_conv = 0;
 	cif_conf.replicate = 0;
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver tegra30_i2s_dai_template = {
 		.channels_min = 2,
 		.channels_max = 2,
 		.rates = SNDRV_PCM_RATE_8000_96000,
-		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+		.formats = SNDRV_PCM_FMTBIT_S32_LE |
+			   SNDRV_PCM_FMTBIT_S24_LE |
+			   SNDRV_PCM_FMTBIT_S16_LE,
 	},
 	.capture = {
 		.stream_name = "Capture",
 		.channels_min = 2,
 		.channels_max = 2,
 		.rates = SNDRV_PCM_RATE_8000_96000,
-		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+		.formats = SNDRV_PCM_FMTBIT_S32_LE |
+			   SNDRV_PCM_FMTBIT_S24_LE |
+			   SNDRV_PCM_FMTBIT_S16_LE,
 	},
 	.ops = &tegra30_i2s_dai_ops,
 	.symmetric_rates = 1,
Signature · 1 line
2.23.0
maintainer Reviewed-by on v5 2/7
#5 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 74 lines · Ben Dooks

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

---
 sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----
 1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +17 -4
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	struct device *dev = dai->dev;
 	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 	unsigned int mask, val, reg;
-	int ret, sample_size, srate, i2sclock, bitcnt;
+	int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
 	struct tegra30_ahub_cif_conf cif_conf;
 
 	if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	switch (params_format(params)) {
 	case SNDRV_PCM_FORMAT_S16_LE:
 		val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_16;
 		sample_size = 16;
 		break;
+	case SNDRV_PCM_FORMAT_S24_LE:
+		val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+		sample_size = 24;
+		break;
+	case SNDRV_PCM_FORMAT_S32_LE:
+		val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+		sample_size = 32;
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	cif_conf.threshold = 0;
 	cif_conf.audio_channels = 2;
 	cif_conf.client_channels = 2;
-	cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-	cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+	cif_conf.audio_bits = audio_bits;
+	cif_conf.client_bits = audio_bits;
 	cif_conf.expand = 0;
 	cif_conf.stereo_conv = 0;
 	cif_conf.replicate = 0;
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver tegra30_i2s_dai_template = {
 		.channels_min = 2,
 		.channels_max = 2,
 		.rates = SNDRV_PCM_RATE_8000_96000,
-		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+		.formats = SNDRV_PCM_FMTBIT_S32_LE |
+			   SNDRV_PCM_FMTBIT_S24_LE |
+			   SNDRV_PCM_FMTBIT_S16_LE,
 	},
 	.capture = {
 		.stream_name = "Capture",

sound/soc/tegra/tegra30_i2s.c static const struct snd_soc_dai_driver tegra30_i2s_dai_template = { · line 334

Quoted 10 lines
sound/soc/tegra/tegra30_i2s.c +3 -1
 		.channels_min = 2,
 		.channels_max = 2,
 		.rates = SNDRV_PCM_RATE_8000_96000,
-		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+		.formats = SNDRV_PCM_FMTBIT_S32_LE |
+			   SNDRV_PCM_FMTBIT_S24_LE |
+			   SNDRV_PCM_FMTBIT_S16_LE,
 	},
 	.ops = &tegra30_i2s_dai_ops,
 	.symmetric_rates = 1,

Thanks!

Cheers
Jon

Signature · 1 line
nvpublic
maintainer
#6 lore raw

[alsa-devel] Applied "ASoC: tegra: Allow 24bit and 32bit samples" to the asoc tree

In reply to Ben Dooks

The patch

ASoC: tegra: Allow 24bit and 32bit samples

has been applied to the asoc tree at

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.5

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks,
Mark

From f3ee99087c8ca0ecfdd549ef5a94f557c42d5428 Mon Sep 17 00:00:00 2001
From: Edward Cragg <[email protected]>
Date: Fri, 18 Oct 2019 16:48:28 +0100
Subject: [PATCH] ASoC: tegra: Allow 24bit and 32bit samples

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]
---
 sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----
 1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +20 -5
index e6d548fa980b..48a09c9d60be 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	struct device *dev = dai->dev;
 	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 	unsigned int mask, val, reg;
-	int ret, sample_size, srate, i2sclock, bitcnt;
+	int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
 	struct tegra30_ahub_cif_conf cif_conf;
 
 	if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	switch (params_format(params)) {
 	case SNDRV_PCM_FORMAT_S16_LE:
 		val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_16;
 		sample_size = 16;
 		break;
+	case SNDRV_PCM_FORMAT_S24_LE:
+		val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+		sample_size = 24;
+		break;
+	case SNDRV_PCM_FORMAT_S32_LE:
+		val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+		sample_size = 32;
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	cif_conf.threshold = 0;
 	cif_conf.audio_channels = 2;
 	cif_conf.client_channels = 2;
-	cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-	cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+	cif_conf.audio_bits = audio_bits;
+	cif_conf.client_bits = audio_bits;
 	cif_conf.expand = 0;
 	cif_conf.stereo_conv = 0;
 	cif_conf.replicate = 0;
@@ -277,14 +288,18 @@ static const struct snd_soc_dai_driver tegra30_i2s_dai_template = {
 		.channels_min = 2,
 		.channels_max = 2,
 		.rates = SNDRV_PCM_RATE_8000_96000,
-		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+		.formats = SNDRV_PCM_FMTBIT_S32_LE |
+			   SNDRV_PCM_FMTBIT_S24_LE |
+			   SNDRV_PCM_FMTBIT_S16_LE,
 	},
 	.capture = {
 		.stream_name = "Capture",
 		.channels_min = 2,
 		.channels_max = 2,
 		.rates = SNDRV_PCM_RATE_8000_96000,
-		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+		.formats = SNDRV_PCM_FMTBIT_S32_LE |
+			   SNDRV_PCM_FMTBIT_S24_LE |
+			   SNDRV_PCM_FMTBIT_S16_LE,
 	},
 	.ops = &tegra30_i2s_dai_ops,
 	.symmetric_rates = 1,
Signature · 1 line
2.20.1
#7 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Ben Dooks

18.10.2019 18:48, Ben Dooks пишет:

Quoted 75 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

---
 sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----
 1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +17 -4
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	struct device *dev = dai->dev;
 	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 	unsigned int mask, val, reg;
-	int ret, sample_size, srate, i2sclock, bitcnt;
+	int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
 	struct tegra30_ahub_cif_conf cif_conf;
 
 	if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	switch (params_format(params)) {
 	case SNDRV_PCM_FORMAT_S16_LE:
 		val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_16;
 		sample_size = 16;
 		break;
+	case SNDRV_PCM_FORMAT_S24_LE:
+		val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+		sample_size = 24;
+		break;
+	case SNDRV_PCM_FORMAT_S32_LE:
+		val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+		sample_size = 32;
+		break;
 	default:
 		return -EINVAL;
 	}
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	cif_conf.threshold = 0;
 	cif_conf.audio_channels = 2;
 	cif_conf.client_channels = 2;
-	cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-	cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+	cif_conf.audio_bits = audio_bits;
+	cif_conf.client_bits = audio_bits;
 	cif_conf.expand = 0;
 	cif_conf.stereo_conv = 0;
 	cif_conf.replicate = 0;
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver tegra30_i2s_dai_template = {
 		.channels_min = 2,
 		.channels_max = 2,
 		.rates = SNDRV_PCM_RATE_8000_96000,
-		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+		.formats = SNDRV_PCM_FMTBIT_S32_LE |
+			   SNDRV_PCM_FMTBIT_S24_LE |
+			   SNDRV_PCM_FMTBIT_S16_LE,
 	},
 	.capture = {
 		.stream_name = "Capture",

sound/soc/tegra/tegra30_i2s.c static const struct snd_soc_dai_driver tegra30_i2s_dai_template = { · line 334

Quoted 10 lines
sound/soc/tegra/tegra30_i2s.c +3 -1
 		.channels_min = 2,
 		.channels_max = 2,
 		.rates = SNDRV_PCM_RATE_8000_96000,
-		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+		.formats = SNDRV_PCM_FMTBIT_S32_LE |
+			   SNDRV_PCM_FMTBIT_S24_LE |
+			   SNDRV_PCM_FMTBIT_S16_LE,
 	},
 	.ops = &tegra30_i2s_dai_ops,
 	.symmetric_rates = 1,

Hello,

This patch breaks audio on Tegra30. I don't see errors anywhere, but there is no audio and reverting this patch helps. Please fix it.
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https://mailman.alsa-project.org/mailman/listinfo/alsa-devel

author
#8 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 89 lines · Dmitry Osipenko

18.10.2019 18:48, Ben Dooks пишет:

Quoted 75 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

---
  sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----
  1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +17 -4
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
  	struct device *dev = dai->dev;
  	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
  	unsigned int mask, val, reg;
-	int ret, sample_size, srate, i2sclock, bitcnt;
+	int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
  	struct tegra30_ahub_cif_conf cif_conf;
 
  	if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
  	switch (params_format(params)) {
  	case SNDRV_PCM_FORMAT_S16_LE:
  		val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_16;
  		sample_size = 16;
  		break;
+	case SNDRV_PCM_FORMAT_S24_LE:
+		val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+		sample_size = 24;
+		break;
+	case SNDRV_PCM_FORMAT_S32_LE:
+		val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+		audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+		sample_size = 32;
+		break;
  	default:
  		return -EINVAL;
  	}
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
  	cif_conf.threshold = 0;
  	cif_conf.audio_channels = 2;
  	cif_conf.client_channels = 2;
-	cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-	cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+	cif_conf.audio_bits = audio_bits;
+	cif_conf.client_bits = audio_bits;
  	cif_conf.expand = 0;
  	cif_conf.stereo_conv = 0;
  	cif_conf.replicate = 0;
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver tegra30_i2s_dai_template = {
  		.channels_min = 2,
  		.channels_max = 2,
  		.rates = SNDRV_PCM_RATE_8000_96000,
-		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+		.formats = SNDRV_PCM_FMTBIT_S32_LE |
+			   SNDRV_PCM_FMTBIT_S24_LE |
+			   SNDRV_PCM_FMTBIT_S16_LE,
  	},
  	.capture = {
  		.stream_name = "Capture",

sound/soc/tegra/tegra30_i2s.c static const struct snd_soc_dai_driver tegra30_i2s_dai_template = { · line 334

Quoted 10 lines
sound/soc/tegra/tegra30_i2s.c +3 -1
  		.channels_min = 2,
  		.channels_max = 2,
  		.rates = SNDRV_PCM_RATE_8000_96000,
-		.formats = SNDRV_PCM_FMTBIT_S16_LE,
+		.formats = SNDRV_PCM_FMTBIT_S32_LE |
+			   SNDRV_PCM_FMTBIT_S24_LE |
+			   SNDRV_PCM_FMTBIT_S16_LE,
  	},
  	.ops = &tegra30_i2s_dai_ops,
  	.symmetric_rates = 1,

Hello,

Quoted 2 lines

This patch breaks audio on Tegra30. I don't see errors anywhere, but there is no audio and reverting this patch helps. Please fix it.

What is the failure mode? I can try and take a look at this some time this week, but I am not sure if I have any boards with an actual useful audio output?

Signature · 8 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
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#9 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

25.11.2019 13:37, Ben Dooks пишет:

Quoted 95 lines · Dmitry Osipenko
Quoted 94 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 88 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
---
  sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----

  1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +1 -1
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       struct device *dev = dai->dev;
       struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
       unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
       struct tegra30_ahub_cif_conf cif_conf;
         if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       switch (params_format(params)) {

      case SNDRV_PCM_FORMAT_S16_LE:
          val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
          sample_size = 16;
          break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
      default:
          return -EINVAL;
      }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       cif_conf.threshold = 0;
       cif_conf.audio_channels = 2;
       cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
       cif_conf.expand = 0;
       cif_conf.stereo_conv = 0;

      cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .capture = {
           .stream_name = "Capture",
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

      .symmetric_rates = 1,

Hello,

Quoted 6 lines
Quoted 2 lines

This patch breaks audio on Tegra30. I don't see errors anywhere, but there is no audio and reverting this patch helps. Please fix it.

What is the failure mode? I can try and take a look at this some time this week, but I am not sure if I have any boards with an actual useful audio output?

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something times out during of the audio playback. For now I don't have any more info.
_______________________________________________
Alsa-devel mailing list
[email protected]
https://mailman.alsa-project.org/mailman/listinfo/alsa-devel

#10 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 99 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 98 lines · Dmitry Osipenko
Quoted 96 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 88 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
---
  sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----

  1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +1 -1
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       struct device *dev = dai->dev;
       struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
       unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
       struct tegra30_ahub_cif_conf cif_conf;
         if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       switch (params_format(params)) {

      case SNDRV_PCM_FORMAT_S16_LE:
          val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
          sample_size = 16;
          break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
      default:
          return -EINVAL;
      }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       cif_conf.threshold = 0;
       cif_conf.audio_channels = 2;
       cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
       cif_conf.expand = 0;
       cif_conf.stereo_conv = 0;

      cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .capture = {
           .stream_name = "Capture",
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

      .symmetric_rates = 1,

Hello,

This patch breaks audio on Tegra30. I don't see errors anywhere, but there is no audio and reverting this patch helps. Please fix it.

Quoted 8 lines
Quoted 3 lines

What is the failure mode? I can try and take a look at this some time this week, but I am not sure if I have any boards with an actual useful audio output?

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something times out during of the audio playback. For now I don't have any more info.

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov
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#11 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

25.11.2019 20:28, Dmitry Osipenko пишет:

Quoted 109 lines

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 99 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 98 lines · Dmitry Osipenko
Quoted 96 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 88 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
---
  sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----

  1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +1 -1
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       struct device *dev = dai->dev;
       struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
       unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
       struct tegra30_ahub_cif_conf cif_conf;
         if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       switch (params_format(params)) {

      case SNDRV_PCM_FORMAT_S16_LE:
          val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
          sample_size = 16;
          break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
      default:
          return -EINVAL;
      }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       cif_conf.threshold = 0;
       cif_conf.audio_channels = 2;
       cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
       cif_conf.expand = 0;
       cif_conf.stereo_conv = 0;

      cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .capture = {
           .stream_name = "Capture",
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

      .symmetric_rates = 1,

Hello,

This patch breaks audio on Tegra30. I don't see errors anywhere, but there is no audio and reverting this patch helps. Please fix it.

Quoted 8 lines
Quoted 3 lines

What is the failure mode? I can try and take a look at this some time this week, but I am not sure if I have any boards with an actual useful audio output?

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something times out during of the audio playback. For now I don't have any more info.

Quoted 5 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Hello Ben,

Do you have any updates? I just re-check whether problem persists and it's still there using a recent linux-next.

Interestingly, I can hear some sound now, but it's very distorted.

If you don't have a solution, then what about to revert the patches for now and try again later on?
_______________________________________________
Alsa-devel mailing list
[email protected]
https://mailman.alsa-project.org/mailman/listinfo/alsa-devel

author
#12 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 118 lines · Dmitry Osipenko

25.11.2019 20:28, Dmitry Osipenko пишет:

Quoted 109 lines

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 99 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 98 lines · Dmitry Osipenko
Quoted 96 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 88 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

---
   sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----
   1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +12 -1
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       struct device *dev = dai->dev;
       struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
       unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
       struct tegra30_ahub_cif_conf cif_conf;
         if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       switch (params_format(params)) {
       case SNDRV_PCM_FORMAT_S16_LE:
           val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
           sample_size = 16;
           break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
       default:
           return -EINVAL;

      }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       cif_conf.threshold = 0;
       cif_conf.audio_channels = 2;
       cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
       cif_conf.expand = 0;
       cif_conf.stereo_conv = 0;

      cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .capture = {
           .stream_name = "Capture",
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

      .symmetric_rates = 1,

Hello,

This patch breaks audio on Tegra30. I don't see errors anywhere, but there is no audio and reverting this patch helps. Please fix it.

Quoted 8 lines
Quoted 3 lines

What is the failure mode? I can try and take a look at this some time this week, but I am not sure if I have any boards with an actual useful audio output?

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something times out during of the audio playback. For now I don't have any more info.

Quoted 5 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Hello Ben,

Quoted 7 lines

Do you have any updates? I just re-check whether problem persists and it's still there using a recent linux-next.

Interestingly, I can hear some sound now, but it's very distorted.

If you don't have a solution, then what about to revert the patches for now and try again later on?

I will try and have a look later, I had completely forgotten these had been merged.

Signature · 8 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
_______________________________________________
Alsa-devel mailing list
[email protected]
https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
maintainer
#13 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Dmitry Osipenko
Quoted 109 lines · Dmitry Osipenko

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 99 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 98 lines · Dmitry Osipenko
Quoted 96 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 88 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
---
  sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----

  1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +1 -1
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       struct device *dev = dai->dev;
       struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
       unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
       struct tegra30_ahub_cif_conf cif_conf;
         if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       switch (params_format(params)) {

      case SNDRV_PCM_FORMAT_S16_LE:
          val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
          sample_size = 16;
          break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
      default:
          return -EINVAL;
      }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       cif_conf.threshold = 0;
       cif_conf.audio_channels = 2;
       cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
       cif_conf.expand = 0;
       cif_conf.stereo_conv = 0;

      cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .capture = {
           .stream_name = "Capture",
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

      .symmetric_rates = 1,

Hello,

This patch breaks audio on Tegra30. I don't see errors anywhere, but there is no audio and reverting this patch helps. Please fix it.

Quoted 8 lines
Quoted 3 lines

What is the failure mode? I can try and take a look at this some time this week, but I am not sure if I have any boards with an actual useful audio output?

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something times out during of the audio playback. For now I don't have any more info.

Quoted 4 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Given that the audio drivers uses regmap, it could be good to dump the I2S/AHUB registers while the clip if playing with and without this patch to see the differences. I am curious if the audio is now being played as 24 or 32-bit instead of 16-bit now these are available.

You could also dump the hw_params to see the format while playing as well ...

$ /proc/asound/<scard-name>/pcm0p/sub0/hw_params

Jon

Signature · 5 lines
nvpublic
_______________________________________________
Alsa-devel mailing list
[email protected]
https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
author
#14 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 121 lines · Jon Hunter
Quoted 109 lines · Dmitry Osipenko

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 99 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 98 lines · Dmitry Osipenko
Quoted 96 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 88 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

---
   sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----
   1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +12 -1
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       struct device *dev = dai->dev;
       struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
       unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
       struct tegra30_ahub_cif_conf cif_conf;
         if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       switch (params_format(params)) {
       case SNDRV_PCM_FORMAT_S16_LE:
           val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
           sample_size = 16;
           break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
       default:
           return -EINVAL;

      }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
       cif_conf.threshold = 0;
       cif_conf.audio_channels = 2;
       cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
       cif_conf.expand = 0;
       cif_conf.stereo_conv = 0;

      cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .capture = {
           .stream_name = "Capture",
           .channels_min = 2,
           .channels_max = 2,
           .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
       },
       .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

      .symmetric_rates = 1,

Hello,

This patch breaks audio on Tegra30. I don't see errors anywhere, but there is no audio and reverting this patch helps. Please fix it.

Quoted 8 lines
Quoted 3 lines

What is the failure mode? I can try and take a look at this some time this week, but I am not sure if I have any boards with an actual useful audio output?

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something times out during of the audio playback. For now I don't have any more info.

Quoted 4 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Given that the audio drivers uses regmap, it could be good to dump the I2S/AHUB registers while the clip if playing with and without this patch to see the differences. I am curious if the audio is now being played as 24 or 32-bit instead of 16-bit now these are available.

Quoted 4 lines

You could also dump the hw_params to see the format while playing as well ...

$ /proc/asound/<scard-name>/pcm0p/sub0/hw_params

I suppose it is also possible that the codec isn't properly doing >16 bits and the fact we now offer 24 and 32 could be an issue. I've not got anything with an audio output on it that would be easy to test.

Signature · 8 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
_______________________________________________
Alsa-devel mailing list
[email protected]
https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
maintainer
#15 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 127 lines · Ben Dooks
Quoted 126 lines · Jon Hunter
Quoted 113 lines · Dmitry Osipenko

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 106 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 97 lines · Dmitry Osipenko
Quoted 96 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 90 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE
formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed
in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
---
   sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----

   1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +1 -1
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
        struct device *dev = dai->dev;
        struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
        unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
        struct tegra30_ahub_cif_conf cif_conf;
          if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
        switch (params_format(params)) {

       case SNDRV_PCM_FORMAT_S16_LE:
           val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
           sample_size = 16;
           break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
       default:
           return -EINVAL;
       }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
        cif_conf.threshold = 0;
        cif_conf.audio_channels = 2;
        cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
        cif_conf.expand = 0;
        cif_conf.stereo_conv = 0;

       cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
            .channels_min = 2,
            .channels_max = 2,
            .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
        },
        .capture = {
            .stream_name = "Capture",
            .channels_min = 2,
            .channels_max = 2,
            .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
        },
        .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

       .symmetric_rates = 1,

Hello,

Quoted 7 lines
Quoted 2 lines

This patch breaks audio on Tegra30. I don't see errors anywhere, but there is no audio and reverting this patch helps. Please fix it.

What is the failure mode? I can try and take a look at this some time this week, but I am not sure if I have any boards with an actual useful
audio output?

Quoted 5 lines

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something times out during of the audio playback. For now I don't have any more info.

Quoted 5 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Given that the audio drivers uses regmap, it could be good to dump the I2S/AHUB registers while the clip if playing with and without this patch to see the differences. I am curious if the audio is now being played as 24 or 32-bit instead of 16-bit now these are available.

Quoted 8 lines
Quoted 4 lines

You could also dump the hw_params to see the format while playing as well ...

$ /proc/asound/<scard-name>/pcm0p/sub0/hw_params

I suppose it is also possible that the codec isn't properly doing >16 bits and the fact we now offer 24 and 32 could be an issue. I've not got anything with an audio output on it that would be easy to test.

I thought I had tested on a Jetson TK1 (Tegra124) but it was sometime back. However, admittedly I may have only done simple 16-bit testing with speaker-test.

We do verify that all soundcards are detected and registered as expected during daily testing, but at the moment we don't have anything that verifies actual playback.

Jon

Signature · 5 lines
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#16 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

20.12.2019 16:57, Jon Hunter пишет:

Quoted 138 lines · Ben Dooks
Quoted 127 lines · Jon Hunter
Quoted 126 lines · Dmitry Osipenko
Quoted 113 lines

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 106 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 97 lines · Dmitry Osipenko
Quoted 96 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 90 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE
formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed
in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
---
   sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----

   1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +1 -1
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
        struct device *dev = dai->dev;
        struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
        unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
        struct tegra30_ahub_cif_conf cif_conf;
          if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
        switch (params_format(params)) {

       case SNDRV_PCM_FORMAT_S16_LE:
           val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
           sample_size = 16;
           break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
       default:
           return -EINVAL;
       }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
        cif_conf.threshold = 0;
        cif_conf.audio_channels = 2;
        cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
        cif_conf.expand = 0;
        cif_conf.stereo_conv = 0;

       cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
            .channels_min = 2,
            .channels_max = 2,
            .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
        },
        .capture = {
            .stream_name = "Capture",
            .channels_min = 2,
            .channels_max = 2,
            .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
        },
        .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

       .symmetric_rates = 1,

Hello,

Quoted 7 lines
Quoted 2 lines

This patch breaks audio on Tegra30. I don't see errors anywhere, but there is no audio and reverting this patch helps. Please fix it.

What is the failure mode? I can try and take a look at this some time this week, but I am not sure if I have any boards with an actual useful
audio output?

Quoted 5 lines

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something times out during of the audio playback. For now I don't have any more info.

Quoted 5 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Given that the audio drivers uses regmap, it could be good to dump the I2S/AHUB registers while the clip if playing with and without this patch to see the differences. I am curious if the audio is now being played as 24 or 32-bit instead of 16-bit now these are available.

Quoted 8 lines
Quoted 4 lines

You could also dump the hw_params to see the format while playing as well ...

$ /proc/asound/<scard-name>/pcm0p/sub0/hw_params

I suppose it is also possible that the codec isn't properly doing >16 bits and the fact we now offer 24 and 32 could be an issue. I've not got anything with an audio output on it that would be easy to test.

Quoted 7 lines

I thought I had tested on a Jetson TK1 (Tegra124) but it was sometime back. However, admittedly I may have only done simple 16-bit testing with speaker-test.

We do verify that all soundcards are detected and registered as expected during daily testing, but at the moment we don't have anything that verifies actual playback.

Please take a look at the attached logs.

Works
-----

# cat /sys/class/i2c-dev/i2c-2/name
7000d000.i2c

...

	i2c@7000d000 {
		clock-frequency = <100000>;
		status = "okay";

		rt5640: rt5640@1c {
			compatible = "realtek,rt5640";
			reg = <0x1c>;

			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;

			realtek,dmic1-data-pin = <1>;
			realtek,dmic2-data-pin = <0>;
			realtek,in1-differential;
		};

...

# cat /proc/asound/card0/pcm0p/sub0/hw_params
access: MMAP_INTERLEAVED
format: S16_LE
subformat: STD
channels: 2
rate: 48000 (48000/1)
period_size: 1024
buffer_size: 8192
# trace-cmd record -e regmap:*
# trace-cmd report

CPU 0 is empty
CPU 1 is empty
cpus=4

             mpv-308   [002]   171.268104: regmap_cache_only:    70080000.ahub flag=0
             mpv-308   [002]   171.268116: regmap_cache_only:    70080000.ahub flag=0
             mpv-308   [002]   171.268131: regmap_cache_only:    70080400.i2s flag=0
             mpv-308   [002]   171.272549: regmap_reg_read_cache: 2-001c reg=64 val=0
             mpv-308   [002]   171.272556: regmap_reg_read_cache: 2-001c reg=80 val=0
             mpv-308   [002]   171.272564: regmap_reg_read_cache: 2-001c reg=70 val=8000
             mpv-308   [002]   171.272567: regmap_reg_read_cache: 2-001c reg=70 val=8000
             mpv-308   [002]   171.272569: regmap_reg_read_cache: 2-001c reg=73 val=1114
             mpv-308   [002]   171.272572: regmap_reg_write:     2-001c reg=73 val=114
             mpv-308   [002]   171.272581: regmap_hw_write_start: 2-001c reg=73 count=1
             mpv-308   [002]   171.273332: regmap_hw_write_done: 2-001c reg=73 count=1
             mpv-308   [002]   171.273379: regmap_reg_read_cache: 70080400.i2s reg=0 val=400
             mpv-308   [002]   171.273382: regmap_reg_write:     70080400.i2s reg=0 val=403
             mpv-308   [002]   171.273395: regmap_reg_write:     70080400.i2s reg=4 val=1f
             mpv-308   [002]   171.273398: regmap_reg_write:     70080400.i2s reg=14 val=1013304
             mpv-308   [002]   171.273401: regmap_reg_write:     70080400.i2s reg=8 val=10001
    kworker/u8:2-145   [003]   171.273992: regmap_reg_read_cache: 2-001c reg=63 val=0
    kworker/u8:2-145   [003]   171.273999: regmap_reg_write:     2-001c reg=63 val=a810
    kworker/u8:2-145   [003]   171.274006: regmap_hw_write_start: 2-001c reg=63 count=1
    kworker/u8:2-145   [003]   171.274478: regmap_hw_write_done: 2-001c reg=63 count=1
    kworker/u8:2-145   [003]   171.286067: regmap_reg_read_cache: 2-001c reg=63 val=a810
    kworker/u8:2-145   [003]   171.286076: regmap_reg_write:     2-001c reg=63 val=e818
    kworker/u8:2-145   [003]   171.286083: regmap_hw_write_start: 2-001c reg=63 count=1
    kworker/u8:2-145   [003]   171.286568: regmap_hw_write_done: 2-001c reg=63 count=1
    kworker/u8:2-145   [003]   171.286575: regmap_reg_read_cache: 2-001c reg=fa val=3f01
    kworker/u8:2-145   [003]   171.286577: regmap_reg_read_cache: 2-001c reg=93 val=3030
             mpv-308   [002]   171.286643: regmap_reg_read_cache: 2-001c reg=61 val=0
             mpv-308   [002]   171.286647: regmap_reg_write:     2-001c reg=61 val=9800
             mpv-308   [002]   171.286650: regmap_hw_write_start: 2-001c reg=61 count=1
             mpv-308   [002]   171.287345: regmap_hw_write_done: 2-001c reg=61 count=1
             mpv-308   [002]   171.287379: regmap_reg_read_cache: 2-001c reg=63 val=e818
             mpv-308   [002]   171.287381: regmap_reg_write:     2-001c reg=63 val=e8d8
             mpv-308   [002]   171.287384: regmap_hw_write_start: 2-001c reg=63 count=1
             mpv-308   [002]   171.287845: regmap_hw_write_done: 2-001c reg=63 count=1
             mpv-308   [002]   171.287875: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-308   [002]   171.289021: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-308   [002]   171.289025: regmap_reg_read:      2-001c reg=6a val=23
             mpv-308   [002]   171.289027: regmap_reg_write:     2-001c reg=6a val=24
             mpv-308   [002]   171.289029: regmap_hw_write_start: 2-001c reg=6a count=1
             mpv-308   [002]   171.289561: regmap_hw_write_done: 2-001c reg=6a count=1
             mpv-308   [002]   171.289565: regmap_hw_read_start: 2-001c reg=6c count=1
             mpv-308   [002]   171.290174: regmap_hw_read_done:  2-001c reg=6c count=1
             mpv-308   [002]   171.290177: regmap_reg_read:      2-001c reg=124 val=420
             mpv-308   [002]   171.290180: regmap_reg_write:     2-001c reg=124 val=220
             mpv-308   [002]   171.290185: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-308   [002]   171.290800: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-308   [002]   171.290804: regmap_reg_read:      2-001c reg=6a val=24
             mpv-308   [002]   171.290807: regmap_hw_write_start: 2-001c reg=6c count=1
             mpv-308   [002]   171.291300: regmap_hw_write_done: 2-001c reg=6c count=1
             mpv-308   [002]   171.291333: regmap_reg_read_cache: 2-001c reg=8f val=1100
             mpv-308   [002]   171.291335: regmap_reg_write:     2-001c reg=8f val=3100
             mpv-308   [002]   171.291339: regmap_hw_write_start: 2-001c reg=8f count=1
             mpv-308   [002]   171.291802: regmap_hw_write_done: 2-001c reg=8f count=1
             mpv-308   [002]   171.291830: regmap_reg_read_cache: 2-001c reg=8e val=4
             mpv-308   [002]   171.291833: regmap_reg_write:     2-001c reg=8e val=9
             mpv-308   [002]   171.291838: regmap_hw_write_start: 2-001c reg=8e count=1
             mpv-308   [002]   171.292433: regmap_hw_write_done: 2-001c reg=8e count=1
             mpv-308   [002]   171.292461: regmap_reg_write:     2-001c reg=177 val=9f00
             mpv-308   [002]   171.292466: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-308   [002]   171.293274: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-308   [002]   171.293278: regmap_reg_read:      2-001c reg=6a val=24
             mpv-308   [002]   171.293281: regmap_reg_write:     2-001c reg=6a val=77
             mpv-308   [002]   171.293284: regmap_hw_write_start: 2-001c reg=6a count=1
             mpv-308   [002]   171.293894: regmap_hw_write_done: 2-001c reg=6a count=1
             mpv-308   [002]   171.293897: regmap_hw_write_start: 2-001c reg=6c count=1
             mpv-308   [002]   171.294484: regmap_hw_write_done: 2-001c reg=6c count=1
             mpv-308   [002]   171.294510: regmap_reg_read_cache: 2-001c reg=63 val=e8d8
             mpv-308   [002]   171.294513: regmap_reg_write:     2-001c reg=63 val=a8d0
             mpv-308   [002]   171.294516: regmap_hw_write_start: 2-001c reg=63 count=1
             mpv-308   [002]   171.294976: regmap_hw_write_done: 2-001c reg=63 count=1
             mpv-308   [002]   171.295001: regmap_reg_read_cache: 2-001c reg=63 val=a8d0
             mpv-308   [002]   171.295004: regmap_reg_write:     2-001c reg=63 val=a8f0
             mpv-308   [002]   171.295006: regmap_hw_write_start: 2-001c reg=63 count=1
             mpv-308   [002]   171.295680: regmap_hw_write_done: 2-001c reg=63 count=1
             mpv-308   [002]   171.306100: regmap_reg_read_cache: 2-001c reg=63 val=a8f0
             mpv-308   [002]   171.306108: regmap_reg_write:     2-001c reg=63 val=e8f8
             mpv-308   [002]   171.306114: regmap_hw_write_start: 2-001c reg=63 count=1
             mpv-308   [002]   171.306885: regmap_hw_write_done: 2-001c reg=63 count=1
             mpv-308   [002]   171.306954: regmap_reg_read_cache: 2-001c reg=8f val=3100
             mpv-308   [002]   171.306957: regmap_reg_write:     2-001c reg=8f val=1140
             mpv-308   [002]   171.306961: regmap_hw_write_start: 2-001c reg=8f count=1
             mpv-308   [002]   171.307532: regmap_hw_write_done: 2-001c reg=8f count=1
             mpv-308   [002]   171.307559: regmap_reg_read_cache: 2-001c reg=91 val=c00
             mpv-308   [002]   171.307561: regmap_reg_write:     2-001c reg=91 val=e00
             mpv-308   [002]   171.307564: regmap_hw_write_start: 2-001c reg=91 count=1
             mpv-308   [002]   171.308068: regmap_hw_write_done: 2-001c reg=91 count=1
             mpv-308   [002]   171.308093: regmap_reg_read_cache: 2-001c reg=90 val=646
             mpv-308   [002]   171.308096: regmap_reg_write:     2-001c reg=90 val=737
             mpv-308   [002]   171.308099: regmap_hw_write_start: 2-001c reg=90 count=1
             mpv-308   [002]   171.308573: regmap_hw_write_done: 2-001c reg=90 count=1
             mpv-308   [002]   171.308600: regmap_reg_write:     2-001c reg=137 val=1c00
             mpv-308   [002]   171.308607: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-308   [002]   171.309204: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-308   [002]   171.309212: regmap_reg_read:      2-001c reg=6a val=77
             mpv-308   [002]   171.309215: regmap_reg_write:     2-001c reg=6a val=37
             mpv-308   [002]   171.309217: regmap_hw_write_start: 2-001c reg=6a count=1
             mpv-308   [002]   171.309994: regmap_hw_write_done: 2-001c reg=6a count=1
             mpv-308   [002]   171.309999: regmap_hw_write_start: 2-001c reg=6c count=1
             mpv-308   [002]   171.310714: regmap_hw_write_done: 2-001c reg=6c count=1
             mpv-308   [002]   171.310747: regmap_reg_read_cache: 2-001c reg=8e val=9
             mpv-308   [002]   171.310750: regmap_reg_write:     2-001c reg=8e val=5
             mpv-308   [002]   171.310755: regmap_hw_write_start: 2-001c reg=8e count=1
             mpv-308   [002]   171.311331: regmap_hw_write_done: 2-001c reg=8e count=1
             mpv-308   [002]   171.311361: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-308   [002]   171.312384: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-308   [002]   171.312388: regmap_reg_read:      2-001c reg=6a val=37
             mpv-308   [002]   171.312391: regmap_reg_write:     2-001c reg=6a val=24
             mpv-308   [002]   171.312394: regmap_hw_write_start: 2-001c reg=6a count=1
             mpv-308   [002]   171.312891: regmap_hw_write_done: 2-001c reg=6a count=1
             mpv-308   [002]   171.312897: regmap_hw_read_start: 2-001c reg=6c count=1
             mpv-308   [002]   171.313657: regmap_hw_read_done:  2-001c reg=6c count=1
             mpv-308   [002]   171.313661: regmap_reg_read:      2-001c reg=124 val=220
             mpv-308   [002]   171.313664: regmap_reg_write:     2-001c reg=124 val=420
             mpv-308   [002]   171.313667: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-308   [002]   171.314977: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-308   [002]   171.314984: regmap_reg_read:      2-001c reg=6a val=24
             mpv-308   [002]   171.314990: regmap_hw_write_start: 2-001c reg=6c count=1
             mpv-308   [002]   171.315479: regmap_hw_write_done: 2-001c reg=6c count=1
             mpv-308   [002]   171.315519: regmap_reg_read_cache: 2-001c reg=2 val=cbcb
             mpv-308   [002]   171.315522: regmap_reg_write:     2-001c reg=2 val=4b4b
             mpv-308   [002]   171.315525: regmap_hw_write_start: 2-001c reg=2 count=1
             mpv-308   [002]   171.316002: regmap_hw_write_done: 2-001c reg=2 count=1
          mpv/ao-318   [003]   171.744407: regmap_reg_read_cache: 70080000.ahub reg=0 val=70777
          mpv/ao-318   [003]   171.744424: regmap_reg_write:     70080000.ahub reg=0 val=80070777
          mpv/ao-318   [003]   171.744433: regmap_reg_read_cache: 70080400.i2s reg=0 val=403
          mpv/ao-318   [003]   171.744435: regmap_reg_write:     70080400.i2s reg=0 val=80000403
             mpv-308   [002]   173.755178: regmap_reg_read_cache: 70080000.ahub reg=0 val=80070777
             mpv-308   [002]   173.755188: regmap_reg_write:     70080000.ahub reg=0 val=70777
             mpv-308   [002]   173.755196: regmap_reg_read_cache: 70080400.i2s reg=0 val=80000403
             mpv-308   [002]   173.755198: regmap_reg_write:     70080400.i2s reg=0 val=403

Broken
------

# cat /sys/class/i2c-dev/i2c-2/name
7000d000.i2c

...

	i2c@7000d000 {
		clock-frequency = <100000>;
		status = "okay";

		rt5640: rt5640@1c {
			compatible = "realtek,rt5640";
			reg = <0x1c>;

			interrupt-parent = <&gpio>;
			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;

			realtek,dmic1-data-pin = <1>;
			realtek,dmic2-data-pin = <0>;
			realtek,in1-differential;
		};

...

# cat /proc/asound/card0/pcm0p/sub0/hw_params
access: MMAP_INTERLEAVED
format: S24_LE
subformat: STD
channels: 2
rate: 48000 (48000/1)
period_size: 512
buffer_size: 4096
# trace-cmd record -e regmap:*
# trace-cmd report

CPU 0 is empty
CPU 1 is empty
cpus=4

             mpv-281   [002]    40.227541: regmap_cache_only:    70080000.ahub flag=0
             mpv-281   [002]    40.227554: regmap_cache_only:    70080000.ahub flag=0
             mpv-281   [002]    40.227572: regmap_cache_only:    70080400.i2s flag=0
             mpv-281   [002]    40.236905: regmap_reg_read_cache: 2-001c reg=64 val=0
             mpv-281   [002]    40.236921: regmap_reg_read_cache: 2-001c reg=80 val=0
             mpv-281   [002]    40.236931: regmap_reg_read_cache: 2-001c reg=70 val=8000
             mpv-281   [002]    40.236935: regmap_reg_read_cache: 2-001c reg=70 val=8000
             mpv-281   [002]    40.236939: regmap_reg_write:     2-001c reg=70 val=8008
             mpv-281   [002]    40.236950: regmap_hw_write_start: 2-001c reg=70 count=1
             mpv-281   [002]    40.237776: regmap_hw_write_done: 2-001c reg=70 count=1
             mpv-281   [002]    40.237828: regmap_reg_read_cache: 2-001c reg=73 val=1114
             mpv-281   [002]    40.237831: regmap_reg_write:     2-001c reg=73 val=8114
             mpv-281   [002]    40.237836: regmap_hw_write_start: 2-001c reg=73 count=1
             mpv-281   [002]    40.241723: regmap_hw_write_done: 2-001c reg=73 count=1
             mpv-281   [002]    40.241794: regmap_reg_read_cache: 70080400.i2s reg=0 val=400
             mpv-281   [002]    40.241798: regmap_reg_write:     70080400.i2s reg=0 val=405
             mpv-281   [002]    40.241817: regmap_reg_write:     70080400.i2s reg=4 val=2f
             mpv-281   [002]    40.241820: regmap_reg_write:     70080400.i2s reg=14 val=1015504
             mpv-281   [002]    40.241823: regmap_reg_write:     70080400.i2s reg=8 val=10001
    kworker/u8:1-36    [003]    40.242987: regmap_reg_read_cache: 2-001c reg=63 val=0
    kworker/u8:1-36    [003]    40.242992: regmap_reg_write:     2-001c reg=63 val=a810
    kworker/u8:1-36    [003]    40.243002: regmap_hw_write_start: 2-001c reg=63 count=1
    kworker/u8:1-36    [003]    40.243519: regmap_hw_write_done: 2-001c reg=63 count=1
    kworker/u8:1-36    [003]    40.256915: regmap_reg_read_cache: 2-001c reg=63 val=a810
    kworker/u8:1-36    [003]    40.256924: regmap_reg_write:     2-001c reg=63 val=e818
    kworker/u8:1-36    [003]    40.256933: regmap_hw_write_start: 2-001c reg=63 count=1
    kworker/u8:1-36    [003]    40.257590: regmap_hw_write_done: 2-001c reg=63 count=1
    kworker/u8:1-36    [003]    40.257597: regmap_reg_read_cache: 2-001c reg=fa val=3f01
    kworker/u8:1-36    [003]    40.257600: regmap_reg_read_cache: 2-001c reg=93 val=3030
             mpv-281   [002]    40.257670: regmap_reg_read_cache: 2-001c reg=61 val=0
             mpv-281   [002]    40.257674: regmap_reg_write:     2-001c reg=61 val=9800
             mpv-281   [002]    40.257678: regmap_hw_write_start: 2-001c reg=61 count=1
             mpv-281   [002]    40.258409: regmap_hw_write_done: 2-001c reg=61 count=1
             mpv-281   [002]    40.258448: regmap_reg_read_cache: 2-001c reg=63 val=e818
             mpv-281   [002]    40.258451: regmap_reg_write:     2-001c reg=63 val=e8d8
             mpv-281   [002]    40.258454: regmap_hw_write_start: 2-001c reg=63 count=1
             mpv-281   [002]    40.259701: regmap_hw_write_done: 2-001c reg=63 count=1
             mpv-281   [002]    40.259751: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-281   [002]    40.260357: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-281   [002]    40.260361: regmap_reg_read:      2-001c reg=6a val=23
             mpv-281   [002]    40.260365: regmap_reg_write:     2-001c reg=6a val=24
             mpv-281   [002]    40.260367: regmap_hw_write_start: 2-001c reg=6a count=1
             mpv-281   [002]    40.260881: regmap_hw_write_done: 2-001c reg=6a count=1
             mpv-281   [002]    40.260885: regmap_hw_read_start: 2-001c reg=6c count=1
             mpv-281   [002]    40.263245: regmap_hw_read_done:  2-001c reg=6c count=1
             mpv-281   [002]    40.263251: regmap_reg_read:      2-001c reg=124 val=420
             mpv-281   [002]    40.263255: regmap_reg_write:     2-001c reg=124 val=220
             mpv-281   [002]    40.263260: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-281   [002]    40.264325: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-281   [002]    40.264330: regmap_reg_read:      2-001c reg=6a val=24
             mpv-281   [002]    40.264334: regmap_hw_write_start: 2-001c reg=6c count=1
             mpv-281   [002]    40.264827: regmap_hw_write_done: 2-001c reg=6c count=1
             mpv-281   [002]    40.264859: regmap_reg_read_cache: 2-001c reg=8f val=1100
             mpv-281   [002]    40.264867: regmap_reg_write:     2-001c reg=8f val=3100
             mpv-281   [002]    40.264871: regmap_hw_write_start: 2-001c reg=8f count=1
             mpv-281   [002]    40.265939: regmap_hw_write_done: 2-001c reg=8f count=1
             mpv-281   [002]    40.265976: regmap_reg_read_cache: 2-001c reg=8e val=4
             mpv-281   [002]    40.265981: regmap_reg_write:     2-001c reg=8e val=9
             mpv-281   [002]    40.265986: regmap_hw_write_start: 2-001c reg=8e count=1
             mpv-281   [002]    40.267142: regmap_hw_write_done: 2-001c reg=8e count=1
             mpv-281   [002]    40.267172: regmap_reg_write:     2-001c reg=177 val=9f00
             mpv-281   [002]    40.267182: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-281   [002]    40.267842: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-281   [002]    40.267845: regmap_reg_read:      2-001c reg=6a val=24
             mpv-281   [002]    40.267848: regmap_reg_write:     2-001c reg=6a val=77
             mpv-281   [002]    40.267851: regmap_hw_write_start: 2-001c reg=6a count=1
             mpv-281   [002]    40.268937: regmap_hw_write_done: 2-001c reg=6a count=1
             mpv-281   [002]    40.268943: regmap_hw_write_start: 2-001c reg=6c count=1
             mpv-281   [002]    40.269454: regmap_hw_write_done: 2-001c reg=6c count=1
             mpv-281   [002]    40.269484: regmap_reg_read_cache: 2-001c reg=63 val=e8d8
             mpv-281   [002]    40.269487: regmap_reg_write:     2-001c reg=63 val=a8d0
             mpv-281   [002]    40.269490: regmap_hw_write_start: 2-001c reg=63 count=1
             mpv-281   [002]    40.270012: regmap_hw_write_done: 2-001c reg=63 count=1
             mpv-281   [002]    40.271740: regmap_reg_read_cache: 2-001c reg=63 val=a8d0
             mpv-281   [002]    40.271748: regmap_reg_write:     2-001c reg=63 val=a8f0
             mpv-281   [002]    40.271753: regmap_hw_write_start: 2-001c reg=63 count=1
             mpv-281   [002]    40.272240: regmap_hw_write_done: 2-001c reg=63 count=1
             mpv-281   [002]    40.286888: regmap_reg_read_cache: 2-001c reg=63 val=a8f0
             mpv-281   [002]    40.286901: regmap_reg_write:     2-001c reg=63 val=e8f8
             mpv-281   [002]    40.286917: regmap_hw_write_start: 2-001c reg=63 count=1
             mpv-281   [002]    40.287748: regmap_hw_write_done: 2-001c reg=63 count=1
             mpv-281   [002]    40.287841: regmap_reg_read_cache: 2-001c reg=8f val=3100
             mpv-281   [002]    40.287844: regmap_reg_write:     2-001c reg=8f val=1140
             mpv-281   [002]    40.287847: regmap_hw_write_start: 2-001c reg=8f count=1
             mpv-281   [002]    40.288310: regmap_hw_write_done: 2-001c reg=8f count=1
             mpv-281   [002]    40.288339: regmap_reg_read_cache: 2-001c reg=91 val=c00
             mpv-281   [002]    40.288341: regmap_reg_write:     2-001c reg=91 val=e00
             mpv-281   [002]    40.288344: regmap_hw_write_start: 2-001c reg=91 count=1
             mpv-281   [002]    40.288808: regmap_hw_write_done: 2-001c reg=91 count=1
             mpv-281   [002]    40.288838: regmap_reg_read_cache: 2-001c reg=90 val=646
             mpv-281   [002]    40.288840: regmap_reg_write:     2-001c reg=90 val=737
             mpv-281   [002]    40.288844: regmap_hw_write_start: 2-001c reg=90 count=1
             mpv-281   [002]    40.289792: regmap_hw_write_done: 2-001c reg=90 count=1
             mpv-281   [002]    40.289828: regmap_reg_write:     2-001c reg=137 val=1c00
             mpv-281   [002]    40.289837: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-281   [002]    40.291772: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-281   [002]    40.291782: regmap_reg_read:      2-001c reg=6a val=77
             mpv-281   [002]    40.291788: regmap_reg_write:     2-001c reg=6a val=37
             mpv-281   [002]    40.291792: regmap_hw_write_start: 2-001c reg=6a count=1
             mpv-281   [002]    40.292320: regmap_hw_write_done: 2-001c reg=6a count=1
             mpv-281   [002]    40.292324: regmap_hw_write_start: 2-001c reg=6c count=1
             mpv-281   [002]    40.293579: regmap_hw_write_done: 2-001c reg=6c count=1
             mpv-281   [002]    40.293616: regmap_reg_read_cache: 2-001c reg=8e val=9
             mpv-281   [002]    40.293618: regmap_reg_write:     2-001c reg=8e val=5
             mpv-281   [002]    40.293623: regmap_hw_write_start: 2-001c reg=8e count=1
             mpv-281   [002]    40.294179: regmap_hw_write_done: 2-001c reg=8e count=1
             mpv-281   [002]    40.294211: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-281   [002]    40.295183: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-281   [002]    40.295187: regmap_reg_read:      2-001c reg=6a val=37
             mpv-281   [002]    40.295194: regmap_reg_write:     2-001c reg=6a val=24
             mpv-281   [002]    40.295196: regmap_hw_write_start: 2-001c reg=6a count=1
             mpv-281   [002]    40.296301: regmap_hw_write_done: 2-001c reg=6a count=1
             mpv-281   [002]    40.296308: regmap_hw_read_start: 2-001c reg=6c count=1
             mpv-281   [002]    40.298769: regmap_hw_read_done:  2-001c reg=6c count=1
             mpv-281   [002]    40.298777: regmap_reg_read:      2-001c reg=124 val=220
             mpv-281   [002]    40.298784: regmap_reg_write:     2-001c reg=124 val=420
             mpv-281   [002]    40.298790: regmap_hw_read_start: 2-001c reg=6a count=1
             mpv-281   [002]    40.299542: regmap_hw_read_done:  2-001c reg=6a count=1
             mpv-281   [002]    40.299549: regmap_reg_read:      2-001c reg=6a val=24
             mpv-281   [002]    40.299555: regmap_hw_write_start: 2-001c reg=6c count=1
             mpv-281   [002]    40.300054: regmap_hw_write_done: 2-001c reg=6c count=1
             mpv-281   [002]    40.300107: regmap_reg_read_cache: 2-001c reg=2 val=cbcb
             mpv-281   [002]    40.300110: regmap_reg_write:     2-001c reg=2 val=4b4b
             mpv-281   [002]    40.300115: regmap_hw_write_start: 2-001c reg=2 count=1
             mpv-281   [002]    40.300756: regmap_hw_write_done: 2-001c reg=2 count=1
          mpv/ao-290   [003]    40.721759: regmap_reg_read_cache: 70080000.ahub reg=0 val=70777
          mpv/ao-290   [003]    40.721776: regmap_reg_write:     70080000.ahub reg=0 val=80070777
          mpv/ao-290   [003]    40.721787: regmap_reg_read_cache: 70080400.i2s reg=0 val=405
          mpv/ao-290   [003]    40.721789: regmap_reg_write:     70080400.i2s reg=0 val=80000405
             mpv-281   [002]    41.693159: regmap_reg_read_cache: 70080000.ahub reg=0 val=80070777
             mpv-281   [002]    41.693185: regmap_reg_write:     70080000.ahub reg=0 val=70777
             mpv-281   [002]    41.693200: regmap_reg_read_cache: 70080400.i2s reg=0 val=80000405
             mpv-281   [002]    41.693203: regmap_reg_write:     70080400.i2s reg=0 val=405
author
#17 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 143 lines · Dmitry Osipenko

20.12.2019 16:57, Jon Hunter пишет:

Quoted 142 lines · Ben Dooks
Quoted 127 lines · Jon Hunter
Quoted 126 lines · Dmitry Osipenko
Quoted 113 lines

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 106 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 97 lines · Dmitry Osipenko
Quoted 96 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 90 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE
formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed
in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

---
    sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----
    1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +12 -1
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
        struct device *dev = dai->dev;
        struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
        unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
        struct tegra30_ahub_cif_conf cif_conf;
          if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
        switch (params_format(params)) {
        case SNDRV_PCM_FORMAT_S16_LE:
            val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
            sample_size = 16;
            break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
        default:
            return -EINVAL;

       }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
        cif_conf.threshold = 0;
        cif_conf.audio_channels = 2;
        cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
        cif_conf.expand = 0;
        cif_conf.stereo_conv = 0;

       cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
            .channels_min = 2,
            .channels_max = 2,
            .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
        },
        .capture = {
            .stream_name = "Capture",
            .channels_min = 2,
            .channels_max = 2,
            .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
        },
        .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

       .symmetric_rates = 1,

Hello,

Quoted 7 lines
Quoted 2 lines

This patch breaks audio on Tegra30. I don't see errors anywhere, but there is no audio and reverting this patch helps. Please fix it.

What is the failure mode? I can try and take a look at this some time this week, but I am not sure if I have any boards with an actual useful
audio output?

Quoted 5 lines

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something times out during of the audio playback. For now I don't have any more info.

Quoted 5 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Given that the audio drivers uses regmap, it could be good to dump the I2S/AHUB registers while the clip if playing with and without this patch to see the differences. I am curious if the audio is now being played as 24 or 32-bit instead of 16-bit now these are available.

Quoted 8 lines
Quoted 4 lines

You could also dump the hw_params to see the format while playing as well ...

$ /proc/asound/<scard-name>/pcm0p/sub0/hw_params

I suppose it is also possible that the codec isn't properly doing >16 bits and the fact we now offer 24 and 32 could be an issue. I've not got anything with an audio output on it that would be easy to test.

I thought I had tested on a Jetson TK1 (Tegra124) but it was sometime back. However, admittedly I may have only done simple 16-bit testing with speaker-test.

Quoted 5 lines
Quoted 3 lines

We do verify that all soundcards are detected and registered as expected during daily testing, but at the moment we don't have anything that verifies actual playback.

Please take a look at the attached logs.

I wonder if we are falling into FIFO configuration issues with the non-16 bit case.

Can you try adding the following two patches?

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html

From 5b5add6595c03e09ac183b787264d40ca356f491 Mon Sep 17 00:00:00 2001
From: Ben Dooks <[email protected]>
Date: Tue, 16 Apr 2019 14:34:48 +0100
Subject: [PATCH 2/2] ASoC: tegra: take packing settings from the audio
cif_config

If the CIF is not configured as 16 or 8 bit, then the packing for 8/16 bits should not be enabled as the hardware only supports 8 or 16 bit packing.

---
 sound/soc/tegra/tegra30_ahub.c | 29 +++++++++++++++++++++--------
 1 file changed, 21 insertions(+), 8 deletions(-)
sound/soc/tegra/tegra30_ahub.c +21 -8
index 24bc03428b45..0768c6b6dc25 100644
@@ -96,10 +96,17 @@ int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif rxcif,
 	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
 	val = tegra30_apbif_read(reg);
 	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK |
-		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK);
-	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) |
-	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN |
-	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK |
+		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN);
+	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT);
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 ||
+	    cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_8_4;
+
 	tegra30_apbif_write(reg, val);
 
 	cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_RX;
@@ -203,10 +210,16 @@ int tegra30_ahub_setup_tx_fifo(enum tegra30_ahub_txcif txcif,
 	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
 	val = tegra30_apbif_read(reg);
 	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_MASK |
-		 TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK);
-	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT) |
-	       TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN |
-	       TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
+		 TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK |
+		 TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN);
+	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT);
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 ||
+	    cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_8_4;
 	tegra30_apbif_write(reg, val);
 
 	cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_TX;
Signature · 1 line
2.24.0

From b2e14a9cc4c07d2dfdb5aa4269b55910d46a04d0 Mon Sep 17 00:00:00 2001
From: Ben Dooks <[email protected]>
Date: Tue, 4 Oct 2016 16:31:53 +0100
Subject: [PATCH 1/2] ASoC: tegra: config fifos on hw_param changes

If the hw_params uses a different bit or channel count, then we need to change both the I2S unit's CIF configuration as well as the APBIF one.

To allow changing the APBIF, add a call to reconfigure the RX or TX FIFO without changing the DMA or allocation, and get the I2S driver to call it once the hw params have been calculate.

---
 sound/soc/tegra/tegra30_ahub.c | 115 ++++++++++++++++++---------------
 sound/soc/tegra/tegra30_ahub.h |   5 ++
 sound/soc/tegra/tegra30_i2s.c  |   2 +
 3 files changed, 69 insertions(+), 53 deletions(-)
sound/soc/tegra/tegra30_ahub.c +62 -53

160 lines not on this page · raw message

sound/soc/tegra/tegra30_ahub.h +5 -0
index 6889c5f23d02..26120aee64b3 100644
@@ -490,6 +490,11 @@ void tegra30_ahub_set_cif(struct regmap *regmap, unsigned int reg,
 void tegra124_ahub_set_cif(struct regmap *regmap, unsigned int reg,
 			   struct tegra30_ahub_cif_conf *conf);
 
+extern int tegra30_ahub_setup_tx_fifo(enum tegra30_ahub_txcif txcif,
+				      struct tegra30_ahub_cif_conf *cif_conf);
+extern int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif,
+				      struct tegra30_ahub_cif_conf *cif_conf);
+
 struct tegra30_ahub_soc_data {
 	u32 mod_list_mask;
 	void (*set_audio_cif)(struct regmap *regmap,
sound/soc/tegra/tegra30_i2s.c +2 -0
index e99126600fc4..89ac0c5e1332 100644
@@ -201,9 +201,11 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 
 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 		cif_conf.direction = TEGRA30_AUDIOCIF_DIRECTION_RX;
+		tegra30_ahub_setup_tx_fifo(i2s->playback_fifo_cif, &cif_conf);
 		reg = TEGRA30_I2S_CIF_RX_CTRL;
 	} else {
 		cif_conf.direction = TEGRA30_AUDIOCIF_DIRECTION_TX;
+		tegra30_ahub_setup_rx_fifo(i2s->capture_fifo_cif, &cif_conf);
 		reg = TEGRA30_I2S_CIF_TX_CTRL;
 	}
 
Signature · 1 line
2.24.0
#18 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

20.12.2019 17:56, Ben Dooks пишет:

Quoted 155 lines · Dmitry Osipenko
Quoted 154 lines

20.12.2019 16:57, Jon Hunter пишет:

Quoted 152 lines · Ben Dooks
Quoted 134 lines · Jon Hunter
Quoted 133 lines · Dmitry Osipenko
Quoted 117 lines

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 109 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 102 lines · Dmitry Osipenko
Quoted 97 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 91 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the
option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE
formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed
in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
---
    sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----

    1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +1 -1
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
         struct device *dev = dai->dev;
         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
         unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
         struct tegra30_ahub_cif_conf cif_conf;
           if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
         switch (params_format(params)) {

        case SNDRV_PCM_FORMAT_S16_LE:
            val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
            sample_size = 16;
            break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
        default:
            return -EINVAL;
        }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
         cif_conf.threshold = 0;
         cif_conf.audio_channels = 2;
         cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
         cif_conf.expand = 0;
         cif_conf.stereo_conv = 0;

        cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
             .channels_min = 2,
             .channels_max = 2,
             .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
         },
         .capture = {
             .stream_name = "Capture",
             .channels_min = 2,
             .channels_max = 2,
             .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
         },
         .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

        .symmetric_rates = 1,

Hello,

Quoted 3 lines

This patch breaks audio on Tegra30. I don't see errors anywhere, but
there is no audio and reverting this patch helps. Please fix it.

Quoted 5 lines

What is the failure mode? I can try and take a look at this some time
this week, but I am not sure if I have any boards with an actual useful
audio output?

Quoted 6 lines

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something
times out during of the audio playback. For now I don't have any more info.

Quoted 6 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Given that the audio drivers uses regmap, it could be good to dump the I2S/AHUB registers while the clip if playing with and without this patch
to see the differences. I am curious if the audio is now being played as
24 or 32-bit instead of 16-bit now these are available.

Quoted 8 lines
Quoted 4 lines

You could also dump the hw_params to see the format while playing as well ...

$ /proc/asound/<scard-name>/pcm0p/sub0/hw_params

I suppose it is also possible that the codec isn't properly doing >16 bits and the fact we now offer 24 and 32 could be an issue. I've not got anything with an audio output on it that would be easy to test.

I thought I had tested on a Jetson TK1 (Tegra124) but it was sometime back. However, admittedly I may have only done simple 16-bit testing with speaker-test.

We do verify that all soundcards are detected and registered as expected during daily testing, but at the moment we don't have anything that verifies actual playback.

Quoted 6 lines
Quoted 1 line

Please take a look at the attached logs.

I wonder if we are falling into FIFO configuration issues with the non-16 bit case.

Can you try adding the following two patches?

It is much better now! There is no horrible noise and no stuttering, but audio still has a "robotic" effect, like freq isn't correct.
_______________________________________________
Alsa-devel mailing list
[email protected]
https://mailman.alsa-project.org/mailman/listinfo/alsa-devel

author
#19 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 158 lines · Dmitry Osipenko

20.12.2019 17:56, Ben Dooks пишет:

Quoted 157 lines · Dmitry Osipenko
Quoted 155 lines

20.12.2019 16:57, Jon Hunter пишет:

Quoted 145 lines · Ben Dooks
Quoted 134 lines · Jon Hunter
Quoted 133 lines · Dmitry Osipenko
Quoted 117 lines

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 109 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 102 lines · Dmitry Osipenko
Quoted 97 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 91 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the
option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE
formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed
in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code

---
     sound/soc/tegra/tegra30_i2s.c | 25 ++++++++++++++++++++-----
     1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +12 -1
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
         struct device *dev = dai->dev;
         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
         unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
         struct tegra30_ahub_cif_conf cif_conf;
           if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
         switch (params_format(params)) {
         case SNDRV_PCM_FORMAT_S16_LE:
             val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
             sample_size = 16;
             break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
         default:
             return -EINVAL;

        }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
         cif_conf.threshold = 0;
         cif_conf.audio_channels = 2;
         cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
         cif_conf.expand = 0;
         cif_conf.stereo_conv = 0;

        cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
             .channels_min = 2,
             .channels_max = 2,
             .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
         },
         .capture = {
             .stream_name = "Capture",
             .channels_min = 2,
             .channels_max = 2,
             .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
         },
         .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

        .symmetric_rates = 1,

Hello,

Quoted 3 lines

This patch breaks audio on Tegra30. I don't see errors anywhere, but
there is no audio and reverting this patch helps. Please fix it.

Quoted 5 lines

What is the failure mode? I can try and take a look at this some time
this week, but I am not sure if I have any boards with an actual useful
audio output?

Quoted 6 lines

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something
times out during of the audio playback. For now I don't have any more info.

Quoted 6 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Given that the audio drivers uses regmap, it could be good to dump the I2S/AHUB registers while the clip if playing with and without this patch
to see the differences. I am curious if the audio is now being played as
24 or 32-bit instead of 16-bit now these are available.

Quoted 8 lines
Quoted 4 lines

You could also dump the hw_params to see the format while playing as well ...

$ /proc/asound/<scard-name>/pcm0p/sub0/hw_params

I suppose it is also possible that the codec isn't properly doing >16 bits and the fact we now offer 24 and 32 could be an issue. I've not got anything with an audio output on it that would be easy to test.

Quoted 7 lines

I thought I had tested on a Jetson TK1 (Tegra124) but it was sometime back. However, admittedly I may have only done simple 16-bit testing with speaker-test.

We do verify that all soundcards are detected and registered as expected during daily testing, but at the moment we don't have anything that verifies actual playback.

Please take a look at the attached logs.

Quoted 7 lines
Quoted 4 lines

I wonder if we are falling into FIFO configuration issues with the non-16 bit case.

Can you try adding the following two patches?

It is much better now! There is no horrible noise and no stuttering, but audio still has a "robotic" effect, like freq isn't correct.

I wonder if there's an issue with FIFO stoking? I should also possibly add the correctly stop FIFOs patch as well.

Signature · 8 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
_______________________________________________
Alsa-devel mailing list
[email protected]
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#20 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

20.12.2019 18:25, Ben Dooks пишет:

Quoted 167 lines · Dmitry Osipenko
Quoted 166 lines

20.12.2019 17:56, Ben Dooks пишет:

Quoted 165 lines · Dmitry Osipenko
Quoted 154 lines

20.12.2019 16:57, Jon Hunter пишет:

Quoted 153 lines · Ben Dooks
Quoted 138 lines · Jon Hunter
Quoted 137 lines · Dmitry Osipenko
Quoted 119 lines

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 111 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 104 lines · Dmitry Osipenko
Quoted 99 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 93 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add the
option to the tegra30_i2s_hw_params to configure the S24_LE or S32_LE
formats when requested.

[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]

---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is needed
in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
---
     sound/soc/tegra/tegra30_i2s.c | 25
++++++++++++++++++++-----

     1 file changed, 20 insertions(+), 5 deletions(-)
sound/soc/tegra/tegra30_i2s.c +0 -0
index 73f0dddeaef3..063f34c882af 100644
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
          struct device *dev = dai->dev;

         struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
         unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits; struct tegra30_ahub_cif_conf cif_conf;
           if (params_channels(params) != 2)

sound/soc/tegra/tegra30_i2s.c +0 -0
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
          switch (params_format(params)) {

         case SNDRV_PCM_FORMAT_S16_LE:
             val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16; sample_size = 16;
             break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
         default:
             return -EINVAL;
         }

sound/soc/tegra/tegra30_i2s.c +2 -2
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
          cif_conf.threshold = 0;
          cif_conf.audio_channels = 2;
          cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
          cif_conf.expand = 0;
          cif_conf.stereo_conv = 0;

         cif_conf.replicate = 0;

sound/soc/tegra/tegra30_i2s.c +6 -2
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
              .channels_min = 2,
              .channels_max = 2,
              .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
          },
          .capture = {
              .stream_name = "Capture",
              .channels_min = 2,
              .channels_max = 2,
              .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
          },
          .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

         .symmetric_rates = 1,

Hello,

Quoted 3 lines

This patch breaks audio on Tegra30. I don't see errors anywhere, but
there is no audio and reverting this patch helps. Please fix it.

Quoted 5 lines

What is the failure mode? I can try and take a look at this some time
this week, but I am not sure if I have any boards with an actual useful
audio output?

Quoted 6 lines

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something
times out during of the audio playback. For now I don't have any more info.

Quoted 7 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Given that the audio drivers uses regmap, it could be good to dump the
I2S/AHUB registers while the clip if playing with and without this patch
to see the differences. I am curious if the audio is now being played as
24 or 32-bit instead of 16-bit now these are available.

Quoted 8 lines
Quoted 4 lines

You could also dump the hw_params to see the format while playing as well ...

$ /proc/asound/<scard-name>/pcm0p/sub0/hw_params

I suppose it is also possible that the codec isn't properly doing >16 bits and the fact we now offer 24 and 32 could be an issue. I've not got anything with an audio output on it that would be easy to test.

I thought I had tested on a Jetson TK1 (Tegra124) but it was sometime back. However, admittedly I may have only done simple 16-bit testing with speaker-test.

Quoted 6 lines
Quoted 4 lines

We do verify that all soundcards are detected and registered as expected
during daily testing, but at the moment we don't have anything that verifies actual playback.

Please take a look at the attached logs.

I wonder if we are falling into FIFO configuration issues with the non-16 bit case.

Quoted 7 lines
Quoted 4 lines
Quoted 1 line

Can you try adding the following two patches?

It is much better now! There is no horrible noise and no stuttering, but audio still has a "robotic" effect, like freq isn't correct.

I wonder if there's an issue with FIFO stoking? I should also possibly add the correctly stop FIFOs patch as well.

I'll be happy to try more patches.

Meanwhile sound on v5.5+ is broken and thus the incomplete patches should be reverted.
_______________________________________________
Alsa-devel mailing list
[email protected]
https://mailman.alsa-project.org/mailman/listinfo/alsa-devel

author
#21 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 173 lines · Dmitry Osipenko

20.12.2019 18:25, Ben Dooks пишет:

Quoted 172 lines · Dmitry Osipenko
Quoted 170 lines

20.12.2019 17:56, Ben Dooks пишет:

Quoted 160 lines · Dmitry Osipenko
Quoted 159 lines

20.12.2019 16:57, Jon Hunter пишет:

Quoted 157 lines · Ben Dooks
Quoted 138 lines · Jon Hunter
Quoted 137 lines · Dmitry Osipenko
Quoted 119 lines

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 111 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 104 lines · Dmitry Osipenko
Quoted 99 lines

18.10.2019 18:48, Ben Dooks пишет:

Quoted 95 lines

From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so add
the
option to the tegra30_i2s_hw_params to configure the S24_LE or
S32_LE
formats when requested.

Signed-off-by: Edward Cragg <[email protected]>
[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]
Signed-off-by: Ben Dooks <[email protected]>
---
squash 5aeca5a055fd ASoC: tegra: i2s: pm_runtime_get_sync() is
needed
in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
---
     sound/soc/tegra/tegra30_i2s.c | 25
++++++++++++++++++++-----
     1 file changed, 20 insertions(+), 5 deletions(-)

diff --git a/sound/soc/tegra/tegra30_i2s.c
b/sound/soc/tegra/tegra30_i2s.c
index 73f0dddeaef3..063f34c882af 100644
--- a/sound/soc/tegra/tegra30_i2s.c
+++ b/sound/soc/tegra/tegra30_i2s.c
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
snd_pcm_substream *substream,
         struct device *dev = dai->dev;
         struct tegra30_i2s *i2s =
snd_soc_dai_get_drvdata(dai);
         unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
         struct tegra30_ahub_cif_conf cif_conf;
           if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
snd_pcm_substream *substream,
         switch (params_format(params)) {
         case SNDRV_PCM_FORMAT_S16_LE:
             val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
             sample_size = 16;
             break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
         default:
             return -EINVAL;
         }
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
snd_pcm_substream *substream,
         cif_conf.threshold = 0;
         cif_conf.audio_channels = 2;
         cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
         cif_conf.expand = 0;
         cif_conf.stereo_conv = 0;
         cif_conf.replicate = 0;
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
tegra30_i2s_dai_template = {
             .channels_min = 2,
             .channels_max = 2,
             .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
         },
         .capture = {
             .stream_name = "Capture",
             .channels_min = 2,
             .channels_max = 2,
             .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
         },
         .ops = &tegra30_i2s_dai_ops,
         .symmetric_rates = 1,

Hello,

Quoted 3 lines

This patch breaks audio on Tegra30. I don't see errors anywhere, but
there is no audio and reverting this patch helps. Please fix it.

Quoted 5 lines

What is the failure mode? I can try and take a look at this some time
this week, but I am not sure if I have any boards with an actual useful
audio output?

Quoted 6 lines

The failure mode is that there no sound. I also noticed that video playback stutters a lot if movie file has audio track, seems something
times out during of the audio playback. For now I don't have any more info.

Quoted 7 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Given that the audio drivers uses regmap, it could be good to dump the
I2S/AHUB registers while the clip if playing with and without this patch
to see the differences. I am curious if the audio is now being played as
24 or 32-bit instead of 16-bit now these are available.

Quoted 8 lines
Quoted 4 lines

You could also dump the hw_params to see the format while playing as well ...

$ /proc/asound/<scard-name>/pcm0p/sub0/hw_params

I suppose it is also possible that the codec isn't properly doing >16 bits and the fact we now offer 24 and 32 could be an issue. I've not got anything with an audio output on it that would be easy to test.

I thought I had tested on a Jetson TK1 (Tegra124) but it was sometime back. However, admittedly I may have only done simple 16-bit testing with speaker-test.

We do verify that all soundcards are detected and registered as expected
during daily testing, but at the moment we don't have anything that verifies actual playback.

Quoted 6 lines
Quoted 1 line

Please take a look at the attached logs.

I wonder if we are falling into FIFO configuration issues with the non-16 bit case.

Can you try adding the following two patches?

It is much better now! There is no horrible noise and no stuttering, but audio still has a "robotic" effect, like freq isn't correct.

Quoted 7 lines
Quoted 2 lines

I wonder if there's an issue with FIFO stoking? I should also possibly add the correctly stop FIFOs patch as well.

I'll be happy to try more patches.

Meanwhile sound on v5.5+ is broken and thus the incomplete patches should be reverted.

Have you checked if just removing the 24/32 bits from .formats in the dai template and see if the problem continues? I will try and see if I can find the code that does the fifo level checking and see if the problem is in the FIFO fill or something else in the audio hub setup.

Signature · 8 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
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#22 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

20.12.2019 20:06, Ben Dooks пишет:

Quoted 191 lines · Dmitry Osipenko
Quoted 190 lines

20.12.2019 18:25, Ben Dooks пишет:

Quoted 188 lines · Dmitry Osipenko
Quoted 176 lines

20.12.2019 17:56, Ben Dooks пишет:

Quoted 175 lines · Dmitry Osipenko
Quoted 173 lines

20.12.2019 16:57, Jon Hunter пишет:

Quoted 166 lines · Ben Dooks
Quoted 151 lines · Jon Hunter
Quoted 150 lines · Dmitry Osipenko
Quoted 127 lines

25.11.2019 20:22, Dmitry Osipenko пишет:

Quoted 118 lines

25.11.2019 13:37, Ben Dooks пишет:

Quoted 109 lines · Dmitry Osipenko
Quoted 107 lines

18.10.2019 18:48, Ben Dooks пишет:
From: Edward Cragg <[email protected]>

The tegra3 audio can support 24 and 32 bit sample sizes so
add
the
option to the tegra30_i2s_hw_params to configure the
S24_LE or
S32_LE
formats when requested.

Signed-off-by: Edward Cragg <[email protected]>
[[email protected]: fixup merge of 24 and 32bit]
[[email protected]: add pm calls around ytdm config]
[[email protected]: drop debug printing to dev_dbg]
Signed-off-by: Ben Dooks <[email protected]>
---
squash 5aeca5a055fd ASoC: tegra: i2s:
pm_runtime_get_sync() is
needed
in tdm code

ASoC: tegra: i2s: pm_runtime_get_sync() is needed in tdm code
---
      sound/soc/tegra/tegra30_i2s.c | 25
++++++++++++++++++++-----
      1 file changed, 20 insertions(+), 5 deletions(-)

diff --git a/sound/soc/tegra/tegra30_i2s.c
b/sound/soc/tegra/tegra30_i2s.c
index 73f0dddeaef3..063f34c882af 100644
--- a/sound/soc/tegra/tegra30_i2s.c
+++ b/sound/soc/tegra/tegra30_i2s.c
@@ -127,7 +127,7 @@ static int tegra30_i2s_hw_params(struct
snd_pcm_substream *substream,
          struct device *dev = dai->dev;
          struct tegra30_i2s *i2s =
snd_soc_dai_get_drvdata(dai);
          unsigned int mask, val, reg;
-    int ret, sample_size, srate, i2sclock, bitcnt;
+    int ret, sample_size, srate, i2sclock, bitcnt,
audio_bits;
          struct tegra30_ahub_cif_conf cif_conf;
            if (params_channels(params) != 2)
@@ -137,8 +137,19 @@ static int tegra30_i2s_hw_params(struct
snd_pcm_substream *substream,
          switch (params_format(params)) {
          case SNDRV_PCM_FORMAT_S16_LE:
              val = TEGRA30_I2S_CTRL_BIT_SIZE_16;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_16;
              sample_size = 16;
              break;
+    case SNDRV_PCM_FORMAT_S24_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_24;
+        sample_size = 24;
+        break;
+    case SNDRV_PCM_FORMAT_S32_LE:
+        val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
+        audio_bits = TEGRA30_AUDIOCIF_BITS_32;
+        sample_size = 32;
+        break;
          default:
              return -EINVAL;
          }
@@ -170,8 +181,8 @@ static int tegra30_i2s_hw_params(struct
snd_pcm_substream *substream,
          cif_conf.threshold = 0;
          cif_conf.audio_channels = 2;
          cif_conf.client_channels = 2;
-    cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
-    cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
+    cif_conf.audio_bits = audio_bits;
+    cif_conf.client_bits = audio_bits;
          cif_conf.expand = 0;
          cif_conf.stereo_conv = 0;
          cif_conf.replicate = 0;
@@ -306,14 +317,18 @@ static const struct snd_soc_dai_driver
tegra30_i2s_dai_template = {
              .channels_min = 2,
              .channels_max = 2,
              .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
          },
          .capture = {
              .stream_name = "Capture",
              .channels_min = 2,
              .channels_max = 2,
              .rates = SNDRV_PCM_RATE_8000_96000,
-        .formats = SNDRV_PCM_FMTBIT_S16_LE,
+        .formats = SNDRV_PCM_FMTBIT_S32_LE |
+               SNDRV_PCM_FMTBIT_S24_LE |
+               SNDRV_PCM_FMTBIT_S16_LE,
          },
          .ops = &tegra30_i2s_dai_ops,
          .symmetric_rates = 1,

Hello,

This patch breaks audio on Tegra30. I don't see errors
anywhere, but
there is no audio and reverting this patch helps. Please
fix it.

Quoted 7 lines

What is the failure mode? I can try and take a look at this some
time
this week, but I am not sure if I have any boards with an actual
useful
audio output?

Quoted 7 lines

The failure mode is that there no sound. I also noticed that video
playback stutters a lot if movie file has audio track, seems something
times out during of the audio playback. For now I don't have any more info.

Quoted 8 lines

Oh, I didn't say how to reproduce it.. for example simply playing big_buck_bunny_720p_h264.mov in MPV has the audio problem.

https://download.blender.org/peach/bigbuckbunny_movies/big_buck_bunny_720p_h264.mov

Given that the audio drivers uses regmap, it could be good to dump the
I2S/AHUB registers while the clip if playing with and without this patch
to see the differences. I am curious if the audio is now being played as
24 or 32-bit instead of 16-bit now these are available.

You could also dump the hw_params to see the format while playing as
well ...

Quoted 7 lines
Quoted 1 line
$ /proc/asound/<scard-name>/pcm0p/sub0/hw_params

I suppose it is also possible that the codec isn't properly doing >16
bits and the fact we now offer 24 and 32 could be an issue. I've not
got anything with an audio output on it that would be easy to test.

I thought I had tested on a Jetson TK1 (Tegra124) but it was sometime
back. However, admittedly I may have only done simple 16-bit testing with speaker-test.

Quoted 4 lines

We do verify that all soundcards are detected and registered as expected
during daily testing, but at the moment we don't have anything that verifies actual playback.

Please take a look at the attached logs.

Quoted 8 lines
Quoted 4 lines

I wonder if we are falling into FIFO configuration issues with the non-16 bit case.

Can you try adding the following two patches?

It is much better now! There is no horrible noise and no stuttering, but
audio still has a "robotic" effect, like freq isn't correct.

I wonder if there's an issue with FIFO stoking? I should also possibly add the correctly stop FIFOs patch as well.

Quoted 7 lines
Quoted 4 lines

I'll be happy to try more patches.

Meanwhile sound on v5.5+ is broken and thus the incomplete patches should be reverted.

Have you checked if just removing the 24/32 bits from .formats in the dai template and see if the problem continues?

It works.

Quoted 4 lines

I will try and
see if I can find the code that does the fifo level checking and see if the problem is in the FIFO fill or something else in the audio hub setup.

Ok
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author
#23 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
#24 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

05.01.2020 03:04, Ben Dooks пишет:

Quoted 4 lines

[snip]

I've just gone through testing.

Quoted 9 lines

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?
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author
#25 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 12 lines · Dmitry Osipenko

05.01.2020 03:04, Ben Dooks пишет:

Quoted 11 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

Quoted 5 lines
Quoted 2 lines

My preference is to remove the 24-bit support and keep the 32 bit in.

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

Signature · 6 lines
Ben

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author
#26 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 18 lines · Ben Dooks
Quoted 15 lines · Dmitry Osipenko

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 6 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

I'll follow up later,

Signature · 8 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
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#27 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

06.01.2020 22:00, Ben Dooks пишет:

Quoted 24 lines · Ben Dooks
Quoted 23 lines · Dmitry Osipenko
Quoted 12 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 11 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

Quoted 5 lines
Quoted 2 lines

My preference is to remove the 24-bit support and keep the 32 bit in.

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

Quoted 7 lines
Quoted 1 line

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
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maintainer
#28 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 31 lines · Dmitry Osipenko

06.01.2020 22:00, Ben Dooks пишет:

Quoted 30 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 6 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 6 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.

I chatted with Sameer about this, so yes the AHUB can repack, but there is a problem with S24_LE where if we try to extract 24-bits we actually get the upper 24-bits and not the lower LSBs in the 32-bit data element. So actually we don't support S24_LE.

Ben do you need 24-bit support or 32-bit or both?

Jon

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#29 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

08.01.2020 14:37, Jon Hunter пишет:

Quoted 40 lines · Dmitry Osipenko
Quoted 31 lines

06.01.2020 22:00, Ben Dooks пишет:

Quoted 30 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 6 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 6 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.

Quoted 6 lines

I chatted with Sameer about this, so yes the AHUB can repack, but there is a problem with S24_LE where if we try to extract 24-bits we actually get the upper 24-bits and not the lower LSBs in the 32-bit data element. So actually we don't support S24_LE.

Ben do you need 24-bit support or 32-bit or both?

Any updates? Should we revert all the applied patches for now?

author
#30 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 47 lines · Dmitry Osipenko

08.01.2020 14:37, Jon Hunter пишет:

Quoted 46 lines · Dmitry Osipenko
Quoted 31 lines

06.01.2020 22:00, Ben Dooks пишет:

Quoted 30 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 6 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 6 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.

I chatted with Sameer about this, so yes the AHUB can repack, but there is a problem with S24_LE where if we try to extract 24-bits we actually get the upper 24-bits and not the lower LSBs in the 32-bit data element. So actually we don't support S24_LE.

Ben do you need 24-bit support or 32-bit or both?

I think the S24 should work unpacked. The packed just doesn't seem to be an option on tegra2/tegra3 hardware (the manual does not talk about it either).

I will try and get this looked at again on Thursday 23rd and see if I can run some more tests with 24 sample data in the input format and a logic analyser on the output.

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
author
#31 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Dmitry Osipenko
Quoted 31 lines · Dmitry Osipenko

06.01.2020 22:00, Ben Dooks пишет:

Quoted 30 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 6 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

 sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5
 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5
 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
author
#32 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 42 lines · Ben Dooks
Quoted 31 lines · Dmitry Osipenko

06.01.2020 22:00, Ben Dooks пишет:

Quoted 30 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 6 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

Quoted 8 lines

 sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

I should have checked pll_a_out0 rate, for 24bit 2ch, I get pll_a_out at which makes:

11289600/(24*2*44100) = 5.3333333333

For some reason the PLL can't get a decent divisor for this.

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
#33 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

24.01.2020 00:59, Ben Dooks пишет:

Quoted 54 lines · Ben Dooks
Quoted 44 lines · Dmitry Osipenko
Quoted 33 lines

06.01.2020 22:00, Ben Dooks пишет:

Quoted 32 lines · Ben Dooks
Quoted 19 lines · Dmitry Osipenko
Quoted 16 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 14 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 7 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

Quoted 8 lines

  sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

Quoted 6 lines

I should have checked pll_a_out0 rate, for 24bit 2ch, I get pll_a_out at which makes:

11289600/(24*2*44100) = 5.3333333333

For some reason the PLL can't get a decent divisor for this.

Have you tried to adjust the predefined PLLA rate? Please see tegra_clk_init_table in drivers/clk/tegra/clk-tegra30.c. Will be interesting if it works with that.

Sowjanya said that the PLLA rate setup is going to be moved to the audio driver [1], maybe that's what we already need for 24bit.

[1] https://lkml.org/lkml/2020/1/21/744

#34 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

24.01.2020 01:11, Dmitry Osipenko пишет:

Quoted 62 lines

24.01.2020 00:59, Ben Dooks пишет:

Quoted 54 lines · Ben Dooks
Quoted 44 lines · Dmitry Osipenko
Quoted 33 lines

06.01.2020 22:00, Ben Dooks пишет:

Quoted 32 lines · Ben Dooks
Quoted 19 lines · Dmitry Osipenko
Quoted 16 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 14 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 7 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

Quoted 8 lines

  sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

Quoted 6 lines

I should have checked pll_a_out0 rate, for 24bit 2ch, I get pll_a_out at which makes:

11289600/(24*2*44100) = 5.3333333333

For some reason the PLL can't get a decent divisor for this.

Quoted 8 lines

Have you tried to adjust the predefined PLLA rate? Please see tegra_clk_init_table in drivers/clk/tegra/clk-tegra30.c. Will be interesting if it works with that.

Sowjanya said that the PLLA rate setup is going to be moved to the audio driver [1], maybe that's what we already need for 24bit.

[1] https://lkml.org/lkml/2020/1/21/744

Actually, tegra_asoc_utils_set_rate() sets the PLLA rate, but the values are hardcoded there.

maintainer
#35 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Ben Dooks
Quoted 54 lines · Ben Dooks
Quoted 44 lines · Ben Dooks
Quoted 33 lines · Dmitry Osipenko

06.01.2020 22:00, Ben Dooks пишет:

Quoted 32 lines · Ben Dooks
Quoted 19 lines · Dmitry Osipenko
Quoted 16 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 14 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 7 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

Quoted 8 lines

  sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

Quoted 6 lines

I should have checked pll_a_out0 rate, for 24bit 2ch, I get pll_a_out at which makes:

11289600/(24*2*44100) = 5.3333333333

For some reason the PLL can't get a decent divisor for this.

Yes that is going to be a problem. I assume that your codec wants a 256*fs MCLK? Maybe in that case you are better off having the codec drive the bit clock and fsync?

Is 24-bit critical to what you are doing?

Otherwise maybe we should drop the 24-bit support for now and just keep 32-bit.

Jon

Signature · 1 line
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maintainer
#36 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 8 lines · Jon Hunter

Yes that is going to be a problem. I assume that your codec wants a 256*fs MCLK? Maybe in that case you are better off having the codec drive the bit clock and fsync?

Is 24-bit critical to what you are doing?

Otherwise maybe we should drop the 24-bit support for now and just keep 32-bit.

Removing the support because one particular board has limited clocks isn't good - it'd be better to have components with clocking restrictions impose constraints as needed.

author
#37 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 5 lines · Mark Brown
Quoted 3 lines · Jon Hunter

Yes that is going to be a problem. I assume that your codec wants a 256*fs MCLK? Maybe in that case you are better off having the codec drive the bit clock and fsync?

Would be lovely, but tegra i2s clock slave is still on the list of things I have to get into the kernel (it doesn't work and no-one in the kernel currently uses it...)

Quoted 9 lines
Quoted 4 lines

Is 24-bit critical to what you are doing?

Otherwise maybe we should drop the 24-bit support for now and just keep 32-bit.

Removing the support because one particular board has limited clocks isn't good - it'd be better to have components with clocking restrictions impose constraints as needed.

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
maintainer
#38 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Ben Dooks
Quoted 43 lines · Ben Dooks
Quoted 32 lines · Dmitry Osipenko

06.01.2020 22:00, Ben Dooks пишет:

Quoted 31 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 7 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

Quoted 7 lines

 sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

I was looking at using sox to create such as file, but the above command generates a S24_3LE file and not S24_LE file. The codec on Jetson-TK1 supports S24_LE but does not support S24_3LE and so I cannot test this. Anyway, we really need to test S24_LE and not S24_3LE because this is the problem that Dmitry is having.

Ben is S24_3LE what you really need to support?

Dmitry, does the following fix your problem?

sound/soc/tegra/tegra30_i2s.c +0 -0
index dbed3c5408e7..92845c4b63f4 100644
@@ -140,7 +140,7 @@ static int tegra30_i2s_hw_params(struct

snd_pcm_substream *substream,

                audio_bits = TEGRA30_AUDIOCIF_BITS_16;
                sample_size = 16;
                break;
-       case SNDRV_PCM_FORMAT_S24_LE:
+       case SNDRV_PCM_FORMAT_S24_3LE:
                val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
                audio_bits = TEGRA30_AUDIOCIF_BITS_24;
                sample_size = 24;
@@ -318,7 +318,7 @@ static const struct snd_soc_dai_driver
tegra30_i2s_dai_template = {
                .channels_max = 2,
                .rates = SNDRV_PCM_RATE_8000_96000,
                .formats = SNDRV_PCM_FMTBIT_S32_LE |
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
                           SNDRV_PCM_FMTBIT_S16_LE,
        },
        .capture = {
@@ -327,7 +327,7 @@ static const struct snd_soc_dai_driver
tegra30_i2s_dai_template = {
                .channels_max = 2,
                .rates = SNDRV_PCM_RATE_8000_96000,
                .formats = SNDRV_PCM_FMTBIT_S32_LE |
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
                           SNDRV_PCM_FMTBIT_S16_LE,
        },
        .ops = &tegra30_i2s_dai_ops,

Jon

Signature · 1 line
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author
#39 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 53 lines · Jon Hunter
Quoted 43 lines · Ben Dooks
Quoted 32 lines · Dmitry Osipenko

06.01.2020 22:00, Ben Dooks пишет:

Quoted 31 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 7 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

Quoted 7 lines

 sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

Quoted 7 lines

I was looking at using sox to create such as file, but the above command generates a S24_3LE file and not S24_LE file. The codec on Jetson-TK1 supports S24_LE but does not support S24_3LE and so I cannot test this. Anyway, we really need to test S24_LE and not S24_3LE because this is the problem that Dmitry is having.

Ben is S24_3LE what you really need to support?

No, it is S24_LE the format this hardware supports. I wonder if aplay is transforming it.

Plug PCM: Linear conversion PCM (S24_LE)
Its setup is:

  stream       : PLAYBACK
  access       : RW_INTERLEAVED
  format       : S24_3LE
  subformat    : STD
  channels     : 2

So I assume aplay has turned the S24_3LE -> S24_LE

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
#40 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 1 line · Ben Dooks

So I assume aplay has turned the S24_3LE -> S24_LE

A couple of years ago (so may be inaccurate now) I concluded after some testing that S24_LE was broken in arecord and aplay, at least when it came to .wav files. Meaning that files I recorded with arecord could be played back by aplay, but not in any other application I tried, such as Audacity.

I can try to dig out the gory details, but ISTR it came down to the header(s) in the .wav file being incorrectly filled in with regard to number of bits per sample vs valid bits per sample.

/Ricard

Signature · 3 lines
Ricard Wolf Wanderlof                           ricardw(at)axis.com
Axis Communications AB, Lund, Sweden            www.axis.com
Phone +46 46 272 2016                           Fax +46 46 13 61 30
author
#41 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Jon Hunter
Quoted 53 lines · Jon Hunter
Quoted 43 lines · Ben Dooks
Quoted 32 lines · Dmitry Osipenko

06.01.2020 22:00, Ben Dooks пишет:

Quoted 31 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 7 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

Quoted 7 lines

 sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

Quoted 7 lines

I was looking at using sox to create such as file, but the above command generates a S24_3LE file and not S24_LE file. The codec on Jetson-TK1 supports S24_LE but does not support S24_3LE and so I cannot test this. Anyway, we really need to test S24_LE and not S24_3LE because this is the problem that Dmitry is having.

Ben is S24_3LE what you really need to support?

I was fairly sure it was saying S24 format, the aplay just prints S24_LE (but seems to hide the implementtjon)

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
#42 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Jon Hunter

24.01.2020 19:50, Jon Hunter пишет:

Quoted 98 lines · Ben Dooks
Quoted 43 lines · Dmitry Osipenko
Quoted 32 lines

06.01.2020 22:00, Ben Dooks пишет:

Quoted 31 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 7 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

Quoted 7 lines

 sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

I was looking at using sox to create such as file, but the above command generates a S24_3LE file and not S24_LE file. The codec on Jetson-TK1 supports S24_LE but does not support S24_3LE and so I cannot test this. Anyway, we really need to test S24_LE and not S24_3LE because this is the problem that Dmitry is having.

Ben is S24_3LE what you really need to support?

Dmitry, does the following fix your problem?

sound/soc/tegra/tegra30_i2s.c +1 -1
index dbed3c5408e7..92845c4b63f4 100644
@@ -140,7 +140,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
                audio_bits = TEGRA30_AUDIOCIF_BITS_16;
                sample_size = 16;
                break;
-       case SNDRV_PCM_FORMAT_S24_LE:
+       case SNDRV_PCM_FORMAT_S24_3LE:
                val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
                audio_bits = TEGRA30_AUDIOCIF_BITS_24;
                sample_size = 24;
sound/soc/tegra/tegra30_i2s.c +1 -1
@@ -318,7 +318,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                .channels_max = 2,
                .rates = SNDRV_PCM_RATE_8000_96000,
                .formats = SNDRV_PCM_FMTBIT_S32_LE |
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
                           SNDRV_PCM_FMTBIT_S16_LE,
        },
        .capture = {
sound/soc/tegra/tegra30_i2s.c +1 -1
@@ -327,7 +327,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                .channels_max = 2,
                .rates = SNDRV_PCM_RATE_8000_96000,
                .formats = SNDRV_PCM_FMTBIT_S32_LE |
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
                           SNDRV_PCM_FMTBIT_S16_LE,
        },
        .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

Jon

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

The v5.5 kernel is released now with the broken audio and apparently getting 24bit to work won't be trivial (if possible at all). Ben, could you please send a patch to fix v5.5 by removing the S24 support advertisement from the driver?

#43 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

27.01.2020 22:20, Dmitry Osipenko пишет:

Quoted 105 lines

24.01.2020 19:50, Jon Hunter пишет:

Quoted 98 lines · Ben Dooks
Quoted 43 lines · Dmitry Osipenko
Quoted 32 lines

06.01.2020 22:00, Ben Dooks пишет:

Quoted 31 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 7 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

Quoted 7 lines

 sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

I was looking at using sox to create such as file, but the above command generates a S24_3LE file and not S24_LE file. The codec on Jetson-TK1 supports S24_LE but does not support S24_3LE and so I cannot test this. Anyway, we really need to test S24_LE and not S24_3LE because this is the problem that Dmitry is having.

Ben is S24_3LE what you really need to support?

Dmitry, does the following fix your problem?

sound/soc/tegra/tegra30_i2s.c +1 -1
index dbed3c5408e7..92845c4b63f4 100644
@@ -140,7 +140,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
                audio_bits = TEGRA30_AUDIOCIF_BITS_16;
                sample_size = 16;
                break;
-       case SNDRV_PCM_FORMAT_S24_LE:
+       case SNDRV_PCM_FORMAT_S24_3LE:
                val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
                audio_bits = TEGRA30_AUDIOCIF_BITS_24;
                sample_size = 24;
sound/soc/tegra/tegra30_i2s.c +1 -1
@@ -318,7 +318,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                .channels_max = 2,
                .rates = SNDRV_PCM_RATE_8000_96000,
                .formats = SNDRV_PCM_FMTBIT_S32_LE |
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
                           SNDRV_PCM_FMTBIT_S16_LE,
        },
        .capture = {
sound/soc/tegra/tegra30_i2s.c +1 -1
@@ -327,7 +327,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                .channels_max = 2,
                .rates = SNDRV_PCM_RATE_8000_96000,
                .formats = SNDRV_PCM_FMTBIT_S32_LE |
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
                           SNDRV_PCM_FMTBIT_S16_LE,
        },
        .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

Jon

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

Quoted 4 lines

The v5.5 kernel is released now with the broken audio and apparently getting 24bit to work won't be trivial (if possible at all). Ben, could you please send a patch to fix v5.5 by removing the S24 support advertisement from the driver?

I also suspect that s32 may need some extra patches and thus could be worthwhile to stop advertising it as well.

author
#44 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 106 lines · Dmitry Osipenko

27.01.2020 22:20, Dmitry Osipenko пишет:

Quoted 105 lines

24.01.2020 19:50, Jon Hunter пишет:

Quoted 98 lines · Ben Dooks
Quoted 43 lines · Dmitry Osipenko
Quoted 32 lines

06.01.2020 22:00, Ben Dooks пишет:

Quoted 31 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 7 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

Quoted 7 lines

 sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

I was looking at using sox to create such as file, but the above command generates a S24_3LE file and not S24_LE file. The codec on Jetson-TK1 supports S24_LE but does not support S24_3LE and so I cannot test this. Anyway, we really need to test S24_LE and not S24_3LE because this is the problem that Dmitry is having.

Ben is S24_3LE what you really need to support?

Dmitry, does the following fix your problem?

sound/soc/tegra/tegra30_i2s.c +1 -1
index dbed3c5408e7..92845c4b63f4 100644
@@ -140,7 +140,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
                 audio_bits = TEGRA30_AUDIOCIF_BITS_16;
                 sample_size = 16;
                 break;
-       case SNDRV_PCM_FORMAT_S24_LE:
+       case SNDRV_PCM_FORMAT_S24_3LE:
                 val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
                 audio_bits = TEGRA30_AUDIOCIF_BITS_24;
                 sample_size = 24;
sound/soc/tegra/tegra30_i2s.c +1 -1
@@ -318,7 +318,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                 .channels_max = 2,
                 .rates = SNDRV_PCM_RATE_8000_96000,
                 .formats = SNDRV_PCM_FMTBIT_S32_LE |
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
                            SNDRV_PCM_FMTBIT_S16_LE,
         },
         .capture = {
sound/soc/tegra/tegra30_i2s.c +1 -1
@@ -327,7 +327,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                 .channels_max = 2,
                 .rates = SNDRV_PCM_RATE_8000_96000,
                 .formats = SNDRV_PCM_FMTBIT_S32_LE |
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
                            SNDRV_PCM_FMTBIT_S16_LE,
         },
         .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

Jon

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

Quoted 7 lines
Quoted 4 lines

The v5.5 kernel is released now with the broken audio and apparently getting 24bit to work won't be trivial (if possible at all). Ben, could you please send a patch to fix v5.5 by removing the S24 support advertisement from the driver?

I also suspect that s32 may need some extra patches and thus could be worthwhile to stop advertising it as well.

As far as I am aware that works and we can hit the audio rates for it.

Signature · 8 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
_______________________________________________
Alsa-devel mailing list
[email protected]
https://mailman.alsa-project.org/mailman/listinfo/alsa-devel
maintainer
#45 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 123 lines · Ben Dooks
Quoted 122 lines · Dmitry Osipenko

27.01.2020 22:20, Dmitry Osipenko пишет:

Quoted 120 lines

24.01.2020 19:50, Jon Hunter пишет:

Quoted 109 lines · Ben Dooks
Quoted 52 lines · Dmitry Osipenko
Quoted 41 lines

06.01.2020 22:00, Ben Dooks пишет:

Quoted 32 lines · Ben Dooks
Quoted 22 lines · Dmitry Osipenko
Quoted 19 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 17 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects
24 bit samples in 32 bit words. I can't see any packing options to
do 24 bit in 24 bit, so we may have to remove 24 bit sample support
(which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 8 lines
Quoted 3 lines

Interesting.. Jon, could you please confirm that 24bit format isn't
usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

Quoted 7 lines

I need to check some things, I assumed 24 was 24 packed bits, it looks
like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

I'll follow up later,

Quoted 7 lines

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly
looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong
impression.
_________________________________

I did a quick test with the following:

Quoted 7 lines

  sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

I was looking at using sox to create such as file, but the above command
generates a S24_3LE file and not S24_LE file. The codec on Jetson-TK1 supports S24_LE but does not support S24_3LE and so I cannot test this. Anyway, we really need to test S24_LE and not S24_3LE because this is the problem that Dmitry is having.

Ben is S24_3LE what you really need to support?

Dmitry, does the following fix your problem?

sound/soc/tegra/tegra30_i2s.c +1 -1
index dbed3c5408e7..92845c4b63f4 100644
@@ -140,7 +140,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
                  audio_bits = TEGRA30_AUDIOCIF_BITS_16;
                  sample_size = 16;
                  break;
-       case SNDRV_PCM_FORMAT_S24_LE:
+       case SNDRV_PCM_FORMAT_S24_3LE:
                  val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
                  audio_bits = TEGRA30_AUDIOCIF_BITS_24;

                 sample_size = 24;

sound/soc/tegra/tegra30_i2s.c +0 -0
@@ -318,7 +318,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                  .channels_max = 2,
                  .rates = SNDRV_PCM_RATE_8000_96000,

                 .formats = SNDRV_PCM_FMTBIT_S32_LE | -                          SNDRV_PCM_FMTBIT_S24_LE | +                          SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S16_LE, },
         .capture = {

sound/soc/tegra/tegra30_i2s.c +0 -0
@@ -327,7 +327,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                  .channels_max = 2,
                  .rates = SNDRV_PCM_RATE_8000_96000,

                 .formats = SNDRV_PCM_FMTBIT_S32_LE | -                          SNDRV_PCM_FMTBIT_S24_LE | +                          SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S16_LE, },
         .ops = &tegra30_i2s_dai_ops,

Quoted 2 lines

Jon

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

The v5.5 kernel is released now with the broken audio and apparently getting 24bit to work won't be trivial (if possible at all). Ben, could you please send a patch to fix v5.5 by removing the S24 support advertisement from the driver?

Quoted 4 lines
Quoted 2 lines

I also suspect that s32 may need some extra patches and thus could be worthwhile to stop advertising it as well.

As far as I am aware that works and we can hit the audio rates for it.

I ran a test on Tegra124 Jetson-TK1 and 24-bit playback seems to work as Ben has indicated. So I don't think it is broken.

Can you try Ben's testcase on Tegra30 (ie. generate a tone using sox and use aplay to play)?

Jon

Signature · 1 line
nvpublic
#46 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

28.01.2020 16:19, Jon Hunter пишет:

Quoted 125 lines · Ben Dooks
Quoted 123 lines · Dmitry Osipenko
Quoted 122 lines

27.01.2020 22:20, Dmitry Osipenko пишет:

Quoted 120 lines

24.01.2020 19:50, Jon Hunter пишет:

Quoted 109 lines · Ben Dooks
Quoted 52 lines · Dmitry Osipenko
Quoted 41 lines

06.01.2020 22:00, Ben Dooks пишет:

Quoted 32 lines · Ben Dooks
Quoted 22 lines · Dmitry Osipenko
Quoted 19 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 17 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects
24 bit samples in 32 bit words. I can't see any packing options to
do 24 bit in 24 bit, so we may have to remove 24 bit sample support
(which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 8 lines
Quoted 3 lines

Interesting.. Jon, could you please confirm that 24bit format isn't
usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

Quoted 7 lines

I need to check some things, I assumed 24 was 24 packed bits, it looks
like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

I'll follow up later,

Quoted 7 lines

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly
looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong
impression.
_________________________________

I did a quick test with the following:

Quoted 7 lines

  sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

I was looking at using sox to create such as file, but the above command
generates a S24_3LE file and not S24_LE file. The codec on Jetson-TK1 supports S24_LE but does not support S24_3LE and so I cannot test this. Anyway, we really need to test S24_LE and not S24_3LE because this is the problem that Dmitry is having.

Ben is S24_3LE what you really need to support?

Dmitry, does the following fix your problem?

sound/soc/tegra/tegra30_i2s.c +1 -1
index dbed3c5408e7..92845c4b63f4 100644
@@ -140,7 +140,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
                  audio_bits = TEGRA30_AUDIOCIF_BITS_16;
                  sample_size = 16;
                  break;
-       case SNDRV_PCM_FORMAT_S24_LE:
+       case SNDRV_PCM_FORMAT_S24_3LE:
                  val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
                  audio_bits = TEGRA30_AUDIOCIF_BITS_24;

                 sample_size = 24;

sound/soc/tegra/tegra30_i2s.c +0 -0
@@ -318,7 +318,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                  .channels_max = 2,
                  .rates = SNDRV_PCM_RATE_8000_96000,

                 .formats = SNDRV_PCM_FMTBIT_S32_LE | -                          SNDRV_PCM_FMTBIT_S24_LE | +                          SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S16_LE, },
         .capture = {

sound/soc/tegra/tegra30_i2s.c +0 -0
@@ -327,7 +327,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                  .channels_max = 2,
                  .rates = SNDRV_PCM_RATE_8000_96000,

                 .formats = SNDRV_PCM_FMTBIT_S32_LE | -                          SNDRV_PCM_FMTBIT_S24_LE | +                          SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S16_LE, },
         .ops = &tegra30_i2s_dai_ops,

Quoted 2 lines

Jon

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

The v5.5 kernel is released now with the broken audio and apparently getting 24bit to work won't be trivial (if possible at all). Ben, could you please send a patch to fix v5.5 by removing the S24 support advertisement from the driver?

Quoted 7 lines
Quoted 4 lines
Quoted 2 lines

I also suspect that s32 may need some extra patches and thus could be worthwhile to stop advertising it as well.

As far as I am aware that works and we can hit the audio rates for it.

I ran a test on Tegra124 Jetson-TK1 and 24-bit playback seems to work as Ben has indicated. So I don't think it is broken.

Have you tried to replicate my case by playing the video file?

Quoted 2 lines

Can you try Ben's testcase on Tegra30 (ie. generate a tone using sox and use aplay to play)?

Surely I can try, but only if you'll share the sample file with me and give precise instructions how to test it.

maintainer
#47 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Jon Hunter
Quoted 9 lines · Jon Hunter
Quoted 8 lines · Ben Dooks
Quoted 7 lines · Dmitry Osipenko

27.01.2020 22:20, Dmitry Osipenko пишет:

Quoted 6 lines

24.01.2020 19:50, Jon Hunter пишет:

Quoted 5 lines · Ben Dooks
Quoted 3 lines · Dmitry Osipenko
Quoted 2 lines

06.01.2020 22:00, Ben Dooks пишет:

Quoted 1 line · Ben Dooks

Please delete unneeded context from mails when replying. Doing this makes it much easier to find your reply in the message, helping ensure it won't be missed by people scrolling through the irrelevant quoted material.

Quoted 10 lines
Quoted 4 lines
Quoted 2 lines

I also suspect that s32 may need some extra patches and thus could be worthwhile to stop advertising it as well.

As far as I am aware that works and we can hit the audio rates for it.

I ran a test on Tegra124 Jetson-TK1 and 24-bit playback seems to work as Ben has indicated. So I don't think it is broken.

Can you try Ben's testcase on Tegra30 (ie. generate a tone using sox and use aplay to play)?

Another test application that's quite useful for this sort of stuff is speaker-test, it generates audio data directly in arbatrary formats and it's part of alsa-utils so if you've got aplay and friends you may already have it already installed.

#48 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

28.01.2020 18:26, Mark Brown пишет:

Quoted 12 lines · Jon Hunter
Quoted 10 lines · Ben Dooks
Quoted 6 lines · Dmitry Osipenko
Quoted 3 lines

27.01.2020 22:20, Dmitry Osipenko пишет:
I also suspect that s32 may need some extra patches and thus could be worthwhile to stop advertising it as well.

As far as I am aware that works and we can hit the audio rates for it.

I ran a test on Tegra124 Jetson-TK1 and 24-bit playback seems to work as Ben has indicated. So I don't think it is broken.

Quoted 7 lines
Quoted 2 lines

Can you try Ben's testcase on Tegra30 (ie. generate a tone using sox and use aplay to play)?

Another test application that's quite useful for this sort of stuff is speaker-test, it generates audio data directly in arbatrary formats and it's part of alsa-utils so if you've got aplay and friends you may already have it already installed.

I tried speaker-test and it doesn't support S24_LE:

# speaker-test -h

speaker-test 1.1.9

Usage: speaker-test [OPTION]...

-h,--help       help
-D,--device     playback device
-r,--rate       stream rate in Hz
-c,--channels   count of channels in stream
-f,--frequency  sine wave frequency in Hz
-F,--format     sample format
-b,--buffer     ring buffer size in us
-p,--period     period size in us
-P,--nperiods   number of periods
-t,--test       pink=use pink noise, sine=use sine wave, wav=WAV file
-l,--nloops     specify number of loops to test, 0 = infinite
-s,--speaker    single speaker test. Values 1=Left, 2=right, etc
-w,--wavfile    Use the given WAV file as a test sound
-W,--wavdir     Specify the directory containing WAV files
-m,--chmap      Specify the channel map to override

-X,--force-frequency force frequencies outside the 30-8000hz range
-S,--scale Scale of generated test tones in percent (default=80)

Recognized sample formats are: S8 S16_LE S16_BE FLOAT_LE S24_3LE S24_3BE S32_LE S32_BE

maintainer
#49 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Jon Hunter

On 28/01/2020 13:19, Jon Hunter wrote:

...

Quoted 2 lines

I ran a test on Tegra124 Jetson-TK1 and 24-bit playback seems to work as Ben has indicated. So I don't think it is broken.

Actually, it does not work on TK1. Pulseaudio was converting from S24_3LE to S16_LE. If I use plughw to do the conversion it sounds distorted indeed.

Ben what audio codec are you testing with?

Jon

Playing WAVE 'tmp.wav' : Signed 24 bit Little Endian in 3bytes, Rate 44100 Hz, Stereo
Plug PCM: Linear conversion PCM (S24_LE)
Its setup is:

  stream       : PLAYBACK
  access       : RW_INTERLEAVED
  format       : S24_3LE
  subformat    : STD
  channels     : 2
  rate         : 44100
  exact rate   : 44100 (44100/1)
  msbits       : 24
  buffer_size  : 4096
  period_size  : 512
  period_time  : 11609
  tstamp_mode  : NONE
  tstamp_type  : MONOTONIC
  period_step  : 1
  avail_min    : 512

period_event : 0
start_threshold : 4096
stop_threshold : 4096
silence_threshold: 0
silence_size : 0
boundary : 1073741824
Slave: Hardware PCM card 0 'NVIDIA Tegra Jetson TK1' device 0 subdevice 0 Its setup is:

  stream       : PLAYBACK
  access       : MMAP_INTERLEAVED
  format       : S24_LE
  subformat    : STD
  channels     : 2
  rate         : 44100
  exact rate   : 44100 (44100/1)
  msbits       : 32
  buffer_size  : 4096
  period_size  : 512
  period_time  : 11609
  tstamp_mode  : NONE
  tstamp_type  : MONOTONIC
  period_step  : 1
  avail_min    : 512
  period_event : 0
  start_threshold  : 4096
  stop_threshold   : 4096
  silence_threshold: 0
  silence_size : 0
  boundary     : 1073741824
  appl_ptr     : 0
  hw_ptr       : 0
Signature · 1 line
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author
#50 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 5 lines · Jon Hunter

On 28/01/2020 13:19, Jon Hunter wrote:

...

Quoted 8 lines
Quoted 2 lines

I ran a test on Tegra124 Jetson-TK1 and 24-bit playback seems to work as Ben has indicated. So I don't think it is broken.

Actually, it does not work on TK1. Pulseaudio was converting from S24_3LE to S16_LE. If I use plughw to do the conversion it sounds distorted indeed.

Ben what audio codec are you testing with?

I think it is the sgtl5000

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
author
#51 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Dmitry Osipenko
Quoted 105 lines · Dmitry Osipenko

24.01.2020 19:50, Jon Hunter пишет:

Quoted 98 lines · Ben Dooks
Quoted 43 lines · Dmitry Osipenko
Quoted 32 lines

06.01.2020 22:00, Ben Dooks пишет:

Quoted 31 lines · Ben Dooks
Quoted 18 lines · Dmitry Osipenko
Quoted 15 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 7 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I need to check some things, I assumed 24 was 24 packed bits, it looks like the default is 24 in 32 bits so we may be ok. However I need to re-write my test case which assumed it was 24bits in 3 bytes (S24_3LE).

Quoted 7 lines
Quoted 1 line

I'll follow up later,

Okay, the S24_3LE isn't supported by RT5640 codec in my case. I briefly looked through the TRM doc and got impression that AHUB could re-pack data stream into something that codec supports, but maybe it's a wrong impression.
_________________________________

I did a quick test with the following:

Quoted 7 lines

 sox -n -b 16 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 24 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5 sox -n -b 32 -c 2 -r 44100 /tmp/tmp.wav  synth sine 500 vol 0.5

The 16 and 32 work fine, the 24 is showing a playback output freq of 440Hz instead of 500Hz... this suggests the clock is off, or there is something else weird going on...

I was looking at using sox to create such as file, but the above command generates a S24_3LE file and not S24_LE file. The codec on Jetson-TK1 supports S24_LE but does not support S24_3LE and so I cannot test this. Anyway, we really need to test S24_LE and not S24_3LE because this is the problem that Dmitry is having.

Ben is S24_3LE what you really need to support?

Dmitry, does the following fix your problem?

sound/soc/tegra/tegra30_i2s.c +1 -1
index dbed3c5408e7..92845c4b63f4 100644
@@ -140,7 +140,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
                 audio_bits = TEGRA30_AUDIOCIF_BITS_16;
                 sample_size = 16;
                 break;
-       case SNDRV_PCM_FORMAT_S24_LE:
+       case SNDRV_PCM_FORMAT_S24_3LE:
                 val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
                 audio_bits = TEGRA30_AUDIOCIF_BITS_24;
                 sample_size = 24;
sound/soc/tegra/tegra30_i2s.c +1 -1
@@ -318,7 +318,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                 .channels_max = 2,
                 .rates = SNDRV_PCM_RATE_8000_96000,
                 .formats = SNDRV_PCM_FMTBIT_S32_LE |
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
                            SNDRV_PCM_FMTBIT_S16_LE,
         },
         .capture = {
sound/soc/tegra/tegra30_i2s.c +1 -1
@@ -327,7 +327,7 @@ static const struct snd_soc_dai_driver
 tegra30_i2s_dai_template = {
                 .channels_max = 2,
                 .rates = SNDRV_PCM_RATE_8000_96000,
                 .formats = SNDRV_PCM_FMTBIT_S32_LE |
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
                            SNDRV_PCM_FMTBIT_S16_LE,
         },
         .ops = &tegra30_i2s_dai_ops,
Quoted 2 lines

Jon

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

Quoted 4 lines

The v5.5 kernel is released now with the broken audio and apparently getting 24bit to work won't be trivial (if possible at all). Ben, could you please send a patch to fix v5.5 by removing the S24 support advertisement from the driver?

That might be the best for the moment.

As far as my testing so far is that just the audio rate is off .
It might be worth putting it in as a config option or run time command option?

Signature · 8 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
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#52 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Dmitry Osipenko
Quoted 9 lines · Dmitry Osipenko

24.01.2020 19:50, Jon Hunter пишет:

Review

Quoted 4 lines

.rates = SNDRV_PCM_RATE_8000_96000, .formats = SNDRV_PCM_FMTBIT_S32_LE |

(quoted diff) +1 -1
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

If the format implemented by the driver is S24_3LE the driver should advertise S24_3LE.

Quoted 4 lines

The v5.5 kernel is released now with the broken audio and apparently getting 24bit to work won't be trivial (if possible at all). Ben, could you please send a patch to fix v5.5 by removing the S24 support advertisement from the driver?

Why is that the best fix rather than just advertising the format implemented by the driver?

I really don't understand why this is all taking so long, this thread just seems to be going round in interminable circles long after it looked like the issue was understood. I have to admit I've not read every single message in the thread but it's difficult to see why it doesn't seem to be making any progress.

#53 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

28.01.2020 15:13, Mark Brown пишет:

Quoted 8 lines · Dmitry Osipenko
Quoted 6 lines

24.01.2020 19:50, Jon Hunter пишет:

Quoted 4 lines

.rates = SNDRV_PCM_RATE_8000_96000, .formats = SNDRV_PCM_FMTBIT_S32_LE |

(quoted diff) +1 -1
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
Quoted 5 lines
Quoted 2 lines

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

If the format implemented by the driver is S24_3LE the driver should advertise S24_3LE.

It should be S24_LE, but seems we still don't know for sure.

Quoted 7 lines
Quoted 4 lines

The v5.5 kernel is released now with the broken audio and apparently getting 24bit to work won't be trivial (if possible at all). Ben, could you please send a patch to fix v5.5 by removing the S24 support advertisement from the driver?

Why is that the best fix rather than just advertising the format implemented by the driver?

The currently supported format that is known to work well is S16_LE.

I'm suggesting to drop the S24_LE and S32_LE that were added by the applied patches simply because this series wasn't tested properly before it was sent out and turned out that it doesn't work well.

Quoted 5 lines

I really don't understand why this is all taking so long, this thread just seems to be going round in interminable circles long after it looked like the issue was understood. I have to admit I've not read every single message in the thread but it's difficult to see why it doesn't seem to be making any progress.

Ben was trying to make a fix for the introduced problem, but it's not easy as we see now.

Perhaps the best solution should be to revert all of the three applied patches and try again later on, once all current problems will be resolved.

maintainer
#54 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 9 lines · Dmitry Osipenko

28.01.2020 15:13, Mark Brown пишет:

Quoted 8 lines · Dmitry Osipenko
Quoted 6 lines

24.01.2020 19:50, Jon Hunter пишет:

Quoted 4 lines

.rates = SNDRV_PCM_RATE_8000_96000, .formats = SNDRV_PCM_FMTBIT_S32_LE |

(quoted diff) +1 -1
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
Quoted 7 lines
Quoted 5 lines
Quoted 2 lines

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

If the format implemented by the driver is S24_3LE the driver should advertise S24_3LE.

It should be S24_LE, but seems we still don't know for sure.

Why?

Quoted 5 lines
Quoted 5 lines
Quoted 4 lines

The v5.5 kernel is released now with the broken audio and apparently getting 24bit to work won't be trivial (if possible at all). Ben, could you please send a patch to fix v5.5 by removing the S24 support advertisement from the driver?

Quoted 8 lines
Quoted 2 lines

Why is that the best fix rather than just advertising the format implemented by the driver?

The currently supported format that is known to work well is S16_LE.

I'm suggesting to drop the S24_LE and S32_LE that were added by the applied patches simply because this series wasn't tested properly before it was sent out and turned out that it doesn't work well.

S32_LE should be fine, however, I do have some concerns about S24_LE.

Jon

Signature · 1 line
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#55 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

28.01.2020 21:19, Jon Hunter пишет:

Quoted 14 lines · Dmitry Osipenko
Quoted 12 lines

28.01.2020 15:13, Mark Brown пишет:

Quoted 11 lines · Dmitry Osipenko
Quoted 9 lines

24.01.2020 19:50, Jon Hunter пишет:

Review

Quoted 4 lines

.rates = SNDRV_PCM_RATE_8000_96000, .formats = SNDRV_PCM_FMTBIT_S32_LE |

(quoted diff) +1 -1
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

Quoted 6 lines
Quoted 4 lines
Quoted 2 lines

If the format implemented by the driver is S24_3LE the driver should advertise S24_3LE.

It should be S24_LE, but seems we still don't know for sure.

Why?

/I think/ sound should be much more distorted if it was S24_3LE, but maybe I'm wrong.

author
#56 lore raw

Re: [alsa-devel] (no subject)

Quoted 15 lines · Dmitry Osipenko

28.01.2020 21:19, Jon Hunter пишет:

Quoted 14 lines · Dmitry Osipenko
Quoted 12 lines

28.01.2020 15:13, Mark Brown пишет:

Quoted 11 lines · Dmitry Osipenko
Quoted 9 lines

24.01.2020 19:50, Jon Hunter пишет:

Review

Quoted 4 lines

.rates = SNDRV_PCM_RATE_8000_96000, .formats = SNDRV_PCM_FMTBIT_S32_LE |

(quoted diff) +1 -1
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

Quoted 8 lines
Quoted 6 lines
Quoted 4 lines
Quoted 2 lines

If the format implemented by the driver is S24_3LE the driver should advertise S24_3LE.

It should be S24_LE, but seems we still don't know for sure.

Why?

/I think/ sound should be much more distorted if it was S24_3LE, but maybe I'm wrong.

S24_3LE is IICC the wrong thing and we can't support it on the tegra3

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
#57 lore raw

Re: [alsa-devel] (no subject)

Quoted 18 lines · Ben Dooks
Quoted 17 lines · Dmitry Osipenko

28.01.2020 21:19, Jon Hunter пишет:

Quoted 16 lines · Dmitry Osipenko
Quoted 15 lines

28.01.2020 15:13, Mark Brown пишет:

Quoted 13 lines · Dmitry Osipenko
Quoted 9 lines

24.01.2020 19:50, Jon Hunter пишет:

Review

Quoted 4 lines

.rates = SNDRV_PCM_RATE_8000_96000, .formats = SNDRV_PCM_FMTBIT_S32_LE |

(quoted diff) +1 -1
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

If the format implemented by the driver is S24_3LE the driver should advertise S24_3LE.

Quoted 7 lines
Quoted 5 lines
Quoted 3 lines
Quoted 1 line

It should be S24_LE, but seems we still don't know for sure.

Why?

/I think/ sound should be much more distorted if it was S24_3LE, but maybe I'm wrong.

S24_3LE is IICC the wrong thing and we can't support it on the tegra3

There are three ways of arranging 24-bit samples in memory:

S24_3LE: 24-bit samples in 24-bit words without padding
S24_LE:  24-bit samples in 32-bit words, aligned to the LSB
S32_LE:  24-bit samples in 32-bit words, aligned to the MSB

It is very unlikely that your hardware implements S24_LE.

If a S32_LE driver wants to describe how many bits are actually used, it should install a msbits constraint (snd_pcm_hw_constraint_msbits()).

Regards,
Clemens
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author
#58 lore raw

Re: [alsa-devel] (no subject)

Quoted 27 lines · Clemens Ladisch
Quoted 18 lines · Ben Dooks
Quoted 17 lines · Dmitry Osipenko

28.01.2020 21:19, Jon Hunter пишет:

Quoted 16 lines · Dmitry Osipenko
Quoted 15 lines

28.01.2020 15:13, Mark Brown пишет:

Quoted 13 lines · Dmitry Osipenko
Quoted 9 lines

24.01.2020 19:50, Jon Hunter пишет:

Review

Quoted 4 lines

.rates = SNDRV_PCM_RATE_8000_96000, .formats = SNDRV_PCM_FMTBIT_S32_LE |

(quoted diff) +1 -1
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

If the format implemented by the driver is S24_3LE the driver should advertise S24_3LE.

Quoted 7 lines
Quoted 5 lines
Quoted 3 lines
Quoted 1 line

It should be S24_LE, but seems we still don't know for sure.

Why?

/I think/ sound should be much more distorted if it was S24_3LE, but maybe I'm wrong.

S24_3LE is IICC the wrong thing and we can't support it on the tegra3

Quoted 7 lines

There are three ways of arranging 24-bit samples in memory:

S24_3LE: 24-bit samples in 24-bit words without padding
S24_LE:  24-bit samples in 32-bit words, aligned to the LSB
S32_LE:  24-bit samples in 32-bit words, aligned to the MSB

It is very unlikely that your hardware implements S24_LE.

Which is wrong, since this is exactly what the hardware implements.

The DMA fetches 32 bit words, and then the front end dispatches only 24 bits of these to the I2S/TDM

Quoted 1 line
Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
#59 lore raw

Re: [alsa-devel] (no subject)

Quoted 10 lines · Ben Dooks
Quoted 4 lines · Clemens Ladisch
S24_LE:  24-bit samples in 32-bit words, aligned to the LSB
S32_LE:  24-bit samples in 32-bit words, aligned to the MSB

It is very unlikely that your hardware implements S24_LE.

Which is wrong, since this is exactly what the hardware implements.

The DMA fetches 32 bit words, and then the front end dispatches only 24 bits of these to the I2S/TDM

Which 24 bits? Is the padding in the first byte (S32_LE) or in the last byte (S24_LE)?

Regards,
Clemens

author
#60 lore raw

Re: [alsa-devel] (no subject)

Quoted 7 lines · Clemens Ladisch
Quoted 6 lines · Ben Dooks
Quoted 4 lines · Clemens Ladisch
S24_LE:  24-bit samples in 32-bit words, aligned to the LSB
S32_LE:  24-bit samples in 32-bit words, aligned to the MSB

It is very unlikely that your hardware implements S24_LE.

Quoted 7 lines
Quoted 4 lines

Which is wrong, since this is exactly what the hardware implements.

The DMA fetches 32 bit words, and then the front end dispatches only 24 bits of these to the I2S/TDM

Which 24 bits? Is the padding in the first byte (S32_LE) or in the last byte (S24_LE)?

I think the low 24 bits are sent from the 32 bit word.

#61 lore raw

Re: [alsa-devel] (no subject)

Quoted 10 lines · Ben Dooks
Quoted 9 lines · Clemens Ladisch
Quoted 8 lines · Ben Dooks
Quoted 4 lines · Clemens Ladisch
S24_LE:  24-bit samples in 32-bit words, aligned to the LSB
S32_LE:  24-bit samples in 32-bit words, aligned to the MSB

It is very unlikely that your hardware implements S24_LE.

Which is wrong, since this is exactly what the hardware implements.

Quoted 7 lines
Quoted 5 lines
Quoted 2 lines

The DMA fetches 32 bit words, and then the front end dispatches only 24 bits of these to the I2S/TDM

Which 24 bits? Is the padding in the first byte (S32_LE) or in the last byte (S24_LE)?

I think the low 24 bits are sent from the 32 bit word.

This would indeed by S24_LE. If you change the driver to say that it supports _only_ S24_LE, is the data then played correctly?

Regards,
Clemens

maintainer
#62 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Mark Brown
Quoted 5 lines · Mark Brown

I really don't understand why this is all taking so long, this thread just seems to be going round in interminable circles long after it looked like the issue was understood. I have to admit I've not read every single message in the thread but it's difficult to see why it doesn't seem to be making any progress.

Sorry about that. On reviewing this with the audio team at NVIDIA, I was told we don't support S24_LE for I2S. The reason being that the crossbar between the DMA and I2S is not able to extract the correct 24-bits from the 32-bit sample to feed to the I2S interface. The Tegra documentation does show support for 24-bits, but not state explicit support for S24_LE.

Now Ben says that he has this working, but I am unable to reproduce this, so before just dropping the S24_LE support, I would like to understand how this is working for Ben in case there is something that we have overlooked here.

Jon

Signature · 1 line
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maintainer
#63 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 14 lines · Jon Hunter
Quoted 5 lines · Mark Brown

I really don't understand why this is all taking so long, this thread just seems to be going round in interminable circles long after it looked like the issue was understood. I have to admit I've not read every single message in the thread but it's difficult to see why it doesn't seem to be making any progress.

Sorry about that. On reviewing this with the audio team at NVIDIA, I was told we don't support S24_LE for I2S. The reason being that the crossbar between the DMA and I2S is not able to extract the correct 24-bits from the 32-bit sample to feed to the I2S interface. The Tegra documentation does show support for 24-bits, but not state explicit support for S24_LE.

Quoted 4 lines

Now Ben says that he has this working, but I am unable to reproduce this, so before just dropping the S24_LE support, I would like to understand how this is working for Ben in case there is something that we have overlooked here.

Ah, I see that part of the problem is that patches 6 and 7 are yet to be applied and without these the audio is completely distorted because there is a mismatch in the data size between the APBIF and I2S controller. Applying these patches it is not distorted but now I am observing the clocking issue Ben reported and so the tone is not quite right.

Ben, I was able to workaround the clocking issue by making the I2S word clock 64 bits long and not 48.

sound/soc/tegra/tegra30_i2s.c +0 -0
index bbf81b5aa723..3c9b4779e61b 100644
@@ -143,7 +143,7 @@ static int tegra30_i2s_hw_params(struct

snd_pcm_substream *substream,

        case SNDRV_PCM_FORMAT_S24_LE:
                val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
                audio_bits = TEGRA30_AUDIOCIF_BITS_24;
-               sample_size = 24;
+               sample_size = 32;
                break;
        case SNDRV_PCM_FORMAT_S32_LE:
                val = TEGRA30_I2S_CTRL_BIT_SIZE_32;

For I2S I believe we only care about the edges of the word clock and so we make the overall period of the word clock 64 bit clocks then we no longer have an issue with the bit clock frequency. I assume that this should also be fine for TDM modes as well.

Can you let me know if this works for you?

Cheers
Jon

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#64 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

29.01.2020 17:33, Jon Hunter пишет:

Quoted 46 lines · Jon Hunter
Quoted 14 lines · Mark Brown
Quoted 5 lines

I really don't understand why this is all taking so long, this thread just seems to be going round in interminable circles long after it looked like the issue was understood. I have to admit I've not read every single message in the thread but it's difficult to see why it doesn't seem to be making any progress.

Sorry about that. On reviewing this with the audio team at NVIDIA, I was told we don't support S24_LE for I2S. The reason being that the crossbar between the DMA and I2S is not able to extract the correct 24-bits from the 32-bit sample to feed to the I2S interface. The Tegra documentation does show support for 24-bits, but not state explicit support for S24_LE.

Quoted 4 lines

Now Ben says that he has this working, but I am unable to reproduce this, so before just dropping the S24_LE support, I would like to understand how this is working for Ben in case there is something that we have overlooked here.

Ah, I see that part of the problem is that patches 6 and 7 are yet to be applied and without these the audio is completely distorted because there is a mismatch in the data size between the APBIF and I2S controller. Applying these patches it is not distorted but now I am observing the clocking issue Ben reported and so the tone is not quite right.

Ben, I was able to workaround the clocking issue by making the I2S word clock 64 bits long and not 48.

sound/soc/tegra/tegra30_i2s.c +1 -1
index bbf81b5aa723..3c9b4779e61b 100644
@@ -143,7 +143,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
        case SNDRV_PCM_FORMAT_S24_LE:
                val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
                audio_bits = TEGRA30_AUDIOCIF_BITS_24;
-               sample_size = 24;
+               sample_size = 32;
                break;
        case SNDRV_PCM_FORMAT_S32_LE:
                val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
Quoted 6 lines

For I2S I believe we only care about the edges of the word clock and so we make the overall period of the word clock 64 bit clocks then we no longer have an issue with the bit clock frequency. I assume that this should also be fine for TDM modes as well.

Can you let me know if this works for you?

cat /proc/asound/card0/pcm0p/sub0/hw_params

access: MMAP_INTERLEAVED
format: S24_LE
subformat: STD
channels: 2
rate: 48000 (48000/1)
period_size: 512
buffer_size: 4096

No distortion at all! Jon, thank you very much!

author
#65 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Jon Hunter
Quoted 21 lines · Jon Hunter
Quoted 14 lines · Jon Hunter
Quoted 5 lines · Mark Brown

I really don't understand why this is all taking so long, this thread just seems to be going round in interminable circles long after it looked like the issue was understood. I have to admit I've not read every single message in the thread but it's difficult to see why it doesn't seem to be making any progress.

Sorry about that. On reviewing this with the audio team at NVIDIA, I was told we don't support S24_LE for I2S. The reason being that the crossbar between the DMA and I2S is not able to extract the correct 24-bits from the 32-bit sample to feed to the I2S interface. The Tegra documentation does show support for 24-bits, but not state explicit support for S24_LE.

Quoted 4 lines

Now Ben says that he has this working, but I am unable to reproduce this, so before just dropping the S24_LE support, I would like to understand how this is working for Ben in case there is something that we have overlooked here.

Quoted 6 lines

Ah, I see that part of the problem is that patches 6 and 7 are yet to be applied and without these the audio is completely distorted because there is a mismatch in the data size between the APBIF and I2S controller. Applying these patches it is not distorted but now I am observing the clocking issue Ben reported and so the tone is not quite right.

I thought they had been applied? I probably dragged them back in when putting in the support for the test channel on the colibri.

Quoted 2 lines

Ben, I was able to workaround the clocking issue by making the I2S word clock 64 bits long and not 48.

Ok, that will work for I2S case, but maybe not TDM? I'd have to check.

Quoted 15 lines
sound/soc/tegra/tegra30_i2s.c +1 -1
index bbf81b5aa723..3c9b4779e61b 100644
@@ -143,7 +143,7 @@ static int tegra30_i2s_hw_params(struct
 snd_pcm_substream *substream,
         case SNDRV_PCM_FORMAT_S24_LE:
                 val = TEGRA30_I2S_CTRL_BIT_SIZE_24;
                 audio_bits = TEGRA30_AUDIOCIF_BITS_24;
-               sample_size = 24;
+               sample_size = 32;
                 break;
         case SNDRV_PCM_FORMAT_S32_LE:
                 val = TEGRA30_I2S_CTRL_BIT_SIZE_32;
Quoted 6 lines

For I2S I believe we only care about the edges of the word clock and so we make the overall period of the word clock 64 bit clocks then we no longer have an issue with the bit clock frequency. I assume that this should also be fine for TDM modes as well.

Can you let me know if this works for you?

I'll be back in the office next week to test.

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
maintainer
#66 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

On 30/01/2020 08:17, Ben Dooks wrote:

...

Quoted 1 line

I'll be back in the office next week to test.

Any objections to reverting this patch now for v5.6 and pushing to stable for v5.5, then getting this fixed properly for v5.7?

Jon

Signature · 1 line
nvpublic
author
#67 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 9 lines · Jon Hunter

On 30/01/2020 08:17, Ben Dooks wrote:

...

Quoted 1 line

I'll be back in the office next week to test.

Any objections to reverting this patch now for v5.6 and pushing to stable for v5.5, then getting this fixed properly for v5.7?

No, as long as it does not drag on too much.
The other option is just to remove the announcement of these capabilities.

I think I need to check exactly what got merged and then go and work out a full series.

The original authors and testers left Codethink nearly 2 years ago now.

Signature · 4 lines
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Senior Engineer				Codethink - Providing Genius

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maintainer
#68 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 4 lines · Ben Dooks
Quoted 3 lines · Jon Hunter

On 30/01/2020 08:17, Ben Dooks wrote:

Quoted 8 lines
Quoted 6 lines

...

Quoted 1 line

I'll be back in the office next week to test.

Any objections to reverting this patch now for v5.6 and pushing to stable for v5.5, then getting this fixed properly for v5.7?

No, as long as it does not drag on too much.

I won't if you can address the comments previously posted for the other patches :-)

Quoted 2 lines

The other option is just to remove the announcement of these capabilities.

This patch is not that big and so we may as well revert.

Quoted 2 lines

I think I need to check exactly what got merged and then go and work out a full series.

Looks like 3 of 7 patches were merged. So if we revert this, then there are still 5 that are needed.

Cheers!
Jon

Signature · 1 line
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maintainer
#69 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Ben Dooks
Quoted 8 lines · Ben Dooks
Quoted 3 lines · Jon Hunter

controller. Applying these patches it is not distorted but now I am observing the clocking issue Ben reported and so the tone is not quite right.

I thought they had been applied? I probably dragged them back in when putting in the support for the test channel on the colibri.

There were review comments from Jon on patch 6 that you never responded to.

author
#70 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 7 lines · Mark Brown
Quoted 5 lines · Ben Dooks
Quoted 3 lines · Jon Hunter

controller. Applying these patches it is not distorted but now I am observing the clocking issue Ben reported and so the tone is not quite right.

Quoted 5 lines
Quoted 2 lines

I thought they had been applied? I probably dragged them back in when putting in the support for the test channel on the colibri.

There were review comments from Jon on patch 6 that you never responded to.

Hmm, I may have accidentally deleted those.

I will look to see if I can re-form the series and re-send in the next couple of weeks. I've got no access currently to the machine and having to deal with working from home for the next month or so.

Signature · 1 line
Ben
#71 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

19.03.2020 18:32, Ben Dooks пишет:
...

Quoted 5 lines

Hmm, I may have accidentally deleted those.

I will look to see if I can re-form the series and re-send in the next couple of weeks. I've got no access currently to the machine and having to deal with working from home for the next month or so.

Great, looking forward to the new version :)

author
#72 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Jon Hunter
Quoted 14 lines · Jon Hunter
Quoted 5 lines · Mark Brown

I really don't understand why this is all taking so long, this thread just seems to be going round in interminable circles long after it looked like the issue was understood. I have to admit I've not read every single message in the thread but it's difficult to see why it doesn't seem to be making any progress.

Sorry about that. On reviewing this with the audio team at NVIDIA, I was told we don't support S24_LE for I2S. The reason being that the crossbar between the DMA and I2S is not able to extract the correct 24-bits from the 32-bit sample to feed to the I2S interface. The Tegra documentation does show support for 24-bits, but not state explicit support for S24_LE.

Quoted 7 lines

Now Ben says that he has this working, but I am unable to reproduce this, so before just dropping the S24_LE support, I would like to understand how this is working for Ben in case there is something that we have overlooked here.

Jon

Let's go back to S24_3LE isn't supportable, S24_LE is

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
author
#73 lore raw

Re: [alsa-devel] [Linux-kernel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Mark Brown
Quoted 8 lines · Mark Brown
Quoted 6 lines · Dmitry Osipenko

24.01.2020 19:50, Jon Hunter пишет:

Quoted 4 lines

.rates = SNDRV_PCM_RATE_8000_96000, .formats = SNDRV_PCM_FMTBIT_S32_LE |

(quoted diff) +1 -1
-                          SNDRV_PCM_FMTBIT_S24_LE |
+                          SNDRV_PCM_FMTBIT_S24_3LE |
Quoted 5 lines
Quoted 2 lines

It should solve the problem in my particular case, but I'm not sure that the solution is correct.

If the format implemented by the driver is S24_3LE the driver should advertise S24_3LE.

I am fairly sure the format is S24_LE, the tegra3 hardware only supports 24bits padded to 32 bits.

Quoted 14 lines
Quoted 4 lines

The v5.5 kernel is released now with the broken audio and apparently getting 24bit to work won't be trivial (if possible at all). Ben, could you please send a patch to fix v5.5 by removing the S24 support advertisement from the driver?

Why is that the best fix rather than just advertising the format implemented by the driver?

I really don't understand why this is all taking so long, this thread just seems to be going round in interminable circles long after it looked like the issue was understood. I have to admit I've not read every single message in the thread but it's difficult to see why it doesn't seem to be making any progress.

Signature · 4 lines
Ben Dooks				http://www.codethink.co.uk/
Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
maintainer
#74 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Ben Dooks
Quoted 18 lines · Ben Dooks
Quoted 15 lines · Dmitry Osipenko

05.01.2020 03:04, Ben Dooks пишет:

Quoted 13 lines

[snip]

I've just gone through testing.

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Quoted 6 lines
Quoted 2 lines

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I will check on this. I would have thought that S24_LE (24-bits packed into 32-bit elements) would be fine. Typically we don't support S24_3LE (24-bits in 24-bit elements).

Jon

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author
#75 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Quoted 23 lines · Jon Hunter
Quoted 21 lines · Ben Dooks
Quoted 17 lines · Dmitry Osipenko

05.01.2020 03:04, Ben Dooks пишет:

Quoted 4 lines

[snip]

I've just gone through testing.

Quoted 9 lines

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

Quoted 7 lines
Quoted 3 lines

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I will check on this. I would have thought that S24_LE (24-bits packed into 32-bit elements) would be fine. Typically we don't support S24_3LE (24-bits in 24-bit elements).

I will have a look again, I thought S24 was 24-in-24, so wrote my test generator code to do that. I'll go and see if I can re-test this as soon as possible (may be Wed/Thu by the time I can get to check it)

Signature · 8 lines
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author
#76 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

In reply to Jon Hunter
Quoted 23 lines · Jon Hunter
Quoted 21 lines · Ben Dooks
Quoted 17 lines · Dmitry Osipenko

05.01.2020 03:04, Ben Dooks пишет:

Quoted 4 lines

[snip]

I've just gone through testing.

Quoted 9 lines

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

Quoted 8 lines
Quoted 3 lines

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I will check on this. I would have thought that S24_LE (24-bits packed into 32-bit elements) would be fine. Typically we don't support S24_3LE (24-bits in 24-bit elements).

I've just had to spend time fixing pulseview/sigrok's i2s handling for this, but have run a simple test of S24_LE using a pattern generator and the low level output looks ok.

I will test a bit more tomorrow, but I suspect something else is either getting S24_LE wrong or we have some other issue.

Signature · 4 lines
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Senior Engineer				Codethink - Providing Genius

https://www.codethink.co.uk/privacy.html
#77 lore raw

Re: [alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

21.01.2020 21:15, Ben Dooks пишет:

Quoted 34 lines · Jon Hunter
Quoted 23 lines · Ben Dooks
Quoted 21 lines · Dmitry Osipenko
Quoted 17 lines

05.01.2020 03:04, Ben Dooks пишет:

Quoted 4 lines

[snip]

I've just gone through testing.

Quoted 9 lines

Some simple data tests show 16 and 32-bits work.

The 24 bit case seems to be weird, it looks like the 24-bit expects 24 bit samples in 32 bit words. I can't see any packing options to do 24 bit in 24 bit, so we may have to remove 24 bit sample support (which is a shame)

My preference is to remove the 24-bit support and keep the 32 bit in.

Interesting.. Jon, could you please confirm that 24bit format isn't usable on T30?

Quoted 9 lines
Quoted 4 lines

If there is an option of 24 packed into 32, then I think that would work.

I can try testing that with raw data on Monday.

I will check on this. I would have thought that S24_LE (24-bits packed into 32-bit elements) would be fine. Typically we don't support S24_3LE (24-bits in 24-bit elements).

Quoted 6 lines

I've just had to spend time fixing pulseview/sigrok's i2s handling for this, but have run a simple test of S24_LE using a pattern generator and the low level output looks ok.

I will test a bit more tomorrow, but I suspect something else is either getting S24_LE wrong or we have some other issue.

Okay, thanks for the update.

author
#78 lore raw

PATCH v5 3/7 ASoC: tegra: i2s: Add support for more than 2 channels

In reply to Ben Dooks

From: Edward Cragg <[email protected]>

The CIF configuration and clock setting is currently hard coded for 2 channels. Since the hardware is capable of supporting 1-8 channels add support for reading the channel count from the supplied parameters to allow for better TDM support. It seems the original implementation of this driver was fixed at 2 channels for simplicity, and not implementing TDM.

[[email protected]: added is_tdm and channel nr check]
[[email protected]: merge edge control into set-format]
[[email protected]: removed is_tdm and moved edge to hw_params]

---
v2:
- fix the lrclk for dsp-b format

---
 sound/soc/tegra/tegra30_i2s.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)
sound/soc/tegra/tegra30_i2s.c +13 -8
index 063f34c882af..fc77e65a3646 100644
@@ -67,6 +67,7 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 {
 	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 	unsigned int mask = 0, val = 0;
+	unsigned int ch_mask, ch_val = 0;
 
 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 	case SND_SOC_DAIFMT_NB_NF:
@@ -75,6 +76,7 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 		return -EINVAL;
 	}
 
+	ch_mask = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_MASK;
 	mask |= TEGRA30_I2S_CTRL_MASTER_ENABLE;
 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 	case SND_SOC_DAIFMT_CBS_CFS:
@@ -90,10 +92,12 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 		TEGRA30_I2S_CTRL_LRCK_MASK;
 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 	case SND_SOC_DAIFMT_DSP_A:
+		ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_NEG_EDGE;
 		val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_FSYNC;
 		val |= TEGRA30_I2S_CTRL_LRCK_L_LOW;
 		break;
 	case SND_SOC_DAIFMT_DSP_B:
+		ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_POS_EDGE;
 		val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_FSYNC;
 		val |= TEGRA30_I2S_CTRL_LRCK_R_LOW;
 		break;
@@ -115,6 +119,7 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 
 	pm_runtime_get_sync(dai->dev);
 	regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL, mask, val);
+	regmap_update_bits(i2s->regmap, TEGRA30_I2S_CH_CTRL, ch_mask, ch_val);
 	pm_runtime_put(dai->dev);
 
 	return 0;
@@ -127,10 +132,11 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	struct device *dev = dai->dev;
 	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 	unsigned int mask, val, reg;
-	int ret, sample_size, srate, i2sclock, bitcnt, audio_bits;
+	int ret, sample_size, srate, i2sclock, bitcnt, audio_bits, channels;
 	struct tegra30_ahub_cif_conf cif_conf;
 
-	if (params_channels(params) != 2)
+	channels = params_channels(params);
+	if (channels > 8)
 		return -EINVAL;
 
 	mask = TEGRA30_I2S_CTRL_BIT_SIZE_MASK;
@@ -157,9 +163,8 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL, mask, val);
 
 	srate = params_rate(params);
-
 	/* Final "* 2" required by Tegra hardware */
-	i2sclock = srate * params_channels(params) * sample_size * 2;
+	i2sclock = srate * channels * sample_size * 2;
 
 	bitcnt = (i2sclock / (2 * srate)) - 1;
 	if (bitcnt < 0 || bitcnt > TEGRA30_I2S_TIMING_CHANNEL_BIT_COUNT_MASK_US)
@@ -179,8 +184,8 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	regmap_write(i2s->regmap, TEGRA30_I2S_TIMING, val);
 
 	cif_conf.threshold = 0;
-	cif_conf.audio_channels = 2;
-	cif_conf.client_channels = 2;
+	cif_conf.audio_channels = channels;
+	cif_conf.client_channels = channels;
 	cif_conf.audio_bits = audio_bits;
 	cif_conf.client_bits = audio_bits;
 	cif_conf.expand = 0;
@@ -315,7 +320,7 @@ static const struct snd_soc_dai_driver tegra30_i2s_dai_template = {
 	.playback = {
 		.stream_name = "Playback",
 		.channels_min = 2,
-		.channels_max = 2,
+		.channels_max = 8,
 		.rates = SNDRV_PCM_RATE_8000_96000,
 		.formats = SNDRV_PCM_FMTBIT_S32_LE |
 			   SNDRV_PCM_FMTBIT_S24_LE |
@@ -324,7 +329,7 @@ static const struct snd_soc_dai_driver tegra30_i2s_dai_template = {
 	.capture = {
 		.stream_name = "Capture",
 		.channels_min = 2,
-		.channels_max = 2,
+		.channels_max = 8,
 		.rates = SNDRV_PCM_RATE_8000_96000,
 		.formats = SNDRV_PCM_FMTBIT_S32_LE |
 			   SNDRV_PCM_FMTBIT_S24_LE |
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#79 lore raw

Re: [alsa-devel] [PATCH v5 3/7] ASoC: tegra: i2s: Add support for more than 2 channels

Quoted 41 lines · Ben Dooks

From: Edward Cragg <[email protected]>

The CIF configuration and clock setting is currently hard coded for 2 channels. Since the hardware is capable of supporting 1-8 channels add support for reading the channel count from the supplied parameters to allow for better TDM support. It seems the original implementation of this driver was fixed at 2 channels for simplicity, and not implementing TDM.

[[email protected]: added is_tdm and channel nr check]
[[email protected]: merge edge control into set-format]
[[email protected]: removed is_tdm and moved edge to hw_params]

---
v2:
- fix the lrclk for dsp-b format

---
 sound/soc/tegra/tegra30_i2s.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)
sound/soc/tegra/tegra30_i2s.c +2 -0
index 063f34c882af..fc77e65a3646 100644
@@ -67,6 +67,7 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 {
 	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
 	unsigned int mask = 0, val = 0;
+	unsigned int ch_mask, ch_val = 0;
 
 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 	case SND_SOC_DAIFMT_NB_NF:
@@ -75,6 +76,7 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 		return -EINVAL;
 	}
 
+	ch_mask = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_MASK;
 	mask |= TEGRA30_I2S_CTRL_MASTER_ENABLE;
 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 	case SND_SOC_DAIFMT_CBS_CFS:

sound/soc/tegra/tegra30_i2s.c static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai, · line 95

Quoted 4 lines
sound/soc/tegra/tegra30_i2s.c +1 -0
@@ -90,10 +92,12 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 		TEGRA30_I2S_CTRL_LRCK_MASK;
 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 	case SND_SOC_DAIFMT_DSP_A:
+		ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_NEG_EDGE;

Sorry, I just saw the feedback on the previous iteration. I don't think we want to set the polarity but based upon the format that is passed ...

https://nv-tegra.nvidia.com/gitweb/?p=linux-nvidia.git;a=blob;f=sound/soc/tegra-alt/tegra210_i2s_alt.c;h=24cf3b55326f687aded22b91182df41c5ae188ac;hb=703aa948d2c92b87fd84f367f43a07778ed098b5#l333

Cheers
Jon

Signature · 1 line
nvpublic
maintainer
#80 lore raw

Re: [alsa-devel] [PATCH v5 3/7] ASoC: tegra: i2s: Add support for more than 2 channels

Quoted 10 lines · Jon Hunter

sound/soc/tegra/tegra30_i2s.c static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai, · line 95

Quoted 5 lines · Ben Dooks
sound/soc/tegra/tegra30_i2s.c +1 -0
@@ -90,10 +92,12 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 		TEGRA30_I2S_CTRL_LRCK_MASK;
 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 	case SND_SOC_DAIFMT_DSP_A:
+		ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_NEG_EDGE;

Sorry, I just saw the feedback on the previous iteration. I don't think we want to set the polarity but based upon the format that is passed ...

The polarity should be set based on the the inversion flags in the format, normally both DSP modes trigger on the rising edge of the LRCLK. The difference is if there's a delay before the first data bit or not.

maintainer
#81 lore raw

Re: [alsa-devel] [PATCH v5 3/7] ASoC: tegra: i2s: Add support for more than 2 channels

Quoted 12 lines · Mark Brown
Quoted 10 lines · Jon Hunter

sound/soc/tegra/tegra30_i2s.c static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai, · line 95

Quoted 5 lines · Ben Dooks
sound/soc/tegra/tegra30_i2s.c +1 -0
@@ -90,10 +92,12 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 		TEGRA30_I2S_CTRL_LRCK_MASK;
 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 	case SND_SOC_DAIFMT_DSP_A:
+		ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_NEG_EDGE;

Sorry, I just saw the feedback on the previous iteration. I don't think we want to set the polarity but based upon the format that is passed ...

Quoted 3 lines

The polarity should be set based on the the inversion flags in the format, normally both DSP modes trigger on the rising edge of the LRCLK. The difference is if there's a delay before the first data bit or not.

Yes. Sorry I realise my email was not clear and when I meant format, I was referring to the bits in the format mask part of the format. In the example, I shared we use the inversion bits for the determining the polarity. There was an old version of one of our drivers where we had done this incorrectly.

Cheers
Jon

Signature · 1 line
nvpublic
author
#82 lore raw

PATCH v5 4/7 ASoC: tegra: disable rx_fifo after disable stream

In reply to Ben Dooks

We see odd FIFO overruns with this, we assume the best thing to do is to disable the RX I2S frontend first, and then disable the FIFO that is using it.

This also fixes an issue where using multi-word frames (TDM) have partial samples stuck in the FIFO which then get read out when the next capture is started.

---
 sound/soc/tegra/tegra30_i2s.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
sound/soc/tegra/tegra30_i2s.c +1 -1
index fc77e65a3646..3839e3d955a8 100644
@@ -236,9 +236,9 @@ static void tegra30_i2s_start_capture(struct tegra30_i2s *i2s)
 
 static void tegra30_i2s_stop_capture(struct tegra30_i2s *i2s)
 {
-	tegra30_ahub_disable_rx_fifo(i2s->capture_fifo_cif);
 	regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL,
 			   TEGRA30_I2S_CTRL_XFER_EN_RX, 0);
+	tegra30_ahub_disable_rx_fifo(i2s->capture_fifo_cif);
 }
 
 static int tegra30_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
Signature · 1 line
2.23.0
maintainer Acked-by on v5 4/7
#83 lore raw

Re: [alsa-devel] [PATCH v5 4/7] ASoC: tegra: disable rx_fifo after disable stream

Quoted 18 lines · Ben Dooks

We see odd FIFO overruns with this, we assume the best thing to do is to disable the RX I2S frontend first, and then disable the FIFO that is using it.

This also fixes an issue where using multi-word frames (TDM) have partial samples stuck in the FIFO which then get read out when the next capture is started.

---
 sound/soc/tegra/tegra30_i2s.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
sound/soc/tegra/tegra30_i2s.c +0 -0
index fc77e65a3646..3839e3d955a8 100644

sound/soc/tegra/tegra30_i2s.c static void tegra30_i2s_start_capture(struct tegra30_i2s *i2s) · line 244

Quoted 10 lines
sound/soc/tegra/tegra30_i2s.c +1 -1
@@ -236,9 +236,9 @@ static void tegra30_i2s_start_capture(struct tegra30_i2s *i2s)
 
 static void tegra30_i2s_stop_capture(struct tegra30_i2s *i2s)
 {
-	tegra30_ahub_disable_rx_fifo(i2s->capture_fifo_cif);
 	regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL,
 			   TEGRA30_I2S_CTRL_XFER_EN_RX, 0);
+	tegra30_ahub_disable_rx_fifo(i2s->capture_fifo_cif);
 }
 
 static int tegra30_i2s_trigger(struct snd_pcm_substream *substream, int cmd,

Thanks!
Jon

Signature · 1 line
nvpublic
maintainer
#84 lore raw

[alsa-devel] Applied "ASoC: tegra: disable rx_fifo after disable stream" to the asoc tree

In reply to Ben Dooks

The patch

ASoC: tegra: disable rx_fifo after disable stream

has been applied to the asoc tree at

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.5

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks,
Mark

From 8c05f6af7b7d713e327cd6df5a8889c32fc1c10f Mon Sep 17 00:00:00 2001
From: Ben Dooks <[email protected]>
Date: Fri, 18 Oct 2019 16:48:30 +0100
Subject: [PATCH] ASoC: tegra: disable rx_fifo after disable stream

We see odd FIFO overruns with this, we assume the best thing to do is to disable the RX I2S frontend first, and then disable the FIFO that is using it.

This also fixes an issue where using multi-word frames (TDM) have partial samples stuck in the FIFO which then get read out when the next capture is started.

---
 sound/soc/tegra/tegra30_i2s.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
sound/soc/tegra/tegra30_i2s.c +1 -1
index 8f8924060d9d..dbed3c5408e7 100644
@@ -231,9 +231,9 @@ static void tegra30_i2s_start_capture(struct tegra30_i2s *i2s)
 
 static void tegra30_i2s_stop_capture(struct tegra30_i2s *i2s)
 {
-	tegra30_ahub_disable_rx_fifo(i2s->capture_fifo_cif);
 	regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL,
 			   TEGRA30_I2S_CTRL_XFER_EN_RX, 0);
+	tegra30_ahub_disable_rx_fifo(i2s->capture_fifo_cif);
 }
 
 static int tegra30_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
Signature · 1 line
2.20.1
author
#85 lore raw

PATCH v5 5/7 ASoC: tegra: set i2s_offset to 0 for tdm

In reply to Ben Dooks

Set the offset to 0 for TDM mode, as per the current setup. Note we also move the data offset programming to the i2s hw_parameters call as per the suggestion from Jon Hunter.

---
v2:
- fix the review comments and move the i2s offset setting
v3:
- fix data-offset for dsp-a and dsp-b

---
 sound/soc/tegra/tegra30_i2s.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)
sound/soc/tegra/tegra30_i2s.c +6 -6
index 3839e3d955a8..e99126600fc4 100644
@@ -66,7 +66,7 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 				unsigned int fmt)
 {
 	struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai);
-	unsigned int mask = 0, val = 0;
+	unsigned int mask = 0, val = 0, data_offset = 1;
 	unsigned int ch_mask, ch_val = 0;
 
 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
@@ -100,6 +100,7 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 		ch_val = TEGRA30_I2S_CH_CTRL_EGDE_CTRL_POS_EDGE;
 		val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_FSYNC;
 		val |= TEGRA30_I2S_CTRL_LRCK_R_LOW;
+		data_offset = 0;
 		break;
 	case SND_SOC_DAIFMT_I2S:
 		val |= TEGRA30_I2S_CTRL_FRAME_FORMAT_LRCK;
@@ -120,6 +121,10 @@ static int tegra30_i2s_set_fmt(struct snd_soc_dai *dai,
 	pm_runtime_get_sync(dai->dev);
 	regmap_update_bits(i2s->regmap, TEGRA30_I2S_CTRL, mask, val);
 	regmap_update_bits(i2s->regmap, TEGRA30_I2S_CH_CTRL, ch_mask, ch_val);
+	val = (data_offset << TEGRA30_I2S_OFFSET_RX_DATA_OFFSET_SHIFT) |
+		(data_offset << TEGRA30_I2S_OFFSET_TX_DATA_OFFSET_SHIFT);
+	regmap_write(i2s->regmap, TEGRA30_I2S_OFFSET, val);
+
 	pm_runtime_put(dai->dev);
 
 	return 0;
@@ -203,11 +208,6 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 	}
 
 	i2s->soc_data->set_audio_cif(i2s->regmap, reg, &cif_conf);
-
-	val = (1 << TEGRA30_I2S_OFFSET_RX_DATA_OFFSET_SHIFT) |
-	      (1 << TEGRA30_I2S_OFFSET_TX_DATA_OFFSET_SHIFT);
-	regmap_write(i2s->regmap, TEGRA30_I2S_OFFSET, val);
-
 	return 0;
 }
 
Signature · 1 line
2.23.0
maintainer
#86 lore raw

Re: [alsa-devel] [PATCH v5 5/7] ASoC: tegra: set i2s_offset to 0 for tdm

Quoted 1 line · Ben Dooks

Set the offset to 0 for TDM mode, as per the current setup. Note we also

Minor note, that really it is just DSPB mode and not TDM in general. Furthermore, my understanding is that both DSPB and LEFT_J modes have a 0 bit delay and the rest have a 1 bit delay.

Cheers
Jon

Signature · 1 line
nvpublic
author
#87 lore raw

PATCH v5 6/7 ASoC: tegra: config fifos on hw_param changes

In reply to Ben Dooks

If the hw_params uses a different bit or channel count, then we need to change both the I2S unit's CIF configuration as well as the APBIF one.

To allow changing the APBIF, add a call to reconfigure the RX or TX FIFO without changing the DMA or allocation, and get the I2S driver to call it once the hw params have been calculate.

---
 sound/soc/tegra/tegra30_ahub.c | 115 ++++++++++++++++++---------------
 sound/soc/tegra/tegra30_ahub.h |   5 ++
 sound/soc/tegra/tegra30_i2s.c  |   2 +
 3 files changed, 69 insertions(+), 53 deletions(-)
sound/soc/tegra/tegra30_ahub.c +62 -53
index 952381260dc3..24bc03428b45 100644
@@ -84,12 +84,40 @@ static int tegra30_ahub_runtime_resume(struct device *dev)
 	return 0;
 }
 
+int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif rxcif,
+			       struct tegra30_ahub_cif_conf *cif_conf)
+{
+	int channel = rxcif - TEGRA30_AHUB_RXCIF_APBIF_RX0;
+	u32 reg, val;
+
+	pm_runtime_get_sync(ahub->dev);
+
+	reg = TEGRA30_AHUB_CHANNEL_CTRL +
+	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
+	val = tegra30_apbif_read(reg);
+	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK |
+		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK);
+	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) |
+	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN |
+	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+	tegra30_apbif_write(reg, val);
+
+	cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_RX;
+
+	reg = TEGRA30_AHUB_CIF_RX_CTRL +
+	      (channel * TEGRA30_AHUB_CIF_RX_CTRL_STRIDE);
+	ahub->soc_data->set_audio_cif(ahub->regmap_apbif, reg, cif_conf);
+
+	pm_runtime_put(ahub->dev);
+	return 0;
+}
+EXPORT_SYMBOL_GPL(tegra30_ahub_setup_rx_fifo);
+
 int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
 				  char *dmachan, int dmachan_len,
 				  dma_addr_t *fiforeg)
 {
 	int channel;
-	u32 reg, val;
 	struct tegra30_ahub_cif_conf cif_conf;
 
 	channel = find_first_zero_bit(ahub->rx_usage,
@@ -104,37 +132,14 @@ int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
 	*fiforeg = ahub->apbif_addr + TEGRA30_AHUB_CHANNEL_RXFIFO +
 		   (channel * TEGRA30_AHUB_CHANNEL_RXFIFO_STRIDE);
 
-	pm_runtime_get_sync(ahub->dev);
+	memset(&cif_conf, 0, sizeof(cif_conf));
 
-	reg = TEGRA30_AHUB_CHANNEL_CTRL +
-	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
-	val = tegra30_apbif_read(reg);
-	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK |
-		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK);
-	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) |
-	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN |
-	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
-	tegra30_apbif_write(reg, val);
-
-	cif_conf.threshold = 0;
 	cif_conf.audio_channels = 2;
 	cif_conf.client_channels = 2;
 	cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
 	cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
-	cif_conf.expand = 0;
-	cif_conf.stereo_conv = 0;
-	cif_conf.replicate = 0;
-	cif_conf.direction = TEGRA30_AUDIOCIF_DIRECTION_RX;
-	cif_conf.truncate = 0;
-	cif_conf.mono_conv = 0;
-
-	reg = TEGRA30_AHUB_CIF_RX_CTRL +
-	      (channel * TEGRA30_AHUB_CIF_RX_CTRL_STRIDE);
-	ahub->soc_data->set_audio_cif(ahub->regmap_apbif, reg, &cif_conf);
-
-	pm_runtime_put(ahub->dev);
 
-	return 0;
+	return tegra30_ahub_setup_rx_fifo(*rxcif, &cif_conf);
 }
 EXPORT_SYMBOL_GPL(tegra30_ahub_allocate_rx_fifo);
 
@@ -186,12 +191,40 @@ int tegra30_ahub_free_rx_fifo(enum tegra30_ahub_rxcif rxcif)
 }
 EXPORT_SYMBOL_GPL(tegra30_ahub_free_rx_fifo);
 
+int tegra30_ahub_setup_tx_fifo(enum tegra30_ahub_txcif txcif,
+			       struct tegra30_ahub_cif_conf *cif_conf)
+{
+	int channel = txcif - TEGRA30_AHUB_TXCIF_APBIF_TX0;
+	u32 reg, val;
+
+	pm_runtime_get_sync(ahub->dev);
+
+	reg = TEGRA30_AHUB_CHANNEL_CTRL +
+	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
+	val = tegra30_apbif_read(reg);
+	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_MASK |
+		 TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK);
+	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT) |
+	       TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN |
+	       TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
+	tegra30_apbif_write(reg, val);
+
+	cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_TX;
+
+	reg = TEGRA30_AHUB_CIF_TX_CTRL +
+	      (channel * TEGRA30_AHUB_CIF_TX_CTRL_STRIDE);
+	ahub->soc_data->set_audio_cif(ahub->regmap_apbif, reg, cif_conf);
+
+	pm_runtime_put(ahub->dev);
+	return 0;
+}
+EXPORT_SYMBOL_GPL(tegra30_ahub_setup_tx_fifo);
+
 int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
 				  char *dmachan, int dmachan_len,
 				  dma_addr_t *fiforeg)
 {
 	int channel;
-	u32 reg, val;
 	struct tegra30_ahub_cif_conf cif_conf;
 
 	channel = find_first_zero_bit(ahub->tx_usage,
@@ -206,37 +239,13 @@ int tegra30_ahub_allocate_tx_fifo(enum tegra30_ahub_txcif *txcif,
 	*fiforeg = ahub->apbif_addr + TEGRA30_AHUB_CHANNEL_TXFIFO +
 		   (channel * TEGRA30_AHUB_CHANNEL_TXFIFO_STRIDE);
 
-	pm_runtime_get_sync(ahub->dev);
-
-	reg = TEGRA30_AHUB_CHANNEL_CTRL +
-	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
-	val = tegra30_apbif_read(reg);
-	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_MASK |
-		 TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK);
-	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT) |
-	       TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN |
-	       TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
-	tegra30_apbif_write(reg, val);
-
-	cif_conf.threshold = 0;
+	memset(&cif_conf, 0, sizeof(cif_conf));
 	cif_conf.audio_channels = 2;
 	cif_conf.client_channels = 2;
 	cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
 	cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
-	cif_conf.expand = 0;
-	cif_conf.stereo_conv = 0;
-	cif_conf.replicate = 0;
-	cif_conf.direction = TEGRA30_AUDIOCIF_DIRECTION_TX;
-	cif_conf.truncate = 0;
-	cif_conf.mono_conv = 0;
-
-	reg = TEGRA30_AHUB_CIF_TX_CTRL +
-	      (channel * TEGRA30_AHUB_CIF_TX_CTRL_STRIDE);
-	ahub->soc_data->set_audio_cif(ahub->regmap_apbif, reg, &cif_conf);
 
-	pm_runtime_put(ahub->dev);
-
-	return 0;
+	return tegra30_ahub_setup_tx_fifo(*txcif, &cif_conf);
 }
 EXPORT_SYMBOL_GPL(tegra30_ahub_allocate_tx_fifo);
 
sound/soc/tegra/tegra30_ahub.h +5 -0
index 6889c5f23d02..26120aee64b3 100644
@@ -490,6 +490,11 @@ void tegra30_ahub_set_cif(struct regmap *regmap, unsigned int reg,
 void tegra124_ahub_set_cif(struct regmap *regmap, unsigned int reg,
 			   struct tegra30_ahub_cif_conf *conf);
 
+extern int tegra30_ahub_setup_tx_fifo(enum tegra30_ahub_txcif txcif,
+				      struct tegra30_ahub_cif_conf *cif_conf);
+extern int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif,
+				      struct tegra30_ahub_cif_conf *cif_conf);
+
 struct tegra30_ahub_soc_data {
 	u32 mod_list_mask;
 	void (*set_audio_cif)(struct regmap *regmap,
sound/soc/tegra/tegra30_i2s.c +2 -0
index e99126600fc4..89ac0c5e1332 100644
@@ -201,9 +201,11 @@ static int tegra30_i2s_hw_params(struct snd_pcm_substream *substream,
 
 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 		cif_conf.direction = TEGRA30_AUDIOCIF_DIRECTION_RX;
+		tegra30_ahub_setup_tx_fifo(i2s->playback_fifo_cif, &cif_conf);
 		reg = TEGRA30_I2S_CIF_RX_CTRL;
 	} else {
 		cif_conf.direction = TEGRA30_AUDIOCIF_DIRECTION_TX;
+		tegra30_ahub_setup_rx_fifo(i2s->capture_fifo_cif, &cif_conf);
 		reg = TEGRA30_I2S_CIF_TX_CTRL;
 	}
 
Signature · 1 line
2.23.0
maintainer
#88 lore raw

Re: [alsa-devel] [PATCH v5 6/7] ASoC: tegra: config fifos on hw_param changes

Quoted 88 lines · Ben Dooks

If the hw_params uses a different bit or channel count, then we need to change both the I2S unit's CIF configuration as well as the APBIF one.

To allow changing the APBIF, add a call to reconfigure the RX or TX FIFO without changing the DMA or allocation, and get the I2S driver to call it once the hw params have been calculate.

---
 sound/soc/tegra/tegra30_ahub.c | 115 ++++++++++++++++++---------------
 sound/soc/tegra/tegra30_ahub.h |   5 ++
 sound/soc/tegra/tegra30_i2s.c  |   2 +
 3 files changed, 69 insertions(+), 53 deletions(-)
sound/soc/tegra/tegra30_ahub.c +30 -18
index 952381260dc3..24bc03428b45 100644
@@ -84,12 +84,40 @@ static int tegra30_ahub_runtime_resume(struct device *dev)
 	return 0;
 }
 
+int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif rxcif,
+			       struct tegra30_ahub_cif_conf *cif_conf)
+{
+	int channel = rxcif - TEGRA30_AHUB_RXCIF_APBIF_RX0;
+	u32 reg, val;
+
+	pm_runtime_get_sync(ahub->dev);
+
+	reg = TEGRA30_AHUB_CHANNEL_CTRL +
+	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
+	val = tegra30_apbif_read(reg);
+	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK |
+		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK);
+	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) |
+	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN |
+	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+	tegra30_apbif_write(reg, val);
+
+	cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_RX;
+
+	reg = TEGRA30_AHUB_CIF_RX_CTRL +
+	      (channel * TEGRA30_AHUB_CIF_RX_CTRL_STRIDE);
+	ahub->soc_data->set_audio_cif(ahub->regmap_apbif, reg, cif_conf);
+
+	pm_runtime_put(ahub->dev);
+	return 0;
+}
+EXPORT_SYMBOL_GPL(tegra30_ahub_setup_rx_fifo);
+
 int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
 				  char *dmachan, int dmachan_len,
 				  dma_addr_t *fiforeg)
 {
 	int channel;
-	u32 reg, val;
 	struct tegra30_ahub_cif_conf cif_conf;
 
 	channel = find_first_zero_bit(ahub->rx_usage,
@@ -104,37 +132,14 @@ int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif,
 	*fiforeg = ahub->apbif_addr + TEGRA30_AHUB_CHANNEL_RXFIFO +
 		   (channel * TEGRA30_AHUB_CHANNEL_RXFIFO_STRIDE);
 
-	pm_runtime_get_sync(ahub->dev);
+	memset(&cif_conf, 0, sizeof(cif_conf));
 
-	reg = TEGRA30_AHUB_CHANNEL_CTRL +
-	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
-	val = tegra30_apbif_read(reg);
-	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK |
-		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK);
-	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) |
-	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN |
-	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
-	tegra30_apbif_write(reg, val);
-
-	cif_conf.threshold = 0;
 	cif_conf.audio_channels = 2;
 	cif_conf.client_channels = 2;
 	cif_conf.audio_bits = TEGRA30_AUDIOCIF_BITS_16;
 	cif_conf.client_bits = TEGRA30_AUDIOCIF_BITS_16;
-	cif_conf.expand = 0;
-	cif_conf.stereo_conv = 0;
-	cif_conf.replicate = 0;
-	cif_conf.direction = TEGRA30_AUDIOCIF_DIRECTION_RX;
-	cif_conf.truncate = 0;

sound/soc/tegra/tegra30_ahub.c int tegra30_ahub_allocate_rx_fifo(enum tegra30_ahub_rxcif *rxcif, · line 142

Quoted 10 lines
sound/soc/tegra/tegra30_ahub.c +1 -8
-	cif_conf.mono_conv = 0;
-
-	reg = TEGRA30_AHUB_CIF_RX_CTRL +
-	      (channel * TEGRA30_AHUB_CIF_RX_CTRL_STRIDE);
-	ahub->soc_data->set_audio_cif(ahub->regmap_apbif, reg, &cif_conf);
-
-	pm_runtime_put(ahub->dev);
 
-	return 0;
+	return tegra30_ahub_setup_rx_fifo(*rxcif, &cif_conf);

I am not sure why it is necessary to call this here now because this is called everytime you call hw_params() right? It seems redundant to me.

Cheers
Jon

Signature · 1 line
nvpublic
author
#89 lore raw

PATCH v5 7/7 ASoC: tegra: take packing settings from the audio cif_config

In reply to Ben Dooks

If the CIF is not configured as 16 or 8 bit, then the packing for 8/16 bits should not be enabled as the hardware only supports 8 or 16 bit packing.

---
 sound/soc/tegra/tegra30_ahub.c | 29 +++++++++++++++++++++--------
 1 file changed, 21 insertions(+), 8 deletions(-)
sound/soc/tegra/tegra30_ahub.c +21 -8
index 24bc03428b45..0768c6b6dc25 100644
@@ -96,10 +96,17 @@ int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif rxcif,
 	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
 	val = tegra30_apbif_read(reg);
 	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK |
-		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK);
-	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) |
-	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN |
-	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK |
+		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN);
+	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT);
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 ||
+	    cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_8_4;
+
 	tegra30_apbif_write(reg, val);
 
 	cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_RX;
@@ -203,10 +210,16 @@ int tegra30_ahub_setup_tx_fifo(enum tegra30_ahub_txcif txcif,
 	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
 	val = tegra30_apbif_read(reg);
 	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_MASK |
-		 TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK);
-	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT) |
-	       TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN |
-	       TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
+		 TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK |
+		 TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN);
+	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT);
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 ||
+	    cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_8_4;
 	tegra30_apbif_write(reg, val);
 
 	cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_TX;
Signature · 1 line
2.23.0
maintainer Reviewed-by on v5 7/7
#90 lore raw

Re: [alsa-devel] [PATCH v5 7/7] ASoC: tegra: take packing settings from the audio cif_config

Quoted 47 lines · Ben Dooks

If the CIF is not configured as 16 or 8 bit, then the packing for 8/16 bits should not be enabled as the hardware only supports 8 or 16 bit packing.

---
 sound/soc/tegra/tegra30_ahub.c | 29 +++++++++++++++++++++--------
 1 file changed, 21 insertions(+), 8 deletions(-)
sound/soc/tegra/tegra30_ahub.c +14 -8
index 24bc03428b45..0768c6b6dc25 100644
@@ -96,10 +96,17 @@ int tegra30_ahub_setup_rx_fifo(enum tegra30_ahub_rxcif rxcif,
 	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
 	val = tegra30_apbif_read(reg);
 	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_MASK |
-		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK);
-	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT) |
-	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN |
-	       TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_MASK |
+		 TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN);
+	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_RX_THRESHOLD_SHIFT);
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 ||
+	    cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_EN;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_16;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_RX_PACK_8_4;
+
 	tegra30_apbif_write(reg, val);
 
 	cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_RX;
@@ -203,10 +210,16 @@ int tegra30_ahub_setup_tx_fifo(enum tegra30_ahub_txcif txcif,
 	      (channel * TEGRA30_AHUB_CHANNEL_CTRL_STRIDE);
 	val = tegra30_apbif_read(reg);
 	val &= ~(TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_MASK |
-		 TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK);
-	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT) |
-	       TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN |
-	       TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
+		 TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_MASK |
+		 TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN);
+	val |= (7 << TEGRA30_AHUB_CHANNEL_CTRL_TX_THRESHOLD_SHIFT);

sound/soc/tegra/tegra30_ahub.c int tegra30_ahub_setup_tx_fifo(enum tegra30_ahub_txcif txcif, · line 225

Quoted 10 lines
sound/soc/tegra/tegra30_ahub.c +7 -0
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16 ||
+	    cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_EN;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_16)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_16;
+	if (cif_conf->audio_bits == TEGRA30_AUDIOCIF_BITS_8)
+		val |= TEGRA30_AHUB_CHANNEL_CTRL_TX_PACK_8_4;
 	tegra30_apbif_write(reg, val);
 
 	cif_conf->direction = TEGRA30_AUDIOCIF_DIRECTION_TX;

Looks good to me.

Cheers
Jon

Signature · 1 line
nvpublic