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arm64: dts: imx8mm-evk: add phy-reset-gpios for fec1

PATCH Applied Alifer Moraes 4 participants 8 messages Feb 14, 2020 – Feb 24, 2020

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Device tree bindings Arm i.MX and Layerscape
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Alifer Moraes

author
#0 lore raw

PATCH 1/2 arm64: dts: imx8mm-evk: add phy-reset-gpios for fec1

imx8mm-evk has a GPIO connected to AR8031 Ethernet PHY's reset pin.

Describe it in the device tree, following phy's datasheet reset duration of 10ms.

Tested booting via NFS.

Signed-off-by Alifer Moraes <[email protected]>

---

Originally sent by Peng Fan <[email protected]>

Back then CONFIG_AT803X_PHY was set as "m" in defconfig so the boot process hung at nfs boot, now that CONFIG_AT803X_PHY is set as "y" by default, the patch works correctly.

Peng's original patch missed to pass the phy-reset-duration, according to the AR8031 datasheet the reset GPIO needs to stay low for 10ms.

Original thread: https://lkml.org/lkml/2019/10/21/347

 arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 2 ++
 1 file changed, 2 insertions(+)
arch/arm64/boot/dts/freescale/imx8mm-evk.dts +2 -0
index 28ab17a277bb..11903ca86f0e 100644
@@ -82,6 +82,8 @@
 	pinctrl-0 = <&pinctrl_fec1>;
 	phy-mode = "rgmii-id";
 	phy-handle = <&ethphy0>;
+	phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
+	phy-reset-duration = <10>;
 	fsl,magic-packet;
 	status = "okay";
Signature · 1 line
2.17.1
author
#1 lore raw

PATCH 2/2 arm64: dts: imx8mq-evk: add phy-reset-gpios for fec1

imx8mq-evk has a GPIO connected to AR8031 Ethernet PHY's reset pin.

Describe it in the device tree, following phy's datasheet reset duration of 10ms.

Tested booting via NFS.

Signed-off-by Alifer Moraes <[email protected]>
---
 arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 2 ++
 1 file changed, 2 insertions(+)
arch/arm64/boot/dts/freescale/imx8mq-evk.dts +2 -0
index c36685916683..a49e2bf8afe5 100644
@@ -110,6 +110,8 @@
 	pinctrl-0 = <&pinctrl_fec1>;
 	phy-mode = "rgmii-id";
 	phy-handle = <&ethphy0>;
+	phy-reset-gpios = <&gpio1 9  GPIO_ACTIVE_LOW>;
+	phy-reset-duration = <10>;
 	fsl,magic-packet;
 	status = "okay";
Signature · 1 line
2.17.1
#2 lore raw

Re: [PATCH 2/2] arm64: dts: imx8mq-evk: add phy-reset-gpios for fec1

Hi Alifer,

Quoted 16 lines · Alifer Moraes

imx8mq-evk has a GPIO connected to AR8031 Ethernet PHY's reset pin.

Describe it in the device tree, following phy's datasheet reset duration of 10ms.

Tested booting via NFS.

Signed-off-by Alifer Moraes <[email protected]>
---
 arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 2 ++
 1 file changed, 2 insertions(+)
arch/arm64/boot/dts/freescale/imx8mq-evk.dts +0 -0
index c36685916683..a49e2bf8afe5 100644

arch/arm64/boot/dts/freescale/imx8mq-evk.dts line 113

Quoted 4 lines
arch/arm64/boot/dts/freescale/imx8mq-evk.dts +1 -0
@@ -110,6 +110,8 @@
 	pinctrl-0 = <&pinctrl_fec1>;
 	phy-mode = "rgmii-id";
 	phy-handle = <&ethphy0>;
+	phy-reset-gpios = <&gpio1 9  GPIO_ACTIVE_LOW>;

Same here.

Regards,
Marco

Quoted 9 lines
arch/arm64/boot/dts/freescale/imx8mq-evk.dts +1 -0
+	phy-reset-duration = <10>;
 	fsl,magic-packet;
 	status = "okay";
Signature · 1 line
2.17.1
Signature · 4 lines
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
#4 lore raw
In reply to Alifer Moraes

Hi,

Quoted 28 lines · Alifer Moraes

imx8mm-evk has a GPIO connected to AR8031 Ethernet PHY's reset pin.

Describe it in the device tree, following phy's datasheet reset duration of 10ms.

Tested booting via NFS.

Signed-off-by Alifer Moraes <[email protected]>

---

Originally sent by Peng Fan <[email protected]>

Back then CONFIG_AT803X_PHY was set as "m" in defconfig so the boot process hung at nfs boot, now that CONFIG_AT803X_PHY is set as "y" by default, the patch works correctly.

Peng's original patch missed to pass the phy-reset-duration, according to the AR8031 datasheet the reset GPIO needs to stay low for 10ms.

Original thread: https://lkml.org/lkml/2019/10/21/347

 arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 2 ++
 1 file changed, 2 insertions(+)
arch/arm64/boot/dts/freescale/imx8mm-evk.dts +0 -0
index 28ab17a277bb..11903ca86f0e 100644

arch/arm64/boot/dts/freescale/imx8mm-evk.dts line 85

Quoted 4 lines
arch/arm64/boot/dts/freescale/imx8mm-evk.dts +1 -0
@@ -82,6 +82,8 @@
 	pinctrl-0 = <&pinctrl_fec1>;
 	phy-mode = "rgmii-id";
 	phy-handle = <&ethphy0>;
+	phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;

Where is this gpio muxed?

Regards,
Marco

Quoted 9 lines
arch/arm64/boot/dts/freescale/imx8mm-evk.dts +1 -0
+	phy-reset-duration = <10>;
 	fsl,magic-packet;
 	status = "okay";
Signature · 1 line
2.17.1
Signature · 4 lines
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |
author
#5 lore raw

Hello,

I forgot to select reply all in this question, so I answered only to Marco.

Quoted 2 lines

Where is this gpio muxed?

The gpio is muxed in the subnode pinctrl_fec1.

Regards,

Alifer