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dt-bindings: Convert Cadence PCIe RC/EP to DT Schema

PATCH Superseded Kishon Vijay Abraham I 2 participants 9 messages Feb 24, 2020 – Feb 28, 2020

Subsystems (4)

v3 of 5 Superseded Latest is v5 →

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#0 lore raw

v3 cover dt-bindings: Convert Cadence PCIe RC/EP to DT Schema

Cadence PCIe IP is used by multiple SoC vendors (e.g. TI). Cadence themselves have a validation platform for validating the PCIe IP which is already in the upstream kernel. Right now the binding only exists for Cadence platform and this will result in adding redundant binding schema for any platform using Cadence PCIe core.

This series:
1) Create cdns-pcie.yaml which includes properties that are applicable to both host mode and endpoint mode of Cadence PCIe core.
2) Create cdns-pcie-host.yaml to include properties that are specific to host mode of Cadence PCIe core. cdns-pcie-host.yaml will include cdns-pcie.yaml.
3) Create cdns-pcie-ep.yaml to include properties that are specific to endpoint mode of Cadence PCIe core. cdns-pcie-ep.yaml will include cdns-pcie.yaml.
4) Remove cdns,cdns-pcie-ep.txt and cdns,cdns-pcie-host.txt which had the binding for Cadence "platform" and add cdns,cdns-pcie-host.yaml and cdns,cdns-pcie-ep.yaml schema for Cadence Platform. The schema for Cadence platform then includes schema for Cadence PCIe core.

Changes from v2:
*) Created "pci-ep.yaml" for common endpoint controller bindings *) Deprecate "cdns,max-outbound-regions" and "cdns,no-bar-match-nbits"
binding

Changes from v1:
*) Fix maximum values of num-lanes and cdns,no-bar-match-nbits *) Fix example DT node for PCIe Endpoint.

Ref: Patches to convert Cadence driver to library

     https://lkml.org/lkml/2019/11/11/317

Some of this was initially part of [1], but to accelerate it getting into upstream, sending this as a separate series.

[1] -> http://lore.kernel.org/r/[email protected]

Kishon Vijay Abraham I (4):
dt-bindings: PCI: Add PCI Endpoint Controller Schema
dt-bindings: PCI: cadence: Add PCIe RC/EP DT schema for Cadence PCIe
dt-bindings: PCI: Convert PCIe Host/Endpoint in Cadence platform to DT
schema
dt-bindings: PCI: cadence: Deprecate inbound/outbound specific
bindings

 .../bindings/pci/cdns,cdns-pcie-ep.txt        | 27 -------
 .../bindings/pci/cdns,cdns-pcie-ep.yaml       | 49 ++++++++++++
 .../bindings/pci/cdns,cdns-pcie-host.txt      | 66 ----------------
 .../bindings/pci/cdns,cdns-pcie-host.yaml     | 75 +++++++++++++++++++
 .../bindings/pci/cdns-pcie-host.yaml          | 28 +++++++
 .../devicetree/bindings/pci/cdns-pcie.yaml    | 32 ++++++++
 .../devicetree/bindings/pci/pci-ep.yaml       | 41 ++++++++++
 MAINTAINERS                                   |  2 +-
 8 files changed, 226 insertions(+), 94 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt
 create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml
 delete mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt
 create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie.yaml
 create mode 100644 Documentation/devicetree/bindings/pci/pci-ep.yaml
Signature · 1 line
2.17.1
#1 lore raw

PATCH v3 1/4 dt-bindings: PCI: Add PCI Endpoint Controller Schema

Define a common schema for PCI Endpoint Controllers.

---
 .../devicetree/bindings/pci/pci-ep.yaml       | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/pci-ep.yaml
Documentation/devicetree/bindings/pci/pci-ep.yaml new file +41 -0
new file mode 100644
index 000000000000..2287771a066a
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/pci-ep.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: PCI Endpoint Controller Schema
+
+description: |
+  Common properties for PCI Endpoint Controller Nodes.
+
+maintainers:
+  - Kishon Vijay Abraham I <[email protected]>
+
+properties:
+  $nodename:
+    pattern: "^pcie-ep?@"
+
+  max-functions:
+    description: Maximum number of functions that can be configured
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint8
+    minimum: 1
+    default: 1
+    maximum: 255
+
+  max-link-speed:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [ 1, 2, 3, 4 ]
+
+  num-lanes:
+    description: maximum number of lanes
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 1
+    default: 1
+    maximum: 16
+
+required:
+  - compatible
Signature · 1 line
2.17.1
maintainer
#2 lore raw

Re: [PATCH v3 1/4] dt-bindings: PCI: Add PCI Endpoint Controller Schema

Quoted 14 lines · Kishon Vijay Abraham I

Define a common schema for PCI Endpoint Controllers.

---
 .../devicetree/bindings/pci/pci-ep.yaml       | 41 +++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/pci-ep.yaml
Documentation/devicetree/bindings/pci/pci-ep.yaml new file +0 -0
new file mode 100644
index 000000000000..2287771a066a

Documentation/devicetree/bindings/pci/pci-ep.yaml line 1

Quoted 1 line
Documentation/devicetree/bindings/pci/pci-ep.yaml new file +1 -0
@@ -0,0 +1,41 @@
+# SPDX-License-Identifier: (GPL2.0-only OR BSD-2-Clause)

Typo. Run checkpatch.

Quoted 6 lines
Documentation/devicetree/bindings/pci/pci-ep.yaml new file +6 -0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/pci-ep.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: PCI Endpoint Controller Schema

Documentation/devicetree/bindings/pci/pci-ep.yaml line 17

Quoted 10 lines
Documentation/devicetree/bindings/pci/pci-ep.yaml new file +10 -0
+
+description: |
+  Common properties for PCI Endpoint Controller Nodes.
+
+maintainers:
+  - Kishon Vijay Abraham I <[email protected]>
+
+properties:
+  $nodename:
+    pattern: "^pcie-ep?@"

Why the '?'? Let's define the name and fix anything that doesn't match.

Quoted 27 lines
Documentation/devicetree/bindings/pci/pci-ep.yaml new file +24 -0
+
+  max-functions:
+    description: Maximum number of functions that can be configured
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint8
+    minimum: 1
+    default: 1
+    maximum: 255
+
+  max-link-speed:
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [ 1, 2, 3, 4 ]
+
+  num-lanes:
+    description: maximum number of lanes
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 1
+    default: 1
+    maximum: 16
+
+required:
+  - compatible
Signature · 1 line
2.17.1
#3 lore raw

PATCH v3 2/4 dt-bindings: PCI: cadence: Add PCIe RC/EP DT schema for Cadence PCIe

In reply to Kishon Vijay Abraham I

Add PCIe Host (RC) and Endpoint (EP) device tree schema for Cadence PCIe core library. Platforms using Cadence PCIe core can include the schemas added here in the platform specific schemas.

---
 .../bindings/pci/cdns-pcie-host.yaml          | 27 ++++++++++++++++
 .../devicetree/bindings/pci/cdns-pcie.yaml    | 31 +++++++++++++++++++
 2 files changed, 58 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie.yaml
Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml new file +27 -0
new file mode 100644
index 000000000000..ab6e43b636ec
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/pci/cdns-pcie-host.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Cadence PCIe Host
+
+maintainers:
+  - Tom Joseph <[email protected]>
+
+allOf:
+  - $ref: "/schemas/pci/pci-bus.yaml#"
+  - $ref: "cdns-pcie.yaml#"
+
+properties:
+  cdns,no-bar-match-nbits:
+    description:
+      Set into the no BAR match register to configure the number of least
+      significant bits kept during inbound (PCIe -> AXI) address translations
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 0
+    maximum: 64
+    default: 32
+
+  msi-parent: true
Documentation/devicetree/bindings/pci/cdns-pcie.yaml new file +31 -0
new file mode 100644
index 000000000000..6887ccc339cc
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/pci/cdns-pcie.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Cadence PCIe Core
+
+maintainers:
+  - Tom Joseph <[email protected]>
+
+properties:
+  cdns,max-outbound-regions:
+    description: maximum number of outbound regions
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 1
+    maximum: 32
+    default: 32
+
+  phys:
+    description:
+      One per lane if more than one in the list. If only one PHY listed it must
+      manage all lanes.
+    minItems: 1
+    maxItems: 16
+
+  phy-names:
+    items:
+      - const: pcie-phy
+    # FIXME: names when more than 1
Signature · 1 line
2.17.1
maintainer Reviewed-by on v3 2/4
#4 lore raw

Re: [PATCH v3 2/4] dt-bindings: PCI: cadence: Add PCIe RC/EP DT schema for Cadence PCIe

Quoted 11 lines · Kishon Vijay Abraham I

Add PCIe Host (RC) and Endpoint (EP) device tree schema for Cadence PCIe core library. Platforms using Cadence PCIe core can include the schemas added here in the platform specific schemas.

---
 .../bindings/pci/cdns-pcie-host.yaml          | 27 ++++++++++++++++
 .../devicetree/bindings/pci/cdns-pcie.yaml    | 31 +++++++++++++++++++
 2 files changed, 58 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie.yaml
#5 lore raw

PATCH v3 3/4 dt-bindings: PCI: Convert PCIe Host/Endpoint in Cadence platform to DT schema

In reply to Kishon Vijay Abraham I

Include Cadence core DT schema and define the Cadence platform DT schema for both Host and Endpoint mode. Note: The Cadence core DT schema could be included for other platforms using Cadence PCIe core.

---
 .../bindings/pci/cdns,cdns-pcie-ep.txt        | 27 -------
 .../bindings/pci/cdns,cdns-pcie-ep.yaml       | 49 ++++++++++++
 .../bindings/pci/cdns,cdns-pcie-host.txt      | 66 ----------------
 .../bindings/pci/cdns,cdns-pcie-host.yaml     | 76 +++++++++++++++++++
 MAINTAINERS                                   |  2 +-
 5 files changed, 126 insertions(+), 94 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt
 create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml
 delete mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt
 create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt deleted +0 -27
deleted file mode 100644
index 4a0475e2ba7e..000000000000
@@ -1,27 +0,0 @@
-* Cadence PCIe endpoint controller
-
-Required properties:
-- compatible: Should contain "cdns,cdns-pcie-ep" to identify the IP used.
-- reg: Should contain the controller register base address and AXI interface
-  region base address respectively.
-- reg-names: Must be "reg" and "mem" respectively.
-- cdns,max-outbound-regions: Set to maximum number of outbound regions
-
-Optional properties:
-- max-functions: Maximum number of functions that can be configured (default 1).
-- phys: From PHY bindings: List of Generic PHY phandles. One per lane if more
-  than one in the list.  If only one PHY listed it must manage all lanes. 
-- phy-names:  List of names to identify the PHY.
-
-Example:
-
-pcie@fc000000 {
-	compatible = "cdns,cdns-pcie-ep";
-	reg = <0x0 0xfc000000 0x0 0x01000000>,
-	      <0x0 0x80000000 0x0 0x40000000>;
-	reg-names = "reg", "mem";
-	cdns,max-outbound-regions = <16>;
-	max-functions = /bits/ 8 <8>;
-	phys = <&ep_phy0 &ep_phy1>;
-	phy-names = "pcie-lane0","pcie-lane1";
-};
Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml new file +49 -0

49 lines not on this page · raw message

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt deleted +0 -66

66 lines not on this page · raw message

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml new file +76 -0

76 lines not on this page · raw message

MAINTAINERS +1 -1
index 38fe2f3f7b6f..e0402e001edd 100644
@@ -12739,7 +12739,7 @@ PCI DRIVER FOR CADENCE PCIE IP
 M:	Tom Joseph <[email protected]>
 L:	[email protected]
 S:	Maintained
-F:	Documentation/devicetree/bindings/pci/cdns,*.txt
+F:	Documentation/devicetree/bindings/pci/cdns,*
 F:	drivers/pci/controller/pcie-cadence*
 
 PCI DRIVER FOR FREESCALE LAYERSCAPE
Signature · 1 line
2.17.1
maintainer Reviewed-by on v3 3/4
#6 lore raw

Re: [PATCH v3 3/4] dt-bindings: PCI: Convert PCIe Host/Endpoint in Cadence platform to DT schema

Quoted 5 lines · Kishon Vijay Abraham I

Include Cadence core DT schema and define the Cadence platform DT schema for both Host and Endpoint mode. Note: The Cadence core DT schema could be included for other platforms using Cadence PCIe core.

Quoted 12 lines
---
 .../bindings/pci/cdns,cdns-pcie-ep.txt        | 27 -------
 .../bindings/pci/cdns,cdns-pcie-ep.yaml       | 49 ++++++++++++
 .../bindings/pci/cdns,cdns-pcie-host.txt      | 66 ----------------
 .../bindings/pci/cdns,cdns-pcie-host.yaml     | 76 +++++++++++++++++++
 MAINTAINERS                                   |  2 +-
 5 files changed, 126 insertions(+), 94 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.txt
 create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml
 delete mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.txt
 create mode 100644 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml
#7 lore raw

PATCH v3 4/4 dt-bindings: PCI: cadence: Deprecate inbound/outbound specific bindings

In reply to Kishon Vijay Abraham I

Deprecate cdns,max-outbound-regions and cdns,no-bar-match-nbits as both these could be derived from "ranges" and "dma-ranges" property.

---
 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 3 +--
 Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml      | 1 +
 Documentation/devicetree/bindings/pci/cdns-pcie.yaml           | 1 +
 3 files changed, 3 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml +1 -2
index cabbe46ff578..84a8f095d031 100644
@@ -45,8 +45,6 @@ examples:
             #size-cells = <2>;
             bus-range = <0x0 0xff>;
             linux,pci-domain = <0>;
-            cdns,max-outbound-regions = <16>;
-            cdns,no-bar-match-nbits = <32>;
             vendor-id = <0x17cd>;
             device-id = <0x0200>;
 
@@ -57,6 +55,7 @@ examples:
 
             ranges = <0x02000000 0x0 0x42000000  0x0 0x42000000  0x0 0x1000000>,
                      <0x01000000 0x0 0x43000000  0x0 0x43000000  0x0 0x0010000>;
+            dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 
             #interrupt-cells = <0x1>;
 
Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml +1 -0
index ab6e43b636ec..d1c34f83a765 100644
@@ -23,5 +23,6 @@ properties:
     minimum: 0
     maximum: 64
     default: 32
+    deprecated: true
 
   msi-parent: true
Documentation/devicetree/bindings/pci/cdns-pcie.yaml +1 -0
index 6887ccc339cc..893cf7de9891 100644
@@ -17,6 +17,7 @@ properties:
     minimum: 1
     maximum: 32
     default: 32
+    deprecated: true
 
   phys:
     description:
Signature · 1 line
2.17.1
maintainer Reviewed-by on v3 4/4
#8 lore raw

Re: [PATCH v3 4/4] dt-bindings: PCI: cadence: Deprecate inbound/outbound specific bindings

Quoted 10 lines · Kishon Vijay Abraham I

Deprecate cdns,max-outbound-regions and cdns,no-bar-match-nbits as both these could be derived from "ranges" and "dma-ranges" property.

---
 Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml | 3 +--
 Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml      | 1 +
 Documentation/devicetree/bindings/pci/cdns-pcie.yaml           | 1 +
 3 files changed, 3 insertions(+), 2 deletions(-)