PCI: cadence: Deprecate inbound/outbound specific bindings

Deprecate cdns,max-outbound-regions and cdns,no-bar-match-nbits for host mode as both these could be derived from "ranges" and "dma-ranges" property. "cdns,max-outbound-regions" property would still be required for EP mode.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

---
 .../bindings/pci/cdns,cdns-pcie-ep.yaml       |  2 +-
 .../bindings/pci/cdns,cdns-pcie-host.yaml     |  3 +--
 .../devicetree/bindings/pci/cdns-pcie-ep.yaml | 25 +++++++++++++++++++
 .../bindings/pci/cdns-pcie-host.yaml          | 10 ++++++++
 .../devicetree/bindings/pci/cdns-pcie.yaml    |  8 ------
 5 files changed, 37 insertions(+), 11 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml +1 -1

index 2996f8d4777c..50ce5d79d2c7 100644
@@ -10,7 +10,7 @@ maintainers:
   - Tom Joseph <[email protected]>
 
 allOf:
-  - $ref: "cdns-pcie.yaml#"
+  - $ref: "cdns-pcie-ep.yaml#"
   - $ref: "pci-ep.yaml#"
 
 properties:

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml +1 -2

index cabbe46ff578..84a8f095d031 100644
@@ -45,8 +45,6 @@ examples:
             #size-cells = <2>;
             bus-range = <0x0 0xff>;
             linux,pci-domain = <0>;
-            cdns,max-outbound-regions = <16>;
-            cdns,no-bar-match-nbits = <32>;
             vendor-id = <0x17cd>;
             device-id = <0x0200>;
 

@@ -57,6 +55,7 @@ examples:
 
             ranges = <0x02000000 0x0 0x42000000  0x0 0x42000000  0x0 0x1000000>,
                      <0x01000000 0x0 0x43000000  0x0 0x43000000  0x0 0x0010000>;
+            dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 
             #interrupt-cells = <0x1>;
 

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml new file +12 -0

new file mode 100644
index 000000000000..6150a7a7bdbf
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/pci/cdns-pcie-ep.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Cadence PCIe Device
+
+maintainers:
+  - Tom Joseph <[email protected]>
+
+allOf:

Quoted 73 lines · Kishon Vijay Abraham I

Deprecate cdns,max-outbound-regions and cdns,no-bar-match-nbits for host mode as both these could be derived from "ranges" and "dma-ranges" property. "cdns,max-outbound-regions" property would still be required for EP mode.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

---
 .../bindings/pci/cdns,cdns-pcie-ep.yaml       |  2 +-
 .../bindings/pci/cdns,cdns-pcie-host.yaml     |  3 +--
 .../devicetree/bindings/pci/cdns-pcie-ep.yaml | 25 +++++++++++++++++++
 .../bindings/pci/cdns-pcie-host.yaml          | 10 ++++++++
 .../devicetree/bindings/pci/cdns-pcie.yaml    |  8 ------
 5 files changed, 37 insertions(+), 11 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml +1 -1

index 2996f8d4777c..50ce5d79d2c7 100644
@@ -10,7 +10,7 @@ maintainers:
   - Tom Joseph <[email protected]>
 
 allOf:
-  - $ref: "cdns-pcie.yaml#"
+  - $ref: "cdns-pcie-ep.yaml#"
   - $ref: "pci-ep.yaml#"
 
 properties:

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml +1 -2

index cabbe46ff578..84a8f095d031 100644
@@ -45,8 +45,6 @@ examples:
             #size-cells = <2>;
             bus-range = <0x0 0xff>;
             linux,pci-domain = <0>;
-            cdns,max-outbound-regions = <16>;
-            cdns,no-bar-match-nbits = <32>;
             vendor-id = <0x17cd>;
             device-id = <0x0200>;
 

@@ -57,6 +55,7 @@ examples:
 
             ranges = <0x02000000 0x0 0x42000000  0x0 0x42000000  0x0 0x1000000>,
                      <0x01000000 0x0 0x43000000  0x0 0x43000000  0x0 0x0010000>;
+            dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 
             #interrupt-cells = <0x1>;
 

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml new file +18 -0

new file mode 100644
index 000000000000..6150a7a7bdbf
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/pci/cdns-pcie-ep.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Cadence PCIe Device
+
+maintainers:
+  - Tom Joseph <[email protected]>
+
+allOf:
+  - $ref: "cdns-pcie.yaml#"
+
+properties:
+  cdns,max-outbound-regions:
+    description: maximum number of outbound regions
+    allOf:

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml line 22

Quoted 4 lines

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml new file +4 -0

+      - $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 1
+    maximum: 32
+    default: 32

I have a feeling that as the PCI endpoint binding evolves this won't be necessary. I can see a common need to define the number of BARs for an endpoint and then this will again just be error checking.

What's the result if you write to a non-existent region in register CDNS_PCIE_AT_OB_REGION_PCI_ADDR0/1? If the register is non-existent and doesn't abort, you could detect this instead.

Hi Rob,

Quoted 74 lines · Rob Herring

Quoted 73 lines · Kishon Vijay Abraham I

Deprecate cdns,max-outbound-regions and cdns,no-bar-match-nbits for host mode as both these could be derived from "ranges" and "dma-ranges" property. "cdns,max-outbound-regions" property would still be required for EP mode.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

---
 .../bindings/pci/cdns,cdns-pcie-ep.yaml       |  2 +-
 .../bindings/pci/cdns,cdns-pcie-host.yaml     |  3 +--
 .../devicetree/bindings/pci/cdns-pcie-ep.yaml | 25 +++++++++++++++++++
 .../bindings/pci/cdns-pcie-host.yaml          | 10 ++++++++
 .../devicetree/bindings/pci/cdns-pcie.yaml    |  8 ------
 5 files changed, 37 insertions(+), 11 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml +1 -1

index 2996f8d4777c..50ce5d79d2c7 100644
@@ -10,7 +10,7 @@ maintainers:
   - Tom Joseph <[email protected]>
 
 allOf:
-  - $ref: "cdns-pcie.yaml#"
+  - $ref: "cdns-pcie-ep.yaml#"
   - $ref: "pci-ep.yaml#"
 
 properties:

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml +1 -2

index cabbe46ff578..84a8f095d031 100644
@@ -45,8 +45,6 @@ examples:
             #size-cells = <2>;
             bus-range = <0x0 0xff>;
             linux,pci-domain = <0>;
-            cdns,max-outbound-regions = <16>;
-            cdns,no-bar-match-nbits = <32>;
             vendor-id = <0x17cd>;
             device-id = <0x0200>;
 

@@ -57,6 +55,7 @@ examples:
 
             ranges = <0x02000000 0x0 0x42000000  0x0 0x42000000  0x0 0x1000000>,
                      <0x01000000 0x0 0x43000000  0x0 0x43000000  0x0 0x0010000>;
+            dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 
             #interrupt-cells = <0x1>;
 

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml new file +18 -0

new file mode 100644
index 000000000000..6150a7a7bdbf
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/pci/cdns-pcie-ep.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Cadence PCIe Device
+
+maintainers:
+  - Tom Joseph <[email protected]>
+
+allOf:
+  - $ref: "cdns-pcie.yaml#"
+
+properties:
+  cdns,max-outbound-regions:
+    description: maximum number of outbound regions
+    allOf:

Quoted 8 lines

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml line 22

Quoted 4 lines

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml new file +4 -0

+      - $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 1
+    maximum: 32
+    default: 32

I have a feeling that as the PCI endpoint binding evolves this won't be necessary. I can see a common need to define the number of BARs for an endpoint and then this will again just be error checking.

For every buffer given by the host, we have to create a new outbound translation. If there are no outbound regions, we have to report the error to the endpoint function driver. At-least for reporting the error, we'd need to have this binding no?

Quoted 4 lines

What's the result if you write to a non-existent region in register CDNS_PCIE_AT_OB_REGION_PCI_ADDR0/1? If the register is non-existent and doesn't abort, you could detect this instead.

I'm not sure if we should ever try to write to a non-existent register though the behavior could be different in different platforms. IMHO maximum number of outbound regions is a HW property and is best described in device tree.

Quoted 86 lines · Kishon Vijay Abraham I

Hi Rob,

Quoted 82 lines · Rob Herring

Quoted 67 lines · Kishon Vijay Abraham I

Deprecate cdns,max-outbound-regions and cdns,no-bar-match-nbits for host mode as both these could be derived from "ranges" and "dma-ranges" property. "cdns,max-outbound-regions" property would still be required for EP mode.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

---
 .../bindings/pci/cdns,cdns-pcie-ep.yaml       |  2 +-
 .../bindings/pci/cdns,cdns-pcie-host.yaml     |  3 +--
 .../devicetree/bindings/pci/cdns-pcie-ep.yaml | 25 +++++++++++++++++++
 .../bindings/pci/cdns-pcie-host.yaml          | 10 ++++++++
 .../devicetree/bindings/pci/cdns-pcie.yaml    |  8 ------
 5 files changed, 37 insertions(+), 11 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml +1 -1

index 2996f8d4777c..50ce5d79d2c7 100644
@@ -10,7 +10,7 @@ maintainers:
   - Tom Joseph <[email protected]>
 
 allOf:
-  - $ref: "cdns-pcie.yaml#"
+  - $ref: "cdns-pcie-ep.yaml#"
   - $ref: "pci-ep.yaml#"
 
 properties:

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml +1 -2

index cabbe46ff578..84a8f095d031 100644
@@ -45,8 +45,6 @@ examples:
             #size-cells = <2>;
             bus-range = <0x0 0xff>;
             linux,pci-domain = <0>;
-            cdns,max-outbound-regions = <16>;
-            cdns,no-bar-match-nbits = <32>;
             vendor-id = <0x17cd>;
             device-id = <0x0200>;
 

@@ -57,6 +55,7 @@ examples:
 
             ranges = <0x02000000 0x0 0x42000000  0x0 0x42000000  0x0 0x1000000>,
                      <0x01000000 0x0 0x43000000  0x0 0x43000000  0x0 0x0010000>;
+            dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 
             #interrupt-cells = <0x1>;
 

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml new file +12 -0

new file mode 100644
index 000000000000..6150a7a7bdbf
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/pci/cdns-pcie-ep.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Cadence PCIe Device
+
+maintainers:
+  - Tom Joseph <[email protected]>
+
+allOf:

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml line 22

Quoted 10 lines

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml new file +10 -0

+  - $ref: "cdns-pcie.yaml#"
+
+properties:
+  cdns,max-outbound-regions:
+    description: maximum number of outbound regions
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 1
+    maximum: 32
+    default: 32

I have a feeling that as the PCI endpoint binding evolves this won't be necessary. I can see a common need to define the number of BARs for an endpoint and then this will again just be error checking.

Quoted 4 lines

For every buffer given by the host, we have to create a new outbound translation. If there are no outbound regions, we have to report the error to the endpoint function driver. At-least for reporting the error, we'd need to have this binding no?

But isn't the endpoint defined to have some number of BARs? The PCI host doesn't decide that.

Quoted 6 lines

Quoted 5 lines

What's the result if you write to a non-existent region in register CDNS_PCIE_AT_OB_REGION_PCI_ADDR0/1? If the register is non-existent and doesn't abort, you could detect this instead.

Quoted 3 lines

I'm not sure if we should ever try to write to a non-existent register though the behavior could be different in different platforms. IMHO maximum number of outbound regions is a HW property and is best described in device tree.

AIUI, PCI defines non-existent (config space) registers to return all 1s. Not sure if this register is in PCI config space or the host SoC bus (e.g. AXI). It seems PCI bridges get done both ways from what I've seen.

Hi Rob,

Quoted 87 lines · Rob Herring

Quoted 86 lines · Kishon Vijay Abraham I

Hi Rob,

Quoted 82 lines · Rob Herring

Quoted 67 lines · Kishon Vijay Abraham I

Deprecate cdns,max-outbound-regions and cdns,no-bar-match-nbits for host mode as both these could be derived from "ranges" and "dma-ranges" property. "cdns,max-outbound-regions" property would still be required for EP mode.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

---
 .../bindings/pci/cdns,cdns-pcie-ep.yaml       |  2 +-
 .../bindings/pci/cdns,cdns-pcie-host.yaml     |  3 +--
 .../devicetree/bindings/pci/cdns-pcie-ep.yaml | 25 +++++++++++++++++++
 .../bindings/pci/cdns-pcie-host.yaml          | 10 ++++++++
 .../devicetree/bindings/pci/cdns-pcie.yaml    |  8 ------
 5 files changed, 37 insertions(+), 11 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml +1 -1

index 2996f8d4777c..50ce5d79d2c7 100644
@@ -10,7 +10,7 @@ maintainers:
   - Tom Joseph <[email protected]>
 
 allOf:
-  - $ref: "cdns-pcie.yaml#"
+  - $ref: "cdns-pcie-ep.yaml#"
   - $ref: "pci-ep.yaml#"
 
 properties:

Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml +1 -2

index cabbe46ff578..84a8f095d031 100644
@@ -45,8 +45,6 @@ examples:
             #size-cells = <2>;
             bus-range = <0x0 0xff>;
             linux,pci-domain = <0>;
-            cdns,max-outbound-regions = <16>;
-            cdns,no-bar-match-nbits = <32>;
             vendor-id = <0x17cd>;
             device-id = <0x0200>;
 

@@ -57,6 +55,7 @@ examples:
 
             ranges = <0x02000000 0x0 0x42000000  0x0 0x42000000  0x0 0x1000000>,
                      <0x01000000 0x0 0x43000000  0x0 0x43000000  0x0 0x0010000>;
+            dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
 
             #interrupt-cells = <0x1>;
 

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml new file +12 -0

new file mode 100644
index 000000000000..6150a7a7bdbf
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/pci/cdns-pcie-ep.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Cadence PCIe Device
+
+maintainers:
+  - Tom Joseph <[email protected]>
+
+allOf:

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml line 22

Quoted 10 lines

Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml new file +10 -0

+  - $ref: "cdns-pcie.yaml#"
+
+properties:
+  cdns,max-outbound-regions:
+    description: maximum number of outbound regions
+    allOf:
+      - $ref: /schemas/types.yaml#/definitions/uint32
+    minimum: 1
+    maximum: 32
+    default: 32

I have a feeling that as the PCI endpoint binding evolves this won't be necessary. I can see a common need to define the number of BARs for an endpoint and then this will again just be error checking.

Quoted 7 lines

Quoted 4 lines

For every buffer given by the host, we have to create a new outbound translation. If there are no outbound regions, we have to report the error to the endpoint function driver. At-least for reporting the error, we'd need to have this binding no?

But isn't the endpoint defined to have some number of BARs? The PCI host doesn't decide that.

cdns,max-outbound-regions defined here doesn't configure the BARs. BARs provide an interface for the host to access the endpoints memory. IOW for BARs we configure the inbound address translation unit.

cdns,max-outbound-regions is used while configuring the outbound address translation unit. Outbound regions are used while the endpoint access host memory and in that path endpoint BARs doesn't come.

Quoted 10 lines

Quoted 9 lines

Quoted 5 lines

What's the result if you write to a non-existent region in register CDNS_PCIE_AT_OB_REGION_PCI_ADDR0/1? If the register is non-existent and doesn't abort, you could detect this instead.

I'm not sure if we should ever try to write to a non-existent register though the behavior could be different in different platforms. IMHO maximum number of outbound regions is a HW property and is best described in device tree.

Quoted 3 lines

AIUI, PCI defines non-existent (config space) registers to return all 1s. Not sure if this register is in PCI config space or the host SoC bus (e.g. AXI). It seems PCI bridges get done both ways from what I've seen.

All of that is correct for the Host or RC. However here cdns,max-outbound-regions is an endpoint specific property (defined only in cdns-pcie-ep.yaml) and is useful while configuring OB address translation unit for the endpoint to access host memory.

Deprecate cdns,max-outbound-regions and cdns,no-bar-match-nbits for host mode as both these could be derived from "ranges" and "dma-ranges" property. "cdns,max-outbound-regions" property would still be required for EP mode.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

---
 .../bindings/pci/cdns,cdns-pcie-ep.yaml       |  2 +-
 .../bindings/pci/cdns,cdns-pcie-host.yaml     |  3 +--
 .../devicetree/bindings/pci/cdns-pcie-ep.yaml | 25 +++++++++++++++++++
 .../bindings/pci/cdns-pcie-host.yaml          | 10 ++++++++
 .../devicetree/bindings/pci/cdns-pcie.yaml    |  8 ------
 5 files changed, 37 insertions(+), 11 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml

Quoted 6 lines · Kishon Vijay Abraham I

Deprecate cdns,max-outbound-regions and cdns,no-bar-match-nbits for host mode as both these could be derived from "ranges" and "dma-ranges" property. "cdns,max-outbound-regions" property would still be required for EP mode.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

Quoted 9 lines

---
 .../bindings/pci/cdns,cdns-pcie-ep.yaml       |  2 +-
 .../bindings/pci/cdns,cdns-pcie-host.yaml     |  3 +--
 .../devicetree/bindings/pci/cdns-pcie-ep.yaml | 25 +++++++++++++++++++
 .../bindings/pci/cdns-pcie-host.yaml          | 10 ++++++++
 .../devicetree/bindings/pci/cdns-pcie.yaml    |  8 ------
 5 files changed, 37 insertions(+), 11 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml

Reviewed-by Rob Herring <[email protected]>

Cadence PCIe core dirver (host mode) uses "cdns,no-bar-match-nbits" property to configure the number of bits passed through from PCIe address to internal address in Inbound Address Translation register.

However standard PCI dt-binding already defines "dma-ranges" to describe the address range accessible by PCIe controller. Parse "dma-ranges" property to configure the number of bits passed through from PCIe address to internal address in Inbound Address Translation register.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

---
 drivers/pci/controller/cadence/pcie-cadence-host.c | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

drivers/pci/controller/cadence/pcie-cadence-host.c +11 -2

index 9b1c3966414b..60f912a657b9 100644
@@ -206,8 +206,10 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc)
 	struct device *dev = rc->pcie.dev;
 	struct platform_device *pdev = to_platform_device(dev);
 	struct device_node *np = dev->of_node;
+	struct of_pci_range_parser parser;
 	struct pci_host_bridge *bridge;
 	struct list_head resources;
+	struct of_pci_range range;
 	struct cdns_pcie *pcie;
 	struct resource *res;
 	int ret;

@@ -222,8 +224,15 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc)
 	rc->max_regions = 32;
 	of_property_read_u32(np, "cdns,max-outbound-regions", &rc->max_regions);
 
-	rc->no_bar_nbits = 32;
-	of_property_read_u32(np, "cdns,no-bar-match-nbits", &rc->no_bar_nbits);
+	if (!of_pci_dma_range_parser_init(&parser, np))
+		if (of_pci_range_parser_one(&parser, &range))
+			rc->no_bar_nbits = ilog2(range.size);
+
+	if (!rc->no_bar_nbits) {
+		rc->no_bar_nbits = 32;
+		of_property_read_u32(np, "cdns,no-bar-match-nbits",
+				     &rc->no_bar_nbits);
+	}
 
 	rc->vendor_id = 0xffff;
 	of_property_read_u16(np, "vendor-id", &rc->vendor_id);

Signature · 1 line

2.17.1

"cdns,max-outbound-regions" device tree property provides the maximum number of outbound regions supported by the Host PCIe controller. However the outbound regions are configured based on what is populated in the "ranges" DT property.

Avoid using two properties for configuring outbound regions and use only "ranges" property instead.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

---
 drivers/pci/controller/cadence/pcie-cadence-host.c | 6 ------
 drivers/pci/controller/cadence/pcie-cadence.h      | 2 --
 2 files changed, 8 deletions(-)

drivers/pci/controller/cadence/pcie-cadence-host.c +0 -6

index 60f912a657b9..8f72967f298f 100644
@@ -140,9 +140,6 @@ static int cdns_pcie_host_init_address_translation(struct cdns_pcie_rc *rc)
 	for_each_of_pci_range(&parser, &range) {
 		bool is_io;
 
-		if (r >= rc->max_regions)
-			break;
-
 		if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM)
 			is_io = false;
 		else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO)

@@ -221,9 +218,6 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc)
 	pcie = &rc->pcie;
 	pcie->is_rc = true;
 
-	rc->max_regions = 32;
-	of_property_read_u32(np, "cdns,max-outbound-regions", &rc->max_regions);
-
 	if (!of_pci_dma_range_parser_init(&parser, np))
 		if (of_pci_range_parser_one(&parser, &range))
 			rc->no_bar_nbits = ilog2(range.size);

drivers/pci/controller/cadence/pcie-cadence.h +0 -2

index a2b28b912ca4..6bd89a21bb1c 100644
@@ -251,7 +251,6 @@ struct cdns_pcie {
  * @bus_range: first/last buses behind the PCIe host controller
  * @cfg_base: IO mapped window to access the PCI configuration space of a
  *            single function at a time
- * @max_regions: maximum number of regions supported by the hardware
  * @no_bar_nbits: Number of bits to keep for inbound (PCIe -> CPU) address
  *                translation (nbits sets into the "no BAR match" register)
  * @vendor_id: PCI vendor ID

@@ -262,7 +261,6 @@ struct cdns_pcie_rc {
 	struct resource		*cfg_res;
 	struct resource		*bus_range;
 	void __iomem		*cfg_base;
-	u32			max_regions;
 	u32			no_bar_nbits;
 	u16			vendor_id;
 	u16			device_id;

Signature · 1 line

2.17.1

Update subject to match capitalization of others:

PCI: cadence: Remove "cdns,max-outbound-regions" DT property

On Fri, Mar 27, 2020 at 04:17:27PM +0530, Kishon Vijay Abraham I wrote:

Quoted 4 lines

"cdns,max-outbound-regions" device tree property provides the maximum number of outbound regions supported by the Host PCIe controller. However the outbound regions are configured based on what is populated in the "ranges" DT property.

Looks like this is missing a blank line here? Or it should be rewrapped as part of the above paragraph? I think the below makes more sense as a separate paragraph, though.

Again, thanks for doing this; this is a great cleanup.

Quoted 56 lines

Avoid using two properties for configuring outbound regions and use only "ranges" property instead.

Signed-off-by Kishon Vijay Abraham I <[email protected]>

---
 drivers/pci/controller/cadence/pcie-cadence-host.c | 6 ------
 drivers/pci/controller/cadence/pcie-cadence.h      | 2 --
 2 files changed, 8 deletions(-)

drivers/pci/controller/cadence/pcie-cadence-host.c +0 -6

index 60f912a657b9..8f72967f298f 100644
@@ -140,9 +140,6 @@ static int cdns_pcie_host_init_address_translation(struct cdns_pcie_rc *rc)
 	for_each_of_pci_range(&parser, &range) {
 		bool is_io;
 
-		if (r >= rc->max_regions)
-			break;
-
 		if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM)
 			is_io = false;
 		else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO)

@@ -221,9 +218,6 @@ int cdns_pcie_host_setup(struct cdns_pcie_rc *rc)
 	pcie = &rc->pcie;
 	pcie->is_rc = true;
 
-	rc->max_regions = 32;
-	of_property_read_u32(np, "cdns,max-outbound-regions", &rc->max_regions);
-
 	if (!of_pci_dma_range_parser_init(&parser, np))
 		if (of_pci_range_parser_one(&parser, &range))
 			rc->no_bar_nbits = ilog2(range.size);

drivers/pci/controller/cadence/pcie-cadence.h +0 -2

index a2b28b912ca4..6bd89a21bb1c 100644
@@ -251,7 +251,6 @@ struct cdns_pcie {
  * @bus_range: first/last buses behind the PCIe host controller
  * @cfg_base: IO mapped window to access the PCI configuration space of a
  *            single function at a time
- * @max_regions: maximum number of regions supported by the hardware
  * @no_bar_nbits: Number of bits to keep for inbound (PCIe -> CPU) address
  *                translation (nbits sets into the "no BAR match" register)
  * @vendor_id: PCI vendor ID

@@ -262,7 +261,6 @@ struct cdns_pcie_rc {
 	struct resource		*cfg_res;
 	struct resource		*bus_range;
 	void __iomem		*cfg_base;
-	u32			max_regions;
 	u32			no_bar_nbits;
 	u16			vendor_id;
 	u16			device_id;

Signature · 1 line

2.17.1