clocksource: Add NVIDIA Tegra186 timers support
cover clocksource: Add NVIDIA Tegra186 timers support
From: Thierry Reding <[email protected]>
This set of patches adds the device tree bindings and a simplified driver for the timers found on Tegra186 and later SoCs. The driver itself currently only implements a single watchdog, which in turn relies on the counter provided by one of the timers. The timers themselves are not used at the moment because the SoC also has an architected timer and there's currently no use for the additional timers provided by this hardware block.
I suggest that patches 1 & 2 go through the clocksource tree, while I can carry the DTS changes in the Tegra tree for v5.8.
Thierry
Thierry Reding (7):
dt-bindings: timer: Add bindings for NVIDIA Tegra186 timers
clocksource: Add Tegra186 timers support
arm64: tegra: Order nodes by unit-address on Tegra194
arm64: tegra: Add native timer support on Tegra186
arm64: tegra: Enable native timers on Jetson TX2
arm64: tegra: Add native timer support on Tegra194
arm64: tegra: Enable native timers on Jetson AGX Xavier
.../bindings/timer/nvidia,tegra186-timer.yaml | 55 +++ .../arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 4 + arch/arm64/boot/dts/nvidia/tegra186.dtsi | 16 + .../arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 4 + arch/arm64/boot/dts/nvidia/tegra194.dtsi | 81 ++-- drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-tegra186.c | 377 ++++++++++++++++++ 8 files changed, 514 insertions(+), 32 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml create mode 100644 drivers/clocksource/timer-tegra186.c
Signature · 1 line
2.24.1
PATCH 1/7 dt-bindings: timer: Add bindings for NVIDIA Tegra186 timers
From: Thierry Reding <[email protected]>
The NVIDIA Tegra186 SoC contains an IP block that provides a register interface for ten timers with a 29-bit counter that can generate one- shot, periodic or watchdog interrupts.
--- .../bindings/timer/nvidia,tegra186-timer.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml
Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml new file +55 -0
@@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/nvidia,tegra186-timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra186 timers + +maintainers: + - Thierry Reding <[email protected]> + - Jonathan Hunter <[email protected]> + +description: | + The Tegra186 timer provides ten 29-bit timer counters and one 32-bit TSC + (timestamp counter). The timers run at either a fixed 1 MHz clock rate + derived from the oscillator clock. Each timer can be programmed to raise + one-shot, periodic, or watchdog interrupts. + +properties: + compatible: + oneOf: + - description: NVIDIA Tegra186 + items: + - const: nvidia,tegra186-timer + + - description: NVIDIA Tegra194 + items: + - const: nvidia,tegra194-timer + - const: nvidia,tegra186-timer + + reg: + maxItems: 1 + + interrupts: + maxItems: 10 + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + timer@3010000 { + compatible = "nvidia,tegra186-timer"; + reg = <0x03010000 0x000e0000>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + };
Signature · 1 line
2.24.1
Rob Herring
maintainerRe: [PATCH 1/7] dt-bindings: timer: Add bindings for NVIDIA Tegra186 timers
Quoted 43 lines · Thierry Reding
From: Thierry Reding <[email protected]>
The NVIDIA Tegra186 SoC contains an IP block that provides a register interface for ten timers with a 29-bit counter that can generate one- shot, periodic or watchdog interrupts.
Signed-off-by Thierry Reding <[email protected]>--- .../bindings/timer/nvidia,tegra186-timer.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yamlDocumentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml new file +25
-0@@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/nvidia,tegra186-timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NVIDIA Tegra186 timers + +maintainers: + - Thierry Reding <[email protected]> + - Jonathan Hunter <[email protected]> + +description: | + The Tegra186 timer provides ten 29-bit timer counters and one 32-bit TSC + (timestamp counter). The timers run at either a fixed 1 MHz clock rate + derived from the oscillator clock. Each timer can be programmed to raise + one-shot, periodic, or watchdog interrupts. + +properties: + compatible: + oneOf: + - description: NVIDIA Tegra186 + items: + - const: nvidia,tegra186-timer +
Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml line 35
Quoted 10 lines
Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml new file +10
-0+ - description: NVIDIA Tegra194 + items: + - const: nvidia,tegra194-timer + - const: nvidia,tegra186-timer + + reg: + maxItems: 1 + + interrupts: + maxItems: 10
required props?
Also, add:
additionalProperties: false
Quoted 9 lines
Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml new file +9
-0+ +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + timer@3010000 { + compatible = "nvidia,tegra186-timer"; + reg = <0x03010000 0x000e0000>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml line 54
Quoted 10 lines
Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml new file +10
-0+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled";
Don't show status in examples.
Quoted 4 lines
Documentation/devicetree/bindings/timer/nvidia,tegra186-timer.yaml new file +1
-0+ };Signature · 1 line
2.24.1
PATCH 2/7 clocksource: Add Tegra186 timers support
In reply to Thierry RedingFrom: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
--- drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-tegra186.c | 377 +++++++++++++++++++++++++++ 3 files changed, 386 insertions(+) create mode 100644 drivers/clocksource/timer-tegra186.c
drivers/clocksource/Kconfig +8 -0
@@ -149,6 +149,14 @@ config TEGRA_TIMER help Enables support for the Tegra driver. +config TEGRA186_TIMER + bool "NVIDIA Tegra186 timer driver" + depends on ARCH_TEGRA || COMPILE_TEST + select TIMER_OF + help + Enables support for the timers and watchdogs found on NVIDIA + Tegra186 and later SoCs. + config VT8500_TIMER bool "VT8500 timer driver" if COMPILE_TEST depends on HAS_IOMEM
drivers/clocksource/Makefile +1 -0
@@ -38,6 +38,7 @@ obj-$(CONFIG_SUN4I_TIMER) += timer-sun4i.o obj-$(CONFIG_SUN5I_HSTIMER) += timer-sun5i.o obj-$(CONFIG_MESON6_TIMER) += timer-meson6.o obj-$(CONFIG_TEGRA_TIMER) += timer-tegra.o +obj-$(CONFIG_TEGRA186_TIMER) += timer-tegra186.o obj-$(CONFIG_VT8500_TIMER) += timer-vt8500.o obj-$(CONFIG_NSPIRE_TIMER) += timer-zevio.o obj-$(CONFIG_BCM_KONA_TIMER) += bcm_kona_timer.o
drivers/clocksource/timer-tegra186.c new file +377 -0
377 lines not on this page · raw message
Signature · 1 line
2.24.1
Re: [PATCH 2/7] clocksource: Add Tegra186 timers support
20.03.2020 16:34, Thierry Reding пишет:
Quoted 7 lines
From: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
Quoted 7 lines
Signed-off-by Thierry Reding <[email protected]>--- drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-tegra186.c | 377 +++++++++++++++++++++++++++ 3 files changed, 386 insertions(+) create mode 100644 drivers/clocksource/timer-tegra186.c
Hello Thierry,
Shouldn't this driver reside in drivers/watchdog/? Like it's done in a case of the T30+ driver.
...
drivers/clocksource/timer-tegra186.c line 352
Quoted 12 lines
drivers/clocksource/timer-tegra186.c new file +12
-0+static int __maybe_unused tegra186_timer_suspend (struct device *dev) +{ +return 0 ; +} + +static int __maybe_unused tegra186_timer_resume (struct device *dev) +{ +return 0 ; +} + +static SIMPLE_DEV_PM_OPS(tegra186_timer_pm_ops, tegra186_timer_suspend, + tegra186_timer_resume);
Perhaps will be better to remove these OPS for now?
Re: [PATCH 2/7] clocksource: Add Tegra186 timers support
Quoted 15 lines · Dmitry Osipenko
20.03.2020 16:34, Thierry Reding пишет:
Quoted 7 lines
From: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
Quoted 7 lines
Signed-off-by Thierry Reding <[email protected]>--- drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-tegra186.c | 377 +++++++++++++++++++++++++++ 3 files changed, 386 insertions(+) create mode 100644 drivers/clocksource/timer-tegra186.c
Quoted 4 lines
Hello Thierry,
Shouldn't this driver reside in
drivers/watchdog/? Like it's done in a case of the T30+ driver.
The hardware block that this binds to is primarily a time-keeping block that just so happens to also implement a watchdog. Moving this to drivers/watchdog would put us into an odd situation if we ever added code to also implement the time-keeping bits for this hardware.
I also think that the way this is done on Tegra30 was a bad choice. The problem is that we now have two drivers (tegra_wdt.c and tegra-timer.c) that both access the same region of memory. This seems to be relatively safe to do on those chips because there's no overlap between the timer and the watchdog interfaces, but on Tegra186 and later the watchdog is actually using one of the timers, so we'd have to be extra careful how to coordinate between the two. It seems much easier to do that by having everything in the same driver and have that register multiple devices in the system.
Quoted 6 lines
Quoted 6 lines
drivers/clocksource/timer-tegra186.c new file +6
-0+static int __maybe_unused tegra186_timer_suspend (struct device *dev) +{ +return 0 ; +} + +static int __maybe_unused tegra186_timer_resume (struct device *dev)
Quoted 8 lines
drivers/clocksource/timer-tegra186.c line 352
Quoted 6 lines
drivers/clocksource/timer-tegra186.c new file +6
-0+{ +return 0 ; +} + +static SIMPLE_DEV_PM_OPS(tegra186_timer_pm_ops, tegra186_timer_suspend, + tegra186_timer_resume);Perhaps will be better to remove these OPS for now?
Yeah, I suppose I could remove those. Although... perhaps I should just try and make this work properly.
Thierry
Re: [PATCH 2/7] clocksource: Add Tegra186 timers support
20.03.2020 18:04, Thierry Reding пишет:
Quoted 26 lines · Dmitry Osipenko
Quoted 15 lines
20.03.2020 16:34, Thierry Reding пишет:
Quoted 7 lines
From: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
Quoted 7 lines
Signed-off-by Thierry Reding <[email protected]>--- drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-tegra186.c | 377 +++++++++++++++++++++++++++ 3 files changed, 386 insertions(+) create mode 100644 drivers/clocksource/timer-tegra186.cQuoted 4 lines
Hello Thierry,
Shouldn't this driver reside in
drivers/watchdog/? Like it's done in a case of the T30+ driver.The hardware block that this binds to is primarily a time-keeping block that just so happens to also implement a watchdog. Moving this to
drivers/watchdogwould put us into an odd situation if we ever added code to also implement the time-keeping bits for this hardware.
Quoted 9 lines
I also think that the way this is done on Tegra30 was a bad choice. The problem is that we now have two drivers (
tegra_wdt.candtegra-timer.c) that both access the same region of memory. This seems to be relatively safe to do on those chips because there's no overlap between the timer and the watchdog interfaces, but on Tegra186 and later the watchdog is actually using one of the timers, so we'd have to be extra careful how to coordinate between the two. It seems much easier to do that by having everything in the same driver and have that register multiple devices in the system.
Sounds like a watchdog on Tegra20, where one of the timer is shared with a watchdog function and there are no other free timers. Well, yes, it's not nice.
But, will you really ever need an additional clocksource on T186?
Re: [PATCH 2/7] clocksource: Add Tegra186 timers support
Quoted 37 lines · Dmitry Osipenko
20.03.2020 18:04, Thierry Reding пишет:
Quoted 26 lines · Dmitry Osipenko
Quoted 15 lines
20.03.2020 16:34, Thierry Reding пишет:
Quoted 7 lines
From: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
Quoted 7 lines
Signed-off-by Thierry Reding <[email protected]>--- drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-tegra186.c | 377 +++++++++++++++++++++++++++ 3 files changed, 386 insertions(+) create mode 100644 drivers/clocksource/timer-tegra186.cQuoted 4 lines
Hello Thierry,
Shouldn't this driver reside in
drivers/watchdog/? Like it's done in a case of the T30+ driver.The hardware block that this binds to is primarily a time-keeping block that just so happens to also implement a watchdog. Moving this to
drivers/watchdogwould put us into an odd situation if we ever added code to also implement the time-keeping bits for this hardware.Quoted 9 lines
I also think that the way this is done on Tegra30 was a bad choice. The problem is that we now have two drivers (
tegra_wdt.candtegra-timer.c) that both access the same region of memory. This seems to be relatively safe to do on those chips because there's no overlap between the timer and the watchdog interfaces, but on Tegra186 and later the watchdog is actually using one of the timers, so we'd have to be extra careful how to coordinate between the two. It seems much easier to do that by having everything in the same driver and have that register multiple devices in the system.
Quoted 5 lines
Sounds like a watchdog on Tegra20, where one of the timer is shared with a watchdog function and there are no other free timers. Well, yes, it's not nice.
But, will you really ever need an additional clocksource on T186?
I don't know. It's possible that they will become useful at some point.
Thierry
Re: [PATCH 2/7] clocksource: Add Tegra186 timers support
In reply to Dmitry OsipenkoQuoted 37 lines · Dmitry Osipenko
20.03.2020 18:04, Thierry Reding пишет:
Quoted 26 lines · Dmitry Osipenko
Quoted 15 lines
20.03.2020 16:34, Thierry Reding пишет:
Quoted 7 lines
From: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
Quoted 7 lines
Signed-off-by Thierry Reding <[email protected]>--- drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-tegra186.c | 377 +++++++++++++++++++++++++++ 3 files changed, 386 insertions(+) create mode 100644 drivers/clocksource/timer-tegra186.cQuoted 4 lines
Hello Thierry,
Shouldn't this driver reside in
drivers/watchdog/? Like it's done in a case of the T30+ driver.The hardware block that this binds to is primarily a time-keeping block that just so happens to also implement a watchdog. Moving this to
drivers/watchdogwould put us into an odd situation if we ever added code to also implement the time-keeping bits for this hardware.Quoted 9 lines
I also think that the way this is done on Tegra30 was a bad choice. The problem is that we now have two drivers (
tegra_wdt.candtegra-timer.c) that both access the same region of memory. This seems to be relatively safe to do on those chips because there's no overlap between the timer and the watchdog interfaces, but on Tegra186 and later the watchdog is actually using one of the timers, so we'd have to be extra careful how to coordinate between the two. It seems much easier to do that by having everything in the same driver and have that register multiple devices in the system.
Quoted 5 lines
Sounds like a watchdog on Tegra20, where one of the timer is shared with a watchdog function and there are no other free timers. Well, yes, it's not nice.
But, will you really ever need an additional clocksource on T186?
Actually there are a couple of interesting clocksources that this IP block exposes. It contains both a microsecond clock that might come in useful because it is used as a reference by some other blocks that work with microsecond counters (some hardware sequencers have this). Another one is the OSC, which is the system's main oscillator that most clocks are derived from.
Perhaps the most useful source from a software point of view is the TSC. It's a timestamp counter that can also be used as a reference for HW timestamping of certain system events, which is something that we want to upstream eventually. Having the TSC exposed as a clocksource can be interesting because it allows us to correlate these hardware timestamps with code path execution.
I've implemented the three clocksources above for v2, which makes this a bit more of an actual clocksource driver that additionally provides a watchdog.
Thierry
Re: [PATCH 2/7] clocksource: Add Tegra186 timers support
In reply to Thierry Reding20.03.2020 16:34, Thierry Reding пишет:
Quoted 9 lines
From: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
Signed-off-by Thierry Reding <[email protected]>---
...
drivers/clocksource/Kconfig config TEGRA_TIMER · line 153
Quoted 2 lines
drivers/clocksource/Kconfig +2
-0+config TEGRA186_TIMER + bool "NVIDIA Tegra186 timer driver"
tristate?
drivers/clocksource/Kconfig config TEGRA_TIMER · line 154
Quoted 1 line
drivers/clocksource/Kconfig +1
-0+ depends on ARCH_TEGRA || COMPILE_TEST
depends on WATCHDOG && WATCHDOG_CORE?
Quoted 4 lines
drivers/clocksource/Kconfig +4
-0+ select TIMER_OF + help + Enables support for the timers and watchdogs found on NVIDIA + Tegra186 and later SoCs.
Re: [PATCH 2/7] clocksource: Add Tegra186 timers support
20.03.2020 18:11, Dmitry Osipenko пишет:
Quoted 12 lines
20.03.2020 16:34, Thierry Reding пишет:
Quoted 9 lines
From: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
Signed-off-by Thierry Reding <[email protected]>---
...
Quoted 8 lines
drivers/clocksource/Kconfig config TEGRA_TIMER · line 153
Quoted 2 lines
drivers/clocksource/Kconfig +2
-0+config TEGRA186_TIMER + bool "NVIDIA Tegra186 timer driver"tristate?
drivers/clocksource/Kconfig config TEGRA_TIMER · line 154
Quoted 1 line
drivers/clocksource/Kconfig +1
-0+ depends on ARCH_TEGRA || COMPILE_TESTdepends on WATCHDOG &&
WATCHDOG_CORE?
Actually select WATCHDOG_CORE for the WATCHDOG_CORE.
Re: [PATCH 2/7] clocksource: Add Tegra186 timers support
Quoted 18 lines · Dmitry Osipenko
20.03.2020 18:11, Dmitry Osipenko пишет:
Quoted 17 lines
20.03.2020 16:34, Thierry Reding пишет:
Quoted 9 lines
From: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
Signed-off-by Thierry Reding <[email protected]>---
...
drivers/clocksource/Kconfig config TEGRA_TIMER · line 153
Quoted 2 lines
drivers/clocksource/Kconfig +2
-0+config TEGRA186_TIMER + bool "NVIDIA Tegra186 timer driver"tristate?
Quoted 5 lines
Quoted 3 lines
drivers/clocksource/Kconfig config TEGRA_TIMER · line 154
Quoted 1 line
drivers/clocksource/Kconfig +1
-0+ depends on ARCH_TEGRA || COMPILE_TESTdepends on WATCHDOG &&
WATCHDOG_CORE?Actually
select WATCHDOG_COREfor theWATCHDOG_CORE.
WATCHDOG_CORE is user-visible, so it's not safe to select it. Any reason depends on WATCHDOG && WATCHDOG_CORE wouldn't work? I guess a dependency on WATCHDOG_CORE would be enough because that itself already depends on WATCHDOG.
Thierry
Re: [PATCH 2/7] clocksource: Add Tegra186 timers support
23.03.2020 16:42, Thierry Reding пишет:
Quoted 23 lines · Dmitry Osipenko
Quoted 22 lines
20.03.2020 18:11, Dmitry Osipenko пишет:
Quoted 20 lines
20.03.2020 16:34, Thierry Reding пишет:
Quoted 9 lines
From: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
Signed-off-by Thierry Reding <[email protected]>---
...
drivers/clocksource/Kconfig config TEGRA_TIMER · line 153
Quoted 2 lines
drivers/clocksource/Kconfig +2
-0+config TEGRA186_TIMER + bool "NVIDIA Tegra186 timer driver"tristate?
drivers/clocksource/Kconfig config TEGRA_TIMER · line 154
Quoted 1 line
drivers/clocksource/Kconfig +1
-0+ depends on ARCH_TEGRA || COMPILE_TESTdepends on WATCHDOG &&
WATCHDOG_CORE?
Quoted 6 lines
Quoted 1 line
Actually
select WATCHDOG_COREfor theWATCHDOG_CORE.
WATCHDOG_COREis user-visible, so it's not safe to select it. Any reason depends on WATCHDOG &&WATCHDOG_COREwouldn't work? I guess a dependency onWATCHDOG_COREwould be enough because that itself already depends on WATCHDOG.
It looks to that should be much better if you could factor out all the watchdog functionality into the drivers/watchdog, like it's done in a case of MC / SMMU drivers for example.
Re: [PATCH 2/7] clocksource: Add Tegra186 timers support
23.03.2020 16:45, Dmitry Osipenko пишет:
Quoted 26 lines
23.03.2020 16:42, Thierry Reding пишет:
Quoted 25 lines · Dmitry Osipenko
Quoted 23 lines
20.03.2020 18:11, Dmitry Osipenko пишет:
Quoted 12 lines
20.03.2020 16:34, Thierry Reding пишет:
Quoted 9 lines
From: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
Signed-off-by Thierry Reding <[email protected]>---
...
Quoted 8 lines
drivers/clocksource/Kconfig config TEGRA_TIMER · line 153
Quoted 2 lines
drivers/clocksource/Kconfig +2
-0+config TEGRA186_TIMER + bool "NVIDIA Tegra186 timer driver"tristate?
drivers/clocksource/Kconfig config TEGRA_TIMER · line 154
Quoted 1 line
drivers/clocksource/Kconfig +1
-0+ depends on ARCH_TEGRA || COMPILE_TESTdepends on WATCHDOG &&
WATCHDOG_CORE?Actually
select WATCHDOG_COREfor theWATCHDOG_CORE.
Quoted 8 lines
Quoted 4 lines
WATCHDOG_COREis user-visible, so it's not safe to select it. Any reason depends on WATCHDOG &&WATCHDOG_COREwouldn't work? I guess a dependency onWATCHDOG_COREwould be enough because that itself already depends on WATCHDOG.It looks to that should be much better if you could factor out all the watchdog functionality into the
drivers/watchdog, like it's done in a case of MC / SMMU drivers for example.
Also, please see drivers/watchdog/Kconfig where each individual driver selects WATCHDOG_CORE on by as-needed basis.
Re: [PATCH 2/7] clocksource: Add Tegra186 timers support
In reply to Dmitry OsipenkoQuoted 26 lines · Dmitry Osipenko
23.03.2020 16:42, Thierry Reding пишет:
Quoted 25 lines · Dmitry Osipenko
Quoted 23 lines
20.03.2020 18:11, Dmitry Osipenko пишет:
Quoted 12 lines
20.03.2020 16:34, Thierry Reding пишет:
Quoted 9 lines
From: Thierry Reding <[email protected]>
Currently this only supports a single watchdog, which uses a timer in the background for countdown. Eventually the timers could be used for various time-keeping tasks, but by default the architected timer will already provide that functionality.
Signed-off-by Thierry Reding <[email protected]>---
...
Quoted 8 lines
drivers/clocksource/Kconfig config TEGRA_TIMER · line 153
Quoted 2 lines
drivers/clocksource/Kconfig +2
-0+config TEGRA186_TIMER + bool "NVIDIA Tegra186 timer driver"tristate?
drivers/clocksource/Kconfig config TEGRA_TIMER · line 154
Quoted 1 line
drivers/clocksource/Kconfig +1
-0+ depends on ARCH_TEGRA || COMPILE_TESTdepends on WATCHDOG &&
WATCHDOG_CORE?Actually
select WATCHDOG_COREfor theWATCHDOG_CORE.
Quoted 8 lines
Quoted 4 lines
WATCHDOG_COREis user-visible, so it's not safe to select it. Any reason depends on WATCHDOG &&WATCHDOG_COREwouldn't work? I guess a dependency onWATCHDOG_COREwould be enough because that itself already depends on WATCHDOG.It looks to that should be much better if you could factor out all the watchdog functionality into the
drivers/watchdog, like it's done in a case of MC / SMMU drivers for example.
For MC/SMMU this was done for historical reasons. Both drivers already existed in the respective subdirectories, so it seemed best to keep them there in order to avoid churn.
This being a completely new driver I don't think the same argument can be made. There are plenty of drivers that register interfaces for multiple subsystems (e.g. there are a couple of watchdog drivers in the RTC and hwmon subsystems).
Daniel, Thomas, do you have any objections to merging watchdog support via this driver, or would you have me split that off into a separate driver. I could potentially do that using a shared regmap, but it seems a bit of a stretch for something this simple.
Thierry
PATCH 3/7 arm64: tegra: Order nodes by unit-address on Tegra194
In reply to Thierry RedingFrom: Thierry Reding <[email protected]>
The pin controller device tree node was accidentally added in the wrong place. Move it to the correct location to keep nodes ordered by unit- address.
--- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 64 ++++++++++++------------ 1 file changed, 32 insertions(+), 32 deletions(-)
arch/arm64/boot/dts/nvidia/tegra194.dtsi +32 -32
@@ -45,6 +45,38 @@ gpio: gpio@2200000 { gpio-controller; }; + pinmux: pinmux@2430000 { + compatible = "nvidia,tegra194-pinmux"; + reg = <0x2430000 0x17000 + 0xc300000 0x4000>; + + status = "okay"; + + pex_rst_c5_out_state: pex_rst_c5_out { + pex_rst { + nvidia,pins = "pex_l5_rst_n_pgg1"; + nvidia,schmitt = <TEGRA_PIN_DISABLE>; + nvidia,lpdr = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + }; + }; + + clkreq_c5_bi_dir_state: clkreq_c5_bi_dir { + clkreq { + nvidia,pins = "pex_l5_clkreq_n_pgg0"; + nvidia,schmitt = <TEGRA_PIN_DISABLE>; + nvidia,lpdr = <TEGRA_PIN_ENABLE>; + nvidia,enable-input = <TEGRA_PIN_ENABLE>; + nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + }; + }; + }; + ethernet@2490000 { compatible = "nvidia,tegra194-eqos", "nvidia,tegra186-eqos",
@@ -139,38 +171,6 @@ agic: interrupt-controller@2a40000 { }; }; - pinmux: pinmux@2430000 { - compatible = "nvidia,tegra194-pinmux"; - reg = <0x2430000 0x17000 - 0xc300000 0x4000>; - - status = "okay"; - - pex_rst_c5_out_state: pex_rst_c5_out { - pex_rst { - nvidia,pins = "pex_l5_rst_n_pgg1"; - nvidia,schmitt = <TEGRA_PIN_DISABLE>; - nvidia,lpdr = <TEGRA_PIN_ENABLE>; - nvidia,enable-input = <TEGRA_PIN_DISABLE>; - nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>; - nvidia,tristate = <TEGRA_PIN_DISABLE>; - nvidia,pull = <TEGRA_PIN_PULL_NONE>; - }; - }; - - clkreq_c5_bi_dir_state: clkreq_c5_bi_dir { - clkreq { - nvidia,pins = "pex_l5_clkreq_n_pgg0"; - nvidia,schmitt = <TEGRA_PIN_DISABLE>; - nvidia,lpdr = <TEGRA_PIN_ENABLE>; - nvidia,enable-input = <TEGRA_PIN_ENABLE>; - nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>; - nvidia,tristate = <TEGRA_PIN_DISABLE>; - nvidia,pull = <TEGRA_PIN_PULL_NONE>; - }; - }; - }; - mc: memory-controller@2c00000 { compatible = "nvidia,tegra194-mc"; reg = <0x02c00000 0x100000>,
Signature · 1 line
2.24.1
PATCH 4/7 arm64: tegra: Add native timer support on Tegra186
In reply to Thierry RedingFrom: Thierry Reding <[email protected]>
The native timers IP block found on NVIDIA Tegra SoCs implements a watchdog timer that can be used to recover from system hangs. Add the device tree node on Tegra186.
--- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)
arch/arm64/boot/dts/nvidia/tegra186.dtsi +16 -0
@@ -167,6 +167,22 @@ emc: external-memory-controller@2c60000 { }; }; + timer@3010000 { + compatible = "nvidia,tegra186-timer"; + reg = <0x0 0x03010000 0x0 0x000e0000>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + uarta: serial@3100000 { compatible = "nvidia,tegra186-uart", "nvidia,tegra20-uart"; reg = <0x0 0x03100000 0x0 0x40>;
Signature · 1 line
2.24.1
PATCH 5/7 arm64: tegra: Enable native timers on Jetson TX2
In reply to Thierry RedingFrom: Thierry Reding <[email protected]>
Enable the native timers on Jetson TX2 to allow using the watchdog functionality to recover from system hangs, for example.
--- arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 4 ++++ 1 file changed, 4 insertions(+)
arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi +4 -0
@@ -58,6 +58,10 @@ memory-controller@2c00000 { status = "okay"; }; + timer@3010000 { + status = "okay"; + }; + serial@3100000 { status = "okay"; };
Signature · 1 line
2.24.1
PATCH 6/7 arm64: tegra: Add native timer support on Tegra194
In reply to Thierry RedingFrom: Thierry Reding <[email protected]>
The native timers IP block found on NVIDIA Tegra SoCs implements a watchdog timer that can be used to recover from system hangs. Add the device tree node on Tegra194.
--- arch/arm64/boot/dts/nvidia/tegra194.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
arch/arm64/boot/dts/nvidia/tegra194.dtsi +17 -0
@@ -213,6 +213,23 @@ emc: external-memory-controller@2c60000 { }; }; + timer@3010000 { + compatible = "nvidia,tegra194-timer", + "nvidia,tegra186-timer"; + reg = <0x03010000 0x000e0000>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + uarta: serial@3100000 { compatible = "nvidia,tegra194-uart", "nvidia,tegra20-uart"; reg = <0x03100000 0x40>;
Signature · 1 line
2.24.1
PATCH 7/7 arm64: tegra: Enable native timers on Jetson AGX Xavier
In reply to Thierry RedingFrom: Thierry Reding <[email protected]>
Enable the native timers on Jetson AGX Xavier to allow using the watchdog functionality to recover from system hangs, for example.
--- arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 4 ++++ 1 file changed, 4 insertions(+)
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi +4 -0
@@ -52,6 +52,10 @@ memory-controller@2c00000 { status = "okay"; }; + timer@3010000 { + status = "okay"; + }; + serial@3110000 { status = "okay"; };
Signature · 1 line
2.24.1