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Support NVIDIA Tegra-based Acer A500 and Nexus 7 devices

PATCH Superseded Dmitry Osipenko 3 participants 14 messages Apr 6, 2020 – Apr 8, 2020

Subsystems (4)
Device tree bindings Arm (32-bit) Tegra architecture support Arm and arm64 SoC sub-architectures (common parts)

v2 of 10 Superseded Latest is v10 →

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Dmitry Osipenko

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v2 cover Support NVIDIA Tegra-based Acer A500 and Nexus 7 devices

Hello,

This series introduces upstream kernel support for Acer Iconia Tab A500 and ASUS Google Nexus 7 tablet devices. Please review and apply, thanks in advance.

Changelog:

v2: - Corrected "volume down" key-label in the grouper's device-tree and
improved some other names in device-trees.

- Added optional (upcoming in 5.8) VDD/AVDD regulators to the touchscreen node in A500 device-tree.

Dmitry Osipenko (6):
ARM: tegra: Add device-tree for Acer Iconia Tab A500
ARM: tegra: Add device-tree for ASUS Google Nexus 7
dt-bindings: Add vendor prefix for Acer Inc.
dt-bindings: ARM: tegra: Add Acer Iconia Tab A500
dt-bindings: ARM: tegra: Add ASUS Google Nexus 7
ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500

 .../devicetree/bindings/arm/tegra.yaml        |   10 +
 .../devicetree/bindings/vendor-prefixes.yaml  |    2 +
 arch/arm/boot/dts/Makefile                    |    3 +
 .../boot/dts/tegra20-acer-a500-picasso.dts    | 1447 +++++++++
 .../tegra30-asus-nexus7-grouper-common.dtsi   | 2646 +++++++++++++++++
 .../boot/dts/tegra30-asus-nexus7-grouper.dts  |  463 +++
 .../boot/dts/tegra30-asus-nexus7-tilapia.dts  |  549 ++++
 arch/arm/configs/tegra_defconfig              |   28 +
 8 files changed, 5148 insertions(+)
 create mode 100644 arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
 create mode 100644 arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi
 create mode 100644 arch/arm/boot/dts/tegra30-asus-nexus7-grouper.dts
 create mode 100644 arch/arm/boot/dts/tegra30-asus-nexus7-tilapia.dts
Signature · 1 line
2.25.1
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#1 lore raw

PATCH v2 1/6 ARM: tegra: Add device-tree for Acer Iconia Tab A500

Add device-tree for Acer Iconia Tab A500, which is NVIDIA Tegra20-based tablet device.

Signed-off-by Dmitry Osipenko <[email protected]>
---
 arch/arm/boot/dts/Makefile                    |    1 +
 .../boot/dts/tegra20-acer-a500-picasso.dts    | 1447 +++++++++++++++++
 2 files changed, 1448 insertions(+)
 create mode 100644 arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
arch/arm/boot/dts/Makefile +1 -0
index 8c410e466592..45a40663bf61 100644
@@ -1186,6 +1186,7 @@ dtb-$(CONFIG_MACH_SUNIV) += \
 dtb-$(CONFIG_ARCH_TANGO) += \
 	tango4-vantage-1172.dtb
 dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
+	tegra20-acer-a500-picasso.dtb \
 	tegra20-harmony.dtb \
 	tegra20-colibri-eval-v3.dtb \
 	tegra20-colibri-iris.dtb \
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts new file +1447 -0

1,447 lines not on this page · raw message

Signature · 1 line
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#2 lore raw

Re: [PATCH v2 1/6] ARM: tegra: Add device-tree for Acer Iconia Tab A500

On Mon, Apr 06, 2020 at 10:41:05PM +0300, Dmitry Osipenko wrote:
[...]

Quoted 1 line
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +0 -0

[...]

Quoted 4 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +4 -0
+	host1x@50000000 {
+		dc@54200000 {
+			rgb {
+				status = "okay";

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 71

Quoted 10 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +10 -0
+				nvidia,panel = <&panel>;
+
+				port@0 {
+					lvds_output: endpoint {
+						remote-endpoint = <&lvds_encoder_input>;
+						bus-width = <18>;
+					};
+				};
+			};
+		};

This seems a little strange to me, though, admittedly, I've never worked with these types of bridges before, so I may be misunderstanding this. I was under the impression that we could obtain the panel by traversing an OF graph, so that we didn't have to have that extra nvidia,panel property. As it is, you seem to describe two different paths, one that goes from the RGB output to the panel directly, and another that goes from the RGB output to the LVDS encoder and then to the panel.

It doesn't seem to me like a direct link from RGB output to panel does actually exist in this setup.

[...]

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 510

Quoted 4 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +4 -0
+	pwm: pwm@7000a000 {
+		status = "okay";
+		power-supply = <&vdd_3v3_sys>;
+	};

I don't see power-supply defined as a property for the PWM controller. Why do you need this?

[...]

Quoted 7 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +7 -0
+	sdhci@c8000000 {
+		status = "okay";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		max-frequency = <25000000>;

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 738

Quoted 10 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +10 -0
+		keep-power-in-suspend;
+		bus-width = <4>;
+		non-removable;
+
+		mmc-pwrseq = <&brcm_wifi_pwrseq>;
+		vmmc-supply = <&vdd_3v3_sys>;
+		vqmmc-supply = <&vdd_3v3_sys>;
+
+		/* Azurewave AW-NH611 BCM4329 */
+		WiFi@1 {

I think these names are supposed to be lowercase.

Quoted 7 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +7 -0
+			reg = <1>;
+			compatible = "brcm,bcm4329-fmac";
+			interrupt-parent = <&gpio>;
+			interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "host-wake";
+		};
+	};

[...]

Quoted 11 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +11 -0
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		clk32k_in: clock@0 {
+			compatible = "fixed-clock";
+			reg = <0>;
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
+			clock-output-names = "tps658621-out32k";

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 802

Quoted 10 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +10 -0
+		};
+
+		rtc_32k_wifi: clock@1 {
+			compatible = "fixed-clock";
+			reg = <1>;
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
+			clock-output-names = "kk3270032";
+		};
+	};

Are these clocks going to the PMIC and RTC, or are they generated by the chips? If they are generated by the chips, which sounds like they might be, wouldn't it be better to represent them as children of the corresponding chips?

There's probably no infrastructure to do this, so maybe that would be overkill. But for clarity it might be worth documenting here where exactly these clocks come from.

[...]

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 1063

Quoted 4 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +4 -0
+	memory-controller@7000f400 {
+		nvidia,use-ram-code;
+
+		emc-tables@elpida-8gb {

I don't think unit-addresses are supposed to be freeform text like above. These should always reflect the value of the "reg" property, though in this case we don't have one...

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 1064

Quoted 1 line
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +1 -0
+			nvidia,ram-code = <0>;

In retrospect it might have been better to just reuse the reg property for this.

I think in this case it might be best to reflect the RAM code in the unit-address. At least that way we conceptually get things right since it's the RAM code that selects which of these tables is used, much like a register, I2C slave address, or SPI chip select would select which of the subdevices are targetted.

Thierry

author
#3 lore raw

Re: [PATCH v2 1/6] ARM: tegra: Add device-tree for Acer Iconia Tab A500

07.04.2020 13:41, Thierry Reding пишет:

Quoted 27 lines · Dmitry Osipenko

[...]

Quoted 1 line
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +0 -0

[...]

Quoted 4 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +4 -0
+	host1x@50000000 {
+		dc@54200000 {
+			rgb {
+				status = "okay";

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 71

Quoted 10 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +10 -0
+				nvidia,panel = <&panel>;
+
+				port@0 {
+					lvds_output: endpoint {
+						remote-endpoint = <&lvds_encoder_input>;
+						bus-width = <18>;
+					};
+				};
+			};
+		};

This seems a little strange to me, though, admittedly, I've never worked with these types of bridges before, so I may be misunderstanding this. I was under the impression that we could obtain the panel by traversing an OF graph, so that we didn't have to have that extra nvidia,panel property. As it is, you seem to describe two different paths, one that goes from the RGB output to the panel directly, and another that goes from the RGB output to the LVDS encoder and then to the panel.

Quoted 2 lines

It doesn't seem to me like a direct link from RGB output to panel does actually exist in this setup.

AFAIK, the direct link doesn't exist on any of Tegra boards, they all have an LVDS bridge. The older device-trees just didn't model it properly.

The LVDS bridge and panel-lvds are relatively new things in DRM, which allow to model hardware more correctly, like for example the bridge's powerdown control is now modeled properly.

The nvidia,panel is a mandatory property for the Tegra's DRM output, panel won't light up without it. I guess it should be possible to get the panel's phandle from the graph, but this is not supported by the Tegra's DRM driver + nvidia,panel is also useful to have for older kernels that do not support panel-lvds. The panel falls back to a simple-panel in the case of older kernel version, which results in a not entirely appropriate panel timing (wrong framerate), but this is okay'ish.

Quoted 8 lines

[...]

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 510

Quoted 4 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +4 -0
+	pwm: pwm@7000a000 {
+		status = "okay";
+		power-supply = <&vdd_3v3_sys>;
+	};

I don't see power-supply defined as a property for the PWM controller. Why do you need this?

Yes, looks like it's not needed. I'll remove it in v3, thanks.

Quoted 12 lines

[...]

Quoted 11 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +11 -0
+	sdhci@c8000000 {
+		status = "okay";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		max-frequency = <25000000>;
+		keep-power-in-suspend;
+		bus-width = <4>;
+		non-removable;
+
Quoted 8 lines

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 738

Quoted 6 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +6 -0
+		mmc-pwrseq = <&brcm_wifi_pwrseq>;
+		vmmc-supply = <&vdd_3v3_sys>;
+		vqmmc-supply = <&vdd_3v3_sys>;
+
+		/* Azurewave AW-NH611 BCM4329 */
+		WiFi@1 {

I think these names are supposed to be lowercase.

The dtbs_check doesn't complain, should be fine :)

But I don't mind, although the camel-case should be a correct way of spelling WiFi. I'll change it in v3.

Quoted 26 lines
Quoted 7 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +7 -0
+			reg = <1>;
+			compatible = "brcm,bcm4329-fmac";
+			interrupt-parent = <&gpio>;
+			interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "host-wake";
+		};
+	};

[...]

Quoted 18 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +18 -0
+	clocks {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		clk32k_in: clock@0 {
+			compatible = "fixed-clock";
+			reg = <0>;
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
+			clock-output-names = "tps658621-out32k";
+		};
+
+		rtc_32k_wifi: clock@1 {
+			compatible = "fixed-clock";
+			reg = <1>;
+			#clock-cells = <0>;
+			clock-frequency = <32768>;
Quoted 8 lines

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 802

Quoted 3 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +3 -0
+			clock-output-names = "kk3270032";
+		};
+	};

Are these clocks going to the PMIC and RTC, or are they generated by the chips? If they are generated by the chips, which sounds like they might be, wouldn't it be better to represent them as children of the corresponding chips?

They are generated by the chips.

The PMIC has a built-in 32K oscillator.

The kk3270032 is a dedicated onboard 32K oscillator. This one is not mandatory to model in the device-tree, but I wanted to model as much as possible.

Quoted 2 lines

There's probably no infrastructure to do this, so maybe that would be overkill.

Yes, PMIC doesn't model the clock. All Tegra boards model the PMIC's clock this way, although those boards don't set the clock-output-names property, which makes the DT model more obscure than it could be.

The kk3270032 is a standalone oscillator, so it's fine as-is already.

Quoted 2 lines

But for clarity it might be worth documenting here where exactly these clocks come from.

I guess the output clock-output-names are already self-explanatory, don't you think so? For more details you could always consult the board's schematics.

Quoted 15 lines

[...]

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 1063

Quoted 4 lines
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +4 -0
+	memory-controller@7000f400 {
+		nvidia,use-ram-code;
+
+		emc-tables@elpida-8gb {

I don't think unit-addresses are supposed to be freeform text like above. These should always reflect the value of the "reg" property, though in this case we don't have one...

arch/arm/boot/dts/tegra20-acer-a500-picasso.dts line 1064

Quoted 1 line
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts +1 -0
+			nvidia,ram-code = <0>;

In retrospect it might have been better to just reuse the reg property for this.

Quoted 5 lines

I think in this case it might be best to reflect the RAM code in the unit-address. At least that way we conceptually get things right since it's the RAM code that selects which of these tables is used, much like a register, I2C slave address, or SPI chip select would select which of the subdevices are targetted.

This could be done, although we already have a precedent in a form of the paz00 board that got memory timings not so long time ago.

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=834f1d6cf3647e804e7a80569e42ee7fbee50eb1

I'll change it in v3.

Thank you for the review.

author
#4 lore raw

PATCH v2 2/6 ARM: tegra: Add device-tree for ASUS Google Nexus 7

In reply to Dmitry Osipenko

There are two variants of the NVIDIA Tegra30-based Nexus 7 device:
WiFi-only (named Grouper) and GSM (named Tilapia). This patch adds device-trees for the both variants.

Link https://wiki.postmarketos.org/wiki/Google_Nexus_7_2012_(asus-grouper)
Tested-by Pedro Ângelo <[email protected]>
Tested-by Matt Merhar <mattmerhar-g/[email protected]>
Signed-off-by David Heidelberg <[email protected]>
Signed-off-by Dmitry Osipenko <[email protected]>
---
 arch/arm/boot/dts/Makefile                    |    2 +
 .../tegra30-asus-nexus7-grouper-common.dtsi   | 2646 +++++++++++++++++
 .../boot/dts/tegra30-asus-nexus7-grouper.dts  |  463 +++
 .../boot/dts/tegra30-asus-nexus7-tilapia.dts  |  549 ++++
 4 files changed, 3660 insertions(+)
 create mode 100644 arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi
 create mode 100644 arch/arm/boot/dts/tegra30-asus-nexus7-grouper.dts
 create mode 100644 arch/arm/boot/dts/tegra30-asus-nexus7-tilapia.dts
arch/arm/boot/dts/Makefile +2 -0
index 45a40663bf61..93596c010703 100644
@@ -1200,6 +1200,8 @@ dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
 dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += \
 	tegra30-apalis-eval.dtb \
 	tegra30-apalis-v1.1-eval.dtb \
+	tegra30-asus-nexus7-grouper.dtb \
+	tegra30-asus-nexus7-tilapia.dtb \
 	tegra30-beaver.dtb \
 	tegra30-cardhu-a02.dtb \
 	tegra30-cardhu-a04.dtb \
arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi new file +2646 -0

2,646 lines not on this page · raw message

arch/arm/boot/dts/tegra30-asus-nexus7-grouper.dts new file +463 -0

346 lines not on this page · raw message

arch/arm/boot/dts/tegra30-asus-nexus7-tilapia.dts new file +549 -0

549 lines not on this page · raw message

The rest of this diff is not shown. View the raw message.

Signature · 1 line
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#5 lore raw

Re: [PATCH v2 2/6] ARM: tegra: Add device-tree for ASUS Google Nexus 7

On Mon, Apr 06, 2020 at 10:41:06PM +0300, Dmitry Osipenko wrote:
[...]

Quoted 1 line
arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi +0 -0

[...]

Quoted 12 lines
arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi +12 -0
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		linux,cma@80000000 {
+			compatible = "shared-dma-pool";
+			alloc-ranges = <0x80000000 0x30000000>;
+			size = <0x10000000>; /* 256MiB */
+			linux,cma-default;
+			reusable;
+		};

arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi line 54

Quoted 10 lines
arch/arm/boot/dts/tegra30-asus-nexus7-grouper-common.dtsi +10 -0
+
+		ramoops@bfdf0000 {
+			compatible = "ramoops";
+			reg = <0xbfdf0000 0x10000>;	/* 64kB */
+			console-size = <0x8000>;	/* 32kB */
+			record-size = <0x400>;		/*  1kB */
+			ecc-size = <16>;
+		};
+
+		trust_zone@bfe00000 {

Given that this is trademarked as "TrustZone", perhaps drop the underscore?

Other than that, the same comments as for the Acer tablet patch also apply here.

Thierry

author
#6 lore raw

PATCH v2 3/6 dt-bindings: Add vendor prefix for Acer Inc.

In reply to Dmitry Osipenko

Acer is a hardware and electronics corporation, specializing in advanced electronics technology. Acer's products include desktop PCs, laptop PCs, tablets, servers, displays, storage devices, virtual reality devices, smartphones and peripherals. Their web site is http://www.acer.com/.

Signed-off-by Dmitry Osipenko <[email protected]>
---
 Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/vendor-prefixes.yaml +2 -0
index bf95079a82da..90c178abfa9e 100644
@@ -27,6 +27,8 @@ patternProperties:
     description: Abilis Systems
   "^abracon,.*":
     description: Abracon Corporation
+  "^acer,.*":
+    description: Acer Inc.
   "^acme,.*":
     description: Acme Systems srl
   "^actions,.*":
Signature · 1 line
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author
#7 lore raw

PATCH v2 4/6 dt-bindings: ARM: tegra: Add Acer Iconia Tab A500

In reply to Dmitry Osipenko

Add a binding for the Tegra20-based Acer Iconia Tab A500 tablet device.

Signed-off-by Dmitry Osipenko <[email protected]>
---
 Documentation/devicetree/bindings/arm/tegra.yaml | 3 +++
 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/arm/tegra.yaml +3 -0
index 60b38eb5c61a..7fd0b66c69b2 100644
@@ -34,6 +34,9 @@ properties:
               - toradex,colibri_t20-iris
           - const: toradex,colibri_t20
           - const: nvidia,tegra20
+      - items:
+          - const: acer,picasso
+          - const: nvidia,tegra20
       - items:
           - enum:
               - nvidia,beaver
Signature · 1 line
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author
#8 lore raw

PATCH v2 5/6 dt-bindings: ARM: tegra: Add ASUS Google Nexus 7

In reply to Dmitry Osipenko

Add a binding for the Tegra30-based ASUS Google Nexus 7 tablet device.

Signed-off-by Dmitry Osipenko <[email protected]>
---
 Documentation/devicetree/bindings/arm/tegra.yaml | 7 +++++++
 1 file changed, 7 insertions(+)
Documentation/devicetree/bindings/arm/tegra.yaml +7 -0
index 7fd0b66c69b2..fb3bbf7a5fb4 100644
@@ -62,6 +62,13 @@ properties:
               - toradex,colibri_t30-eval-v3
           - const: toradex,colibri_t30
           - const: nvidia,tegra30
+      - items:
+          - const: asus,grouper
+          - const: nvidia,tegra30
+      - items:
+          - const: asus,tilapia
+          - const: asus,grouper
+          - const: nvidia,tegra30
       - items:
           - enum:
               - nvidia,dalmore
Signature · 1 line
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author
#9 lore raw

PATCH v2 6/6 ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500

In reply to Dmitry Osipenko

Enable several drivers for hardware that is found on Nexus 7 and Acer A500 tablet devices. Please note that some drivers may require firmware files extracted from original Android image.

Link https://github.com/digetx/linux-firmware
Signed-off-by Dmitry Osipenko <[email protected]>
---
 arch/arm/configs/tegra_defconfig | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
arch/arm/configs/tegra_defconfig +28 -0
index 0029259a6bf5..6b78a9ad4d57 100644
@@ -63,11 +63,17 @@ CONFIG_BT_RFCOMM=y
 CONFIG_BT_BNEP=y
 CONFIG_BT_HIDP=y
 CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_BCM=y
 CONFIG_CFG80211=y
 CONFIG_MAC80211=y
 CONFIG_RFKILL=y
 CONFIG_RFKILL_INPUT=y
 CONFIG_RFKILL_GPIO=y
+CONFIG_NFC=y
+CONFIG_NFC_HCI=y
+CONFIG_NFC_SHDLC=y
+CONFIG_NFC_PN544_I2C=y
 CONFIG_PCI=y
 CONFIG_PCIEPORTBUS=y
 CONFIG_PCI_MSI=y

@@ -106,20 +112,24 @@ CONFIG_INPUT_JOYDEV=y
 CONFIG_INPUT_EVDEV=y
 CONFIG_KEYBOARD_GPIO=y
 CONFIG_KEYBOARD_TEGRA=y
+CONFIG_KEYBOARD_CAP11XX=y
 CONFIG_KEYBOARD_CROS_EC=y
 CONFIG_MOUSE_PS2_ELANTECH=y
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ATMEL_MXT=y
+CONFIG_TOUCHSCREEN_ELAN=y
 CONFIG_TOUCHSCREEN_WM97XX=y
 # CONFIG_TOUCHSCREEN_WM9705 is not set
 # CONFIG_TOUCHSCREEN_WM9713 is not set
 CONFIG_TOUCHSCREEN_STMPE=y
 CONFIG_INPUT_MISC=y
+CONFIG_INPUT_GPIO_VIBRA=y
 # CONFIG_LEGACY_PTYS is not set
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_OF_PLATFORM=y
 CONFIG_SERIAL_TEGRA=y
+CONFIG_SERIAL_DEV_BUS=y
 # CONFIG_HW_RANDOM is not set
 # CONFIG_I2C_COMPAT is not set
 CONFIG_I2C_CHARDEV=y

@@ -135,6 +145,7 @@ CONFIG_PINCTRL_PALMAS=y
 CONFIG_GPIO_SYSFS=y
 CONFIG_GPIO_PCA953X=y
 CONFIG_GPIO_PCA953X_IRQ=y
+CONFIG_GPIO_MAX77620=y
 CONFIG_GPIO_PALMAS=y
 CONFIG_GPIO_TPS6586X=y
 CONFIG_GPIO_TPS65910=y

@@ -142,13 +153,18 @@ CONFIG_POWER_RESET=y
 CONFIG_POWER_RESET_AS3722=y
 CONFIG_POWER_RESET_GPIO=y
 CONFIG_BATTERY_SBS=y
+CONFIG_BATTERY_BQ27XXX=y
+CONFIG_CHARGER_GPIO=y
+CONFIG_CHARGER_SMB347=y
 CONFIG_CHARGER_TPS65090=y
 CONFIG_SENSORS_LM90=y
 CONFIG_SENSORS_LM95245=y
 CONFIG_WATCHDOG=y
+CONFIG_MAX77620_WATCHDOG=y
 CONFIG_TEGRA_WATCHDOG=y
 CONFIG_MFD_AS3722=y
 CONFIG_MFD_CROS_EC=y
+CONFIG_MFD_MAX77620=y
 CONFIG_MFD_MAX8907=y
 CONFIG_MFD_STMPE=y
 CONFIG_MFD_PALMAS=y

@@ -159,6 +175,7 @@ CONFIG_REGULATOR=y
 CONFIG_REGULATOR_FIXED_VOLTAGE=y
 CONFIG_REGULATOR_AS3722=y
 CONFIG_REGULATOR_GPIO=y
+CONFIG_REGULATOR_MAX77620=y
 CONFIG_REGULATOR_MAX8907=y
 CONFIG_REGULATOR_PALMAS=y
 CONFIG_REGULATOR_TPS51632=y

@@ -174,7 +191,10 @@ CONFIG_USB_GSPCA=y
 CONFIG_DRM=y
 CONFIG_DRM_NOUVEAU=m
 CONFIG_DRM_TEGRA=y
+CONFIG_DRM_TEGRA_STAGING=y
+CONFIG_DRM_PANEL_LVDS=y
 CONFIG_DRM_PANEL_SIMPLE=y
+CONFIG_DRM_LVDS_ENCODER=y
 # CONFIG_LCD_CLASS_DEVICE is not set
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_BACKLIGHT_GENERIC is not set

@@ -238,6 +258,7 @@ CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_AS3722=y
 CONFIG_RTC_DRV_DS1307=y
 CONFIG_RTC_DRV_MAX8907=y
+CONFIG_RTC_DRV_MAX77686=y
 CONFIG_RTC_DRV_PALMAS=y
 CONFIG_RTC_DRV_TPS6586X=y
 CONFIG_RTC_DRV_TPS65910=y

@@ -259,11 +280,18 @@ CONFIG_ARCH_TEGRA_2x_SOC=y
 CONFIG_ARCH_TEGRA_3x_SOC=y
 CONFIG_ARCH_TEGRA_114_SOC=y
 CONFIG_ARCH_TEGRA_124_SOC=y
+CONFIG_PM_DEVFREQ=y
+CONFIG_ARM_TEGRA_DEVFREQ=y
+CONFIG_ARM_TEGRA20_DEVFREQ=y
 CONFIG_MEMORY=y
 CONFIG_IIO=y
+CONFIG_KXCJK1013=y
 CONFIG_MPU3050_I2C=y
+CONFIG_INV_MPU6050_I2C=y
+CONFIG_AL3010=y
 CONFIG_SENSORS_ISL29018=y
 CONFIG_SENSORS_ISL29028=y
+CONFIG_AK8974=y
 CONFIG_AK8975=y
 CONFIG_PWM=y
 CONFIG_PWM_TEGRA=y
Signature · 1 line
2.25.1
#10 lore raw

Re: [PATCH v2 6/6] ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500

Quoted 5 lines · Dmitry Osipenko

Enable several drivers for hardware that is found on Nexus 7 and Acer A500 tablet devices. Please note that some drivers may require firmware files extracted from original Android image.

Link https://github.com/digetx/linux-firmware

What's the license for these files? Can they be made available through the official linux-firmware repository?

Thierry

author
#11 lore raw

Re: [PATCH v2 6/6] ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500

07.04.2020 13:08, Thierry Reding пишет:

Quoted 8 lines · Dmitry Osipenko
Quoted 5 lines

Enable several drivers for hardware that is found on Nexus 7 and Acer A500 tablet devices. Please note that some drivers may require firmware files extracted from original Android image.

Link https://github.com/digetx/linux-firmware

What's the license for these files?

It's either GPL (like touchscreen config) or something else redistributeable.

Quoted 1 line

Can they be made available through the official linux-firmware repository?

Yes, but I don't know yet for sure whether it's really needed for all firmware files.

For example, the T30 Broadcom WiFi doesn't work using stock linux-firmware, it's on my to-do list to try to figure out why.

While Bluetooth FW seems to be reusable be many different devices, although (AFAIK) nobody cared to upstream it to the linux-firmware.

#12 lore raw

Re: [PATCH v2 6/6] ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500

Quoted 14 lines · Dmitry Osipenko

07.04.2020 13:08, Thierry Reding пишет:

Quoted 8 lines · Dmitry Osipenko
Quoted 5 lines

Enable several drivers for hardware that is found on Nexus 7 and Acer A500 tablet devices. Please note that some drivers may require firmware files extracted from original Android image.

Link https://github.com/digetx/linux-firmware

What's the license for these files?

It's either GPL (like touchscreen config) or something else redistributeable.

Quoted 7 lines
Quoted 1 line

Can they be made available through the official linux-firmware repository?

Yes, but I don't know yet for sure whether it's really needed for all firmware files.

For example, the T30 Broadcom WiFi doesn't work using stock linux-firmware, it's on my to-do list to try to figure out why.

I've encountered the same issue on the Ouya, only the original firmware that came with it will work with the chip. (AW-NH660) I wonder if it's an azurewave quirk.

I've also noticed the Ouya specific configuration txt file seems a lot more involved than the standard brcm configs.

Quoted 3 lines

While Bluetooth FW seems to be reusable be many different devices, although (AFAIK) nobody cared to upstream it to the linux-firmware.

author
#13 lore raw

Re: [PATCH v2 6/6] ARM: tegra_defconfig: Enable options useful for Nexus 7 and Acer A500

08.04.2020 03:37, Peter Geis пишет:
...

Quoted 9 lines
Quoted 2 lines

For example, the T30 Broadcom WiFi doesn't work using stock linux-firmware, it's on my to-do list to try to figure out why.

I've encountered the same issue on the Ouya, only the original firmware that came with it will work with the chip. (AW-NH660) I wonder if it's an azurewave quirk.

I've also noticed the Ouya specific configuration txt file seems a lot more involved than the standard brcm configs.

The T20 boards also use Azurewave module and it works fine with the stock linux-firmware, although that is BCM4329.

It could be that the configuration format differs for the stock firmware, but we don't really know yet.