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ASoC: QCOM: Add support for SC7180 lpass variant

PATCH In review Ajit Pandey 2 participants 11 messages May 14, 2020 1 message not in the archive

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Ajit Pandey

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#1 lore raw

v2 cover ASoC: QCOM: Add support for SC7180 lpass variant

We've common ASoC cpu driver for QCOM LPASS soc varaints. This patch chain add support for new variant SC7180 soc by doing the required modification in existing common lpass-cpu driver. Below is a brief summary of patch series:

PATCH v2 0001 ... 0004: Update lpass-cpu driver and documentation to make it more generic and support newer soc registers configuration. PATCH v2 0005 ... 0007: Add documentation and platform driver for newer SC7180 SOC variant.

Ajit Pandey (7):
Documentation: device-tree: sound: Update lpass-cpu driver binding
ASoC: qcom: Add common array to initialize soc based core clocks
ASoC: qcom: lpass-cpu: Make "ahbix-clk" an optional clock.
ASoC: qcom: lpass: Use regmap_field for i2sctl and dmactl registers
include: dt-bindings: sound: Add sc7180-lpass bindings header
device-tree: bindings: sound: lpass-cpu: Add new compatible soc
ASoC: qcom: lpass-sc7180: Add platform driver for lpass audio

 .../devicetree/bindings/sound/qcom,lpass-cpu.txt   |  79 -------
 .../devicetree/bindings/sound/qcom,lpass-cpu.yaml  | 154 +++++++++++++
 include/dt-bindings/sound/sc7180-lpass.h           |  10 +
 sound/soc/qcom/Kconfig                             |   5 +
 sound/soc/qcom/Makefile                            |   2 +
 sound/soc/qcom/lpass-apq8016.c                     | 100 ++++++--
 sound/soc/qcom/lpass-cpu.c                         | 116 ++++++----
 sound/soc/qcom/lpass-lpaif-reg.h                   | 203 ++++++++++-------
 sound/soc/qcom/lpass-platform.c                    |  86 ++++---
 sound/soc/qcom/lpass-sc7180.c                      | 252 +++++++++++++++++++++
 sound/soc/qcom/lpass.h                             |  40 +++-
 11 files changed, 790 insertions(+), 257 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
 create mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml
 create mode 100644 include/dt-bindings/sound/sc7180-lpass.h
 create mode 100644 sound/soc/qcom/lpass-sc7180.c
Signature · 1 line
('The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project')
author
#2 lore raw

PATCH v2 1/7 Documentation: device-tree: sound: Update lpass-cpu driver binding

Done the required cleanups to update lpass-cpu binding with newer yaml formats.

Signed-off-by Ajit Pandey <[email protected]>
---
 .../devicetree/bindings/sound/qcom,lpass-cpu.txt   |  79 -------------
 .../devicetree/bindings/sound/qcom,lpass-cpu.yaml  | 131 +++++++++++++++++++++
 2 files changed, 131 insertions(+), 79 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt
 create mode 100644 Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml
Documentation/devicetree/bindings/sound/qcom,lpass-cpu.txt deleted +0 -79
deleted file mode 100644
index 32c2cdb..0000000
@@ -1,79 +0,0 @@
-* Qualcomm Technologies LPASS CPU DAI
-
-This node models the Qualcomm Technologies Low-Power Audio SubSystem (LPASS).
-
-Required properties:
-
-- compatible		: "qcom,lpass-cpu" or "qcom,apq8016-lpass-cpu"
-- clocks		: Must contain an entry for each entry in clock-names.
-- clock-names		: A list which must include the following entries:
-				* "ahbix-clk"
-				* "mi2s-osr-clk"
-				* "mi2s-bit-clk"
-			: required clocks for "qcom,lpass-cpu-apq8016"
-				* "ahbix-clk"
-				* "mi2s-bit-clk0"
-				* "mi2s-bit-clk1"
-				* "mi2s-bit-clk2"
-				* "mi2s-bit-clk3"
-				* "pcnoc-mport-clk"
-				* "pcnoc-sway-clk"
-
-- interrupts		: Must contain an entry for each entry in
-			  interrupt-names.
-- interrupt-names	: A list which must include the following entries:
-				* "lpass-irq-lpaif"
-- pinctrl-N		: One property must exist for each entry in
-			  pinctrl-names.  See ../pinctrl/pinctrl-bindings.txt
-			  for details of the property values.
-- pinctrl-names		: Must contain a "default" entry.
-- reg			: Must contain an address for each entry in reg-names.
-- reg-names		: A list which must include the following entries:
-				* "lpass-lpaif"
-- #address-cells	: Must be 1
-- #size-cells		: Must be 0
-
-
-
-Optional properties:
-
-- qcom,adsp		: Phandle for the audio DSP node
-
-By default, the driver uses up to 4 MI2S SD lines, for a total of 8 channels.
-The SD lines to use can be configured by adding subnodes for each of the DAIs.
-
-Required properties for each DAI (represented by a subnode):
-- reg			: Must be one of the DAI IDs
-			  (usually part of dt-bindings header)
-- qcom,playback-sd-lines: List of serial data lines to use for playback
-			  Each SD line should be represented by a number from 0-3.
-- qcom,capture-sd-lines	: List of serial data lines to use for capture
-			  Each SD line should be represented by a number from 0-3.
-
-Note that adding a subnode changes the default to "no lines configured",
-so both playback and capture lines should be configured when a subnode is added.
-
-Example:
-
-lpass@28100000 {
-	compatible = "qcom,lpass-cpu";
-	clocks = <&lcc AHBIX_CLK>, <&lcc MI2S_OSR_CLK>, <&lcc MI2S_BIT_CLK>;
-	clock-names = "ahbix-clk", "mi2s-osr-clk", "mi2s-bit-clk";
-	interrupts = <0 85 1>;
-	interrupt-names = "lpass-irq-lpaif";
-	pinctrl-names = "default", "idle";
-	pinctrl-0 = <&mi2s_default>;
-	pinctrl-1 = <&mi2s_idle>;
-	reg = <0x28100000 0x10000>;
-	reg-names = "lpass-lpaif";
-	qcom,adsp = <&adsp>;
-
-	#address-cells = <1>;
-	#size-cells = <0>;
-
-	/* Optional to set different MI2S SD lines */
-	dai@3 {
-		reg = <MI2S_QUATERNARY>;
-		qcom,playback-sd-lines = <0 1>;
-	};
-};
Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml new file +131 -0

131 lines not on this page · raw message

Signature · 1 line
('The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project')
maintainer
#3 lore raw

Re: [PATCH v2 1/7] Documentation: device-tree: sound: Update lpass-cpu driver binding

Quoted 2 lines · Ajit Pandey

Done the required cleanups to update lpass-cpu binding with newer yaml formats.

Please do YAML conversions as the last thing in any patch series, there is quite a big backlog of reviews of YAML conversions so they can slow down the code development. It's good to do them, just try to make sure other patches don't depend on them.

Please submit patches using subject lines reflecting the style for the subsystem, this makes it easier for people to identify relevant patches. Look at what existing commits in the area you're changing are doing and make sure your subject lines visually resemble what they're doing. There's no need to resubmit to fix this alone.

author
#4 lore raw

PATCH v2 2/7 ASoC: qcom: Add common array to initialize soc based core clocks

In reply to Ajit Pandey

lpass variants have their own soc specific clocks that needs to be enable for MI2S audio support. Added a common variable in drvdata to initialize such clocks using bulk clk api. Such clock names is still defined in variants specific data and needs to fetched during init.

Signed-off-by Ajit Pandey <[email protected]>
---
 sound/soc/qcom/lpass-apq8016.c | 39 +++++++++++++++++++--------------------
 sound/soc/qcom/lpass.h         | 10 +++++++---
 2 files changed, 26 insertions(+), 23 deletions(-)
sound/soc/qcom/lpass-apq8016.c +19 -20
index b3610d0..8210e37 100644
@@ -161,32 +161,27 @@ static int apq8016_lpass_free_dma_channel(struct lpass_data *drvdata, int chan)
 static int apq8016_lpass_init(struct platform_device *pdev)
 {
 	struct lpass_data *drvdata = platform_get_drvdata(pdev);
+	struct lpass_variant *variant = drvdata->variant;
 	struct device *dev = &pdev->dev;
-	int ret;
+	int ret, i;
 
-	drvdata->pcnoc_mport_clk = devm_clk_get(dev, "pcnoc-mport-clk");
-	if (IS_ERR(drvdata->pcnoc_mport_clk)) {
-		dev_err(dev, "error getting pcnoc-mport-clk: %ld\n",
-			PTR_ERR(drvdata->pcnoc_mport_clk));
-		return PTR_ERR(drvdata->pcnoc_mport_clk);
-	}
 
-	ret = clk_prepare_enable(drvdata->pcnoc_mport_clk);
+	drvdata->clks = devm_kcalloc(dev, variant->num_clks,
+				     sizeof(*drvdata->clks), GFP_KERNEL);
+	drvdata->num_clks = variant->num_clks;
+
+	for (i = 0; i < drvdata->num_clks; i++)
+		drvdata->clks[i].id = variant->clk_name[i];
+
+	ret = devm_clk_bulk_get(dev, drvdata->num_clks, drvdata->clks);
 	if (ret) {
-		dev_err(dev, "Error enabling pcnoc-mport-clk: %d\n", ret);
+		dev_err(dev, "Failed to get clocks %d\n", ret);
 		return ret;
 	}
 
-	drvdata->pcnoc_sway_clk = devm_clk_get(dev, "pcnoc-sway-clk");
-	if (IS_ERR(drvdata->pcnoc_sway_clk)) {
-		dev_err(dev, "error getting pcnoc-sway-clk: %ld\n",
-			PTR_ERR(drvdata->pcnoc_sway_clk));
-		return PTR_ERR(drvdata->pcnoc_sway_clk);
-	}
-
-	ret = clk_prepare_enable(drvdata->pcnoc_sway_clk);
+	ret = clk_bulk_prepare_enable(drvdata->num_clks, drvdata->clks);
 	if (ret) {
-		dev_err(dev, "Error enabling pcnoc_sway_clk: %d\n", ret);
+		dev_err(dev, "apq8016 clk_enable failed\n");
 		return ret;
 	}
 

@@ -197,8 +192,7 @@ static int apq8016_lpass_exit(struct platform_device *pdev)
 {
 	struct lpass_data *drvdata = platform_get_drvdata(pdev);
 
-	clk_disable_unprepare(drvdata->pcnoc_mport_clk);
-	clk_disable_unprepare(drvdata->pcnoc_sway_clk);
+	clk_bulk_disable_unprepare(drvdata->num_clks, drvdata->clks);
 
 	return 0;
 }

@@ -219,6 +213,11 @@ static int apq8016_lpass_exit(struct platform_device *pdev)
 	.wrdma_reg_stride	= 0x1000,
 	.wrdma_channel_start	= 5,
 	.wrdma_channels		= 2,
+	.clk_name		= (const char*[]) {
+				   "pcnoc-mport-clk",
+				   "pcnoc-sway-clk",
+				  },
+	.num_clks		= 2,
 	.dai_driver		= apq8016_lpass_cpu_dai_driver,
 	.num_dai		= ARRAY_SIZE(apq8016_lpass_cpu_dai_driver),
 	.dai_osr_clk_names	= (const char *[]) {
sound/soc/qcom/lpass.h +7 -3
index bd19ec5..450020e 100644
@@ -51,9 +51,9 @@ struct lpass_data {
 	/* used it for handling interrupt per dma channel */
 	struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS];
 
-	/* 8016 specific */
-	struct clk *pcnoc_mport_clk;
-	struct clk *pcnoc_sway_clk;
+	/* SOC specific clock list */
+	struct clk_bulk_data *clks;
+	int num_clks;
 
 };
 

@@ -89,6 +89,10 @@ struct lpass_variant {
 	int num_dai;
 	const char * const *dai_osr_clk_names;
 	const char * const *dai_bit_clk_names;
+
+	/* SOC specific clocks configuration */
+	const char **clk_name;
+	int num_clks;
 };
 
 /* register the platform driver from the CPU DAI driver */
Signature · 1 line
('The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project')
author
#5 lore raw

PATCH v2 2/7 ASoC: qcom: Add common array to initialize soc based core clocks

In reply to Ajit Pandey

AHB-I/X bus clocks inside LPASS coreis not a mandatory clocks for SC7180 soc lpass variants, hence make it an optional one.

Signed-off-by Ajit Pandey <[email protected]>
---
 sound/soc/qcom/lpass-cpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
sound/soc/qcom/lpass-cpu.c +1 -1
index e00a4af..729ca78 100644
@@ -594,7 +594,7 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)
 		}
 	}
 
-	drvdata->ahbix_clk = devm_clk_get(dev, "ahbix-clk");
+	drvdata->ahbix_clk = devm_clk_get_optional(dev, "ahbix-clk");
 	if (IS_ERR(drvdata->ahbix_clk)) {
 		dev_err(dev, "error getting ahbix-clk: %ld\n",
 			PTR_ERR(drvdata->ahbix_clk));
Signature · 1 line
('The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project')
maintainer
#6 lore raw

Re: [PATCH v2 2/7] ASoC: qcom: Add common array to initialize soc based core clocks

Quoted 2 lines · Ajit Pandey

AHB-I/X bus clocks inside LPASS coreis not a mandatory clocks for SC7180 soc lpass variants, hence make it an optional one.

Do we need to improve the checks in the rest of the code so that if the clock is missing on a SoC where it is actually mandatory we don't end up trying to start without it? Perhaps it's more trouble than it's worth though.

author
#7 lore raw

PATCH v2 4/7 ASoC: qcom: lpass: Use regmap_field for i2sctl and dmactl registers

In reply to Ajit Pandey

I2SCTL and DMACTL registers has different bits alignment for newer LPASS variants of SC7180 soc. Instead of adding extra overhead for calculating masks and shifts for newer variants registers layout we changed the approach to use regmap_field_write() API to update bit. Such API's will internally do the required bit shift and mask based on reg_field struct defined for bit fields. We'll define REG_FIELD() macros with bit layout for both lpass variants and use such macros to initialize register fields in variant specific driver callbacks. Also added new bitfieds values for I2SCTL and DMACTL registers and removed shifts and mask macros for such registers from header file.

Signed-off-by Ajit Pandey <[email protected]>
---
 sound/soc/qcom/lpass-apq8016.c   |  61 ++++++++++++
 sound/soc/qcom/lpass-cpu.c       | 114 +++++++++++++---------
 sound/soc/qcom/lpass-lpaif-reg.h | 203 ++++++++++++++++++++++++---------------
 sound/soc/qcom/lpass-platform.c  |  86 +++++++++++------
 sound/soc/qcom/lpass.h           |  30 ++++++
 5 files changed, 340 insertions(+), 154 deletions(-)
sound/soc/qcom/lpass-apq8016.c +61 -0
index 8210e37..3149645 100644
@@ -124,6 +124,32 @@
 	},
 };
 
+static int apq8016_init_dmactl_bitfields(struct lpaif_dmactl *dmactl,
+					 struct regmap *map,
+					 unsigned int reg)
+{
+	struct reg_field bursten = DMACTL_BURSTEN_FLD(reg);
+	struct reg_field wpscnt = DMACTL_WPSCNT_FLD(reg);
+	struct reg_field fifowm = DMACTL_FIFOWM_FLD(reg);
+	struct reg_field intf = DMACTL_AUDINTF_FLD(reg);
+	struct reg_field enable = DMACTL_ENABLE_FLD(reg);
+	struct reg_field dyncclk = DMACTL_DYNCLK_FLD(reg);
+
+	dmactl->bursten = regmap_field_alloc(map, bursten);
+	dmactl->wpscnt = regmap_field_alloc(map, wpscnt);
+	dmactl->fifowm = regmap_field_alloc(map, fifowm);
+	dmactl->intf = regmap_field_alloc(map, intf);
+	dmactl->enable = regmap_field_alloc(map, enable);
+	dmactl->dyncclk = regmap_field_alloc(map, dyncclk);
+
+	if (IS_ERR(dmactl->bursten) || IS_ERR(dmactl->wpscnt) ||
+	    IS_ERR(dmactl->fifowm) || IS_ERR(dmactl->intf) ||
+	    IS_ERR(dmactl->enable) || IS_ERR(dmactl->dyncclk))
+		return -EINVAL;
+
+	return 0;
+}
+
 static int apq8016_lpass_alloc_dma_channel(struct lpass_data *drvdata,
 					   int direction)
 {

@@ -158,6 +184,39 @@ static int apq8016_lpass_free_dma_channel(struct lpass_data *drvdata, int chan)
 	return 0;
 }
 
+static int sc7180_init_i2sctl_bitfields(struct lpaif_i2sctl *i2sctl,
+					struct regmap *map, unsigned int reg)
+{
+	struct reg_field loopback = I2SCTL_LOOPBACK_FLD(reg);
+	struct reg_field spken = I2SCTL_SPKEN_FLD(reg);
+	struct reg_field spkmode = I2SCTL_SPKMODE_FLD(reg);
+	struct reg_field spkmono = I2SCTL_SPKMONO_FLD(reg);
+	struct reg_field micen = I2SCTL_MICEN_FLD(reg);
+	struct reg_field micmode = I2SCTL_MICMODE_FLD(reg);
+	struct reg_field micmono = I2SCTL_MICMONO_FLD(reg);
+	struct reg_field wssrc = I2SCTL_WSSRC_FLD(reg);
+	struct reg_field bitwidth = I2SCTL_BITWIDTH_FLD(reg);
+
+	i2sctl->loopback = regmap_field_alloc(map, loopback);
+	i2sctl->spken = regmap_field_alloc(map, spken);
+	i2sctl->spkmode = regmap_field_alloc(map, spkmode);
+	i2sctl->spkmono = regmap_field_alloc(map, spkmono);
+	i2sctl->micen = regmap_field_alloc(map, micen);
+	i2sctl->micmode = regmap_field_alloc(map, micmode);
+	i2sctl->micmono = regmap_field_alloc(map, micmono);
+	i2sctl->wssrc = regmap_field_alloc(map, wssrc);
+	i2sctl->bitwidth = regmap_field_alloc(map, bitwidth);
+
+	if (IS_ERR(i2sctl->loopback) || IS_ERR(i2sctl->spken) ||
+	    IS_ERR(i2sctl->spkmode) || IS_ERR(i2sctl->spkmono) ||
+	    IS_ERR(i2sctl->micen) || IS_ERR(i2sctl->micmode) ||
+	    IS_ERR(i2sctl->micmono) || IS_ERR(i2sctl->wssrc) ||
+	    IS_ERR(i2sctl->bitwidth))
+		return -EINVAL;
+
+	return 0;
+}
+
 static int apq8016_lpass_init(struct platform_device *pdev)
 {
 	struct lpass_data *drvdata = platform_get_drvdata(pdev);

@@ -236,6 +295,8 @@ static int apq8016_lpass_exit(struct platform_device *pdev)
 	.exit			= apq8016_lpass_exit,
 	.alloc_dma_channel	= apq8016_lpass_alloc_dma_channel,
 	.free_dma_channel	= apq8016_lpass_free_dma_channel,
+	.init_i2sctl_fields	= apq8016_init_i2sctl_bitfields,
+	.init_dmactl_fields	= apq8016_init_dmactl_bitfields,
 };
 
 static const struct of_device_id apq8016_lpass_cpu_device_id[] = {
sound/soc/qcom/lpass-cpu.c +69 -45

208 lines not on this page · raw message

sound/soc/qcom/lpass-lpaif-reg.h +123 -80

220 lines not on this page · raw message

sound/soc/qcom/lpass-platform.c +57 -29

177 lines not on this page · raw message

sound/soc/qcom/lpass.h +30 -0
index 450020e..30cb2ef 100644
@@ -17,6 +17,27 @@
 #define LPASS_MAX_MI2S_PORTS			(8)
 #define LPASS_MAX_DMA_CHANNELS			(8)
 
+struct lpaif_i2sctl {
+	struct regmap_field *loopback;
+	struct regmap_field *spken;
+	struct regmap_field *spkmode;
+	struct regmap_field *spkmono;
+	struct regmap_field *micen;
+	struct regmap_field *micmode;
+	struct regmap_field *micmono;
+	struct regmap_field *wssrc;
+	struct regmap_field *bitwidth;
+};
+
+struct lpaif_dmactl {
+	struct regmap_field *bursten;
+	struct regmap_field *wpscnt;
+	struct regmap_field *intf;
+	struct regmap_field *fifowm;
+	struct regmap_field *enable;
+	struct regmap_field *dyncclk;
+};
+
 /* Both the CPU DAI and platform drivers will access this data */
 struct lpass_data {
 

@@ -55,6 +76,9 @@ struct lpass_data {
 	struct clk_bulk_data *clks;
 	int num_clks;
 
+	/* Regmap fields of I2SCTL & DMACTL registers bitfields */
+	struct lpaif_i2sctl *i2sctl[LPASS_MAX_MI2S_PORTS];
+	struct lpaif_dmactl *dmactl[LPASS_MAX_DMA_CHANNELS];
 };
 
 /* Vairant data per each SOC */

@@ -93,6 +117,12 @@ struct lpass_variant {
 	/* SOC specific clocks configuration */
 	const char **clk_name;
 	int num_clks;
+
+	/* SOC specific reg_fields initalizaion for control registers */
+	int (*init_i2sctl_fields)(struct lpaif_i2sctl *i2sctl,
+				  struct regmap *map, unsigned int reg);
+	int (*init_dmactl_fields)(struct lpaif_dmactl *dmactl,
+				  struct regmap *map, unsigned int reg);
 };
 
 /* register the platform driver from the CPU DAI driver */
Signature · 1 line
('The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project')
author
#8 lore raw

PATCH v2 5/7 include: dt-bindings: sound: Add sc7180-lpass bindings header

In reply to Ajit Pandey

Add header defining dai-id and mclk id for SC7180 lpass soc.

Signed-off-by Ajit Pandey <[email protected]>
---
 include/dt-bindings/sound/sc7180-lpass.h | 10 ++++++++++
 1 file changed, 10 insertions(+)
 create mode 100644 include/dt-bindings/sound/sc7180-lpass.h
include/dt-bindings/sound/sc7180-lpass.h new file +10 -0
new file mode 100644
index 0000000..7d988f6
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __DT_SC7180_LPASS_H
+#define __DT_SC7180_LPASS_H
+
+#define MI2S_PRIMARY	0
+#define MI2S_SECONDARY	1
+
+#define LPASS_MCLK0	0
+
+#endif /* __DT_APQ8016_LPASS_H */
Signature · 1 line
('The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project')
maintainer
#9 lore raw

Re: [PATCH v2 5/7] include: dt-bindings: sound: Add sc7180-lpass bindings header

include/dt-bindings/sound/sc7180-lpass.h line 8

Quoted 4 lines · Ajit Pandey
include/dt-bindings/sound/sc7180-lpass.h new file +4 -0
+#define MI2S_PRIMARY	0
+#define MI2S_SECONDARY	1
+
+#define LPASS_MCLK0	0

These look like they could use namespacing. Is primary/secondary perhaps something that could be a boolean property?

author
#10 lore raw

PATCH v2 6/7 device-tree: bindings: sound: lpass-cpu: Add new compatible soc

In reply to Ajit Pandey

SC7180 soc variants of LPASS uses lpass-cpu node but required few extra devictree configuration. Update bindings documents with sc7180 compatible string specific dts properties.

Signed-off-by Ajit Pandey <[email protected]>
---
 .../devicetree/bindings/sound/qcom,lpass-cpu.yaml  | 25 +++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/sound/qcom,lpass-cpu.yaml +24 -1
index f2bcafc..5246d59 100644
@@ -21,6 +21,7 @@ properties:
     enum:
       - qcom,lpass-cpu
       - qcom,apq8016-lpass-cpu
+      - qcom,lpass-cpu-sc7180
 
   reg:
     items:

@@ -66,6 +67,14 @@ properties:
     maxItems: 1
     description: Phandle for the audio DSP node
 
+  iommus:
+    maxItems: 1
+    description: Phandle to apps_smmu node with sid mask
+
+  power-domains:
+    maxItems: 1
+    description: Phandle for power domain node
+
   '#sound-dai-cells':
     const: 1
 

@@ -102,6 +111,17 @@ required:
 optional:
   - qcom,adsp
 
+if:
+  properties:
+    compatible:
+      contains:
+        const: qcom,lpass-cpu-sc7180
+
+then:
+  required:
+    - iommus
+    - power-domains
+
 examples:
   lpass@28100000 {
 	compatible = "qcom,lpass-cpu";

@@ -114,7 +134,10 @@ examples:
 		      "mi2s-bit-clk";
 
 	interrupts = <0 85 1>;
-	interrupt-names = "lpass-irq-lpaif";
+        interrupt-names = "lpass-irq-lpaif";
+
+	iommus = <&apps_smmu 0x1020 0>;
+	power-domains = <&lpass_hm LPASS_CORE_HM_GDSCR>;
 
 	reg = <0x28100000 0x10000>;
 	reg-names = "lpass-lpaif";
Signature · 1 line
('The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project')
author
#11 lore raw

PATCH v2 7/7 ASoC: qcom: lpass-sc7180: Add platform driver for lpass audio

In reply to Ajit Pandey

Create a platform driver for configuring sc7180 lpass core I2S and DMA configuration to support playback & capture to external codecs connected over primary & secondary MI2S interfaces.

Signed-off-by Ajit Pandey <[email protected]>
---
 sound/soc/qcom/Kconfig        |   5 +
 sound/soc/qcom/Makefile       |   2 +
 sound/soc/qcom/lpass-sc7180.c | 252 ++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 259 insertions(+)
 create mode 100644 sound/soc/qcom/lpass-sc7180.c
sound/soc/qcom/Kconfig +5 -0
index f51b28d..17f44ea 100644
@@ -24,6 +24,11 @@ config SND_SOC_LPASS_APQ8016
 	select SND_SOC_LPASS_CPU
 	select SND_SOC_LPASS_PLATFORM
 
+config SND_SOC_LPASS_SC7180
+	tristate
+	select SND_SOC_LPASS_CPU
+	select SND_SOC_LPASS_PLATFORM
+
 config SND_SOC_STORM
 	tristate "ASoC I2S support for Storm boards"
 	depends on SND_SOC_QCOM
sound/soc/qcom/Makefile +2 -0
index 41b2c7a..7972c94 100644
@@ -4,11 +4,13 @@ snd-soc-lpass-cpu-objs := lpass-cpu.o
 snd-soc-lpass-platform-objs := lpass-platform.o
 snd-soc-lpass-ipq806x-objs := lpass-ipq806x.o
 snd-soc-lpass-apq8016-objs := lpass-apq8016.o
+snd-soc-lpass-sc7180-objs := lpass-sc7180.o
 
 obj-$(CONFIG_SND_SOC_LPASS_CPU) += snd-soc-lpass-cpu.o
 obj-$(CONFIG_SND_SOC_LPASS_PLATFORM) += snd-soc-lpass-platform.o
 obj-$(CONFIG_SND_SOC_LPASS_IPQ806X) += snd-soc-lpass-ipq806x.o
 obj-$(CONFIG_SND_SOC_LPASS_APQ8016) += snd-soc-lpass-apq8016.o
+obj-$(CONFIG_SND_SOC_LPASS_SC7180) += snd-soc-lpass-sc7180.o
 
 # Machine
 snd-soc-storm-objs := storm.o
sound/soc/qcom/lpass-sc7180.c new file +252 -0

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Signature · 1 line
('The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project')