net/axgbe: enabling VLAN support in axgbe
PATCH v4 1/1 net/axgbe: enabling VLAN support in axgbe
From: Sardar Shamsher Singh <[email protected]>
adding below APIs for axgbe
- axgbe_enable_rx_vlan_stripping: to enable vlan header stipping
- axgbe_disable_rx_vlan_stripping: to disable vlan header stipping
- axgbe_enable_rx_vlan_filtering: to enable vlan filter mode
- axgbe_disable_rx_vlan_filtering: to disable vlan filter mode
- axgbe_update_vlan_hash_table: crc calculation and hash table update based on vlan values post filter enable
- axgbe_vlan_filter_set: setting of active vlan out of max 4K values before doing hash update of same
- axgbe_vlan_tpid_set: setting of default tpid values
- axgbe_vlan_offload_set: a top layer function to call stip/filter etc based on mask values
--- doc/guides/nics/features/axgbe.ini | 1 + drivers/net/axgbe/axgbe_common.h | 30 +++++ drivers/net/axgbe/axgbe_dev.c | 171 ++++++++++++++++++++++++++-- drivers/net/axgbe/axgbe_ethdev.c | 173 ++++++++++++++++++++++++++++- drivers/net/axgbe/axgbe_ethdev.h | 16 +++ drivers/net/axgbe/axgbe_rxtx.c | 69 +++++++++++- 6 files changed, 444 insertions(+), 16 deletions(-)
doc/guides/nics/features/axgbe.ini +1 -0
@@ -11,6 +11,7 @@ Scattered Rx = Y Promiscuous mode = Y Allmulticast mode = Y RSS hash = Y +VLAN = Y CRC offload = Y L3 checksum offload = Y L4 checksum offload = Y
drivers/net/axgbe/axgbe_common.h +30 -0
@@ -257,6 +257,7 @@#define MAC_HWF0R 0x011c#define MAC_HWF1R 0x0120#define MAC_HWF2R 0x0124 +#define MAC_HWF3R 0x0128#define MAC_MDIOSCAR 0x0200#define MAC_MDIOSCCDR 0x0204#define MAC_MDIOISR 0x0214
@@ -282,6 +283,19 @@#define MAC_TXSNR 0x0d30#define MAC_TXSSR 0x0d34 +/*VLAN control bit mask*/ +#define AXGBE_VLNCTRL_MASK 0x0000FFFF +#define VLAN_PRIO_MASK 0xe000/* Priority Code Point */ +#define VLAN_PRIO_SHIFT 13 +#define VLAN_CFI_MASK 0x1000/* Canonical Format Indicator */ +#define VLAN_TAG_PRESENT VLAN_CFI_MASK +#define VLAN_VID_MASK 0x0fff/* VLAN Identifier */ +#define VLAN_N_VID 4096 +#define VLAN_TABLE_SIZE 64 +#define VLAN_TABLE_BIT (vlan_id) (1UL << ((vlan_id) & 0x3F)) +#define VLAN_TABLE_IDX (vlan_id) ((vlan_id) >> 6) +#define RX_CVLAN_TAG_PRESENT 9 +#define MAC_QTFCR_INC 4#define MAC_MACA_INC 4#define MAC_HTR_INC 4
@@ -359,6 +373,10 @@#define MAC_HWF2R_TXCHCNT_WIDTH 4#define MAC_HWF2R_TXQCNT_INDEX 6#define MAC_HWF2R_TXQCNT_WIDTH 4 +#define MAC_HWF3R_CBTISEL_INDEX 4 +#define MAC_HWF3R_CBTISEL_WIDTH 1 +#define MAC_HWF3R_NRVF_INDEX 0 +#define MAC_HWF3R_NRVF_WIDTH 3#define MAC_IER_TSIE_INDEX 12#define MAC_IER_TSIE_WIDTH 1#define MAC_ISR_MMCRXIS_INDEX 9
@@ -513,6 +531,8 @@#define MAC_VLANIR_VLTI_WIDTH 1#define MAC_VLANIR_CSVL_INDEX 19#define MAC_VLANIR_CSVL_WIDTH 1 +#define MAC_VLANIR_VLC_INDEX 16 +#define MAC_VLANIR_VLC_WIDTH 2#define MAC_VLANTR_DOVLTC_INDEX 20#define MAC_VLANTR_DOVLTC_WIDTH 1#define MAC_VLANTR_ERSVLM_INDEX 19
@@ -523,12 +543,18 @@#define MAC_VLANTR_ETV_WIDTH 1#define MAC_VLANTR_EVLS_INDEX 21#define MAC_VLANTR_EVLS_WIDTH 2 +#define MAC_VLANTR_EIVLS_INDEX 21 +#define MAC_VLANTR_EIVLS_WIDTH 2#define MAC_VLANTR_EVLRXS_INDEX 24#define MAC_VLANTR_EVLRXS_WIDTH 1 +#define MAC_VLANTR_EIVLRXS_INDEX 31 +#define MAC_VLANTR_EIVLRXS_WIDTH 1#define MAC_VLANTR_VL_INDEX 0#define MAC_VLANTR_VL_WIDTH 16#define MAC_VLANTR_VTHM_INDEX 25#define MAC_VLANTR_VTHM_WIDTH 1 +#define MAC_VLANTR_EDVLP_INDEX 26 +#define MAC_VLANTR_EDVLP_WIDTH 1#define MAC_VLANTR_VTIM_INDEX 17#define MAC_VLANTR_VTIM_WIDTH 1#define MAC_VR_DEVID_INDEX 8
@@ -537,6 +563,10 @@#define MAC_VR_SNPSVER_WIDTH 8#define MAC_VR_USERVER_INDEX 16#define MAC_VR_USERVER_WIDTH 8 +#define MAC_VLANIR_VLT_INDEX 0 +#define MAC_VLANIR_VLT_WIDTH 16 +#define MAC_VLANTR_ERIVLT_INDEX 27 +#define MAC_VLANTR_ERIVLT_WIDTH 1/* MMC register offsets */ #define MMC_CR 0x0800
drivers/net/axgbe/axgbe_dev.c +161 -10
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drivers/net/axgbe/axgbe_ethdev.c +172 -1
216 lines not on this page · raw message
drivers/net/axgbe/axgbe_ethdev.h +16 -0
@@ -291,6 +291,13 @@ struct axgbe_hw_if {int (*config_tx_flow_control)(struct axgbe_port *);int (*config_rx_flow_control)(struct axgbe_port *); +/* vlan */ +int (*enable_rx_vlan_stripping)(struct axgbe_port *); +int (*disable_rx_vlan_stripping)(struct axgbe_port *); +int (*enable_rx_vlan_filtering)(struct axgbe_port *); +int (*disable_rx_vlan_filtering)(struct axgbe_port *); +int (*update_vlan_hash_table)(struct axgbe_port *); +int (*exit)(struct axgbe_port *); };
@@ -425,6 +432,12 @@ struct axgbe_hw_features {unsigned int tx_ch_cnt;/* Number of DMA Transmit Channels */ unsigned int pps_out_num;/* Number of PPS outputs */ unsigned int aux_snap_num;/* Number of Aux snapshot inputs */ + +/* HW Feature Register3 */ +unsigned int tx_q_vlan_tag_ins;/* Queue/Channel based VLAN tag */ +/* insertion on Tx Enable */ +unsigned int no_of_vlan_extn;/* Number of Extended VLAN Tag */ +/* Filters Enabled */ };struct axgbe_version_data {
@@ -644,6 +657,9 @@ struct axgbe_port {unsigned int hash_table_count;unsigned int uc_hash_mac_addr;unsigned int uc_hash_table[AXGBE_MAC_HASH_TABLE_SIZE ]; + +/* Filtering support */ +unsigned long active_vlans[VLAN_TABLE_SIZE ]; };void axgbe_init_function_ptrs_dev (struct axgbe_hw_if *hw_if);
drivers/net/axgbe/axgbe_rxtx.c +64 -5
125 lines not on this page · raw message
Signature · 1 line
2.17.1