mtd: spi-nor: Add support for Winbond w25q64jv spi flash
Subsystems (2)
PATCH 1/1 mtd: spi-nor: Add support for Winbond w25q64jv spi flash
This chip is (nearly) identical to the Winbond w25q64 which is already supported by Linux. Compared to the w25q64, the 'jv' does not support Quad SPI mode, and has a different JEDEC ID.
To: Tudor Ambarus <[email protected]>
To: Miquel Raynal <[email protected]>
To: Richard Weinberger <[email protected]>
To: Vignesh Raghavendra <[email protected]>
---
Tree: next-20200613
drivers/mtd/spi-nor/winbond.c | 1 + 1 file changed, 1 insertion(+)
drivers/mtd/spi-nor/winbond.c +1 -0
@@ -65,6 +65,7 @@ static const struct flash_info winbond_parts[] = { SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) }, { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, + { "w25q64jv", INFO(0xef7017, 0, 64 * 1024, 128, SECT_4K) }, { "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128,SECT_4K |SPI_NOR_DUAL_READ |SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) },
Signature · 6 lines
2.17.1 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
Is there any way I can help to get this patch into mainline?
Thank you,
Sven
Quoted 34 lines · Sven Van Asbroeck
This chip is (nearly) identical to the Winbond w25q64 which is already supported by Linux. Compared to the w25q64, the 'jv' does not support Quad SPI mode, and has a different JEDEC ID.
To: Tudor Ambarus <[email protected]>
To: Miquel Raynal <[email protected]>
To: Richard Weinberger <[email protected]>
To: Vignesh Raghavendra <[email protected]>---
Tree: next-20200613
drivers/mtd/spi-nor/winbond.c | 1 + 1 file changed, 1 insertion(+)drivers/mtd/spi-nor/winbond.c +1
-1@@ -65,6 +65,7 @@ static const struct flash_info winbond_parts[] = { SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) }, { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, + { "w25q64jv", INFO(0xef7017, 0, 64 * 1024, 128, SECT_4K) }, { "w25q64dw", INFO(0xef6017, 0, 64 * 1024, 128,SECT_4K |SPI_NOR_DUAL_READ |SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, --2.17.1
Hi, Sven,
Quoted 5 lines · Sven Van Asbroeck
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This chip is (nearly) identical to the Winbond w25q64 which is already supported by Linux. Compared to the w25q64, the 'jv' does not support Quad SPI mode, and has a different JEDEC ID.
I'm reading the following datasheet:
https://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf
w25q64jvm (0xef7017) comes with QE bit set to a 0 state, but can be set to 1, so Quad mode can be supported. Would you please set SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ flags and test and see if Quad works? If all good, please specify in the commit message with which controller you did the tests.
Quoted 7 lines
To: Tudor Ambarus <[email protected]>
To: Miquel Raynal <[email protected]>
To: Richard Weinberger <[email protected]>
To: Vignesh Raghavendra <[email protected]>
Cc: [email protected]
Cc: [email protected]
Are these tags really necessary? Would you drop them?
Quoted 13 lines
Signed-off-by Sven Van Asbroeck <[email protected]>---
Tree: next-20200613
drivers/mtd/spi-nor/winbond.c | 1 + 1 file changed, 1 insertion(+)drivers/mtd/spi-nor/winbond.c +0
-0
drivers/mtd/spi-nor/winbond.c static const struct flash_info winbond_parts[] = { · line 68
Quoted 4 lines
drivers/mtd/spi-nor/winbond.c +1
-0@@ -65,6 +65,7 @@ static const struct flash_info winbond_parts[] = { SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) }, { "w25q64", INFO(0xef4017, 0, 64 * 1024, 128, SECT_4K) }, + { "w25q64jv", INFO(0xef7017, 0, 64 * 1024, 128, SECT_4K) },
I would name it "w25q64jvm". Check "11.ORDERING INFORMATION". Although the datasheet refers to these flashes as "W25Q64JV-IQ/JQ" and "W25Q64JV-IM/JM", I find that the temperature range is not a differentiator in the flash ID, so I would drop it.
Cheers,
ta
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http://lists.infradead.org/mailman/listinfo/linux-mtd/
Hi Tudor,
Quoted 9 lines · On Mon, Jun 29, 2020 at 8:50 AM <[email protected]> wrote:
I'm reading the following datasheet:
https://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdfw25q64jvm (
0xef7017) comes with QE bit set to a 0 state, but can be set to 1, so Quad mode can be supported. Would you please setSPI_NOR_DUAL_READandSPI_NOR_QUAD_READflags and test and see if Quad works? If all good, please specify in the commit message with which controller you did the tests.
Good point !
Unfortunately I'm using the spi controller on an imx6 ("fsl,imx51-ecspi") which does not support dual or quad mode. So I cannot possibly test this :)
How would you like to proceed? Should I keep this as a private patch, and wait until someone comes along who can test this on more capable controller h/w ?
Or should I re-spin the patch without the flags?
Cheers,
Sven
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
Quoted 17 lines · Sven Van Asbroeck
EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
Hi Tudor,
Quoted 9 lines · On Mon, Jun 29, 2020 at 8:50 AM <[email protected]> wrote:
I'm reading the following datasheet:
https://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdfw25q64jvm (
0xef7017) comes with QE bit set to a 0 state, but can be set to 1, so Quad mode can be supported. Would you please setSPI_NOR_DUAL_READandSPI_NOR_QUAD_READflags and test and see if Quad works? If all good, please specify in the commit message with which controller you did the tests.Good point !
Quoted 9 lines
Unfortunately I'm using the spi controller on an imx6 ("fsl,imx51-ecspi") which does not support dual or quad mode. So I cannot possibly test this :)
How would you like to proceed? Should I keep this as a private patch, and wait until someone comes along who can test this on more capable controller h/w ?
Or should I re-spin the patch without the flags?
Re-spin the patch without the flags. We can add them later on, when someone can test them.
Cheers,
ta