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ARM: dts: s3c: dtschema fixes

PATCH Applied Krzysztof Kozlowski 1 participant 14 messages Sep 7, 2020 – Sep 11, 2020

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Device tree bindings Arm Samsung Exynos
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Krzysztof Kozlowski

author maintainer
#0 lore raw

cover ARM: dts: s3c: dtschema fixes

Hi,

This is last serie of big dtschema cleanups for Samsung DTS. It fixes almost all dtschema violations, except:

s3c6410-mini6410.dt.yaml: srom-cs1-bus@18000000: ethernet@18000000:reg:0: [402653184, 2, 402653188, 2] is too long

which is similar to the case with SMDK5410 (Exynos5410).

The patchset was not tested on HW.

Best regards,
Krzysztof

Krzysztof Kozlowski (11):
ARM: dts: s5pv210: Correct ethernet unit address in SMDKV210
ARM: dts: s3c6410: move fixed clocks under root node in Mini6410
ARM: dts: s3c6410: move fixed clocks under root node in SMDK6410
ARM: dts: s3c6410: align node SROM bus node name with dtschema in

    Mini6410
  ARM: dts: s3c6410: align node SROM bus node name with dtschema in
    SMDK6410

ARM: dts: s3c6410: remove additional CPU compatible
ARM: dts: s3c24xx: fix number of PWM cells
ARM: dts: s3c24xx: override nods by label
ARM: dts: s3c24xx: align PWM/timer node name with dtschema
ARM: dts: s3c24xx: add address to CPU node
ARM: dts: s3c24xx: move fixed clocks under root node in SMDK2416

 arch/arm/boot/dts/s3c2416-smdk2416.dts |  17 ++--
 arch/arm/boot/dts/s3c2416.dtsi         | 111 +++++++++++++------------
 arch/arm/boot/dts/s3c24xx.dtsi         |  24 +++---
 arch/arm/boot/dts/s3c6410-mini6410.dts |  32 +++----
 arch/arm/boot/dts/s3c6410-smdk6410.dts |  32 +++----
 arch/arm/boot/dts/s3c64xx.dtsi         |   2 +-
 arch/arm/boot/dts/s5pv210-smdkv210.dts |   2 +-
 7 files changed, 101 insertions(+), 119 deletions(-)
Signature · 1 line
2.17.1
author maintainer
#1 lore raw

PATCH 1/11 ARM: dts: s5pv210: Correct ethernet unit address in SMDKV210

The SROM bank 5 is at address 0xa8000000, just like the one put in "reg" property of ethernet node. Fix the unit address of ethernet node.

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s5pv210-smdkv210.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/s5pv210-smdkv210.dts +1 -1
index 1e1570d66d89..7459e41e8ef1 100644
@@ -39,7 +39,7 @@
 		clock-frequency = <32768>;
 	};
 
-	ethernet@18000000 {
+	ethernet@a8000000 {
 		compatible = "davicom,dm9000";
 		reg = <0xA8000000 0x2 0xA8000002 0x2>;
 		interrupt-parent = <&gph1>;
Signature · 1 line
2.17.1
author maintainer Applied
#2 lore raw

Re: [PATCH 01/11] ARM: dts: s5pv210: Correct ethernet unit address in SMDKV210

Quoted 7 lines · Krzysztof Kozlowski

The SROM bank 5 is at address 0xa8000000, just like the one put in "reg" property of ethernet node. Fix the unit address of ethernet node.

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s5pv210-smdkv210.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Applied.

Best regards,
Krzysztof

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author maintainer
#3 lore raw

PATCH 2/11 ARM: dts: s3c6410: move fixed clocks under root node in Mini6410

In reply to Krzysztof Kozlowski

The fixed clocks are kept under dedicated 'clocks' node but this causes multiple dtschema warnings:

clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
clocks: #size-cells:0:0: 0 is not one of [1, 2]
clocks: oscillator@0:reg:0: [0] is too short
clocks: oscillator@1:reg:0: [1] is too short
clocks: 'ranges' is a required property
oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s3c6410-mini6410.dts | 30 ++++++++++----------------
 1 file changed, 11 insertions(+), 19 deletions(-)
arch/arm/boot/dts/s3c6410-mini6410.dts +11 -19
index 1aeac33b0d34..75067dbcf7e8 100644
@@ -28,26 +28,18 @@
 		bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1";
 	};
 
-	clocks {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		fin_pll: oscillator@0 {
-			compatible = "fixed-clock";
-			reg = <0>;
-			clock-frequency = <12000000>;
-			clock-output-names = "fin_pll";
-			#clock-cells = <0>;
-		};
+	fin_pll: oscillator-0 {
+		compatible = "fixed-clock";
+		clock-frequency = <12000000>;
+		clock-output-names = "fin_pll";
+		#clock-cells = <0>;
+	};
 
-		xusbxti: oscillator@1 {
-			compatible = "fixed-clock";
-			reg = <1>;
-			clock-output-names = "xusbxti";
-			clock-frequency = <48000000>;
-			#clock-cells = <0>;
-		};
+	xusbxti: oscillator-1 {
+		compatible = "fixed-clock";
+		clock-output-names = "xusbxti";
+		clock-frequency = <48000000>;
+		#clock-cells = <0>;
 	};
 
 	srom-cs1@18000000 {
Signature · 1 line
2.17.1
author maintainer
#4 lore raw

PATCH 3/11 ARM: dts: s3c6410: move fixed clocks under root node in SMDK6410

In reply to Krzysztof Kozlowski

The fixed clocks are kept under dedicated 'clocks' node but this causes multiple dtschema warnings:

clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
clocks: #size-cells:0:0: 0 is not one of [1, 2]
clocks: oscillator@0:reg:0: [0] is too short
clocks: oscillator@1:reg:0: [1] is too short
clocks: 'ranges' is a required property
oscillator@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s3c6410-smdk6410.dts | 30 ++++++++++----------------
 1 file changed, 11 insertions(+), 19 deletions(-)
arch/arm/boot/dts/s3c6410-smdk6410.dts +11 -19
index 96267f5f02a8..74379061a11a 100644
@@ -28,26 +28,18 @@
 		bootargs = "console=ttySAC0,115200n8 earlyprintk rootwait root=/dev/mmcblk0p1";
 	};
 
-	clocks {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		fin_pll: oscillator@0 {
-			compatible = "fixed-clock";
-			reg = <0>;
-			clock-frequency = <12000000>;
-			clock-output-names = "fin_pll";
-			#clock-cells = <0>;
-		};
+	fin_pll: oscillator-0 {
+		compatible = "fixed-clock";
+		clock-frequency = <12000000>;
+		clock-output-names = "fin_pll";
+		#clock-cells = <0>;
+	};
 
-		xusbxti: oscillator@1 {
-			compatible = "fixed-clock";
-			reg = <1>;
-			clock-output-names = "xusbxti";
-			clock-frequency = <48000000>;
-			#clock-cells = <0>;
-		};
+	xusbxti: oscillator-1 {
+		compatible = "fixed-clock";
+		clock-output-names = "xusbxti";
+		clock-frequency = <48000000>;
+		#clock-cells = <0>;
 	};
 
 	srom-cs1@18000000 {
Signature · 1 line
2.17.1
author maintainer
#5 lore raw

PATCH 4/11 ARM: dts: s3c6410: align node SROM bus node name with dtschema in Mini6410

In reply to Krzysztof Kozlowski

The SROM controller is modeled with a bus so align the device node name with dtschema to fix warning:

srom-cs1@18000000: $nodename:0: 'srom-cs1@18000000'

    does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s3c6410-mini6410.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/s3c6410-mini6410.dts +1 -1
index 75067dbcf7e8..285555b9ed94 100644
@@ -42,7 +42,7 @@
 		#clock-cells = <0>;
 	};
 
-	srom-cs1@18000000 {
+	srom-cs1-bus@18000000 {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
Signature · 1 line
2.17.1
author maintainer
#6 lore raw

PATCH 5/11 ARM: dts: s3c6410: align node SROM bus node name with dtschema in SMDK6410

In reply to Krzysztof Kozlowski

The SROM controller is modeled with a bus so align the device node name with dtschema to fix warning:

srom-cs1@18000000: $nodename:0: 'srom-cs1@18000000'

    does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s3c6410-smdk6410.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/s3c6410-smdk6410.dts +1 -1
index 74379061a11a..69c9ec4cf381 100644
@@ -42,7 +42,7 @@
 		#clock-cells = <0>;
 	};
 
-	srom-cs1@18000000 {
+	srom-cs1-bus@18000000 {
 		compatible = "simple-bus";
 		#address-cells = <1>;
 		#size-cells = <1>;
Signature · 1 line
2.17.1
author maintainer
#7 lore raw

PATCH 6/11 ARM: dts: s3c6410: remove additional CPU compatible

In reply to Krzysztof Kozlowski

Only the specific compatible (arm,arm1176jzf-s) is allowed by dtschema:

cpu@0: compatible: ['arm,arm1176jzf-s', 'arm,arm1176'] is too long cpu@0: compatible: Additional items are not allowed ('arm,arm1176' was unexpected)

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s3c64xx.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/s3c64xx.dtsi +1 -1
index 2e611df37911..cb11a87dbc42 100644
@@ -34,7 +34,7 @@
 
 		cpu@0 {
 			device_type = "cpu";
-			compatible = "arm,arm1176jzf-s", "arm,arm1176";
+			compatible = "arm,arm1176jzf-s";
 			reg = <0x0>;
 		};
 	};
Signature · 1 line
2.17.1
author maintainer
#8 lore raw

PATCH 7/11 ARM: dts: s3c24xx: fix number of PWM cells

In reply to Krzysztof Kozlowski

The PWM has only three cells, not four, as pointed out by dtschema:

timer@51000000: #pwm-cells:0:0: 3 was expected

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s3c24xx.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/s3c24xx.dtsi +1 -1
index 6d8dd3cdd3c0..0d49d7680e72 100644
@@ -43,7 +43,7 @@
 		compatible = "samsung,s3c2410-pwm";
 		reg = <0x51000000 0x1000>;
 		interrupts = <0 0 10 3>, <0 0 11 3>, <0 0 12 3>, <0 0 13 3>, <0 0 14 3>;
-		#pwm-cells = <4>;
+		#pwm-cells = <3>;
 	};
 
 	uart0: serial@50000000 {
Signature · 1 line
2.17.1
author maintainer
#9 lore raw

PATCH 8/11 ARM: dts: s3c24xx: override nods by label

In reply to Krzysztof Kozlowski

Using full paths to extend or override a device tree node is error prone. If there was a typo error, a new node will be created instead of extending the existing node. This will lead to run-time errors that could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error (during build time).

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s3c2416.dtsi | 104 ++++++++++++++++-----------------
 arch/arm/boot/dts/s3c24xx.dtsi |  22 +++----
 2 files changed, 63 insertions(+), 63 deletions(-)
arch/arm/boot/dts/s3c2416.dtsi +52 -52
index 6adf64ea3ff2..d1dec9f52f69 100644
@@ -23,49 +23,12 @@
 		};
 	};
 
-	interrupt-controller@4a000000 {
-		compatible = "samsung,s3c2416-irq";
-	};
-
 	clocks: clock-controller@4c000000 {
 		compatible = "samsung,s3c2416-clock";
 		reg = <0x4c000000 0x40>;
 		#clock-cells = <1>;
 	};
 
-	pinctrl@56000000 {
-		compatible = "samsung,s3c2416-pinctrl";
-	};
-
-	timer@51000000 {
-		clocks = <&clocks PCLK_PWM>;
-		clock-names = "timers";
-	};
-
-	uart_0: serial@50000000 {
-		compatible = "samsung,s3c2440-uart";
-		clock-names = "uart", "clk_uart_baud2",
-				"clk_uart_baud3";
-		clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
-				<&clocks SCLK_UART>;
-	};
-
-	uart_1: serial@50004000 {
-		compatible = "samsung,s3c2440-uart";
-		clock-names = "uart", "clk_uart_baud2",
-				"clk_uart_baud3";
-		clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
-				<&clocks SCLK_UART>;
-	};
-
-	uart_2: serial@50008000 {
-		compatible = "samsung,s3c2440-uart";
-		clock-names = "uart", "clk_uart_baud2",
-				"clk_uart_baud3";
-		clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
-				<&clocks SCLK_UART>;
-	};
-
 	uart_3: serial@5000c000 {
 		compatible = "samsung,s3c2440-uart";
 		reg = <0x5000C000 0x4000>;

@@ -98,22 +61,59 @@
 				<&clocks MUX_HSMMC1>;
 		status = "disabled";
 	};
+};
 
-	watchdog: watchdog@53000000 {
-		interrupts = <1 9 27 3>;
-		clocks = <&clocks PCLK_WDT>;
-		clock-names = "watchdog";
-	};
+&i2c {
+	compatible = "samsung,s3c2440-i2c";
+	clocks = <&clocks PCLK_I2C0>;
+	clock-names = "i2c";
+};
 
-	rtc: rtc@57000000 {
-		compatible = "samsung,s3c2416-rtc";
-		clocks = <&clocks PCLK_RTC>;
-		clock-names = "rtc";
-	};
+&intc {
+	compatible = "samsung,s3c2416-irq";
+};
 
-	i2c@54000000 {
-		compatible = "samsung,s3c2440-i2c";
-		clocks = <&clocks PCLK_I2C0>;
-		clock-names = "i2c";
-	};
+&pinctrl_0 {
+	compatible = "samsung,s3c2416-pinctrl";
+};
+
+&rtc {
+	compatible = "samsung,s3c2416-rtc";
+	clocks = <&clocks PCLK_RTC>;
+	clock-names = "rtc";
+};
+
+&timer {
+	clocks = <&clocks PCLK_PWM>;
+	clock-names = "timers";
+};
+
+&uart_0 {
+	compatible = "samsung,s3c2440-uart";
+	clock-names = "uart", "clk_uart_baud2",
+			"clk_uart_baud3";
+	clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
+			<&clocks SCLK_UART>;
+};
+
+&uart_1 {
+	compatible = "samsung,s3c2440-uart";
+	clock-names = "uart", "clk_uart_baud2",
+			"clk_uart_baud3";
+	clocks = <&clocks PCLK_UART1>, <&clocks PCLK_UART1>,
+			<&clocks SCLK_UART>;
+};
+
+&uart_2 {
+	compatible = "samsung,s3c2440-uart";
+	clock-names = "uart", "clk_uart_baud2",
+			"clk_uart_baud3";
+	clocks = <&clocks PCLK_UART2>, <&clocks PCLK_UART2>,
+			<&clocks SCLK_UART>;
+};
+
+&watchdog {
+	interrupts = <1 9 27 3>;
+	clocks = <&clocks PCLK_WDT>;
+	clock-names = "watchdog";
 };
arch/arm/boot/dts/s3c24xx.dtsi +11 -11
index 0d49d7680e72..80d4ce79be55 100644
@@ -13,12 +13,12 @@
 
 	aliases {
 		pinctrl0 = &pinctrl_0;
-		serial0 = &uart0;
-		serial1 = &uart1;
-		serial2 = &uart2;
+		serial0 = &uart_0;
+		serial1 = &uart_1;
+		serial2 = &uart_2;
 	};
 
-	intc:interrupt-controller@4a000000 {
+	intc: interrupt-controller@4a000000 {
 		compatible = "samsung,s3c2410-irq";
 		reg = <0x4a000000 0x100>;
 		interrupt-controller;

@@ -39,49 +39,49 @@
 		};
 	};
 
-	timer@51000000 {
+	timer: timer@51000000 {
 		compatible = "samsung,s3c2410-pwm";
 		reg = <0x51000000 0x1000>;
 		interrupts = <0 0 10 3>, <0 0 11 3>, <0 0 12 3>, <0 0 13 3>, <0 0 14 3>;
 		#pwm-cells = <3>;
 	};
 
-	uart0: serial@50000000 {
+	uart_0: serial@50000000 {
 		compatible = "samsung,s3c2410-uart";
 		reg = <0x50000000 0x4000>;
 		interrupts = <1 28 0 4>, <1 28 1 4>;
 		status = "disabled";
 	};
 
-	uart1: serial@50004000 {
+	uart_1: serial@50004000 {
 		compatible = "samsung,s3c2410-uart";
 		reg = <0x50004000 0x4000>;
 		interrupts = <1 23 3 4>, <1 23 4 4>;
 		status = "disabled";
 	};
 
-	uart2: serial@50008000 {
+	uart_2: serial@50008000 {
 		compatible = "samsung,s3c2410-uart";
 		reg = <0x50008000 0x4000>;
 		interrupts = <1 15 6 4>, <1 15 7 4>;
 		status = "disabled";
 	};
 
-	watchdog@53000000 {
+	watchdog: watchdog@53000000 {
 		compatible = "samsung,s3c2410-wdt";
 		reg = <0x53000000 0x100>;
 		interrupts = <0 0 9 3>;
 		status = "disabled";
 	};
 
-	rtc@57000000 {
+	rtc: rtc@57000000 {
 		compatible = "samsung,s3c2410-rtc";
 		reg = <0x57000000 0x100>;
 		interrupts = <0 0 30 3>, <0 0 8 3>;
 		status = "disabled";
 	};
 
-	i2c@54000000 {
+	i2c: i2c@54000000 {
 		compatible = "samsung,s3c2410-i2c";
 		reg = <0x54000000 0x100>;
 		interrupts = <0 0 27 3>;
Signature · 1 line
2.17.1
author maintainer
#10 lore raw

PATCH 9/11 ARM: dts: s3c24xx: align PWM/timer node name with dtschema

In reply to Krzysztof Kozlowski

Although PWM is used on S3C24xx as clocksource/timer, the dtschema expects the node to be named in certain format:

timer@51000000: $nodename:0: 'timer@51000000' does not match '^pwm(@.*|-[0-9a-f])*$'

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s3c24xx.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm/boot/dts/s3c24xx.dtsi +1 -1
index 80d4ce79be55..06f82c7e458e 100644
@@ -39,7 +39,7 @@
 		};
 	};
 
-	timer: timer@51000000 {
+	timer: pwm@51000000 {
 		compatible = "samsung,s3c2410-pwm";
 		reg = <0x51000000 0x1000>;
 		interrupts = <0 0 10 3>, <0 0 11 3>, <0 0 12 3>, <0 0 13 3>, <0 0 14 3>;
Signature · 1 line
2.17.1
author maintainer
#11 lore raw

PATCH 10/11 ARM: dts: s3c24xx: add address to CPU node

In reply to Krzysztof Kozlowski

The CPU nodes should be described as children of "cpus" bus node with appropriate "reg" properties:

cpus: '#address-cells' is a required property
cpus: '#size-cells' is a required property
cpu: 'device_type' is a required property
cpu: 'reg' is a required property

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s3c2416.dtsi | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
arch/arm/boot/dts/s3c2416.dtsi +6 -1
index d1dec9f52f69..4f084f4fe44f 100644
@@ -18,8 +18,13 @@
 	};
 
 	cpus {
-		cpu {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
 			compatible = "arm,arm926ej-s";
+			reg = <0x0>;
 		};
 	};
Signature · 1 line
2.17.1
author maintainer
#12 lore raw

PATCH 11/11 ARM: dts: s3c24xx: move fixed clocks under root node in SMDK2416

In reply to Krzysztof Kozlowski

The fixed clocks are kept under dedicated 'clocks' node but this causes multiple dtschema warnings:

clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
clocks: #size-cells:0:0: 0 is not one of [1, 2]
clocks: xti@0:reg:0: [0] is too short
clocks: 'ranges' is a required property
xti@0: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by Krzysztof Kozlowski <[email protected]>
---
 arch/arm/boot/dts/s3c2416-smdk2416.dts | 17 +++++------------
 1 file changed, 5 insertions(+), 12 deletions(-)
arch/arm/boot/dts/s3c2416-smdk2416.dts +5 -12
index 811bfdef4e9b..47626ede6fdd 100644
@@ -17,18 +17,11 @@
 		reg =  <0x30000000 0x4000000>;
 	};
 
-	clocks {
-		compatible = "simple-bus";
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		xti: xti@0 {
-			compatible = "fixed-clock";
-			reg = <0>;
-			clock-frequency = <12000000>;
-			clock-output-names = "xti";
-			#clock-cells = <0>;
-		};
+	xti: clock-0 {
+		compatible = "fixed-clock";
+		clock-frequency = <12000000>;
+		clock-output-names = "xti";
+		#clock-cells = <0>;
 	};
 };
Signature · 1 line
2.17.1
author maintainer
#13 lore raw
In reply to Krzysztof Kozlowski
Quoted 5 lines · Krzysztof Kozlowski

Hi,

This is last serie of big dtschema cleanups for Samsung DTS. It fixes almost all dtschema violations, except:

Quoted 8 lines

s3c6410-mini6410.dt.yaml: srom-cs1-bus@18000000: ethernet@18000000:reg:0: [402653184, 2, 402653188, 2] is too long

which is similar to the case with SMDK5410 (Exynos5410).

The patchset was not tested on HW.

Best regards,
Krzysztof

Applied entire series.

Best regards,
Krzysztof

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