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Marvell PP2.2 PTP support

PATCH Superseded Russell King - ARM Linux admin 4 participants 13 messages Sep 8, 2020 – Sep 11, 2020

Subsystems (3)
Networking Network drivers Marvell MVPP2 Ethernet driver

v3 of 4 Superseded Latest is v4 →

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Russell King - ARM Linux admin

author maintainer
#0 lore raw

v3 cover Marvell PP2.2 PTP support

Hi,

This series adds PTP support for PP2.2 hardware to the mvpp2 driver. Tested on the Macchiatobin eth1 port.

Note that on the Macchiatobin, eth0 uses a separate TAI block from eth1, and there is no hardware synchronisation between the two.

 drivers/net/ethernet/marvell/Kconfig            |   6 +
 drivers/net/ethernet/marvell/mvpp2/Makefile     |   3 +-
 drivers/net/ethernet/marvell/mvpp2/mvpp2.h      | 196 +++++++++-
 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 411 ++++++++++++++++++---
 drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c  | 456 ++++++++++++++++++++++++
 5 files changed, 1022 insertions(+), 50 deletions(-)
 create mode 100644 drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c

v2: add Andrew's r-bs, squash patch 6 and patch 7.
v3: Address Richard's comments on patch 4.

Signature · 2 lines
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
#1 lore raw

PATCH v3 1/7 net: mvpp2: restructure "link status" interrupt handling

The "link status" interrupt is used for more than just link status. Restructure mvpp2_link_status_isr() so we can add additional handling.

Reviewed-by Andrew Lunn <[email protected]>
Signed-off-by Russell King <[email protected]>
---
 .../net/ethernet/marvell/mvpp2/mvpp2_main.c   | 83 ++++++++++++-------
 1 file changed, 51 insertions(+), 32 deletions(-)
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +51 -32
index ee8b6a9037ce..bb7284306ee4 100644
@@ -2974,44 +2974,17 @@ static irqreturn_t mvpp2_isr(int irq, void *dev_id)
 	return IRQ_HANDLED;
 }
 
-/* Per-port interrupt for link status changes */
-static irqreturn_t mvpp2_link_status_isr(int irq, void *dev_id)
+static void mvpp2_isr_handle_link(struct mvpp2_port *port, bool link)
 {
-	struct mvpp2_port *port = (struct mvpp2_port *)dev_id;
 	struct net_device *dev = port->dev;
-	bool event = false, link = false;
-	u32 val;
-
-	mvpp22_gop_mask_irq(port);
-
-	if (mvpp2_port_supports_xlg(port) &&
-	    mvpp2_is_xlg(port->phy_interface)) {
-		val = readl(port->base + MVPP22_XLG_INT_STAT);
-		if (val & MVPP22_XLG_INT_STAT_LINK) {
-			event = true;
-			val = readl(port->base + MVPP22_XLG_STATUS);
-			if (val & MVPP22_XLG_STATUS_LINK_UP)
-				link = true;
-		}
-	} else if (phy_interface_mode_is_rgmii(port->phy_interface) ||
-		   phy_interface_mode_is_8023z(port->phy_interface) ||
-		   port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
-		val = readl(port->base + MVPP22_GMAC_INT_STAT);
-		if (val & MVPP22_GMAC_INT_STAT_LINK) {
-			event = true;
-			val = readl(port->base + MVPP2_GMAC_STATUS0);
-			if (val & MVPP2_GMAC_STATUS0_LINK_UP)
-				link = true;
-		}
-	}
 
 	if (port->phylink) {
 		phylink_mac_change(port->phylink, link);
-		goto handled;
+		return;
 	}
 
-	if (!netif_running(dev) || !event)
-		goto handled;
+	if (!netif_running(dev))
+		return;
 
 	if (link) {
 		mvpp2_interrupts_enable(port);

@@ -3028,8 +3001,54 @@ static irqreturn_t mvpp2_link_status_isr(int irq, void *dev_id)
 
 		mvpp2_interrupts_disable(port);
 	}
+}
+
+static void mvpp2_isr_handle_xlg(struct mvpp2_port *port)
+{
+	bool link;
+	u32 val;
+
+	val = readl(port->base + MVPP22_XLG_INT_STAT);
+	if (val & MVPP22_XLG_INT_STAT_LINK) {
+		val = readl(port->base + MVPP22_XLG_STATUS);
+		if (val & MVPP22_XLG_STATUS_LINK_UP)
+			link = true;
+		mvpp2_isr_handle_link(port, link);
+	}
+}
+
+static void mvpp2_isr_handle_gmac_internal(struct mvpp2_port *port)
+{
+	bool link;
+	u32 val;
+
+	if (phy_interface_mode_is_rgmii(port->phy_interface) ||
+	    phy_interface_mode_is_8023z(port->phy_interface) ||
+	    port->phy_interface == PHY_INTERFACE_MODE_SGMII) {
+		val = readl(port->base + MVPP22_GMAC_INT_STAT);
+		if (val & MVPP22_GMAC_INT_STAT_LINK) {
+			val = readl(port->base + MVPP2_GMAC_STATUS0);
+			if (val & MVPP2_GMAC_STATUS0_LINK_UP)
+				link = true;
+			mvpp2_isr_handle_link(port, link);
+		}
+	}
+}
+
+/* Per-port interrupt for link status changes */
+static irqreturn_t mvpp2_link_status_isr(int irq, void *dev_id)
+{
+	struct mvpp2_port *port = (struct mvpp2_port *)dev_id;
+
+	mvpp22_gop_mask_irq(port);
+
+	if (mvpp2_port_supports_xlg(port) &&
+	    mvpp2_is_xlg(port->phy_interface)) {
+		mvpp2_isr_handle_xlg(port);
+	} else {
+		mvpp2_isr_handle_gmac_internal(port);
+	}
 
-handled:
 	mvpp22_gop_unmask_irq(port);
 	return IRQ_HANDLED;
 }
Signature · 1 line
2.20.1
#2 lore raw

PATCH v3 2/7 net: mvpp2: rename mis-named "link status" interrupt

In reply to Russell King - ARM Linux admin

The link interrupt is used for way more than just the link status; it comes from a collection of units to do with the port. The Marvell documentation describes the interrupt as "GOP port X interrupt".

Since we are adding PTP support, and the PTP interrupt uses this, rename it to be more inline with the documentation.

This interrupt is also mis-named in the DT binding, but we leave that alone.

Reviewed-by Andrew Lunn <[email protected]>
Signed-off-by Russell King <[email protected]>
---
 drivers/net/ethernet/marvell/mvpp2/mvpp2.h    |  2 +-
 .../net/ethernet/marvell/mvpp2/mvpp2_main.c   | 35 ++++++++++---------
 2 files changed, 19 insertions(+), 18 deletions(-)
drivers/net/ethernet/marvell/mvpp2/mvpp2.h +1 -1
index ecb5f4616a36..a2f787c83756 100644
@@ -915,7 +915,7 @@ struct mvpp2_port {
 	 */
 	int gop_id;
 
-	int link_irq;
+	int port_irq;
 
 	struct mvpp2 *priv;
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +18 -17
index bb7284306ee4..d85ba26ba886 100644
@@ -3036,7 +3036,7 @@ static void mvpp2_isr_handle_gmac_internal(struct mvpp2_port *port)
 }
 
 /* Per-port interrupt for link status changes */
-static irqreturn_t mvpp2_link_status_isr(int irq, void *dev_id)
+static irqreturn_t mvpp2_port_isr(int irq, void *dev_id)
 {
 	struct mvpp2_port *port = (struct mvpp2_port *)dev_id;
 

@@ -4230,12 +4230,13 @@ static int mvpp2_open(struct net_device *dev)
 		valid = true;
 	}
 
-	if (priv->hw_version == MVPP22 && port->link_irq) {
-		err = request_irq(port->link_irq, mvpp2_link_status_isr, 0,
+	if (priv->hw_version == MVPP22 && port->port_irq) {
+		err = request_irq(port->port_irq, mvpp2_port_isr, 0,
 				  dev->name, port);
 		if (err) {
-			netdev_err(port->dev, "cannot request link IRQ %d\n",
-				   port->link_irq);
+			netdev_err(port->dev,
+				   "cannot request port link/ptp IRQ %d\n",
+				   port->port_irq);
 			goto err_free_irq;
 		}
 

@@ -4246,7 +4247,7 @@ static int mvpp2_open(struct net_device *dev)
 
 		valid = true;
 	} else {
-		port->link_irq = 0;
+		port->port_irq = 0;
 	}
 
 	if (!valid) {

@@ -4290,8 +4291,8 @@ static int mvpp2_stop(struct net_device *dev)
 
 	if (port->phylink)
 		phylink_disconnect_phy(port->phylink);
-	if (port->link_irq)
-		free_irq(port->link_irq, port);
+	if (port->port_irq)
+		free_irq(port->port_irq, port);
 
 	mvpp2_irqs_deinit(port);
 	if (!port->has_tx_irqs) {

@@ -6056,16 +6057,16 @@ static int mvpp2_port_probe(struct platform_device *pdev,
 		goto err_free_netdev;
 
 	if (port_node)
-		port->link_irq = of_irq_get_byname(port_node, "link");
+		port->port_irq = of_irq_get_byname(port_node, "link");
 	else
-		port->link_irq = fwnode_irq_get(port_fwnode, port->nqvecs + 1);
-	if (port->link_irq == -EPROBE_DEFER) {
+		port->port_irq = fwnode_irq_get(port_fwnode, port->nqvecs + 1);
+	if (port->port_irq == -EPROBE_DEFER) {
 		err = -EPROBE_DEFER;
 		goto err_deinit_qvecs;
 	}
-	if (port->link_irq <= 0)
+	if (port->port_irq <= 0)
 		/* the link irq is optional */
-		port->link_irq = 0;
+		port->port_irq = 0;
 
 	if (fwnode_property_read_bool(port_fwnode, "marvell,loopback"))
 		port->flags |= MVPP2_F_LOOPBACK;

@@ -6229,8 +6230,8 @@ static int mvpp2_port_probe(struct platform_device *pdev,
 err_free_stats:
 	free_percpu(port->stats);
 err_free_irq:
-	if (port->link_irq)
-		irq_dispose_mapping(port->link_irq);
+	if (port->port_irq)
+		irq_dispose_mapping(port->port_irq);
 err_deinit_qvecs:
 	mvpp2_queue_vectors_deinit(port);
 err_free_netdev:

@@ -6251,8 +6252,8 @@ static void mvpp2_port_remove(struct mvpp2_port *port)
 	for (i = 0; i < port->ntxqs; i++)
 		free_percpu(port->txqs[i]->pcpu);
 	mvpp2_queue_vectors_deinit(port);
-	if (port->link_irq)
-		irq_dispose_mapping(port->link_irq);
+	if (port->port_irq)
+		irq_dispose_mapping(port->port_irq);
 	free_netdev(port->dev);
 }
Signature · 1 line
2.20.1
#3 lore raw

PATCH v3 3/7 net: mvpp2: check first level interrupt status registers

In reply to Russell King - ARM Linux admin

Check the first level interrupt status registers to determine how to further process the port interrupt. We will need this to know whether to invoke the link status processing and/or the PTP processing for both XLG and GMAC.

Reviewed-by Andrew Lunn <[email protected]>
Signed-off-by Russell King <[email protected]>
---
 drivers/net/ethernet/marvell/mvpp2/mvpp2.h      |  4 ++++
 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 13 +++++++++++--
 2 files changed, 15 insertions(+), 2 deletions(-)
drivers/net/ethernet/marvell/mvpp2/mvpp2.h +4 -0
index a2f787c83756..273c46bbf927 100644
@@ -461,6 +461,8 @@
 #define     MVPP22_CTRL4_DP_CLK_SEL		BIT(5)
 #define     MVPP22_CTRL4_SYNC_BYPASS_DIS	BIT(6)
 #define     MVPP22_CTRL4_QSGMII_BYPASS_ACTIVE	BIT(7)
+#define MVPP22_GMAC_INT_SUM_STAT		0xa0
+#define	    MVPP22_GMAC_INT_SUM_STAT_INTERNAL	BIT(1)
 #define MVPP22_GMAC_INT_SUM_MASK		0xa4
 #define     MVPP22_GMAC_INT_SUM_MASK_LINK_STAT	BIT(1)
 

@@ -488,6 +490,8 @@
 #define     MVPP22_XLG_CTRL3_MACMODESELECT_MASK	(7 << 13)
 #define     MVPP22_XLG_CTRL3_MACMODESELECT_GMAC	(0 << 13)
 #define     MVPP22_XLG_CTRL3_MACMODESELECT_10G	(1 << 13)
+#define MVPP22_XLG_EXT_INT_STAT			0x158
+#define     MVPP22_XLG_EXT_INT_STAT_XLG		BIT(1)
 #define MVPP22_XLG_EXT_INT_MASK			0x15c
 #define     MVPP22_XLG_EXT_INT_MASK_XLG		BIT(1)
 #define     MVPP22_XLG_EXT_INT_MASK_GIG		BIT(2)
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +11 -2
index d85ba26ba886..8a1f03f9d5d7 100644
@@ -3039,14 +3039,23 @@ static void mvpp2_isr_handle_gmac_internal(struct mvpp2_port *port)
 static irqreturn_t mvpp2_port_isr(int irq, void *dev_id)
 {
 	struct mvpp2_port *port = (struct mvpp2_port *)dev_id;
+	u32 val;
 
 	mvpp22_gop_mask_irq(port);
 
 	if (mvpp2_port_supports_xlg(port) &&
 	    mvpp2_is_xlg(port->phy_interface)) {
-		mvpp2_isr_handle_xlg(port);
+		/* Check the external status register */
+		val = readl(port->base + MVPP22_XLG_EXT_INT_STAT);
+		if (val & MVPP22_XLG_EXT_INT_STAT_XLG)
+			mvpp2_isr_handle_xlg(port);
 	} else {
-		mvpp2_isr_handle_gmac_internal(port);
+		/* If it's not the XLG, we must be using the GMAC.
+		 * Check the summary status.
+		 */
+		val = readl(port->base + MVPP22_GMAC_INT_SUM_STAT);
+		if (val & MVPP22_GMAC_INT_SUM_STAT_INTERNAL)
+			mvpp2_isr_handle_gmac_internal(port);
 	}
 
 	mvpp22_gop_unmask_irq(port);
Signature · 1 line
2.20.1
#4 lore raw

PATCH v3 4/7 net: mvpp2: ptp: add TAI support

In reply to Russell King - ARM Linux admin

Add support for the TAI block in the mvpp2.2 hardware.

Acked-by Richard Cochran <[email protected]>
Signed-off-by Russell King <[email protected]>
---
 drivers/net/ethernet/marvell/Kconfig          |   6 +
 drivers/net/ethernet/marvell/mvpp2/Makefile   |   3 +-
 drivers/net/ethernet/marvell/mvpp2/mvpp2.h    | 109 +++++
 .../net/ethernet/marvell/mvpp2/mvpp2_main.c   |   4 +
 .../net/ethernet/marvell/mvpp2/mvpp2_tai.c    | 399 ++++++++++++++++++
 5 files changed, 520 insertions(+), 1 deletion(-)
 create mode 100644 drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c
drivers/net/ethernet/marvell/Kconfig +6 -0
index ef4f35ba077d..a599e44a36a8 100644
@@ -92,6 +92,12 @@ config MVPP2
 	  This driver supports the network interface units in the
 	  Marvell ARMADA 375, 7K and 8K SoCs.
 
+config MVPP2_PTP
+	bool "Marvell Armada 8K Enable PTP support"
+	depends on NETWORK_PHY_TIMESTAMPING
+	depends on (PTP_1588_CLOCK = y && MVPP2 = y) || \
+		   (PTP_1588_CLOCK && MVPP2 = m)
+
 config PXA168_ETH
 	tristate "Marvell pxa168 ethernet support"
 	depends on HAS_IOMEM
drivers/net/ethernet/marvell/mvpp2/Makefile +2 -1
index 51f65a202c6e..9bd8e7964b40 100644
@@ -4,4 +4,5 @@
 #
 obj-$(CONFIG_MVPP2) := mvpp2.o
 
-mvpp2-objs := mvpp2_main.o mvpp2_prs.o mvpp2_cls.o mvpp2_debugfs.o
+mvpp2-y := mvpp2_main.o mvpp2_prs.o mvpp2_cls.o mvpp2_debugfs.o
+mvpp2-$(CONFIG_MVPP2_PTP) += mvpp2_tai.o
drivers/net/ethernet/marvell/mvpp2/mvpp2.h +109 -0

137 lines not on this page · raw message

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +4 -0
index 8a1f03f9d5d7..9ad286930c1d 100644
@@ -6674,6 +6674,10 @@ static int mvpp2_probe(struct platform_device *pdev)
 		goto err_axi_clk;
 	}
 
+	err = mvpp22_tai_probe(&pdev->dev, priv);
+	if (err < 0)
+		goto err_axi_clk;
+
 	/* Initialize ports */
 	fwnode_for_each_available_child_node(fwnode, port_fwnode) {
 		err = mvpp2_port_probe(pdev, port_fwnode, priv);
drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c new file +399 -0

399 lines not on this page · raw message

Signature · 1 line
2.20.1
#5 lore raw

PATCH v3 5/7 net: mvpp2: ptp: add support for receive timestamping

In reply to Russell King - ARM Linux admin

Add support for receive timestamping. When enabled, the hardware adds a timestamp into the receive queue descriptor for all received packets with no filtering. Hence, we can only support NONE or ALL receive filter modes.

The timestamp in the receive queue contains two bit sof seconds and the full nanosecond timestamp. This has to be merged with the remainder of the seconds from the TAI clock to arrive at a full timestamp before we can convert it to a ktime for the skb hardware timestamp field.

Signed-off-by Russell King <[email protected]>
---
 drivers/net/ethernet/marvell/mvpp2/mvpp2.h    |  25 +++-
 .../net/ethernet/marvell/mvpp2/mvpp2_main.c   | 108 +++++++++++++++++-
 .../net/ethernet/marvell/mvpp2/mvpp2_tai.c    |  57 +++++++++
 3 files changed, 188 insertions(+), 2 deletions(-)
drivers/net/ethernet/marvell/mvpp2/mvpp2.h +24 -1
index b9fae3870393..48cf0e613d8d 100644
@@ -600,6 +600,9 @@
 #define MVPP22_PTP_INT_CAUSE			0x00
 #define MVPP22_PTP_INT_MASK			0x04
 #define MVPP22_PTP_GCR				0x08
+#define     MVPP22_PTP_GCR_RX_RESET		BIT(13)
+#define     MVPP22_PTP_GCR_TX_RESET		BIT(1)
+#define     MVPP22_PTP_GCR_TSU_ENABLE		BIT(0)
 #define MVPP22_PTP_TX_Q0_R0			0x0c
 #define MVPP22_PTP_TX_Q0_R1			0x10
 #define MVPP22_PTP_TX_Q0_R2			0x14

@@ -1094,6 +1097,9 @@ struct mvpp2_port {
 	 * them from 0
 	 */
 	int rss_ctx[MVPP22_N_RSS_TABLES];
+
+	bool hwtstamp;
+	bool rx_hwtstamp;
 };
 
 /* The mvpp2_tx_desc and mvpp2_rx_desc structures describe the

@@ -1173,7 +1179,7 @@ struct mvpp22_rx_desc {
 	__le16 reserved1;
 	__le16 data_size;
 	__le32 reserved2;
-	__le32 reserved3;
+	__le32 timestamp;
 	__le64 buf_dma_addr_key_hash;
 	__le64 buf_cookie_misc;
 };

@@ -1355,11 +1361,28 @@ void mvpp2_dbgfs_cleanup(struct mvpp2 *priv);
 
 #ifdef CONFIG_MVPP2_PTP
 int mvpp22_tai_probe(struct device *dev, struct mvpp2 *priv);
+void mvpp22_tai_tstamp(struct mvpp2_tai *tai, u32 tstamp,
+		       struct skb_shared_hwtstamps *hwtstamp);
+void mvpp22_tai_start(struct mvpp2_tai *tai);
+void mvpp22_tai_stop(struct mvpp2_tai *tai);
+int mvpp22_tai_ptp_clock_index(struct mvpp2_tai *tai);
 #else
 static inline int mvpp22_tai_probe(struct device *dev, struct mvpp2 *priv)
 {
 	return 0;
 }
+static inline void mvpp22_tai_tstamp(struct mvpp2_tai *tai, u32 tstamp,
+				     struct skb_shared_hwtstamps *hwtstamp)
+{
+}
+static inline int mvpp22_tai_ptp_clock_index(struct mvpp2_tai *tai)
+{
+	return -1;
+}
 #endif
 
+static inline bool mvpp22_rx_hwtstamping(struct mvpp2_port *port)
+{
+	return IS_ENABLED(CONFIG_MVPP2_PTP) && port->rx_hwtstamp;
+}
 #endif
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +107 -1

142 lines not on this page · raw message

drivers/net/ethernet/marvell/mvpp2/mvpp2_tai.c +57 -0

81 lines not on this page · raw message

Signature · 1 line
2.20.1
build bot
#6 lore raw

Re: [PATCH net-next v3 5/7] net: mvpp2: ptp: add support for receive timestamping

I love your patch! Yet something to improve:

Hi Russell,

I love your patch! Yet something to improve:

[auto build test ERROR on net-next/master]

url:    https://github.com/0day-ci/linux/commits/Russell-King/net-mvpp2-restructure-link-status-interrupt-handling/20200909-120136
base:   https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git 4349abdb409b04a5ed4ca4d2c1df7ef0cc16f6bd
config: arm64-defconfig (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0

reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arm64

If you fix the issue, kindly add following tag as appropriate

Reported-by kernel test robot <[email protected]>

All errors (new ones prefixed by >>):

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c: In function 'mvpp2_set_ts_config':

>> drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c:4590:3: error: implicit declaration of function 'mvpp22_tai_start'; did you mean 'mvpp22_tai_tstamp'? [-Werror=implicit-function-declaration]
    4590 |   mvpp22_tai_start(port->priv->tai);
         |   ^~~~~~~~~~~~~~~~
         |   mvpp22_tai_tstamp
>> drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c:4605:3: error: implicit declaration of function 'mvpp22_tai_stop'; did you mean 'mvpp22_tai_tstamp'? [-Werror=implicit-function-declaration]
    4605 |   mvpp22_tai_stop(port->priv->tai);
         |   ^~~~~~~~~~~~~~~
         |   mvpp22_tai_tstamp

cc1: some warnings being treated as errors

# https://github.com/0day-ci/linux/commit/7fb78a731bf62febdd7cf3eaef3efc89aca72ddb
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Russell-King/net-mvpp2-restructure-link-status-interrupt-handling/20200909-120136 git checkout 7fb78a731bf62febdd7cf3eaef3efc89aca72ddb
vim +4590 drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c

4572
4573 static int mvpp2_set_ts_config(struct mvpp2_port *port, struct ifreq *ifr)
4574 {
4575 struct hwtstamp_config config;
4576 void __iomem *ptp;
4577
4578 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
4579 return -EFAULT;
4580
4581 if (config.flags)
4582 return -EINVAL;
4583
4584 if (config.tx_type != HWTSTAMP_TX_OFF)
4585 return -ERANGE;
4586
4587 ptp = port->priv->iface_base + MVPP22_PTP_BASE(port->gop_id);
4588 if (config.rx_filter != HWTSTAMP_FILTER_NONE) {
4589 config.rx_filter = HWTSTAMP_FILTER_ALL;

> 4590			mvpp22_tai_start(port->priv->tai);
  4591			mvpp2_modify(ptp + MVPP22_PTP_GCR,
  4592				     MVPP22_PTP_GCR_RX_RESET |
  4593				     MVPP22_PTP_GCR_TX_RESET |
  4594				     MVPP22_PTP_GCR_TSU_ENABLE,
  4595				     MVPP22_PTP_GCR_RX_RESET |
  4596				     MVPP22_PTP_GCR_TX_RESET |
  4597				     MVPP22_PTP_GCR_TSU_ENABLE);
  4598			port->rx_hwtstamp = true;
  4599		} else {
  4600			port->rx_hwtstamp = false;
  4601			mvpp2_modify(ptp + MVPP22_PTP_GCR,
  4602				     MVPP22_PTP_GCR_RX_RESET |
  4603				     MVPP22_PTP_GCR_TX_RESET |
  4604				     MVPP22_PTP_GCR_TSU_ENABLE, 0);
> 4605			mvpp22_tai_stop(port->priv->tai);

4606 }
4607
4608 if (copy_to_user(ifr->ifr_data, &config, sizeof(config)))
4609 return -EFAULT;
4610
4611 return 0;
4612 }
4613

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org

#7 lore raw

PATCH v3 6/7 net: mvpp2: ptp: add interrupt handling

In reply to Russell King - ARM Linux admin

Add PTP interrupt handling infrastructure

Signed-off-by Russell King <[email protected]>
---
 drivers/net/ethernet/marvell/mvpp2/mvpp2.h    |  8 ++++
 .../net/ethernet/marvell/mvpp2/mvpp2_main.c   | 44 +++++++++++++++++++
 2 files changed, 52 insertions(+)
drivers/net/ethernet/marvell/mvpp2/mvpp2.h +8 -0
index 48cf0e613d8d..e0341a85f7f1 100644
@@ -463,8 +463,10 @@
 #define     MVPP22_CTRL4_QSGMII_BYPASS_ACTIVE	BIT(7)
 #define MVPP22_GMAC_INT_SUM_STAT		0xa0
 #define	    MVPP22_GMAC_INT_SUM_STAT_INTERNAL	BIT(1)
+#define	    MVPP22_GMAC_INT_SUM_STAT_PTP	BIT(2)
 #define MVPP22_GMAC_INT_SUM_MASK		0xa4
 #define     MVPP22_GMAC_INT_SUM_MASK_LINK_STAT	BIT(1)
+#define	    MVPP22_GMAC_INT_SUM_MASK_PTP	BIT(2)
 
 /* Per-port XGMAC registers. PPv2.2 only, only for GOP port 0,
  * relative to port->base.

@@ -492,9 +494,11 @@
 #define     MVPP22_XLG_CTRL3_MACMODESELECT_10G	(1 << 13)
 #define MVPP22_XLG_EXT_INT_STAT			0x158
 #define     MVPP22_XLG_EXT_INT_STAT_XLG		BIT(1)
+#define     MVPP22_XLG_EXT_INT_STAT_PTP		BIT(7)
 #define MVPP22_XLG_EXT_INT_MASK			0x15c
 #define     MVPP22_XLG_EXT_INT_MASK_XLG		BIT(1)
 #define     MVPP22_XLG_EXT_INT_MASK_GIG		BIT(2)
+#define     MVPP22_XLG_EXT_INT_MASK_PTP		BIT(7)
 #define MVPP22_XLG_CTRL4_REG			0x184
 #define     MVPP22_XLG_CTRL4_FWD_FC		BIT(5)
 #define     MVPP22_XLG_CTRL4_FWD_PFC		BIT(6)

@@ -598,7 +602,11 @@
 /* PTP registers. PPv2.2 only */
 #define MVPP22_PTP_BASE(port)			(0x7800 + (port * 0x1000))
 #define MVPP22_PTP_INT_CAUSE			0x00
+#define     MVPP22_PTP_INT_CAUSE_QUEUE1		BIT(6)
+#define     MVPP22_PTP_INT_CAUSE_QUEUE0		BIT(5)
 #define MVPP22_PTP_INT_MASK			0x04
+#define     MVPP22_PTP_INT_MASK_QUEUE1		BIT(6)
+#define     MVPP22_PTP_INT_MASK_QUEUE0		BIT(5)
 #define MVPP22_PTP_GCR				0x08
 #define     MVPP22_PTP_GCR_RX_RESET		BIT(13)
 #define     MVPP22_PTP_GCR_TX_RESET		BIT(1)
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +44 -0

74 lines not on this page · raw message

Signature · 1 line
2.20.1
#8 lore raw

PATCH v3 7/7 net: mvpp2: ptp: add support for transmit timestamping

In reply to Russell King - ARM Linux admin

Add support for timestamping transmit packets. We allocate SYNC messages to queue 1, every other message to queue 0.

Signed-off-by Russell King <[email protected]>
---
 drivers/net/ethernet/marvell/mvpp2/mvpp2.h    |  48 +++++-
 .../net/ethernet/marvell/mvpp2/mvpp2_main.c   | 156 ++++++++++++++++--
 2 files changed, 193 insertions(+), 11 deletions(-)
drivers/net/ethernet/marvell/mvpp2/mvpp2.h +47 -1
index e0341a85f7f1..4f21f0620e2a 100644
@@ -12,6 +12,7 @@
 #include <linux/interrupt.h>
 #include <linux/kernel.h>
 #include <linux/netdevice.h>
+#include <linux/net_tstamp.h>
 #include <linux/phy.h>
 #include <linux/phylink.h>
 #include <net/flow_offload.h>

@@ -804,6 +805,43 @@ enum mvpp2_prs_l3_cast {
 	MVPP2_PRS_L3_BROAD_CAST
 };
 
+/* PTP descriptor constants. The low bits of the descriptor are stored
+ * separately from the high bits.
+ */
+#define MVPP22_PTP_DESC_MASK_LOW	0xfff
+
+/* PTPAction */
+enum mvpp22_ptp_action {
+	MVPP22_PTP_ACTION_NONE = 0,
+	MVPP22_PTP_ACTION_FORWARD = 1,
+	MVPP22_PTP_ACTION_CAPTURE = 3,
+	/* The following have not been verified */
+	MVPP22_PTP_ACTION_ADDTIME = 4,
+	MVPP22_PTP_ACTION_ADDCORRECTEDTIME = 5,
+	MVPP22_PTP_ACTION_CAPTUREADDTIME = 6,
+	MVPP22_PTP_ACTION_CAPTUREADDCORRECTEDTIME = 7,
+	MVPP22_PTP_ACTION_ADDINGRESSTIME = 8,
+	MVPP22_PTP_ACTION_CAPTUREADDINGRESSTIME = 9,
+	MVPP22_PTP_ACTION_CAPTUREINGRESSTIME = 10,
+};
+
+/* PTPPacketFormat */
+enum mvpp22_ptp_packet_format {
+	MVPP22_PTP_PKT_FMT_PTPV2 = 0,
+	MVPP22_PTP_PKT_FMT_PTPV1 = 1,
+	MVPP22_PTP_PKT_FMT_Y1731 = 2,
+	MVPP22_PTP_PKT_FMT_NTPTS = 3,
+	MVPP22_PTP_PKT_FMT_NTPRX = 4,
+	MVPP22_PTP_PKT_FMT_NTPTX = 5,
+	MVPP22_PTP_PKT_FMT_TWAMP = 6,
+};
+
+#define MVPP22_PTP_ACTION(x)		(((x) & 15) << 0)
+#define MVPP22_PTP_PACKETFORMAT(x)	(((x) & 7) << 4)
+#define MVPP22_PTP_MACTIMESTAMPINGEN	BIT(11)
+#define MVPP22_PTP_TIMESTAMPENTRYID(x)	(((x) & 31) << 12)
+#define MVPP22_PTP_TIMESTAMPQUEUESELECT	BIT(18)
+
 /* BM constants */
 #define MVPP2_BM_JUMBO_BUF_NUM		512
 #define MVPP2_BM_LONG_BUF_NUM		1024

@@ -1022,6 +1060,11 @@ struct mvpp2_ethtool_fs {
 	struct ethtool_rxnfc rxnfc;
 };
 
+struct mvpp2_hwtstamp_queue {
+	struct sk_buff *skb[32];
+	u8 next;
+};
+
 struct mvpp2_port {
 	u8 id;
 

@@ -1108,6 +1151,8 @@ struct mvpp2_port {
 
 	bool hwtstamp;
 	bool rx_hwtstamp;
+	enum hwtstamp_tx_types tx_hwtstamp_type;
+	struct mvpp2_hwtstamp_queue tx_hwtstamp_queue[2];
 };
 
 /* The mvpp2_tx_desc and mvpp2_rx_desc structures describe the

@@ -1176,7 +1221,8 @@ struct mvpp22_tx_desc {
 	u8  packet_offset;
 	u8  phys_txq;
 	__le16 data_size;
-	__le64 reserved1;
+	__le32 ptp_descriptor;
+	__le32 reserved2;
 	__le64 buf_dma_addr_ptp;
 	__le64 buf_cookie_misc;
 };
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +146 -10

253 lines not on this page · raw message

Signature · 1 line
2.20.1
#9 lore raw

Re: [PATCH net-next v3 7/7] net: mvpp2: ptp: add support for transmit timestamping

Quoted 23 lines · Russell King
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +6 -0
@@ -2984,13 +2985,19 @@ static irqreturn_t mvpp2_isr(int irq, void *dev_id)
 
 static void mvpp2_isr_handle_ptp_queue(struct mvpp2_port *port, int nq)
 {
+	struct skb_shared_hwtstamps shhwtstamps;
+	struct mvpp2_hwtstamp_queue *queue;
+	struct sk_buff *skb;
 	void __iomem *ptp_q;
+	unsigned int id;
 	u32 r0, r1, r2;
 
 	ptp_q = port->priv->iface_base + MVPP22_PTP_BASE(port->gop_id);
 	if (nq)
 		ptp_q += MVPP22_PTP_TX_Q1_R0 - MVPP22_PTP_TX_Q0_R0;
 
+	queue = &port->tx_hwtstamp_queue[nq];
+
 	while (1) {
 		r0 = readl_relaxed(ptp_q + MVPP22_PTP_TX_Q0_R0) & 0xffff;
 		if (!r0)

@@ -2998,6 +3005,19 @@ static void mvpp2_isr_handle_ptp_queue(struct mvpp2_port *port, int nq)
 
 		r1 = readl_relaxed(ptp_q + MVPP22_PTP_TX_Q0_R1) & 0xffff;

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c static void mvpp2_isr_handle_ptp_queue(struct mvpp2_port *port, int nq) · line 3016

Quoted 10 lines
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +9 -0
 		r2 = readl_relaxed(ptp_q + MVPP22_PTP_TX_Q0_R2) & 0xffff;
+
+		id = (r0 >> 1) & 31;
+
+		skb = queue->skb[id];
+		queue->skb[id] = NULL;
+		if (skb) {
+			u32 ts = r2 << 19 | r1 << 3 | r0 >> 13;
+
+			netdev_info(port->dev, "tx stamp 0x%08x\n", ts);

This probably should be _debug instead.

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c static void mvpp2_isr_handle_ptp_queue(struct mvpp2_port *port, int nq) · line 3022

Quoted 6 lines
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +4 -0
+			mvpp22_tai_tstamp(port->priv->tai, ts, &shhwtstamps);
+			skb_tstamp_tx(skb, &shhwtstamps);
+			dev_kfree_skb_any(skb);
+		}
 	}
 }

Thanks,
Richard

author maintainer
#10 lore raw

Re: [PATCH net-next v3 7/7] net: mvpp2: ptp: add support for transmit timestamping

Quoted 24 lines · Richard Cochran
Quoted 22 lines · Russell King
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +6 -0
@@ -2984,13 +2985,19 @@ static irqreturn_t mvpp2_isr(int irq, void *dev_id)
 
 static void mvpp2_isr_handle_ptp_queue(struct mvpp2_port *port, int nq)
 {
+	struct skb_shared_hwtstamps shhwtstamps;
+	struct mvpp2_hwtstamp_queue *queue;
+	struct sk_buff *skb;
 	void __iomem *ptp_q;
+	unsigned int id;
 	u32 r0, r1, r2;
 
 	ptp_q = port->priv->iface_base + MVPP22_PTP_BASE(port->gop_id);
 	if (nq)
 		ptp_q += MVPP22_PTP_TX_Q1_R0 - MVPP22_PTP_TX_Q0_R0;
 
+	queue = &port->tx_hwtstamp_queue[nq];
+
 	while (1) {
 		r0 = readl_relaxed(ptp_q + MVPP22_PTP_TX_Q0_R0) & 0xffff;
 		if (!r0)

@@ -2998,6 +3005,19 @@ static void mvpp2_isr_handle_ptp_queue(struct mvpp2_port *port, int nq)
Quoted 13 lines

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c static void mvpp2_isr_handle_ptp_queue(struct mvpp2_port *port, int nq) · line 3016

Quoted 11 lines
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +9 -0
 		r1 = readl_relaxed(ptp_q + MVPP22_PTP_TX_Q0_R1) & 0xffff;
 		r2 = readl_relaxed(ptp_q + MVPP22_PTP_TX_Q0_R2) & 0xffff;
+
+		id = (r0 >> 1) & 31;
+
+		skb = queue->skb[id];
+		queue->skb[id] = NULL;
+		if (skb) {
+			u32 ts = r2 << 19 | r1 << 3 | r0 >> 13;
+
+			netdev_info(port->dev, "tx stamp 0x%08x\n", ts);

This probably should be _debug instead.

It shouldn't be there; one of the problems of juggling patches between trees is that things sometimes get fixed in one tree but not in the "main" tree... will fix. This also should've been combined with patch 6.

Anything else on any of the patches, so we don't have to continue doing this one comment at a time?

Signature · 2 lines
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
Acked-by on v3 7/7
#11 lore raw

Re: [PATCH net-next v3 7/7] net: mvpp2: ptp: add support for transmit timestamping

In reply to Russell King
Quoted 10 lines · Russell King
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +10 -0
+static bool mvpp2_tx_hw_tstamp(struct mvpp2_port *port,
+			       struct mvpp2_tx_desc *tx_desc,
+			       struct sk_buff *skb)
+{
+	unsigned int mtype, type, i, offset;
+	struct mvpp2_hwtstamp_queue *queue;
+	struct ptp_header *hdr;
+	u64 ptpdesc;
+
+	if (port->priv->hw_version == MVPP21 ||

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c tx_desc_unmap_put(struct mvpp2_port *port, struct mvpp2_tx_queue *txq, · line 3705

Quoted 10 lines
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +10 -0
+	    port->tx_hwtstamp_type == HWTSTAMP_TX_OFF)
+		return false;
+
+	type = ptp_classify_raw(skb);
+	if (!type)
+		return false;
+
+	hdr = ptp_parse_header(skb, type);
+	if (!hdr)
+		return false;

At this point, the skb will be queued up to receive a transmit time stamp, and so it should be marked with:

	skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;

The rest of the patch looks reasonable.

Acked-by Richard Cochran <[email protected]>
#12 lore raw

Re: [PATCH net-next v3 7/7] net: mvpp2: ptp: add support for transmit timestamping

Quoted 26 lines · Richard Cochran
Quoted 10 lines · Russell King
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +10 -0
+static bool mvpp2_tx_hw_tstamp(struct mvpp2_port *port,
+			       struct mvpp2_tx_desc *tx_desc,
+			       struct sk_buff *skb)
+{
+	unsigned int mtype, type, i, offset;
+	struct mvpp2_hwtstamp_queue *queue;
+	struct ptp_header *hdr;
+	u64 ptpdesc;
+
+	if (port->priv->hw_version == MVPP21 ||

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c tx_desc_unmap_put(struct mvpp2_port *port, struct mvpp2_tx_queue *txq, · line 3705

Quoted 10 lines
drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c +10 -0
+	    port->tx_hwtstamp_type == HWTSTAMP_TX_OFF)
+		return false;
+
+	type = ptp_classify_raw(skb);
+	if (!type)
+		return false;
+
+	hdr = ptp_parse_header(skb, type);
+	if (!hdr)
+		return false;

At this point, the skb will be queued up to receive a transmit time stamp, and so it should be marked with:

Quoted 1 line
	skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;

Russell, since this series went in already, can you follow up with a patch for this please?

Thanks,
Richard