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Add PHY USB3 drivers for Hikey 970

PATCH RESEND Superseded Mauro Carvalho Chehab 3 participants 13 messages Sep 11, 2020 – Sep 16, 2020

Subsystems (3)
Device tree bindings Generic PHY framework USB IP driver for HiSilicon kirin 970

v3 of 4 Superseded Latest is v4 →

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Mauro Carvalho Chehab

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#0 lore raw

v3 cover Add PHY USB3 drivers for Hikey 970

This patch series add the PHY layer needed in order to support the USB functionality on Hikey 970 boards.

v3:
- split a namespace patch on two (one with code changes and another one with dt-bindings changes);
- placed just the PHY driver on this series. Another series will add the USB HUB driver and the DTS changes required to enable USB support for this board.

PS.: I'm re-sending it, as the c/c list was wrong on the first mailbomb, due to a bug on my script that were adding e-mails from get_maintainer.pl.

Mauro Carvalho Chehab (6):
phy: hisilicon: phy-hi3670-usb3: use a consistent namespace
dts: phy: phy-hi3670-usb3.txt: use a consistent namespace
phy: hisilicon: phy-hi3670-usb3: fix coding style
phy: hisilicon: phy-hi3670-usb3: change some DT properties
dt-bindings: phy: convert phy-kirin970-usb3.txt to yaml
MAINTAINERS: add myself as maintainer for Kirin 970 USB PHY

Yu Chen (2):
phy: hisilicon: add USB physical layer for Kirin 3670
phy: hisilicon: phy-hi3670-usb3: fix some issues at the init code

 .../bindings/phy/hisilicon,hi3670-usb3.yaml   |  72 ++
 MAINTAINERS                                   |   9 +-
 drivers/phy/hisilicon/Kconfig                 |  10 +
 drivers/phy/hisilicon/Makefile                |   1 +
 drivers/phy/hisilicon/phy-hi3670-usb3.c       | 671 ++++++++++++++++++
 5 files changed, 762 insertions(+), 1 deletion(-)
 create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml
 create mode 100644 drivers/phy/hisilicon/phy-hi3670-usb3.c
Signature · 1 line
2.26.2
author
#1 lore raw

PATCH RESEND v3 1/8 phy: hisilicon: add USB physical layer for Kirin 3670

From: Yu Chen <[email protected]>

Add the Hisilicon Kirin 3670 USB phy driver just after the hi3660, using the same namespace.

This driver was imported from Linaro's official Hikey 970 tree, from the original patch, removing the addition of the dwg3-specific parts.

Signed-off-by Yu Chen <[email protected]>
Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 .../bindings/phy/phy-hi3670-usb3.txt          |  25 +
 drivers/phy/hisilicon/Kconfig                 |  10 +
 drivers/phy/hisilicon/Makefile                |   1 +
 drivers/phy/hisilicon/phy-hi3670-usb3.c       | 682 ++++++++++++++++++
 4 files changed, 718 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt
 create mode 100644 drivers/phy/hisilicon/phy-hi3670-usb3.c
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +25 -0
new file mode 100644
index 000000000000..4cb02612ff23
@@ -0,0 +1,25 @@
+Hisilicon Kirin970 usb PHY
+-----------------------
+
+Required properties:
+- compatible: should be "hisilicon,kirin970-usb-phy"
+- #phy-cells: must be 0
+- hisilicon,pericrg-syscon: phandle of syscon used to control phy.
+- hisilicon,pctrl-syscon: phandle of syscon used to control phy.
+- hisilicon,sctrl-syscon: phandle of syscon used to control phy.
+- hisilicon,usb31-misc-syscon: phandle of syscon used to control phy.
+- eye-diagram-param: parameter set for phy
+- usb3-phy-tx-vboost-lvl: parameter set for phy
+Refer to phy/phy-bindings.txt for the generic PHY binding properties
+
+Example:
+	usb_phy: usbphy {
+		compatible = "hisilicon,kirin970-usb-phy";
+		#phy-cells = <0>;
+		hisilicon,pericrg-syscon = <&crg_ctrl>;
+		hisilicon,pctrl-syscon = <&pctrl>;
+		hisilicon,sctrl-syscon = <&sctrl>;
+		hisilicon,usb31-misc-syscon = <&usb31_misc>;
+		eye-diagram-param = <0xFDFEE4>;
+		usb3-phy-tx-vboost-lvl = <0x5>;
+	};
drivers/phy/hisilicon/Kconfig +10 -0
index 1c73053bcc98..4d008cfc279c 100644
@@ -23,6 +23,16 @@ config PHY_HI3660_USB
 
 	  To compile this driver as a module, choose M here.
 
+config PHY_HI3670_USB
+	tristate "hi3670 USB PHY support"
+	depends on (ARCH_HISI && ARM64) || COMPILE_TEST
+	select GENERIC_PHY
+	select MFD_SYSCON
+	help
+	  Enable this to support the HISILICON HI3670 USB PHY.
+
+	  To compile this driver as a module, choose M here.
+
 config PHY_HISTB_COMBPHY
 	tristate "HiSilicon STB SoCs COMBPHY support"
 	depends on (ARCH_HISI && ARM64) || COMPILE_TEST
drivers/phy/hisilicon/Makefile +1 -0
index 92e874ae9c74..51729868145b 100644
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0-only
 obj-$(CONFIG_PHY_HI6220_USB)		+= phy-hi6220-usb.o
 obj-$(CONFIG_PHY_HI3660_USB)		+= phy-hi3660-usb3.o
+obj-$(CONFIG_PHY_HI3670_USB)		+= phy-hi3670-usb3.o
 obj-$(CONFIG_PHY_HISTB_COMBPHY)		+= phy-histb-combphy.o
 obj-$(CONFIG_PHY_HISI_INNO_USB2)	+= phy-hisi-inno-usb2.o
 obj-$(CONFIG_PHY_HIX5HD2_SATA)		+= phy-hix5hd2-sata.o
drivers/phy/hisilicon/phy-hi3670-usb3.c new file +682 -0

682 lines not on this page · raw message

Signature · 1 line
2.26.2
maintainer
#2 lore raw

Re: [PATCH v3 RESEND 1/8] phy: hisilicon: add USB physical layer for Kirin 3670

Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt

Quoted 25 lines · Mauro Carvalho Chehab

From: Yu Chen <[email protected]>

Add the Hisilicon Kirin 3670 USB phy driver just after the hi3660, using the same namespace.

This driver was imported from Linaro's official Hikey 970 tree, from the original patch, removing the addition of the dwg3-specific parts.

Signed-off-by Yu Chen <[email protected]>
Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 .../bindings/phy/phy-hi3670-usb3.txt          |  25 +
 drivers/phy/hisilicon/Kconfig                 |  10 +
 drivers/phy/hisilicon/Makefile                |   1 +
 drivers/phy/hisilicon/phy-hi3670-usb3.c       | 682 ++++++++++++++++++
 4 files changed, 718 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt
 create mode 100644 drivers/phy/hisilicon/phy-hi3670-usb3.c
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +0 -0
new file mode 100644
index 000000000000..4cb02612ff23

Not yaml bindings?

Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt

Quoted 11 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +11 -0
+#define CTRL0_USB3_VBUSVLD		BIT(7)
+#define CTRL0_USB3_VBUSVLD_SEL		BIT(6)
+
+#define CTRL3_USB2_VBUSVLDEXT0		BIT(6)
+#define CTRL3_USB2_VBUSVLDEXTSEL0	BIT(5)
+
+#define CTRL5_USB2_SIDDQ		BIT(0)
+
+#define CTRL7_USB2_REFCLKSEL_MASK	(3 << 3)
+#define CTRL7_USB2_REFCLKSEL_ABB	(3 << 3)
+#define CTRL7_USB2_REFCLKSEL_PAD	(2 << 3)

GENMASK() for these please?

Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt

Quoted 4 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +4 -0
+
+#define CFG50_USB3_PHY_TEST_POWERDOWN	BIT(23)
+
+#define CFG54_USB31PHY_CR_ADDR_MASK	(0xFFFF)

Here and other places as well

Quoted 1 line

+#define CFG54_USB31PHY_CR_ADDR_SHIFT (16)

Okay we should get rid of all shift define. See <linux/bitfield.h> it has FIELD_PREP, xxx_encode_bits() you can use these to program teh bit fields

Quoted 5 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +5 -0
+static int kirin970_phy_cr_clk(struct regmap *usb31misc)
+{
+	int ret;
+
+	/* Clock up */

Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt

Quoted 10 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +10 -0
+	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
+			CFG54_USB31PHY_CR_CLK, CFG54_USB31PHY_CR_CLK);
+	if (ret)
+		return ret;
+
+	/* Clock down */
+	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
+			CFG54_USB31PHY_CR_CLK, 0);
+
+	return ret;

return regmap_update_bits()

Quoted 12 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +12 -0
+static int kirin970_phy_cr_start(struct regmap *usb31misc, int direction)
+{
+	int ret;
+
+	if (direction)
+		ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
+			CFG54_USB31PHY_CR_WR_EN, CFG54_USB31PHY_CR_WR_EN);
+	else
+		ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
+			CFG54_USB31PHY_CR_RD_EN, CFG54_USB31PHY_CR_RD_EN);
+
+	if (ret)

Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt

Quoted 10 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +10 -0
+		return ret;
+
+	ret = kirin970_phy_cr_clk(usb31misc);
+	if (ret)
+		return ret;
+
+	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
+			CFG54_USB31PHY_CR_RD_EN | CFG54_USB31PHY_CR_WR_EN, 0);
+
+	return ret;

here as well

Quoted 6 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +6 -0
+static int kirin970_phy_cr_wait_ack(struct regmap *usb31misc)
+{
+	u32 reg;
+	int retry = 100000;
+	int ret;
+

Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt

Quoted 10 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +10 -0
+	while (retry-- > 0) {
+		ret = regmap_read(usb31misc, USB_MISC_CFG54, &reg);
+		if (ret)
+			return ret;
+		if ((reg & CFG54_USB31PHY_CR_ACK) == CFG54_USB31PHY_CR_ACK)
+			return 0;
+
+		ret = kirin970_phy_cr_clk(usb31misc);
+		if (ret)
+			return ret;

no delay here while checking?

Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt

Quoted 12 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +12 -0
+static int kirin970_phy_cr_set_addr(struct regmap *usb31misc, u32 addr)
+{
+	u32 reg;
+	int ret;
+
+	ret = regmap_read(usb31misc, USB_MISC_CFG54, &reg);
+	if (ret)
+		return ret;
+
+	reg &= ~(CFG54_USB31PHY_CR_ADDR_MASK << CFG54_USB31PHY_CR_ADDR_SHIFT);
+	reg |= ((addr & CFG54_USB31PHY_CR_ADDR_MASK) <<
+			CFG54_USB31PHY_CR_ADDR_SHIFT);

u32_replace_bits() looks apt here

Quoted 21 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +21 -0
+static int kirin970_phy_cr_read(struct regmap *usb31misc, u32 addr, u32 *val)
+{
+	int reg;
+	int i;
+	int ret;
+
+	for (i = 0; i < 100; i++) {
+		ret = kirin970_phy_cr_clk(usb31misc);
+		if (ret)
+			return ret;
+	}
+
+	ret = kirin970_phy_cr_set_sel(usb31misc);
+	if (ret)
+		return ret;
+
+	ret = kirin970_phy_cr_set_addr(usb31misc, addr);
+	if (ret)
+		return ret;
+
+	ret = kirin970_phy_cr_start(usb31misc, 0);

Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt

Quoted 10 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +10 -0
+	if (ret)
+		return ret;
+
+	ret = kirin970_phy_cr_wait_ack(usb31misc);
+	if (ret)
+		return ret;
+
+	ret = regmap_read(usb31misc, USB_MISC_CFG58, &reg);
+	if (ret)
+		return ret;

Do you really care about each step error check? if not, we can have:

        ret |= step_1;
        ret |= step_n;

        if (ret)
                ...

Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt

Quoted 8 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +8 -0
+static int kirin970_phy_init(struct phy *phy)
+{
+	struct kirin970_priv *priv = phy_get_drvdata(phy);
+	u32 val;
+	int ret;
+
+	kirin970_phy_exit(phy);
+	dev_info(priv->dev, "%s in\n", __func__);

Lower to debug level?

Quoted 86 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +86 -0
+	/* assert controller */
+	val = CFGA0_VAUX_RESET | CFGA0_USB31C_RESET;
+	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, 0);
+	if (ret)
+		goto out;
+
+	ret = kirin970_config_phy_clock(priv);
+	if (ret)
+		goto out;
+
+	/* Exit from IDDQ mode */
+	ret = regmap_update_bits(priv->usb31misc, USB3OTG_CTRL5,
+			CTRL5_USB2_SIDDQ, 0);
+	if (ret)
+		goto out;
+
+	/* Release USB31 PHY out of TestPowerDown mode */
+	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG50,
+			CFG50_USB3_PHY_TEST_POWERDOWN, 0);
+	if (ret)
+		goto out;
+
+	/* Tell the PHY power is stable */
+	val = CFG54_USB3_PHY0_ANA_PWR_EN | CFG54_PHY0_PCS_PWR_STABLE |
+		CFG54_PHY0_PMA_PWR_STABLE;
+	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG54,
+			val, val);
+	if (ret)
+		goto out;
+
+	ret = kirin970_config_tca(priv);
+	if (ret)
+		goto out;
+
+	/* Enable SSC */
+	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG5C,
+			CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN,
+			CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN);
+	if (ret)
+		goto out;
+
+	/* Deassert phy */
+	val = CFGA0_USB3PHY_RESET | CFGA0_USB2PHY_POR;
+	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);
+	if (ret)
+		goto out;
+
+	udelay(100);
+
+	/* Deassert controller */
+	val = CFGA0_VAUX_RESET | CFGA0_USB31C_RESET;
+	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);
+	if (ret)
+		goto out;
+
+	udelay(100);
+
+	/* Set fake vbus valid signal */
+	val = CTRL0_USB3_VBUSVLD | CTRL0_USB3_VBUSVLD_SEL;
+	ret = regmap_update_bits(priv->usb31misc, USB3OTG_CTRL0, val, val);
+	if (ret)
+		goto out;
+
+	val = CTRL3_USB2_VBUSVLDEXT0 | CTRL3_USB2_VBUSVLDEXTSEL0;
+	ret = regmap_update_bits(priv->usb31misc, USB3OTG_CTRL3, val, val);
+	if (ret)
+		goto out;
+
+	udelay(100);
+
+	ret = kirin970_phy_set_params(priv);
+	if (ret)
+		goto out;
+
+	{
+		ret = regmap_read(priv->peri_crg, 0x4c,
+				&val);
+		if (!ret)
+			dev_info(priv->dev, "peri_crg 0x4c %x\n", val);
+		ret = regmap_read(priv->peri_crg, 0x404,
+				&val);
+		if (!ret)
+			dev_info(priv->dev, "peri_crg 0x404 %x\n", val);
+		ret = regmap_read(priv->peri_crg, 0xc,
+				&val);
+		if (!ret)

Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt

Quoted 10 lines
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt new file +10 -0
+			dev_info(priv->dev, "peri_crg 0xc %x\n", val);
+		ret = regmap_read(priv->peri_crg, 0xac,
+				&val);
+		if (!ret)
+			dev_info(priv->dev, "peri_crg 0xac %x\n", val);
+		ret = regmap_read(priv->pctrl, 0x10,
+				&val);
+		if (!ret)
+			dev_info(priv->dev, "pctrl 0x10 %x\n", val);
+	}

Whats with the funny braces and one more level on indentation here ?

Signature · 1 line
~Vinod
author
#3 lore raw

PATCH RESEND v3 2/8 phy: hisilicon: phy-hi3670-usb3: fix some issues at the init code

In reply to Mauro Carvalho Chehab

From: Yu Chen <[email protected]>

There are some problems at the initialization part of this phy. Solve them.

Signed-off-by Yu Chen <[email protected]>
Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 drivers/phy/hisilicon/phy-hi3670-usb3.c | 70 +++++++++++--------------
 1 file changed, 32 insertions(+), 38 deletions(-)
drivers/phy/hisilicon/phy-hi3670-usb3.c +32 -38
index 4e04ac97728d..1d4caf7a2aaf 100644
@@ -63,6 +63,7 @@
 #define TCA_INTR_STS			(0x208)
 #define TCA_GCFG			(0x210)
 #define TCA_TCPC			(0x214)
+#define TCA_SYSMODE_CFG			(0x218)
 #define TCA_VBUS_CTRL			(0x240)
 
 #define CTRL0_USB3_VBUSVLD		BIT(7)

@@ -109,12 +110,16 @@
 #define CLK_RST_SUSPEND_CLK_EN		BIT(0)
 
 #define GCFG_ROLE_HSTDEV		BIT(4)
+#define GCFG_OP_MODE			(3 << 0)
+#define GCFG_OP_MODE_CTRL_SYNC_MODE	BIT(0)
 
 #define TCPC_VALID			BIT(4)
 #define TCPC_LOW_POWER_EN		BIT(3)
 #define TCPC_MUX_CONTROL_MASK		(3 << 0)
 #define TCPC_MUX_CONTROL_USB31		(1 << 0)
 
+#define SYSMODE_CFG_TYPEC_DISABLE	BIT(3)
+
 #define VBUS_CTRL_POWERPRESENT_OVERRD	(3 << 2)
 #define VBUS_CTRL_VBUSVALID_OVERRD	(3 << 0)
 

@@ -363,6 +368,11 @@ static int kirin970_config_phy_clock(struct kirin970_priv *priv)
 		if (ret)
 			goto out;
 
+		/* enable usb_tcxo_en */
+		ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
+				USB_TCXO_EN |
+				(USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START));
+
 		/* select usbphy clk from abb */
 		mask = SC_CLK_USB3PHY_3MUX1_SEL;
 		ret = regmap_update_bits(priv->pctrl,

@@ -437,7 +447,13 @@ static int kirin970_config_tca(struct kirin970_priv *priv)
 		goto out;
 
 	ret = regmap_update_bits(priv->usb31misc, TCA_GCFG,
-			GCFG_ROLE_HSTDEV, GCFG_ROLE_HSTDEV);
+			GCFG_ROLE_HSTDEV | GCFG_OP_MODE,
+			GCFG_ROLE_HSTDEV | GCFG_OP_MODE_CTRL_SYNC_MODE);
+	if (ret)
+		goto out;
+
+	ret = regmap_update_bits(priv->usb31misc, TCA_SYSMODE_CFG,
+			SYSMODE_CFG_TYPEC_DISABLE, 0);
 	if (ret)
 		goto out;
 

@@ -461,18 +477,15 @@ static int kirin970_config_tca(struct kirin970_priv *priv)
 	return ret;
 }
 
-static int kirin970_phy_exit(struct phy *phy);
-
 static int kirin970_phy_init(struct phy *phy)
 {
 	struct kirin970_priv *priv = phy_get_drvdata(phy);
 	u32 val;
 	int ret;
 
-	kirin970_phy_exit(phy);
-	dev_info(priv->dev, "%s in\n", __func__);
 	/* assert controller */
-	val = CFGA0_VAUX_RESET | CFGA0_USB31C_RESET;
+	val = CFGA0_VAUX_RESET | CFGA0_USB31C_RESET |
+		CFGA0_USB3PHY_RESET | CFGA0_USB2PHY_POR;
 	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, 0);
 	if (ret)
 		goto out;

@@ -493,6 +506,14 @@ static int kirin970_phy_init(struct phy *phy)
 	if (ret)
 		goto out;
 
+	/* Deassert phy */
+	val = CFGA0_USB3PHY_RESET | CFGA0_USB2PHY_POR;
+	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);
+	if (ret)
+		goto out;
+
+	udelay(100);
+
 	/* Tell the PHY power is stable */
 	val = CFG54_USB3_PHY0_ANA_PWR_EN | CFG54_PHY0_PCS_PWR_STABLE |
 		CFG54_PHY0_PMA_PWR_STABLE;

@@ -512,14 +533,6 @@ static int kirin970_phy_init(struct phy *phy)
 	if (ret)
 		goto out;
 
-	/* Deassert phy */
-	val = CFGA0_USB3PHY_RESET | CFGA0_USB2PHY_POR;
-	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);
-	if (ret)
-		goto out;
-
-	udelay(100);
-
 	/* Deassert controller */
 	val = CFGA0_VAUX_RESET | CFGA0_USB31C_RESET;
 	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);

@@ -545,29 +558,6 @@ static int kirin970_phy_init(struct phy *phy)
 	if (ret)
 		goto out;
 
-	{
-		ret = regmap_read(priv->peri_crg, 0x4c,
-				&val);
-		if (!ret)
-			dev_info(priv->dev, "peri_crg 0x4c %x\n", val);
-		ret = regmap_read(priv->peri_crg, 0x404,
-				&val);
-		if (!ret)
-			dev_info(priv->dev, "peri_crg 0x404 %x\n", val);
-		ret = regmap_read(priv->peri_crg, 0xc,
-				&val);
-		if (!ret)
-			dev_info(priv->dev, "peri_crg 0xc %x\n", val);
-		ret = regmap_read(priv->peri_crg, 0xac,
-				&val);
-		if (!ret)
-			dev_info(priv->dev, "peri_crg 0xac %x\n", val);
-		ret = regmap_read(priv->pctrl, 0x10,
-				&val);
-		if (!ret)
-			dev_info(priv->dev, "pctrl 0x10 %x\n", val);
-	}
-
 	return 0;
 out:
 	dev_err(priv->dev, "failed to init phy ret: %d\n", ret);

@@ -586,7 +576,11 @@ static int kirin970_phy_exit(struct phy *phy)
 	if (ret)
 		goto out;
 
-	if (!kirin970_is_abbclk_seleted(priv)) {
+	if (kirin970_is_abbclk_seleted(priv)) {
+		/* disable usb_tcxo_en */
+		ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
+				USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START);
+	} else {
 		ret = regmap_write(priv->peri_crg, PERI_CRG_PERDIS6,
 				GT_CLK_USB2PHY_REF);
 		if (ret)
Signature · 1 line
2.26.2
maintainer
#4 lore raw

Re: [PATCH v3 RESEND 2/8] phy: hisilicon: phy-hi3670-usb3: fix some issues at the init code

Quoted 4 lines · Mauro Carvalho Chehab

From: Yu Chen <[email protected]>

There are some problems at the initialization part of this phy. Solve them.

Why not fold this into patch 1?

Quoted 159 lines
Signed-off-by Yu Chen <[email protected]>
Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 drivers/phy/hisilicon/phy-hi3670-usb3.c | 70 +++++++++++--------------
 1 file changed, 32 insertions(+), 38 deletions(-)
drivers/phy/hisilicon/phy-hi3670-usb3.c +32 -38
index 4e04ac97728d..1d4caf7a2aaf 100644
@@ -63,6 +63,7 @@
 #define TCA_INTR_STS			(0x208)
 #define TCA_GCFG			(0x210)
 #define TCA_TCPC			(0x214)
+#define TCA_SYSMODE_CFG			(0x218)
 #define TCA_VBUS_CTRL			(0x240)
 
 #define CTRL0_USB3_VBUSVLD		BIT(7)

@@ -109,12 +110,16 @@
 #define CLK_RST_SUSPEND_CLK_EN		BIT(0)
 
 #define GCFG_ROLE_HSTDEV		BIT(4)
+#define GCFG_OP_MODE			(3 << 0)
+#define GCFG_OP_MODE_CTRL_SYNC_MODE	BIT(0)
 
 #define TCPC_VALID			BIT(4)
 #define TCPC_LOW_POWER_EN		BIT(3)
 #define TCPC_MUX_CONTROL_MASK		(3 << 0)
 #define TCPC_MUX_CONTROL_USB31		(1 << 0)
 
+#define SYSMODE_CFG_TYPEC_DISABLE	BIT(3)
+
 #define VBUS_CTRL_POWERPRESENT_OVERRD	(3 << 2)
 #define VBUS_CTRL_VBUSVALID_OVERRD	(3 << 0)
 

@@ -363,6 +368,11 @@ static int kirin970_config_phy_clock(struct kirin970_priv *priv)
 		if (ret)
 			goto out;
 
+		/* enable usb_tcxo_en */
+		ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
+				USB_TCXO_EN |
+				(USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START));
+
 		/* select usbphy clk from abb */
 		mask = SC_CLK_USB3PHY_3MUX1_SEL;
 		ret = regmap_update_bits(priv->pctrl,

@@ -437,7 +447,13 @@ static int kirin970_config_tca(struct kirin970_priv *priv)
 		goto out;
 
 	ret = regmap_update_bits(priv->usb31misc, TCA_GCFG,
-			GCFG_ROLE_HSTDEV, GCFG_ROLE_HSTDEV);
+			GCFG_ROLE_HSTDEV | GCFG_OP_MODE,
+			GCFG_ROLE_HSTDEV | GCFG_OP_MODE_CTRL_SYNC_MODE);
+	if (ret)
+		goto out;
+
+	ret = regmap_update_bits(priv->usb31misc, TCA_SYSMODE_CFG,
+			SYSMODE_CFG_TYPEC_DISABLE, 0);
 	if (ret)
 		goto out;
 

@@ -461,18 +477,15 @@ static int kirin970_config_tca(struct kirin970_priv *priv)
 	return ret;
 }
 
-static int kirin970_phy_exit(struct phy *phy);
-
 static int kirin970_phy_init(struct phy *phy)
 {
 	struct kirin970_priv *priv = phy_get_drvdata(phy);
 	u32 val;
 	int ret;
 
-	kirin970_phy_exit(phy);
-	dev_info(priv->dev, "%s in\n", __func__);
 	/* assert controller */
-	val = CFGA0_VAUX_RESET | CFGA0_USB31C_RESET;
+	val = CFGA0_VAUX_RESET | CFGA0_USB31C_RESET |
+		CFGA0_USB3PHY_RESET | CFGA0_USB2PHY_POR;
 	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, 0);
 	if (ret)
 		goto out;

@@ -493,6 +506,14 @@ static int kirin970_phy_init(struct phy *phy)
 	if (ret)
 		goto out;
 
+	/* Deassert phy */
+	val = CFGA0_USB3PHY_RESET | CFGA0_USB2PHY_POR;
+	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);
+	if (ret)
+		goto out;
+
+	udelay(100);
+
 	/* Tell the PHY power is stable */
 	val = CFG54_USB3_PHY0_ANA_PWR_EN | CFG54_PHY0_PCS_PWR_STABLE |
 		CFG54_PHY0_PMA_PWR_STABLE;

@@ -512,14 +533,6 @@ static int kirin970_phy_init(struct phy *phy)
 	if (ret)
 		goto out;
 
-	/* Deassert phy */
-	val = CFGA0_USB3PHY_RESET | CFGA0_USB2PHY_POR;
-	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);
-	if (ret)
-		goto out;
-
-	udelay(100);
-
 	/* Deassert controller */
 	val = CFGA0_VAUX_RESET | CFGA0_USB31C_RESET;
 	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, val);

@@ -545,29 +558,6 @@ static int kirin970_phy_init(struct phy *phy)
 	if (ret)
 		goto out;
 
-	{
-		ret = regmap_read(priv->peri_crg, 0x4c,
-				&val);
-		if (!ret)
-			dev_info(priv->dev, "peri_crg 0x4c %x\n", val);
-		ret = regmap_read(priv->peri_crg, 0x404,
-				&val);
-		if (!ret)
-			dev_info(priv->dev, "peri_crg 0x404 %x\n", val);
-		ret = regmap_read(priv->peri_crg, 0xc,
-				&val);
-		if (!ret)
-			dev_info(priv->dev, "peri_crg 0xc %x\n", val);
-		ret = regmap_read(priv->peri_crg, 0xac,
-				&val);
-		if (!ret)
-			dev_info(priv->dev, "peri_crg 0xac %x\n", val);
-		ret = regmap_read(priv->pctrl, 0x10,
-				&val);
-		if (!ret)
-			dev_info(priv->dev, "pctrl 0x10 %x\n", val);
-	}
-
 	return 0;
 out:
 	dev_err(priv->dev, "failed to init phy ret: %d\n", ret);

@@ -586,7 +576,11 @@ static int kirin970_phy_exit(struct phy *phy)
 	if (ret)
 		goto out;
 
-	if (!kirin970_is_abbclk_seleted(priv)) {
+	if (kirin970_is_abbclk_seleted(priv)) {
+		/* disable usb_tcxo_en */
+		ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
+				USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START);
+	} else {
 		ret = regmap_write(priv->peri_crg, PERI_CRG_PERDIS6,
 				GT_CLK_USB2PHY_REF);
 		if (ret)
Signature · 1 line
2.26.2
Signature · 1 line
~Vinod
author
#5 lore raw

PATCH RESEND v3 3/8 phy: hisilicon: phy-hi3670-usb3: use a consistent namespace

In reply to Mauro Carvalho Chehab

Rename hikey970 to hi3670, in order to use a namespace similar to hi3660 driver.

Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 drivers/phy/hisilicon/phy-hi3670-usb3.c | 98 ++++++++++++-------------
 1 file changed, 49 insertions(+), 49 deletions(-)
drivers/phy/hisilicon/phy-hi3670-usb3.c +49 -49
index 1d4caf7a2aaf..fd679b39185a 100644
@@ -130,7 +130,7 @@
 #define TX_VBOOST_LVL_START		(6)
 #define TX_VBOOST_LVL_ENABLE		BIT(9)
 
-struct kirin970_priv {
+struct hi3670_priv {
 	struct device *dev;
 	struct regmap *peri_crg;
 	struct regmap *pctrl;

@@ -145,7 +145,7 @@ struct kirin970_priv {
 	u32 usb31misc_offset;
 };
 
-static int kirin970_phy_cr_clk(struct regmap *usb31misc)
+static int hi3670_phy_cr_clk(struct regmap *usb31misc)
 {
 	int ret;
 

@@ -162,13 +162,13 @@ static int kirin970_phy_cr_clk(struct regmap *usb31misc)
 	return ret;
 }
 
-static int kirin970_phy_cr_set_sel(struct regmap *usb31misc)
+static int hi3670_phy_cr_set_sel(struct regmap *usb31misc)
 {
 	return regmap_update_bits(usb31misc, USB_MISC_CFG54,
 			CFG54_USB31PHY_CR_SEL, CFG54_USB31PHY_CR_SEL);
 }
 
-static int kirin970_phy_cr_start(struct regmap *usb31misc, int direction)
+static int hi3670_phy_cr_start(struct regmap *usb31misc, int direction)
 {
 	int ret;
 

@@ -182,7 +182,7 @@ static int kirin970_phy_cr_start(struct regmap *usb31misc, int direction)
 	if (ret)
 		return ret;
 
-	ret = kirin970_phy_cr_clk(usb31misc);
+	ret = hi3670_phy_cr_clk(usb31misc);
 	if (ret)
 		return ret;
 

@@ -192,7 +192,7 @@ static int kirin970_phy_cr_start(struct regmap *usb31misc, int direction)
 	return ret;
 }
 
-static int kirin970_phy_cr_wait_ack(struct regmap *usb31misc)
+static int hi3670_phy_cr_wait_ack(struct regmap *usb31misc)
 {
 	u32 reg;
 	int retry = 100000;

@@ -205,7 +205,7 @@ static int kirin970_phy_cr_wait_ack(struct regmap *usb31misc)
 		if ((reg & CFG54_USB31PHY_CR_ACK) == CFG54_USB31PHY_CR_ACK)
 			return 0;
 
-		ret = kirin970_phy_cr_clk(usb31misc);
+		ret = hi3670_phy_cr_clk(usb31misc);
 		if (ret)
 			return ret;
 	}

@@ -213,7 +213,7 @@ static int kirin970_phy_cr_wait_ack(struct regmap *usb31misc)
 	return -ETIMEDOUT;
 }
 
-static int kirin970_phy_cr_set_addr(struct regmap *usb31misc, u32 addr)
+static int hi3670_phy_cr_set_addr(struct regmap *usb31misc, u32 addr)
 {
 	u32 reg;
 	int ret;

@@ -230,31 +230,31 @@ static int kirin970_phy_cr_set_addr(struct regmap *usb31misc, u32 addr)
 	return ret;
 }
 
-static int kirin970_phy_cr_read(struct regmap *usb31misc, u32 addr, u32 *val)
+static int hi3670_phy_cr_read(struct regmap *usb31misc, u32 addr, u32 *val)
 {
 	int reg;
 	int i;
 	int ret;
 
 	for (i = 0; i < 100; i++) {
-		ret = kirin970_phy_cr_clk(usb31misc);
+		ret = hi3670_phy_cr_clk(usb31misc);
 		if (ret)
 			return ret;
 	}
 
-	ret = kirin970_phy_cr_set_sel(usb31misc);
+	ret = hi3670_phy_cr_set_sel(usb31misc);
 	if (ret)
 		return ret;
 
-	ret = kirin970_phy_cr_set_addr(usb31misc, addr);
+	ret = hi3670_phy_cr_set_addr(usb31misc, addr);
 	if (ret)
 		return ret;
 
-	ret = kirin970_phy_cr_start(usb31misc, 0);
+	ret = hi3670_phy_cr_start(usb31misc, 0);
 	if (ret)
 		return ret;
 
-	ret = kirin970_phy_cr_wait_ack(usb31misc);
+	ret = hi3670_phy_cr_wait_ack(usb31misc);
 	if (ret)
 		return ret;
 

@@ -268,22 +268,22 @@ static int kirin970_phy_cr_read(struct regmap *usb31misc, u32 addr, u32 *val)
 	return 0;
 }
 
-static int kirin970_phy_cr_write(struct regmap *usb31misc, u32 addr, u32 val)
+static int hi3670_phy_cr_write(struct regmap *usb31misc, u32 addr, u32 val)
 {
 	int i;
 	int ret;
 
 	for (i = 0; i < 100; i++) {
-		ret = kirin970_phy_cr_clk(usb31misc);
+		ret = hi3670_phy_cr_clk(usb31misc);
 		if (ret)
 			return ret;
 	}
 
-	ret = kirin970_phy_cr_set_sel(usb31misc);
+	ret = hi3670_phy_cr_set_sel(usb31misc);
 	if (ret)
 		return ret;
 
-	ret = kirin970_phy_cr_set_addr(usb31misc, addr);
+	ret = hi3670_phy_cr_set_addr(usb31misc, addr);
 	if (ret)
 		return ret;
 

@@ -292,16 +292,16 @@ static int kirin970_phy_cr_write(struct regmap *usb31misc, u32 addr, u32 val)
 	if (ret)
 		return ret;
 
-	ret = kirin970_phy_cr_start(usb31misc, 1);
+	ret = hi3670_phy_cr_start(usb31misc, 1);
 	if (ret)
 		return ret;
 
-	ret = kirin970_phy_cr_wait_ack(usb31misc);
+	ret = hi3670_phy_cr_wait_ack(usb31misc);
 
 	return ret;
 }
 
-static int kirin970_phy_set_params(struct kirin970_priv *priv)
+static int hi3670_phy_set_params(struct hi3670_priv *priv)
 {
 	u32 reg;
 	int ret;

@@ -315,7 +315,7 @@ static int kirin970_phy_set_params(struct kirin970_priv *priv)
 	}
 
 	while (retry-- > 0) {
-		ret = kirin970_phy_cr_read(priv->usb31misc,
+		ret = hi3670_phy_cr_read(priv->usb31misc,
 				TX_VBOOST_LVL_REG, &reg);
 		if (!ret)
 			break;

@@ -329,14 +329,14 @@ static int kirin970_phy_set_params(struct kirin970_priv *priv)
 
 	reg |= (TX_VBOOST_LVL_ENABLE |
 			(priv->tx_vboost_lvl << TX_VBOOST_LVL_START));
-	ret = kirin970_phy_cr_write(priv->usb31misc, TX_VBOOST_LVL_REG, reg);
+	ret = hi3670_phy_cr_write(priv->usb31misc, TX_VBOOST_LVL_REG, reg);
 	if (ret)
 		dev_err(priv->dev, "write TX_VBOOST_LVL_REG failed\n");
 
 	return ret;
 }
 
-static int kirin970_is_abbclk_seleted(struct kirin970_priv *priv)
+static int hi3670_is_abbclk_seleted(struct hi3670_priv *priv)
 {
 	u32 reg;
 

@@ -356,12 +356,12 @@ static int kirin970_is_abbclk_seleted(struct kirin970_priv *priv)
 	return 0;
 }
 
-static int kirin970_config_phy_clock(struct kirin970_priv *priv)
+static int hi3670_config_phy_clock(struct hi3670_priv *priv)
 {
 	u32 val, mask;
 	int ret;
 
-	if (kirin970_is_abbclk_seleted(priv)) {
+	if (hi3670_is_abbclk_seleted(priv)) {
 		/* usb refclk iso disable */
 		ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS,
 				USB_REFCLK_ISO_EN);

@@ -427,7 +427,7 @@ static int kirin970_config_phy_clock(struct kirin970_priv *priv)
 	return ret;
 }
 
-static int kirin970_config_tca(struct kirin970_priv *priv)
+static int hi3670_config_tca(struct hi3670_priv *priv)
 {
 	u32 val, mask;
 	int ret;

@@ -477,9 +477,9 @@ static int kirin970_config_tca(struct kirin970_priv *priv)
 	return ret;
 }
 
-static int kirin970_phy_init(struct phy *phy)
+static int hi3670_phy_init(struct phy *phy)
 {
-	struct kirin970_priv *priv = phy_get_drvdata(phy);
+	struct hi3670_priv *priv = phy_get_drvdata(phy);
 	u32 val;
 	int ret;
 

@@ -490,7 +490,7 @@ static int kirin970_phy_init(struct phy *phy)
 	if (ret)
 		goto out;
 
-	ret = kirin970_config_phy_clock(priv);
+	ret = hi3670_config_phy_clock(priv);
 	if (ret)
 		goto out;
 

@@ -522,7 +522,7 @@ static int kirin970_phy_init(struct phy *phy)
 	if (ret)
 		goto out;
 
-	ret = kirin970_config_tca(priv);
+	ret = hi3670_config_tca(priv);
 	if (ret)
 		goto out;
 

@@ -554,7 +554,7 @@ static int kirin970_phy_init(struct phy *phy)
 
 	udelay(100);
 
-	ret = kirin970_phy_set_params(priv);
+	ret = hi3670_phy_set_params(priv);
 	if (ret)
 		goto out;
 

@@ -564,9 +564,9 @@ static int kirin970_phy_init(struct phy *phy)
 	return ret;
 }
 
-static int kirin970_phy_exit(struct phy *phy)
+static int hi3670_phy_exit(struct phy *phy)
 {
-	struct kirin970_priv *priv = phy_get_drvdata(phy);
+	struct hi3670_priv *priv = phy_get_drvdata(phy);
 	u32 mask;
 	int ret;
 

@@ -576,7 +576,7 @@ static int kirin970_phy_exit(struct phy *phy)
 	if (ret)
 		goto out;
 
-	if (kirin970_is_abbclk_seleted(priv)) {
+	if (hi3670_is_abbclk_seleted(priv)) {
 		/* disable usb_tcxo_en */
 		ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
 				USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START);

@@ -593,18 +593,18 @@ static int kirin970_phy_exit(struct phy *phy)
 	return ret;
 }
 
-static struct phy_ops kirin970_phy_ops = {
-	.init		= kirin970_phy_init,
-	.exit		= kirin970_phy_exit,
+static struct phy_ops hi3670_phy_ops = {
+	.init		= hi3670_phy_init,
+	.exit		= hi3670_phy_exit,
 	.owner		= THIS_MODULE,
 };
 
-static int kirin970_phy_probe(struct platform_device *pdev)
+static int hi3670_phy_probe(struct platform_device *pdev)
 {
 	struct phy_provider *phy_provider;
 	struct device *dev = &pdev->dev;
 	struct phy *phy;
-	struct kirin970_priv *priv;
+	struct hi3670_priv *priv;
 
 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 	if (!priv)

@@ -647,7 +647,7 @@ static int kirin970_phy_probe(struct platform_device *pdev)
 				&(priv->tx_vboost_lvl)))
 		priv->eye_diagram_param = KIRIN970_USB_DEFAULT_PHY_VBOOST;
 
-	phy = devm_phy_create(dev, NULL, &kirin970_phy_ops);
+	phy = devm_phy_create(dev, NULL, &hi3670_phy_ops);
 	if (IS_ERR(phy))
 		return PTR_ERR(phy);
 

@@ -656,20 +656,20 @@ static int kirin970_phy_probe(struct platform_device *pdev)
 	return PTR_ERR_OR_ZERO(phy_provider);
 }
 
-static const struct of_device_id kirin970_phy_of_match[] = {
-	{.compatible = "hisilicon,kirin970-usb-phy",},
+static const struct of_device_id hi3670_phy_of_match[] = {
+	{.compatible = "hisilicon,hi3670-usb-phy",},
 	{ },
 };
-MODULE_DEVICE_TABLE(of, kirin970_phy_of_match);
+MODULE_DEVICE_TABLE(of, hi3670_phy_of_match);
 
-static struct platform_driver kirin970_phy_driver = {
-	.probe	= kirin970_phy_probe,
+static struct platform_driver hi3670_phy_driver = {
+	.probe	= hi3670_phy_probe,
 	.driver = {
-		.name	= "kirin970-usb-phy",
-		.of_match_table	= kirin970_phy_of_match,
+		.name	= "hi3670-usb-phy",
+		.of_match_table	= hi3670_phy_of_match,
 	}
 };
-module_platform_driver(kirin970_phy_driver);
+module_platform_driver(hi3670_phy_driver);
 
 MODULE_AUTHOR("Yu Chen <[email protected]>");
 MODULE_LICENSE("GPL v2");
Signature · 1 line
2.26.2
author
#6 lore raw

PATCH RESEND v3 4/8 dts: phy: phy-hi3670-usb3.txt: use a consistent namespace

In reply to Mauro Carvalho Chehab

While this driver is not used yet, use a more consistent namespace, similar to the PHY layer for Kirin 960 (hi3660).

Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt +2 -2
index 4cb02612ff23..2fb27cb8beaf 100644
@@ -2,7 +2,7 @@ Hisilicon Kirin970 usb PHY
 -----------------------
 
 Required properties:
-- compatible: should be "hisilicon,kirin970-usb-phy"
+- compatible: should be "hisilicon,hi3670-usb-phy"
 - #phy-cells: must be 0
 - hisilicon,pericrg-syscon: phandle of syscon used to control phy.
 - hisilicon,pctrl-syscon: phandle of syscon used to control phy.

@@ -14,7 +14,7 @@ Refer to phy/phy-bindings.txt for the generic PHY binding properties
 
 Example:
 	usb_phy: usbphy {
-		compatible = "hisilicon,kirin970-usb-phy";
+		compatible = "hisilicon,hi3670-usb-phy";
 		#phy-cells = <0>;
 		hisilicon,pericrg-syscon = <&crg_ctrl>;
 		hisilicon,pctrl-syscon = <&pctrl>;
Signature · 1 line
2.26.2
author
#7 lore raw

PATCH RESEND v3 5/8 phy: hisilicon: phy-hi3670-usb3: fix coding style

In reply to Mauro Carvalho Chehab

Address the issues reported by checkpatch --strict, and add a SPDX tag.

Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 drivers/phy/hisilicon/phy-hi3670-usb3.c | 157 ++++++++++++------------
 1 file changed, 76 insertions(+), 81 deletions(-)
drivers/phy/hisilicon/phy-hi3670-usb3.c +76 -81
index fd679b39185a..cb0bfcbbfbfa 100644
@@ -1,28 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0-only
 /*
  * Phy provider for USB 3.1 controller on HiSilicon Kirin970 platform
  *
- * Copyright (C) 2017-2018 Hilisicon Electronics Co., Ltd.
+ * Copyright (C) 2017-2020 Hilisicon Electronics Co., Ltd.
  *		http://www.huawei.com
  *
  * Authors: Yu Chen <[email protected]>
- *
- * This program is free software: you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2  of
- * the License as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
  */
 
+#include <linux/clk.h>
 #include <linux/kernel.h>
 #include <linux/mfd/syscon.h>
 #include <linux/module.h>
-#include <linux/platform_device.h>
 #include <linux/phy/phy.h>
+#include <linux/platform_device.h>
 #include <linux/regmap.h>
-#include <linux/clk.h>
 
 #define SCTRL_SCDEEPSLEEPED		(0x0)
 #define USB_CLK_SELECTED		BIT(20)

@@ -116,7 +108,7 @@
 #define TCPC_VALID			BIT(4)
 #define TCPC_LOW_POWER_EN		BIT(3)
 #define TCPC_MUX_CONTROL_MASK		(3 << 0)
-#define TCPC_MUX_CONTROL_USB31		(1 << 0)
+#define TCPC_MUX_CONTROL_USB31		BIT(0)
 
 #define SYSMODE_CFG_TYPEC_DISABLE	BIT(3)
 

@@ -151,13 +143,13 @@ static int hi3670_phy_cr_clk(struct regmap *usb31misc)
 
 	/* Clock up */
 	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
-			CFG54_USB31PHY_CR_CLK, CFG54_USB31PHY_CR_CLK);
+				 CFG54_USB31PHY_CR_CLK, CFG54_USB31PHY_CR_CLK);
 	if (ret)
 		return ret;
 
 	/* Clock down */
 	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
-			CFG54_USB31PHY_CR_CLK, 0);
+				 CFG54_USB31PHY_CR_CLK, 0);
 
 	return ret;
 }

@@ -165,7 +157,7 @@ static int hi3670_phy_cr_clk(struct regmap *usb31misc)
 static int hi3670_phy_cr_set_sel(struct regmap *usb31misc)
 {
 	return regmap_update_bits(usb31misc, USB_MISC_CFG54,
-			CFG54_USB31PHY_CR_SEL, CFG54_USB31PHY_CR_SEL);
+				  CFG54_USB31PHY_CR_SEL, CFG54_USB31PHY_CR_SEL);
 }
 
 static int hi3670_phy_cr_start(struct regmap *usb31misc, int direction)

@@ -174,10 +166,12 @@ static int hi3670_phy_cr_start(struct regmap *usb31misc, int direction)
 
 	if (direction)
 		ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
-			CFG54_USB31PHY_CR_WR_EN, CFG54_USB31PHY_CR_WR_EN);
+					 CFG54_USB31PHY_CR_WR_EN,
+					 CFG54_USB31PHY_CR_WR_EN);
 	else
 		ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
-			CFG54_USB31PHY_CR_RD_EN, CFG54_USB31PHY_CR_RD_EN);
+					 CFG54_USB31PHY_CR_RD_EN,
+					 CFG54_USB31PHY_CR_RD_EN);
 
 	if (ret)
 		return ret;

@@ -187,7 +181,7 @@ static int hi3670_phy_cr_start(struct regmap *usb31misc, int direction)
 		return ret;
 
 	ret = regmap_update_bits(usb31misc, USB_MISC_CFG54,
-			CFG54_USB31PHY_CR_RD_EN | CFG54_USB31PHY_CR_WR_EN, 0);
+				 CFG54_USB31PHY_CR_RD_EN | CFG54_USB31PHY_CR_WR_EN, 0);
 
 	return ret;
 }

@@ -223,8 +217,7 @@ static int hi3670_phy_cr_set_addr(struct regmap *usb31misc, u32 addr)
 		return ret;
 
 	reg &= ~(CFG54_USB31PHY_CR_ADDR_MASK << CFG54_USB31PHY_CR_ADDR_SHIFT);
-	reg |= ((addr & CFG54_USB31PHY_CR_ADDR_MASK) <<
-			CFG54_USB31PHY_CR_ADDR_SHIFT);
+	reg |= ((addr & CFG54_USB31PHY_CR_ADDR_MASK) << CFG54_USB31PHY_CR_ADDR_SHIFT);
 	ret = regmap_write(usb31misc, USB_MISC_CFG54, reg);
 
 	return ret;

@@ -288,7 +281,7 @@ static int hi3670_phy_cr_write(struct regmap *usb31misc, u32 addr, u32 val)
 		return ret;
 
 	ret = regmap_write(usb31misc, USB_MISC_CFG58,
-			val & CFG58_USB31PHY_CR_DATA_MASK);
+			   val & CFG58_USB31PHY_CR_DATA_MASK);
 	if (ret)
 		return ret;
 

@@ -308,7 +301,7 @@ static int hi3670_phy_set_params(struct hi3670_priv *priv)
 	int retry = 3;
 
 	ret = regmap_write(priv->usb31misc, USB3OTG_CTRL4,
-			priv->eye_diagram_param);
+			   priv->eye_diagram_param);
 	if (ret) {
 		dev_err(priv->dev, "set USB3OTG_CTRL4 failed\n");
 		return ret;

@@ -316,10 +309,11 @@ static int hi3670_phy_set_params(struct hi3670_priv *priv)
 
 	while (retry-- > 0) {
 		ret = hi3670_phy_cr_read(priv->usb31misc,
-				TX_VBOOST_LVL_REG, &reg);
+					 TX_VBOOST_LVL_REG, &reg);
 		if (!ret)
 			break;
-		else if (ret != -ETIMEDOUT) {
+
+		if (ret != -ETIMEDOUT) {
 			dev_err(priv->dev, "read TX_VBOOST_LVL_REG failed\n");
 			return ret;
 		}

@@ -327,8 +321,7 @@ static int hi3670_phy_set_params(struct hi3670_priv *priv)
 	if (ret)
 		return ret;
 
-	reg |= (TX_VBOOST_LVL_ENABLE |
-			(priv->tx_vboost_lvl << TX_VBOOST_LVL_START));
+	reg |= (TX_VBOOST_LVL_ENABLE | (priv->tx_vboost_lvl << TX_VBOOST_LVL_START));
 	ret = hi3670_phy_cr_write(priv->usb31misc, TX_VBOOST_LVL_REG, reg);
 	if (ret)
 		dev_err(priv->dev, "write TX_VBOOST_LVL_REG failed\n");

@@ -364,24 +357,24 @@ static int hi3670_config_phy_clock(struct hi3670_priv *priv)
 	if (hi3670_is_abbclk_seleted(priv)) {
 		/* usb refclk iso disable */
 		ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS,
-				USB_REFCLK_ISO_EN);
+				   USB_REFCLK_ISO_EN);
 		if (ret)
 			goto out;
 
 		/* enable usb_tcxo_en */
 		ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
-				USB_TCXO_EN |
-				(USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START));
+				   USB_TCXO_EN |
+				   (USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START));
 
 		/* select usbphy clk from abb */
 		mask = SC_CLK_USB3PHY_3MUX1_SEL;
 		ret = regmap_update_bits(priv->pctrl,
-				PCTRL_PERI_CTRL24, mask, 0);
+					 PCTRL_PERI_CTRL24, mask, 0);
 		if (ret)
 			goto out;
 
 		ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0,
-				CFGA0_USB2PHY_REFCLK_SELECT, 0);
+					 CFGA0_USB2PHY_REFCLK_SELECT, 0);
 		if (ret)
 			goto out;
 

@@ -393,34 +386,36 @@ static int hi3670_config_phy_clock(struct hi3670_priv *priv)
 		ret = regmap_write(priv->usb31misc, USB3OTG_CTRL7, val);
 		if (ret)
 			goto out;
-	} else {
-		ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG54,
-				CFG54_USB3PHY_REF_USE_PAD,
-				CFG54_USB3PHY_REF_USE_PAD);
-		if (ret)
-			goto out;
 
-		ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0,
-				CFGA0_USB2PHY_REFCLK_SELECT,
-				CFGA0_USB2PHY_REFCLK_SELECT);
-		if (ret)
-			goto out;
-
-		ret = regmap_read(priv->usb31misc, USB3OTG_CTRL7, &val);
-		if (ret)
-			goto out;
-		val &= ~CTRL7_USB2_REFCLKSEL_MASK;
-		val |= CTRL7_USB2_REFCLKSEL_PAD;
-		ret = regmap_write(priv->usb31misc, USB3OTG_CTRL7, val);
-		if (ret)
-			goto out;
-
-		ret = regmap_write(priv->peri_crg,
-				PERI_CRG_PEREN6, GT_CLK_USB2PHY_REF);
-		if (ret)
-			goto out;
+		return 0;
 	}
 
+	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG54,
+				 CFG54_USB3PHY_REF_USE_PAD,
+				 CFG54_USB3PHY_REF_USE_PAD);
+	if (ret)
+		goto out;
+
+	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0,
+				 CFGA0_USB2PHY_REFCLK_SELECT,
+				 CFGA0_USB2PHY_REFCLK_SELECT);
+	if (ret)
+		goto out;
+
+	ret = regmap_read(priv->usb31misc, USB3OTG_CTRL7, &val);
+	if (ret)
+		goto out;
+	val &= ~CTRL7_USB2_REFCLKSEL_MASK;
+	val |= CTRL7_USB2_REFCLKSEL_PAD;
+	ret = regmap_write(priv->usb31misc, USB3OTG_CTRL7, val);
+	if (ret)
+		goto out;
+
+	ret = regmap_write(priv->peri_crg,
+			   PERI_CRG_PEREN6, GT_CLK_USB2PHY_REF);
+	if (ret)
+		goto out;
+
 	return 0;
 out:
 	dev_err(priv->dev, "failed to config phy clock ret: %d\n", ret);

@@ -437,7 +432,7 @@ static int hi3670_config_tca(struct hi3670_priv *priv)
 		goto out;
 
 	ret = regmap_write(priv->usb31misc, TCA_INTR_EN,
-			INTR_EN_XA_TIMEOUT_EVT_EN | INTR_EN_XA_ACK_EVT_EN);
+			   INTR_EN_XA_TIMEOUT_EVT_EN | INTR_EN_XA_ACK_EVT_EN);
 	if (ret)
 		goto out;
 

@@ -447,13 +442,13 @@ static int hi3670_config_tca(struct hi3670_priv *priv)
 		goto out;
 
 	ret = regmap_update_bits(priv->usb31misc, TCA_GCFG,
-			GCFG_ROLE_HSTDEV | GCFG_OP_MODE,
-			GCFG_ROLE_HSTDEV | GCFG_OP_MODE_CTRL_SYNC_MODE);
+				 GCFG_ROLE_HSTDEV | GCFG_OP_MODE,
+				 GCFG_ROLE_HSTDEV | GCFG_OP_MODE_CTRL_SYNC_MODE);
 	if (ret)
 		goto out;
 
 	ret = regmap_update_bits(priv->usb31misc, TCA_SYSMODE_CFG,
-			SYSMODE_CFG_TYPEC_DISABLE, 0);
+				 SYSMODE_CFG_TYPEC_DISABLE, 0);
 	if (ret)
 		goto out;
 

@@ -467,7 +462,7 @@ static int hi3670_config_tca(struct hi3670_priv *priv)
 		goto out;
 
 	ret = regmap_write(priv->usb31misc, TCA_VBUS_CTRL,
-		VBUS_CTRL_POWERPRESENT_OVERRD | VBUS_CTRL_VBUSVALID_OVERRD);
+			   VBUS_CTRL_POWERPRESENT_OVERRD | VBUS_CTRL_VBUSVALID_OVERRD);
 	if (ret)
 		goto out;
 

@@ -485,7 +480,7 @@ static int hi3670_phy_init(struct phy *phy)
 
 	/* assert controller */
 	val = CFGA0_VAUX_RESET | CFGA0_USB31C_RESET |
-		CFGA0_USB3PHY_RESET | CFGA0_USB2PHY_POR;
+	      CFGA0_USB3PHY_RESET | CFGA0_USB2PHY_POR;
 	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFGA0, val, 0);
 	if (ret)
 		goto out;

@@ -496,13 +491,13 @@ static int hi3670_phy_init(struct phy *phy)
 
 	/* Exit from IDDQ mode */
 	ret = regmap_update_bits(priv->usb31misc, USB3OTG_CTRL5,
-			CTRL5_USB2_SIDDQ, 0);
+				 CTRL5_USB2_SIDDQ, 0);
 	if (ret)
 		goto out;
 
 	/* Release USB31 PHY out of TestPowerDown mode */
 	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG50,
-			CFG50_USB3_PHY_TEST_POWERDOWN, 0);
+				 CFG50_USB3_PHY_TEST_POWERDOWN, 0);
 	if (ret)
 		goto out;
 

@@ -512,13 +507,13 @@ static int hi3670_phy_init(struct phy *phy)
 	if (ret)
 		goto out;
 
-	udelay(100);
+	usleep_range(100, 120);
 
 	/* Tell the PHY power is stable */
 	val = CFG54_USB3_PHY0_ANA_PWR_EN | CFG54_PHY0_PCS_PWR_STABLE |
-		CFG54_PHY0_PMA_PWR_STABLE;
+	      CFG54_PHY0_PMA_PWR_STABLE;
 	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG54,
-			val, val);
+				 val, val);
 	if (ret)
 		goto out;
 

@@ -528,8 +523,8 @@ static int hi3670_phy_init(struct phy *phy)
 
 	/* Enable SSC */
 	ret = regmap_update_bits(priv->usb31misc, USB_MISC_CFG5C,
-			CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN,
-			CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN);
+				 CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN,
+				 CFG5C_USB3_PHY0_SS_MPLLA_SSC_EN);
 	if (ret)
 		goto out;
 

@@ -539,7 +534,7 @@ static int hi3670_phy_init(struct phy *phy)
 	if (ret)
 		goto out;
 
-	udelay(100);
+	usleep_range(100, 120);
 
 	/* Set fake vbus valid signal */
 	val = CTRL0_USB3_VBUSVLD | CTRL0_USB3_VBUSVLD_SEL;

@@ -552,7 +547,7 @@ static int hi3670_phy_init(struct phy *phy)
 	if (ret)
 		goto out;
 
-	udelay(100);
+	usleep_range(100, 120);
 
 	ret = hi3670_phy_set_params(priv);
 	if (ret)

@@ -579,10 +574,10 @@ static int hi3670_phy_exit(struct phy *phy)
 	if (hi3670_is_abbclk_seleted(priv)) {
 		/* disable usb_tcxo_en */
 		ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3,
-				USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START);
+				   USB_TCXO_EN << PCTRL_PERI_CTRL3_MSK_START);
 	} else {
 		ret = regmap_write(priv->peri_crg, PERI_CRG_PERDIS6,
-				GT_CLK_USB2PHY_REF);
+				   GT_CLK_USB2PHY_REF);
 		if (ret)
 			goto out;
 	}

@@ -612,39 +607,39 @@ static int hi3670_phy_probe(struct platform_device *pdev)
 
 	priv->dev = dev;
 	priv->peri_crg = syscon_regmap_lookup_by_phandle(dev->of_node,
-					"hisilicon,pericrg-syscon");
+							 "hisilicon,pericrg-syscon");
 	if (IS_ERR(priv->peri_crg)) {
 		dev_err(dev, "no hisilicon,pericrg-syscon\n");
 		return PTR_ERR(priv->peri_crg);
 	}
 
 	priv->pctrl = syscon_regmap_lookup_by_phandle(dev->of_node,
-					"hisilicon,pctrl-syscon");
+						      "hisilicon,pctrl-syscon");
 	if (IS_ERR(priv->pctrl)) {
 		dev_err(dev, "no hisilicon,pctrl-syscon\n");
 		return PTR_ERR(priv->pctrl);
 	}
 
 	priv->sctrl = syscon_regmap_lookup_by_phandle(dev->of_node,
-					"hisilicon,sctrl-syscon");
+						      "hisilicon,sctrl-syscon");
 	if (IS_ERR(priv->sctrl)) {
 		dev_err(dev, "no hisilicon,sctrl-syscon\n");
 		return PTR_ERR(priv->sctrl);
 	}
 
 	priv->usb31misc = syscon_regmap_lookup_by_phandle(dev->of_node,
-					"hisilicon,usb31-misc-syscon");
+							  "hisilicon,usb31-misc-syscon");
 	if (IS_ERR(priv->usb31misc)) {
 		dev_err(dev, "no hisilicon,usb31-misc-syscon\n");
 		return PTR_ERR(priv->usb31misc);
 	}
 
 	if (of_property_read_u32(dev->of_node, "eye-diagram-param",
-				&(priv->eye_diagram_param)))
+				 &priv->eye_diagram_param))
 		priv->eye_diagram_param = KIRIN970_USB_DEFAULT_PHY_PARAM;
 
 	if (of_property_read_u32(dev->of_node, "usb3-phy-tx-vboost-lvl",
-				&(priv->tx_vboost_lvl)))
+				 &priv->tx_vboost_lvl))
 		priv->eye_diagram_param = KIRIN970_USB_DEFAULT_PHY_VBOOST;
 
 	phy = devm_phy_create(dev, NULL, &hi3670_phy_ops);

@@ -657,7 +652,7 @@ static int hi3670_phy_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id hi3670_phy_of_match[] = {
-	{.compatible = "hisilicon,hi3670-usb-phy",},
+	{ .compatible = "hisilicon,hi3670-usb-phy" },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, hi3670_phy_of_match);
Signature · 1 line
2.26.2
author
#8 lore raw

PATCH RESEND v3 6/8 phy: hisilicon: phy-hi3670-usb3: change some DT properties

In reply to Mauro Carvalho Chehab

Do some changes at the DT properties in order to make it follow the phy-hi3660-usb3 example and to simplify usb3-phy-tx-vboost-lvl name.

Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 drivers/phy/hisilicon/phy-hi3670-usb3.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)
drivers/phy/hisilicon/phy-hi3670-usb3.c +5 -5
index cb0bfcbbfbfa..42dbc20a0b9a 100644
@@ -627,18 +627,18 @@ static int hi3670_phy_probe(struct platform_device *pdev)
 		return PTR_ERR(priv->sctrl);
 	}
 
-	priv->usb31misc = syscon_regmap_lookup_by_phandle(dev->of_node,
-							  "hisilicon,usb31-misc-syscon");
+	/* node of hi3670 phy is a sub-node of usb3_otg_bc */
+	priv->usb31misc = syscon_node_to_regmap(dev->parent->of_node);
 	if (IS_ERR(priv->usb31misc)) {
-		dev_err(dev, "no hisilicon,usb31-misc-syscon\n");
+		dev_err(dev, "no hisilicon,usb3-otg-bc-syscon\n");
 		return PTR_ERR(priv->usb31misc);
 	}
 
-	if (of_property_read_u32(dev->of_node, "eye-diagram-param",
+	if (of_property_read_u32(dev->of_node, "hisilicon,eye-diagram-param",
 				 &priv->eye_diagram_param))
 		priv->eye_diagram_param = KIRIN970_USB_DEFAULT_PHY_PARAM;
 
-	if (of_property_read_u32(dev->of_node, "usb3-phy-tx-vboost-lvl",
+	if (of_property_read_u32(dev->of_node, "hisilicon,tx-vboost-lvl",
 				 &priv->tx_vboost_lvl))
 		priv->eye_diagram_param = KIRIN970_USB_DEFAULT_PHY_VBOOST;
Signature · 1 line
2.26.2
author
#9 lore raw

PATCH RESEND v3 7/8 dt-bindings: phy: convert phy-kirin970-usb3.txt to yaml

In reply to Mauro Carvalho Chehab

Use the new YAML for this physical layer.

Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 .../bindings/phy/hisilicon,hi3670-usb3.yaml   | 72 +++++++++++++++++++
 .../bindings/phy/phy-hi3670-usb3.txt          | 25 -------
 2 files changed, 72 insertions(+), 25 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml
 delete mode 100644 Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt
Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml new file +72 -0
new file mode 100644
index 000000000000..125a5d6546ae
@@ -0,0 +1,72 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/hisilicon,hi3670-usb3.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Hisilicon Kirin970 USB PHY
+
+maintainers:
+  - Mauro Carvalho Chehab <[email protected]>
+description: |+
+  Bindings for USB3 PHY on HiSilicon Kirin 970.
+
+properties:
+  compatible:
+    const: hisilicon,hi3670-usb-phy
+
+  "#phy-cells":
+    const: 0
+
+  hisilicon,pericrg-syscon:
+    $ref: '/schemas/types.yaml#/definitions/phandle'
+    description: phandle of syscon used to control iso refclk.
+
+  hisilicon,pctrl-syscon:
+    $ref: '/schemas/types.yaml#/definitions/phandle'
+    description: phandle of syscon used to control usb tcxo.
+
+  hisilicon,sctrl-syscon:
+    $ref: '/schemas/types.yaml#/definitions/phandle'
+    description: phandle of syscon used to control phy deep sleep.
+
+  hisilicon,eye-diagram-param:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: Eye diagram for phy.
+
+  hisilicon,tx-vboost-lvl:
+    $ref: /schemas/types.yaml#/definitions/uint32
+    description: TX level vboost for phy.
+
+required:
+  - compatible
+  - hisilicon,pericrg-syscon
+  - hisilicon,pctrl-syscon
+  - hisilicon,sctrl-syscon
+  - hisilicon,eye-diagram-param
+  - hisilicon,tx-vboost-lvl
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    bus {
+      #address-cells = <2>;
+      #size-cells = <2>;
+
+      usb3_otg_bc: usb3_otg_bc@ff200000 {
+        compatible = "syscon", "simple-mfd";
+        reg = <0x0 0xff200000 0x0 0x1000>;
+
+        usb_phy {
+          compatible = "hisilicon,hi3670-usb-phy";
+          #phy-cells = <0>;
+          hisilicon,pericrg-syscon = <&crg_ctrl>;
+          hisilicon,pctrl-syscon = <&pctrl>;
+          hisilicon,sctrl-syscon = <&sctrl>;
+          hisilicon,eye-diagram-param = <0xfdfee4>;
+          hisilicon,tx-vboost-lvl = <0x5>;
+        };
+      };
+    };
Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt deleted +0 -25
deleted file mode 100644
index 2fb27cb8beaf..000000000000
@@ -1,25 +0,0 @@
-Hisilicon Kirin970 usb PHY
------------------------
-
-Required properties:
-- compatible: should be "hisilicon,hi3670-usb-phy"
-- #phy-cells: must be 0
-- hisilicon,pericrg-syscon: phandle of syscon used to control phy.
-- hisilicon,pctrl-syscon: phandle of syscon used to control phy.
-- hisilicon,sctrl-syscon: phandle of syscon used to control phy.
-- hisilicon,usb31-misc-syscon: phandle of syscon used to control phy.
-- eye-diagram-param: parameter set for phy
-- usb3-phy-tx-vboost-lvl: parameter set for phy
-Refer to phy/phy-bindings.txt for the generic PHY binding properties
-
-Example:
-	usb_phy: usbphy {
-		compatible = "hisilicon,hi3670-usb-phy";
-		#phy-cells = <0>;
-		hisilicon,pericrg-syscon = <&crg_ctrl>;
-		hisilicon,pctrl-syscon = <&pctrl>;
-		hisilicon,sctrl-syscon = <&sctrl>;
-		hisilicon,usb31-misc-syscon = <&usb31_misc>;
-		eye-diagram-param = <0xFDFEE4>;
-		usb3-phy-tx-vboost-lvl = <0x5>;
-	};
Signature · 1 line
2.26.2
Reviewed-by on v3 7/8
#10 lore raw

Re: [PATCH v3 RESEND 7/8] dt-bindings: phy: convert phy-kirin970-usb3.txt to yaml

Quoted 10 lines · Mauro Carvalho Chehab

Use the new YAML for this physical layer.

Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 .../bindings/phy/hisilicon,hi3670-usb3.yaml   | 72 +++++++++++++++++++
 .../bindings/phy/phy-hi3670-usb3.txt          | 25 -------
 2 files changed, 72 insertions(+), 25 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml
 delete mode 100644 Documentation/devicetree/bindings/phy/phy-hi3670-usb3.txt
Reviewed-by Rob Herring <[email protected]>
maintainer
#11 lore raw

Re: [PATCH v3 RESEND 7/8] dt-bindings: phy: convert phy-kirin970-usb3.txt to yaml

In reply to Mauro Carvalho Chehab
Quoted 6 lines · Mauro Carvalho Chehab

Use the new YAML for this physical layer.

Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 .../bindings/phy/hisilicon,hi3670-usb3.yaml   | 72 +++++++++++++++++++
 .../bindings/phy/phy-hi3670-usb3.txt          | 25 -------

Aha we have yaml here, why not squash this in and not add txt

I guess the whole series should be squashed into driver patch, binding yaml and other stuff (if any)

Signature · 1 line
~Vinod
author
#12 lore raw

PATCH RESEND v3 8/8 MAINTAINERS: add myself as maintainer for Kirin 970 USB PHY

In reply to Mauro Carvalho Chehab

Now that this driver was added upsream, it needs a maintainer.

Signed-off-by Mauro Carvalho Chehab <[email protected]>
---
 MAINTAINERS | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)
MAINTAINERS +8 -1
index 2f497c7d659c..267ba0b7a52e 100644
@@ -17711,7 +17711,7 @@ L:	[email protected]
 S:	Maintained
 F:	drivers/usb/roles/intel-xhci-usb-role-switch.c
 
-USB IP DRIVER FOR HISILICON KIRIN
+USB IP DRIVER FOR HISILICON KIRIN 960
 M:	Yu Chen <[email protected]>
 M:	Binghui Wang <[email protected]>
 L:	[email protected]

@@ -17719,6 +17719,13 @@ S:	Maintained
 F:	Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt
 F:	drivers/phy/hisilicon/phy-hi3660-usb3.c
 
+USB IP DRIVER FOR HISILICON KIRIN 970
+M:	Mauro Carvalho Chehab <[email protected]>
+L:	[email protected]
+S:	Maintained
+F:	Documentation/devicetree/bindings/phy/hisilicon,kirin970-usb3.yaml
+F:	drivers/phy/hisilicon/phy-kirin970-usb3.c
+
 USB ISP116X DRIVER
 M:	Olav Kongas <[email protected]>
 L:	[email protected]
Signature · 1 line
2.26.2