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SM8150 and SM8250 videocc drivers

PATCH Applied Jonathan Marek 2 participants 11 messages Sep 23, 2020 – Oct 14, 2020

Subsystems (4)
Device tree bindings Arm Qualcomm mailing list Common clk Qualcomm clock drivers

v3 of 4 Applied Latest is v4 →

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Jonathan Marek

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#0 lore raw

v3 cover SM8150 and SM8250 videocc drivers

Add videocc drivers for SM8150/SM8250 required to boot and use venus.

v2:
- fixed dt_binding_check/checkpatch warnings in SM8250 bindings
- added 19.2Mhz in SM8250 freq tbls for consistency with other videocc

v3:
- sorted sc7180 to come before sdm845 in combined yaml
- deleted some SM8250 clocks (hardware controlled and always on)

Jonathan Marek (5):
dt-bindings: clock: combine qcom,sdm845-videocc and

    qcom,sc7180-videocc

dt-bindings: clock: add SM8150 QCOM video clock bindings
dt-bindings: clock: add SM8250 QCOM video clock bindings
clk: qcom: add video clock controller driver for SM8150
clk: qcom: add video clock controller driver for SM8250

 .../bindings/clock/qcom,sc7180-videocc.yaml   |  65 ---
 ...,sdm845-videocc.yaml => qcom,videocc.yaml} |  18 +-
 drivers/clk/qcom/Kconfig                      |  18 +
 drivers/clk/qcom/Makefile                     |   2 +
 drivers/clk/qcom/videocc-sm8150.c             | 276 +++++++++++++
 drivers/clk/qcom/videocc-sm8250.c             | 369 ++++++++++++++++++
 .../dt-bindings/clock/qcom,videocc-sm8150.h   |  25 ++
 .../dt-bindings/clock/qcom,videocc-sm8250.h   |  34 ++
 8 files changed, 737 insertions(+), 70 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml
 rename Documentation/devicetree/bindings/clock/{qcom,sdm845-videocc.yaml => qcom,videocc.yaml} (68%)
 create mode 100644 drivers/clk/qcom/videocc-sm8150.c
 create mode 100644 drivers/clk/qcom/videocc-sm8250.c
 create mode 100644 include/dt-bindings/clock/qcom,videocc-sm8150.h
 create mode 100644 include/dt-bindings/clock/qcom,videocc-sm8250.h
Signature · 1 line
2.26.1
author
#1 lore raw

PATCH v3 1/5 dt-bindings: clock: combine qcom,sdm845-videocc and qcom,sc7180-videocc

These two bindings are almost identical, so combine them into one. This will make it easier to add the sm8150 and sm8250 videocc bindings.

Signed-off-by Jonathan Marek <[email protected]>
Reviewed-by Rob Herring <[email protected]>
---
 .../bindings/clock/qcom,sc7180-videocc.yaml   | 65 -------------------
 ...,sdm845-videocc.yaml => qcom,videocc.yaml} | 14 ++--
 2 files changed, 9 insertions(+), 70 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml
 rename Documentation/devicetree/bindings/clock/{qcom,sdm845-videocc.yaml => qcom,videocc.yaml} (76%)
Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml deleted +0 -65
deleted file mode 100644
index 2feea2b91aa9..000000000000
@@ -1,65 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-%YAML 1.2
----
-$id: http://devicetree.org/schemas/clock/qcom,sc7180-videocc.yaml#
-$schema: http://devicetree.org/meta-schemas/core.yaml#
-
-title: Qualcomm Video Clock & Reset Controller Binding for SC7180
-
-maintainers:
-  - Taniya Das <[email protected]>
-
-description: |
-  Qualcomm video clock control module which supports the clocks, resets and
-  power domains on SC7180.
-
-  See also dt-bindings/clock/qcom,videocc-sc7180.h.
-
-properties:
-  compatible:
-    const: qcom,sc7180-videocc
-
-  clocks:
-    items:
-      - description: Board XO source
-
-  clock-names:
-    items:
-      - const: bi_tcxo
-
-  '#clock-cells':
-    const: 1
-
-  '#reset-cells':
-    const: 1
-
-  '#power-domain-cells':
-    const: 1
-
-  reg:
-    maxItems: 1
-
-required:
-  - compatible
-  - reg
-  - clocks
-  - clock-names
-  - '#clock-cells'
-  - '#reset-cells'
-  - '#power-domain-cells'
-
-additionalProperties: false
-
-examples:
-  - |
-    #include <dt-bindings/clock/qcom,rpmh.h>
-    clock-controller@ab00000 {
-      compatible = "qcom,sc7180-videocc";
-      reg = <0x0ab00000 0x10000>;
-      clocks = <&rpmhcc RPMH_CXO_CLK>;
-      clock-names = "bi_tcxo";
-      #clock-cells = <1>;
-      #reset-cells = <1>;
-      #power-domain-cells = <1>;
-    };
-...
Documentation/devicetree/bindings/clock/qcom,videocc.yaml renamed from Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml +9 -5
similarity index 76%
rename from Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml
rename to Documentation/devicetree/bindings/clock/qcom,videocc.yaml
index f7a0cf53d5f0..874be03c33f5 100644
@@ -1,23 +1,27 @@
 # SPDX-License-Identifier: GPL-2.0-only
 %YAML 1.2
 ---
-$id: http://devicetree.org/schemas/clock/qcom,sdm845-videocc.yaml#
+$id: http://devicetree.org/schemas/clock/qcom,videocc.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Qualcomm Video Clock & Reset Controller Binding for SDM845
+title: Qualcomm Video Clock & Reset Controller Binding
 
 maintainers:
   - Taniya Das <[email protected]>
 
 description: |
   Qualcomm video clock control module which supports the clocks, resets and
-  power domains on SDM845.
+  power domains on SDM845/SC7180.
 
-  See also dt-bindings/clock/qcom,videocc-sdm845.h.
+  See also:
+    dt-bindings/clock/qcom,videocc-sc7180.h
+    dt-bindings/clock/qcom,videocc-sdm845.h
 
 properties:
   compatible:
-    const: qcom,sdm845-videocc
+    enum:
+      - qcom,sc7180-videocc
+      - qcom,sdm845-videocc
 
   clocks:
     items:
Signature · 1 line
2.26.1
maintainer Applied
#2 lore raw

Re: [PATCH v3 1/5] dt-bindings: clock: combine qcom,sdm845-videocc and qcom,sc7180-videocc

Quoting Jonathan Marek (2020-09-23 09:06:27)

Quoted 6 lines

These two bindings are almost identical, so combine them into one. This will make it easier to add the sm8150 and sm8250 videocc bindings.

Signed-off-by Jonathan Marek <[email protected]>
Reviewed-by Rob Herring <[email protected]>

---

Applied to clk-next

author
#3 lore raw

PATCH v3 2/5 dt-bindings: clock: add SM8150 QCOM video clock bindings

In reply to Jonathan Marek

Add device tree bindings for video clock controller for SM8150 SoCs.

Signed-off-by Jonathan Marek <[email protected]>
Reviewed-by Rob Herring <[email protected]>
---
 .../bindings/clock/qcom,videocc.yaml          |  4 ++-
 .../dt-bindings/clock/qcom,videocc-sm8150.h   | 25 +++++++++++++++++++
 2 files changed, 28 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/clock/qcom,videocc-sm8150.h
Documentation/devicetree/bindings/clock/qcom,videocc.yaml +3 -1
index 874be03c33f5..bb1c1a841b68 100644
@@ -11,17 +11,19 @@ maintainers:
 
 description: |
   Qualcomm video clock control module which supports the clocks, resets and
-  power domains on SDM845/SC7180.
+  power domains on SDM845/SC7180/SM8150.
 
   See also:
     dt-bindings/clock/qcom,videocc-sc7180.h
     dt-bindings/clock/qcom,videocc-sdm845.h
+    dt-bindings/clock/qcom,videocc-sm8150.h
 
 properties:
   compatible:
     enum:
       - qcom,sc7180-videocc
       - qcom,sdm845-videocc
+      - qcom,sm8150-videocc
 
   clocks:
     items:
include/dt-bindings/clock/qcom,videocc-sm8150.h new file +25 -0
new file mode 100644
index 000000000000..e24ee840cfdb
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8150_H
+#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8150_H
+
+/* VIDEO_CC clocks */
+#define VIDEO_CC_IRIS_AHB_CLK		0
+#define VIDEO_CC_IRIS_CLK_SRC		1
+#define VIDEO_CC_MVS0_CORE_CLK		2
+#define VIDEO_CC_MVS1_CORE_CLK		3
+#define VIDEO_CC_MVSC_CORE_CLK		4
+#define VIDEO_CC_PLL0			5
+
+/* VIDEO_CC Resets */
+#define VIDEO_CC_MVSC_CORE_CLK_BCR	0
+
+/* VIDEO_CC GDSCRs */
+#define VENUS_GDSC			0
+#define VCODEC0_GDSC			1
+#define VCODEC1_GDSC			2
+
+#endif
Signature · 1 line
2.26.1
author
#5 lore raw

PATCH v3 3/5 dt-bindings: clock: add SM8250 QCOM video clock bindings

In reply to Jonathan Marek

Add device tree bindings for video clock controller for SM8250 SoCs.

Signed-off-by Jonathan Marek <[email protected]>
Reviewed-by Rob Herring <[email protected]>
---
 .../bindings/clock/qcom,videocc.yaml          |  4 ++-
 .../dt-bindings/clock/qcom,videocc-sm8250.h   | 34 +++++++++++++++++++
 2 files changed, 37 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/clock/qcom,videocc-sm8250.h
Documentation/devicetree/bindings/clock/qcom,videocc.yaml +3 -1
index bb1c1a841b68..567202942b88 100644
@@ -11,12 +11,13 @@ maintainers:
 
 description: |
   Qualcomm video clock control module which supports the clocks, resets and
-  power domains on SDM845/SC7180/SM8150.
+  power domains on SDM845/SC7180/SM8150/SM8250.
 
   See also:
     dt-bindings/clock/qcom,videocc-sc7180.h
     dt-bindings/clock/qcom,videocc-sdm845.h
     dt-bindings/clock/qcom,videocc-sm8150.h
+    dt-bindings/clock/qcom,videocc-sm8250.h
 
 properties:
   compatible:

@@ -24,6 +25,7 @@ properties:
       - qcom,sc7180-videocc
       - qcom,sdm845-videocc
       - qcom,sm8150-videocc
+      - qcom,sm8250-videocc
 
   clocks:
     items:
include/dt-bindings/clock/qcom,videocc-sm8250.h new file +34 -0
new file mode 100644
index 000000000000..2b2b3867af25
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8250_H
+#define _DT_BINDINGS_CLK_QCOM_VIDEO_CC_SM8250_H
+
+/* VIDEO_CC clocks */
+#define VIDEO_CC_MVS0_CLK_SRC		0
+#define VIDEO_CC_MVS0C_CLK		1
+#define VIDEO_CC_MVS0C_DIV2_DIV_CLK_SRC	2
+#define VIDEO_CC_MVS1_CLK_SRC		3
+#define VIDEO_CC_MVS1_DIV2_CLK		4
+#define VIDEO_CC_MVS1C_CLK		5
+#define VIDEO_CC_MVS1C_DIV2_DIV_CLK_SRC	6
+#define VIDEO_CC_PLL0			7
+#define VIDEO_CC_PLL1			8
+
+/* VIDEO_CC resets */
+#define VIDEO_CC_CVP_INTERFACE_BCR	0
+#define VIDEO_CC_CVP_MVS0_BCR		1
+#define VIDEO_CC_MVS0C_CLK_ARES		2
+#define VIDEO_CC_CVP_MVS0C_BCR		3
+#define VIDEO_CC_CVP_MVS1_BCR		4
+#define VIDEO_CC_MVS1C_CLK_ARES		5
+#define VIDEO_CC_CVP_MVS1C_BCR		6
+
+#define MVS0C_GDSC			0
+#define MVS1C_GDSC			1
+#define MVS0_GDSC			2
+#define MVS1_GDSC			3
+
+#endif
Signature · 1 line
2.26.1
author
#7 lore raw

PATCH v3 4/5 clk: qcom: add video clock controller driver for SM8150

In reply to Jonathan Marek

Add support for the video clock controller found on SM8150 based devices.

Derived from the downstream driver.

Signed-off-by Jonathan Marek <[email protected]>
---
 drivers/clk/qcom/Kconfig          |   9 +
 drivers/clk/qcom/Makefile         |   1 +
 drivers/clk/qcom/videocc-sm8150.c | 276 ++++++++++++++++++++++++++++++
 3 files changed, 286 insertions(+)
 create mode 100644 drivers/clk/qcom/videocc-sm8150.c
drivers/clk/qcom/Kconfig +9 -0
index 058327310c25..40d7ee9886c9 100644
@@ -444,6 +444,15 @@ config SM_GPUCC_8250
 	  Say Y if you want to support graphics controller devices and
 	  functionality such as 3D graphics.
 
+config SM_VIDEOCC_8150
+	tristate "SM8150 Video Clock Controller"
+	select SDM_GCC_8150
+	select QCOM_GDSC
+	help
+	  Support for the video clock controller on SM8150 devices.
+	  Say Y if you want to support video devices and functionality such as
+	  video encode and decode.
+
 config SPMI_PMIC_CLKDIV
 	tristate "SPMI PMIC clkdiv Support"
 	depends on SPMI || COMPILE_TEST
drivers/clk/qcom/Makefile +1 -0
index 9677e769e7e9..6f4c580d2728 100644
@@ -68,6 +68,7 @@ obj-$(CONFIG_SM_GCC_8150) += gcc-sm8150.o
 obj-$(CONFIG_SM_GCC_8250) += gcc-sm8250.o
 obj-$(CONFIG_SM_GPUCC_8150) += gpucc-sm8150.o
 obj-$(CONFIG_SM_GPUCC_8250) += gpucc-sm8250.o
+obj-$(CONFIG_SM_VIDEOCC_8150) += videocc-sm8150.o
 obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o
 obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
 obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
drivers/clk/qcom/videocc-sm8150.c new file +276 -0

276 lines not on this page · raw message

Signature · 1 line
2.26.1
maintainer Applied
#8 lore raw

Re: [PATCH v3 4/5] clk: qcom: add video clock controller driver for SM8150

Quoting Jonathan Marek (2020-09-23 09:06:30)

Quoted 6 lines

Add support for the video clock controller found on SM8150 based devices.

Derived from the downstream driver.

Signed-off-by Jonathan Marek <[email protected]>

---

Applied to clk-next

author
#9 lore raw

PATCH v3 5/5 clk: qcom: add video clock controller driver for SM8250

In reply to Jonathan Marek

Add support for the video clock controller found on SM8250 based devices.

Derived from the downstream driver.

Signed-off-by Jonathan Marek <[email protected]>
---
 drivers/clk/qcom/Kconfig          |   9 +
 drivers/clk/qcom/Makefile         |   1 +
 drivers/clk/qcom/videocc-sm8250.c | 369 ++++++++++++++++++++++++++++++
 3 files changed, 379 insertions(+)
 create mode 100644 drivers/clk/qcom/videocc-sm8250.c
drivers/clk/qcom/Kconfig +9 -0
index 40d7ee9886c9..95efa38211d5 100644
@@ -453,6 +453,15 @@ config SM_VIDEOCC_8150
 	  Say Y if you want to support video devices and functionality such as
 	  video encode and decode.
 
+config SM_VIDEOCC_8250
+	tristate "SM8250 Video Clock Controller"
+	select SDM_GCC_8250
+	select QCOM_GDSC
+	help
+	  Support for the video clock controller on SM8250 devices.
+	  Say Y if you want to support video devices and functionality such as
+	  video encode and decode.
+
 config SPMI_PMIC_CLKDIV
 	tristate "SPMI PMIC clkdiv Support"
 	depends on SPMI || COMPILE_TEST
drivers/clk/qcom/Makefile +1 -0
index 6f4c580d2728..55fb20800b66 100644
@@ -69,6 +69,7 @@ obj-$(CONFIG_SM_GCC_8250) += gcc-sm8250.o
 obj-$(CONFIG_SM_GPUCC_8150) += gpucc-sm8150.o
 obj-$(CONFIG_SM_GPUCC_8250) += gpucc-sm8250.o
 obj-$(CONFIG_SM_VIDEOCC_8150) += videocc-sm8150.o
+obj-$(CONFIG_SM_VIDEOCC_8250) += videocc-sm8250.o
 obj-$(CONFIG_SPMI_PMIC_CLKDIV) += clk-spmi-pmic-div.o
 obj-$(CONFIG_KPSS_XCC) += kpss-xcc.o
 obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
drivers/clk/qcom/videocc-sm8250.c new file +369 -0

369 lines not on this page · raw message

Signature · 1 line
2.26.1
maintainer Applied
#10 lore raw

Re: [PATCH v3 5/5] clk: qcom: add video clock controller driver for SM8250

Quoting Jonathan Marek (2020-09-23 09:06:31)

Quoted 6 lines

Add support for the video clock controller found on SM8250 based devices.

Derived from the downstream driver.

Signed-off-by Jonathan Marek <[email protected]>

---

Applied to clk-next