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MIPS: context switch: Use save/restore instead of set/clear for Status.CU2

PATCH Applied Huacai Chen 3 participants 7 messages Sep 21, 2020 – Sep 24, 2020 MIPS

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Huacai Chen

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#0 lore raw

PATCH v7 1/3 MIPS: context switch: Use save/restore instead of set/clear for Status.CU2

Some processors (such as Loongson-3) need to enable CU2 in kernel mode, current set/clear method will lose Status.CU2 during context switching, so use save/restore method instead.

Signed-off-by Huacai Chen <[email protected]>
---
 arch/mips/include/asm/switch_to.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)
arch/mips/include/asm/switch_to.h +3 -1
index 0b0a93b..a4374b4 100644
@@ -117,6 +117,8 @@ do {									\
 		__restore_dsp(next);					\
 	}								\
 	if (cop2_present) {						\
+		u32 status = read_c0_status();				\
+									\
 		set_c0_status(ST0_CU2);					\
 		if ((KSTK_STATUS(prev) & ST0_CU2)) {			\
 			if (cop2_lazy_restore)				\

@@ -127,7 +129,7 @@ do {									\
 		    !cop2_lazy_restore) {				\
 			cop2_restore(next);				\
 		}							\
-		clear_c0_status(ST0_CU2);				\
+		write_c0_status(status);				\
 	}								\
 	__clear_r5_hw_ll_bit();						\
 	__clear_software_ll_bit();					\
Signature · 1 line
2.7.0
author
#1 lore raw

PATCH v7 2/3 MIPS: Loongson-3: Enable COP2 usage in kernel

Loongson-3's COP2 is Multi-Media coprocessor, it is disabled in kernel mode by default. However, gslq/gssq (16-bytes load/store instructions) overrides the instruction format of lwc2/swc2. If we wan't to use gslq/ gssq for optimization in kernel, we should enable COP2 usage in kernel.

Please pay attention that in this patch we only enable COP2 in kernel, which means it will lose ST0_CU2 when a process go to user space (try to use COP2 in user space will trigger an exception and then grab COP2, which is similar to FPU). And as a result, we need to modify the context switching code because the new scheduled process doesn't contain ST0_CU2 in its THERAD_STATUS probably.

For zboot, we disable gslq/gssq be generated by toolchain.

Signed-off-by Huacai Chen <[email protected]>

---
V3: Stop using ST0_MM and use ST0_CU2 instead (Thank Thomas and Maciej).
V4: Adopt Thomas's suggestion to improve coding style.
V5: Use ST0_KERNEL_CUMASK in all possible places to avoid #ifdefs.
V6: Modify switch_to() and don't touch r4k_switch.S.
V7: For zboot, disable gslq/gssq be generated by toolchain.

 arch/mips/boot/compressed/Makefile | 5 +++++
 arch/mips/include/asm/mipsregs.h   | 7 +++++++
 arch/mips/include/asm/stackframe.h | 6 +++---
 arch/mips/kernel/head.S            | 2 +-
 arch/mips/kernel/process.c         | 4 ++--
 arch/mips/kernel/traps.c           | 2 +-
 6 files changed, 19 insertions(+), 7 deletions(-)
arch/mips/boot/compressed/Makefile +5 -0
index 9a9ba77..2c491c1 100644
@@ -22,6 +22,11 @@ KBUILD_CFLAGS := $(filter-out -pg, $(KBUILD_CFLAGS))
 
 KBUILD_CFLAGS := $(filter-out -fstack-protector, $(KBUILD_CFLAGS))
 
+# Disable lq/sq in zboot
+ifdef CONFIG_CPU_LOONGSON64
+KBUILD_CFLAGS := $(filter-out -march=loongson3a, $(KBUILD_CFLAGS)) -march=mips64r2
+endif
+
 KBUILD_CFLAGS := $(KBUILD_CFLAGS) -D__KERNEL__ -D__DISABLE_EXPORTS \
 	-DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE) -D"VMLINUX_LOAD_ADDRESS_ULL=$(VMLINUX_LOAD_ADDRESS)ull"
arch/mips/include/asm/mipsregs.h +7 -0
index 1a03fdc2..36b8433 100644
@@ -389,6 +389,13 @@
 #define ST0_CU3			0x80000000
 #define ST0_XX			0x80000000	/* MIPS IV naming */
 
+/* in-kernel enabled CUs */
+#ifdef CONFIG_CPU_LOONGSON64
+#define ST0_KERNEL_CUMASK      (ST0_CU0 | ST0_CU2)
+#else
+#define ST0_KERNEL_CUMASK      ST0_CU0
+#endif
+
 /*
  * Bitfields and bit numbers in the coprocessor 0 IntCtl register. (MIPSR2)
  */
arch/mips/include/asm/stackframe.h +3 -3
index 3e8d2aa..aa430a6 100644
@@ -450,7 +450,7 @@
  */
 		.macro	CLI
 		mfc0	t0, CP0_STATUS
-		li	t1, ST0_CU0 | STATMASK
+		li	t1, ST0_KERNEL_CUMASK | STATMASK
 		or	t0, t1
 		xori	t0, STATMASK
 		mtc0	t0, CP0_STATUS

@@ -463,7 +463,7 @@
  */
 		.macro	STI
 		mfc0	t0, CP0_STATUS
-		li	t1, ST0_CU0 | STATMASK
+		li	t1, ST0_KERNEL_CUMASK | STATMASK
 		or	t0, t1
 		xori	t0, STATMASK & ~1
 		mtc0	t0, CP0_STATUS

@@ -477,7 +477,7 @@
  */
 		.macro	KMODE
 		mfc0	t0, CP0_STATUS
-		li	t1, ST0_CU0 | (STATMASK & ~1)
+		li	t1, ST0_KERNEL_CUMASK | (STATMASK & ~1)
 #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
 		andi	t2, t0, ST0_IEP
 		srl	t2, 2
arch/mips/kernel/head.S +1 -1
index 7dd234e..61b7358 100644
@@ -35,7 +35,7 @@
 	.macro	setup_c0_status set clr
 	.set	push
 	mfc0	t0, CP0_STATUS
-	or	t0, ST0_CU0|\set|0x1f|\clr
+	or	t0, ST0_KERNEL_CUMASK|\set|0x1f|\clr
 	xor	t0, 0x1f|\clr
 	mtc0	t0, CP0_STATUS
 	.set	noreorder
arch/mips/kernel/process.c +2 -2
index f5dc316..b36297e 100644
@@ -68,7 +68,7 @@ void start_thread(struct pt_regs * regs, unsigned long pc, unsigned long sp)
 	unsigned long status;
 
 	/* New thread loses kernel privileges. */
-	status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_FR|KU_MASK);
+	status = regs->cp0_status & ~(ST0_CU0|ST0_CU1|ST0_CU2|ST0_FR|KU_MASK);
 	status |= KU_USER;
 	regs->cp0_status = status;
 	lose_fpu(0);

@@ -133,7 +133,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 	childregs = (struct pt_regs *) childksp - 1;
 	/*  Put the stack after the struct pt_regs.  */
 	childksp = (unsigned long) childregs;
-	p->thread.cp0_status = read_c0_status() & ~(ST0_CU2|ST0_CU1);
+	p->thread.cp0_status = (read_c0_status() & ~(ST0_CU2|ST0_CU1)) | ST0_KERNEL_CUMASK;
 	if (unlikely(p->flags & PF_KTHREAD)) {
 		/* kernel thread */
 		unsigned long status = p->thread.cp0_status;
arch/mips/kernel/traps.c +1 -1
index cf788591..e035295 100644
@@ -2204,7 +2204,7 @@ static void configure_status(void)
 	 * flag that some firmware may have left set and the TS bit (for
 	 * IP27).  Set XX for ISA IV code to work.
 	 */
-	unsigned int status_set = ST0_CU0;
+	unsigned int status_set = ST0_KERNEL_CUMASK;
 #ifdef CONFIG_64BIT
 	status_set |= ST0_FR|ST0_KX|ST0_SX|ST0_UX;
 #endif
Signature · 1 line
2.7.0
maintainer
#2 lore raw

Re: [PATCH V7 2/3] MIPS: Loongson-3: Enable COP2 usage in kernel

Quoted 35 lines · Huacai Chen

Loongson-3's COP2 is Multi-Media coprocessor, it is disabled in kernel mode by default. However, gslq/gssq (16-bytes load/store instructions) overrides the instruction format of lwc2/swc2. If we wan't to use gslq/ gssq for optimization in kernel, we should enable COP2 usage in kernel.

Please pay attention that in this patch we only enable COP2 in kernel, which means it will lose ST0_CU2 when a process go to user space (try to use COP2 in user space will trigger an exception and then grab COP2, which is similar to FPU). And as a result, we need to modify the context switching code because the new scheduled process doesn't contain ST0_CU2 in its THERAD_STATUS probably.

For zboot, we disable gslq/gssq be generated by toolchain.

Signed-off-by Huacai Chen <[email protected]>

---
V3: Stop using ST0_MM and use ST0_CU2 instead (Thank Thomas and Maciej).
V4: Adopt Thomas's suggestion to improve coding style.
V5: Use ST0_KERNEL_CUMASK in all possible places to avoid #ifdefs.
V6: Modify switch_to() and don't touch r4k_switch.S.
V7: For zboot, disable gslq/gssq be generated by toolchain.

 arch/mips/boot/compressed/Makefile | 5 +++++
 arch/mips/include/asm/mipsregs.h   | 7 +++++++
 arch/mips/include/asm/stackframe.h | 6 +++---
 arch/mips/kernel/head.S            | 2 +-
 arch/mips/kernel/process.c         | 4 ++--
 arch/mips/kernel/traps.c           | 2 +-
 6 files changed, 19 insertions(+), 7 deletions(-)
arch/mips/boot/compressed/Makefile +0 -0
index 9a9ba77..2c491c1 100644

arch/mips/boot/compressed/Makefile KBUILD_CFLAGS := $(filter-out -pg, $(KBUILD_CFLAGS)) · line 29

Quoted 8 lines
arch/mips/boot/compressed/Makefile +5 -0
@@ -22,6 +22,11 @@ KBUILD_CFLAGS := $(filter-out -pg, $(KBUILD_CFLAGS))
 
 KBUILD_CFLAGS := $(filter-out -fstack-protector, $(KBUILD_CFLAGS))
 
+# Disable lq/sq in zboot
+ifdef CONFIG_CPU_LOONGSON64
+KBUILD_CFLAGS := $(filter-out -march=loongson3a, $(KBUILD_CFLAGS)) -march=mips64r2
+endif
+

thanks for doing this, I'm going to apply this later.

This remind of another question, what about loongson2ef ? I'm getting kbuild failure because of enabled loongson-mmi mails. Are we are missing something like cflags-y += $(call cc-option,-mno-loongson-mmi) in Platform file ? Who is taking care of loongson2ef ?

Thomas.

Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]
#3 lore raw

Re: [PATCH V7 2/3] MIPS: Loongson-3: Enable COP2 usage in kernel

于 2020年9月21日 GMT+08:00 下午8:15:54, Thomas Bogendoerfer <[email protected]> 写到:

Quoted 47 lines · Huacai Chen
Quoted 35 lines

Loongson-3's COP2 is Multi-Media coprocessor, it is disabled in kernel mode by default. However, gslq/gssq (16-bytes load/store instructions) overrides the instruction format of lwc2/swc2. If we wan't to use gslq/ gssq for optimization in kernel, we should enable COP2 usage in kernel.

Please pay attention that in this patch we only enable COP2 in kernel, which means it will lose ST0_CU2 when a process go to user space (try to use COP2 in user space will trigger an exception and then grab COP2, which is similar to FPU). And as a result, we need to modify the context switching code because the new scheduled process doesn't contain ST0_CU2 in its THERAD_STATUS probably.

For zboot, we disable gslq/gssq be generated by toolchain.

Signed-off-by Huacai Chen <[email protected]>

---
V3: Stop using ST0_MM and use ST0_CU2 instead (Thank Thomas and Maciej).
V4: Adopt Thomas's suggestion to improve coding style.
V5: Use ST0_KERNEL_CUMASK in all possible places to avoid #ifdefs.
V6: Modify switch_to() and don't touch r4k_switch.S.
V7: For zboot, disable gslq/gssq be generated by toolchain.

 arch/mips/boot/compressed/Makefile | 5 +++++
 arch/mips/include/asm/mipsregs.h   | 7 +++++++
 arch/mips/include/asm/stackframe.h | 6 +++---
 arch/mips/kernel/head.S            | 2 +-
 arch/mips/kernel/process.c         | 4 ++--
 arch/mips/kernel/traps.c           | 2 +-
 6 files changed, 19 insertions(+), 7 deletions(-)
arch/mips/boot/compressed/Makefile +0 -0
index 9a9ba77..2c491c1 100644

arch/mips/boot/compressed/Makefile KBUILD_CFLAGS := $(filter-out -pg, $(KBUILD_CFLAGS)) · line 29

Quoted 8 lines
arch/mips/boot/compressed/Makefile +5 -0
@@ -22,6 +22,11 @@ KBUILD_CFLAGS := $(filter-out -pg, $(KBUILD_CFLAGS))
 
 KBUILD_CFLAGS := $(filter-out -fstack-protector, $(KBUILD_CFLAGS))
 
+# Disable lq/sq in zboot
+ifdef CONFIG_CPU_LOONGSON64
+KBUILD_CFLAGS := $(filter-out -march=loongson3a, $(KBUILD_CFLAGS)) -march=mips64r2
+endif
+

thanks for doing this, I'm going to apply this later.

Quoted 4 lines

This remind of another question, what about loongson2ef ? I'm getting kbuild failure because of enabled loongson-mmi mails. Are we are missing something like cflags-y += $(call cc-option,-mno-loongson-mmi) in Platform file ? Who is taking care of loongson2ef ?

I'll send a patch later. Sorry for the inconvenience.

I'm taking care of it. Just being a little bit busy recently.

Thanks.

- Jiaxun

Quoted 3 lines

Thomas.

maintainer
#4 lore raw

Re: [PATCH V7 2/3] MIPS: Loongson-3: Enable COP2 usage in kernel

Quoted 9 lines · Jiaxun Yang

于 2020年9月21日 GMT+08:00 下午8:15:54, Thomas Bogendoerfer <[email protected]> 写到:

Quoted 6 lines

thanks for doing this, I'm going to apply this later.

This remind of another question, what about loongson2ef ? I'm getting kbuild failure because of enabled loongson-mmi mails. Are we are missing something like cflags-y += $(call cc-option,-mno-loongson-mmi) in Platform file ? Who is taking care of loongson2ef ?

I'll send a patch later. Sorry for the inconvenience.

excellent, thank you.

Thomas.

Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]
author
#5 lore raw

PATCH v7 3/3 MIPS: Loongson-3: Calculate ra properly when unwinding the stack

In reply to Huacai Chen

Loongson-3 has 16-bytes load/store instructions: gslq and gssq. This patch calculate ra properly when unwinding the stack, if ra is saved by gssq and restored by gslq.

Signed-off-by Huacai Chen <[email protected]>
---
 arch/mips/kernel/process.c | 16 +++++++++++++++-
 1 file changed, 15 insertions(+), 1 deletion(-)
arch/mips/kernel/process.c +15 -1
index b36297e..37f05c8 100644
@@ -279,7 +279,21 @@ static inline int is_ra_save_ins(union mips_instruction *ip, int *poff)
 		*poff = ip->i_format.simmediate / sizeof(ulong);
 		return 1;
 	}
-
+#ifdef CONFIG_CPU_LOONGSON64
+	if ((ip->loongson3_lswc2_format.opcode == swc2_op) &&
+		      (ip->loongson3_lswc2_format.ls == 1) &&
+		      (ip->loongson3_lswc2_format.fr == 0) &&
+		      (ip->loongson3_lswc2_format.base == 29)) {
+		if (ip->loongson3_lswc2_format.rt == 31) {
+			*poff = ip->loongson3_lswc2_format.offset << 1;
+			return 1;
+		}
+		if (ip->loongson3_lswc2_format.rq == 31) {
+			*poff = (ip->loongson3_lswc2_format.offset << 1) + 1;
+			return 1;
+		}
+	}
+#endif
 	return 0;
 #endif
 }
Signature · 1 line
2.7.0
maintainer Applied
#6 lore raw
In reply to Huacai Chen
Quoted 8 lines · Huacai Chen

Some processors (such as Loongson-3) need to enable CU2 in kernel mode, current set/clear method will lose Status.CU2 during context switching, so use save/restore method instead.

Signed-off-by Huacai Chen <[email protected]>
---
 arch/mips/include/asm/switch_to.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

applied patches 1-3 to mips-next.

Thomas.

Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]