AM64: Add PCIe bindings and driver support
Subsystems (5)
cover AM64: Add PCIe bindings and driver support
AM64 uses the same PCIe controller as in J7200, however AM642 EVM doesn't have a clock generator (unlike J7200 base board). Here the clock from the SERDES has to be routed to the PCIE connector. This series provides an option for the pci-j721e.c driver to drive reference clock output to the connector.
Kishon Vijay Abraham I (4):
dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the
connector
dt-bindings: pci: ti,j721e: Add host mode dt-bindings for TI's AM64
SoC
dt-bindings: pci: ti,j721e: Add endpoint mode dt-bindings for TI's
AM64 SoC
PCI: j721e: Add support to provide refclk to PCIe connector
.../bindings/pci/ti,j721e-pci-ep.yaml | 10 ++++--- .../bindings/pci/ti,j721e-pci-host.yaml | 27 ++++++++++++++----- drivers/pci/controller/cadence/pci-j721e.c | 17 ++++++++++++ 3 files changed, 44 insertions(+), 10 deletions(-)
Signature · 1 line
2.17.1
PATCH 1/4 dt-bindings: PCI: ti,j721e: Add binding to represent refclk to the connector
Add binding to represent refclk to the PCIe connector.
--- .../bindings/pci/ti,j721e-pci-host.yaml | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-)
Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +13 -4
@@ -46,12 +46,21 @@ properties: maxItems: 1 clocks: - maxItems: 1 - description: clock-specifier to represent input to the PCIe + minItems: 1 + maxItems: 2 + description: clock-specifier to represent input to the PCIe for 1 item. + 2nd item if present represents reference clock to the connector. clock-names: - items: - - const: fck + oneOf: + - description: Represent input clock to the PCIe + items: + - const: fck + - description: Represent input clock to the PCIe and reference clock to + the connector. + items: + - const: fck + - const: pcie_refclk vendor-id: const: 0x104c
Signature · 7 lines
2.17.1 _______________________________________________ linux-arm-kernel mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH 2/4 dt-bindings: pci: ti,j721e: Add host mode dt-bindings for TI's AM64 SoC
In reply to Kishon Vijay Abraham IAdd host mode dt-bindings for TI's AM64 SoC. This is the same IP used in J7200, however AM64 is a non-coherent architecture.
--- .../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)
Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +7 -3
@@ -16,12 +16,17 @@ allOf: properties: compatible: oneOf: - - description: PCIe controller in J7200 + - const: ti,am64-pcie-host + - const: ti,j7200-pcie-host + - const: ti,j721e-pcie-host + - description: PCIe controller in AM64 items: + - const: ti,am64-pcie-host - const: ti,j7200-pcie-host - const: ti,j721e-pcie-host - - description: PCIe controller in J721E + - description: PCIe controller in J7200 items: + - const: ti,j7200-pcie-host - const: ti,j721e-pcie-host reg:
@@ -87,7 +92,6 @@ required: - vendor-id - device-id - msi-map - - dma-coherent - dma-ranges - ranges - reset-gpios
Signature · 7 lines
2.17.1 _______________________________________________ linux-arm-kernel mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
PATCH 3/4 dt-bindings: pci: ti,j721e: Add endpoint mode dt-bindings for TI's AM64 SoC
In reply to Kishon Vijay Abraham IAdd endpoint mode dt-bindings for TI's AM64 SoC. This is the same IP used in J7200, however AM64 is a non-coherent architecture.
--- .../devicetree/bindings/pci/ti,j721e-pci-ep.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-)
Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +7 -3
@@ -16,12 +16,17 @@ allOf: properties: compatible: oneOf: - - description: PCIe EP controller in J7200 + - const: ti,am64-pcie-ep + - const: ti,j7200-pcie-ep + - const: ti,j721e-pcie-ep + - description: PCIe EP controller in AM64 items: + - const: ti,am64-pcie-ep - const: ti,j7200-pcie-ep - const: ti,j721e-pcie-ep - - description: PCIe EP controller in J721E + - description: PCIe EP controller in J7200 items: + - const: ti,j7200-pcie-ep - const: ti,j721e-pcie-ep reg:
@@ -66,7 +71,6 @@ required: - power-domains - clocks - clock-names - - dma-coherent - max-functions - phys - phy-names
Signature · 1 line
2.17.1
PATCH 4/4 PCI: j721e: Add support to provide refclk to PCIe connector
In reply to Kishon Vijay Abraham IAdd support to provide refclk to PCIe connector.
--- drivers/pci/controller/cadence/pci-j721e.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
drivers/pci/controller/cadence/pci-j721e.c +17 -0
@@ -6,6 +6,7 @@* Author: Kishon Vijay Abraham I <[email protected]> */ +#include <linux/clk.h> #include <linux/delay.h> #include <linux/gpio/consumer.h> #include <linux/io.h>
@@ -50,6 +51,7 @@ enum link_status {struct j721e_pcie {struct device *dev; +struct clk *refclk;u32 mode;u32 num_lanes;struct cdns_pcie *cdns_pcie;
@@ -310,6 +312,7 @@ static int j721e_pcie_probe(struct platform_device *pdev)struct cdns_pcie_ep *ep;struct gpio_desc *gpiod;void __iomem *base; +struct clk *clk;u32 num_lanes;u32 mode;int ret;
@@ -408,6 +411,19 @@ static int j721e_pcie_probe(struct platform_device *pdev) goto err_get_sync; } + clk =devm_clk_get_optional (dev,"pcie_refclk" ); +if (IS_ERR (clk)) { +dev_err (dev,"failed to get pcie_refclk\n" ); + goto err_pcie_setup; + } + + ret =clk_prepare_enable (clk); +if (ret) { +dev_err (dev,"failed to enable pcie_refclk\n" ); + goto err_get_sync; + } + pcie->refclk = clk; +/* * "Power Sequencing and Reset Signal Timings" table in * PCI EXPRESS CARD ELECTROMECHANICAL SPECIFICATION, REV. 3.0
@@ -476,6 +492,7 @@ static int j721e_pcie_remove(struct platform_device *pdev)struct cdns_pcie *cdns_pcie = pcie->cdns_pcie;struct device *dev = &pdev->dev; +clk_disable_unprepare (pcie->refclk);cdns_pcie_disable_phy (cdns_pcie);pm_runtime_put (dev);pm_runtime_disable (dev);
Signature · 1 line
2.17.1
Re: [PATCH 4/4] PCI: j721e: Add support to provide refclk to PCIe connector
Hi,
Quoted 36 lines · Kishon Vijay Abraham I
Add support to provide refclk to PCIe connector.
Signed-off-by Kishon Vijay Abraham I <[email protected]>--- drivers/pci/controller/cadence/pci-j721e.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)drivers/pci/controller/cadence/pci-j721e.c +3
-0@@ -6,6 +6,7 @@* Author: Kishon Vijay Abraham I <[email protected]> */ +#include <linux/clk.h> #include <linux/delay.h> #include <linux/gpio/consumer.h> #include <linux/io.h> @@ -50,6 +51,7 @@ enum link_status {struct j721e_pcie {struct device *dev; +struct clk *refclk;u32 mode;u32 num_lanes;struct cdns_pcie *cdns_pcie;@@ -310,6 +312,7 @@ static int j721e_pcie_probe(struct platform_device *pdev)struct cdns_pcie_ep *ep;struct gpio_desc *gpiod;void __iomem *base; +struct clk *clk;u32 num_lanes;u32 mode;int ret;
drivers/pci/controller/cadence/pci-j721e.c static int j721e_pcie_probe(struct platform_device *pdev) · line 416
Quoted 6 lines
drivers/pci/controller/cadence/pci-j721e.c +3
-0@@ -408,6 +411,19 @@ static int j721e_pcie_probe(struct platform_device *pdev) goto err_get_sync; } + clk =devm_clk_get_optional (dev,"pcie_refclk" ); +if (IS_ERR (clk)) { +dev_err (dev,"failed to get pcie_refclk\n" );
missed initializing "ret" here. Will fix this and re-send new version.
Thanks
Kishon