mips: Add N64 machine type

PATCH In review Lauri Kasanen 2 participants 3 messages Dec 25, 2020 – Dec 26, 2020 MIPS

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Jiaxun Yang

2020-12-26 03:18 UTC #1 lore raw

Quoted 35 lines · Lauri Kasanen

Signed-off-by Lauri Kasanen <[email protected]>

---
  arch/mips/Kbuild.platforms           |  1 +
  arch/mips/Kconfig                    | 12 ++++++++
  arch/mips/include/asm/mach-n64/irq.h |  9 ++++++
  arch/mips/include/asm/n64/irq.h      | 26 ++++++++++++++++
  arch/mips/n64/Makefile               |  6 ++++
  arch/mips/n64/Platform               |  7 +++++
  arch/mips/n64/init.c                 | 59 ++++++++++++++++++++++++++++++++++++
  arch/mips/n64/irq.c                  | 34 +++++++++++++++++++++
  8 files changed, 154 insertions(+)

create mode 100644 arch/mips/include/asm/mach-n64/irq.h create mode 100644 arch/mips/include/asm/n64/irq.h create mode 100644 arch/mips/n64/Makefile create mode 100644 arch/mips/n64/Platform create mode 100644 arch/mips/n64/init.c
create mode 100644 arch/mips/n64/irq.c

arch/mips/Kbuild.platforms +1 -0

index 5483e38..3e39590 100644
@@ -18,6 +18,7 @@ platform-$(CONFIG_MACH_LOONGSON2EF)	+= loongson2ef/
  platform-$(CONFIG_MACH_LOONGSON32)	+= loongson32/
  platform-$(CONFIG_MACH_LOONGSON64)	+= loongson64/
  platform-$(CONFIG_MIPS_MALTA)		+= mti-malta/
+platform-$(CONFIG_MIPS_N64)		+= n64/
  platform-$(CONFIG_NLM_COMMON)		+= netlogic/
  platform-$(CONFIG_PIC32MZDA)		+= pic32/
  platform-$(CONFIG_MACH_PISTACHIO)	+= pistachio/

arch/mips/Kconfig +0 -0

index 4b52588..2922bb6 100644

arch/mips/Kconfig config MACH_VR41XX · line 608

Quoted 4 lines

arch/mips/Kconfig +1 -0

@@ -605,6 +605,18 @@ config MACH_VR41XX
  	select SYS_SUPPORTS_MIPS16
  	select GPIOLIB
 
+config MIPS_N64

Hi Lauri,

Thanks for your patch!

I'd prefer name it with MACH_NINTENDO64 or something, N64 is also MIPS 64bit ABI, it sounds confusing.

Quoted 125 lines

arch/mips/Kconfig +11 -0

+	bool "Nintendo 64 console"
+	select CEVT_R4K
+	select CSRC_R4K
+	select SYS_HAS_CPU_R4300
+	select SYS_SUPPORTS_BIG_ENDIAN
+	select SYS_SUPPORTS_ZBOOT
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_64BIT_KERNEL
+	select DMA_NONCOHERENT
+	select IRQ_MIPS_CPU
+
  config RALINK
  	bool "Ralink based machines"
  	select CEVT_R4K

arch/mips/include/asm/mach-n64/irq.h new file +9 -0

new file mode 100644
index 0000000..4d4a1ea
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef __ASM_MACH_N64_IRQ_H
+#define __ASM_MACH_N64_IRQ_H
+
+#include <asm/n64/irq.h> /* for MIPS_CPU_IRQ_BASE */
+
+#include <asm/mach-generic/irq.h>
+
+#endif /* __ASM_MACH_N64_IRQ_H */

arch/mips/include/asm/n64/irq.h new file +26 -0

new file mode 100644
index 0000000..00f89ca
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Interrupt numbers for N64
+ *
+ * Copyright (C) 2020 Lauri Kasanen
+ */
+#ifndef __N64_IRQ_H
+#define __N64_IRQ_H
+
+#define NR_IRQS 8
+
+/*
+ * CPU core Interrupt Numbers
+ */
+#define MIPS_CPU_IRQ_BASE	0
+#define MIPS_CPU_IRQ(x)		(MIPS_CPU_IRQ_BASE + (x))
+#define MIPS_SOFTINT0_IRQ	MIPS_CPU_IRQ(0)
+#define MIPS_SOFTINT1_IRQ	MIPS_CPU_IRQ(1)
+#define RCP_IRQ			MIPS_CPU_IRQ(2)
+#define CART_IRQ		MIPS_CPU_IRQ(3)
+#define PRENMI_IRQ		MIPS_CPU_IRQ(4)
+#define RDBR_IRQ		MIPS_CPU_IRQ(5)
+#define RDBW_IRQ		MIPS_CPU_IRQ(6)
+#define TIMER_IRQ		MIPS_CPU_IRQ(7)
+
+#endif /* __N64_IRQ_H */

arch/mips/n64/Makefile new file +6 -0

new file mode 100644
index 0000000..b64a05a
@@ -0,0 +1,6 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Nintendo 64
+#
+
+obj-y := init.o irq.o

arch/mips/n64/Platform new file +7 -0

new file mode 100644
index 0000000..bf5edba
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: GPL-2.0
+#
+# Nintendo 64
+#
+
+cflags-$(CONFIG_MIPS_N64)    += -I$(srctree)/arch/mips/include/asm/mach-n64
+load-$(CONFIG_MIPS_N64)      += 0xffffffff80101000

arch/mips/n64/init.c new file +33 -0

new file mode 100644
index 0000000..6fb622d
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *  Nintendo 64 init.
+ *
+ *  Copyright (C) 2020	Lauri Kasanen
+ */
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/irq.h>
+#include <linux/memblock.h>
+#include <linux/string.h>
+
+#include <asm/bootinfo.h>
+#include <asm/time.h>
+
+#define IO_MEM_RESOURCE_START	0UL
+#define IO_MEM_RESOURCE_END	0x1fffffffUL
+
+static void __init iomem_resource_init(void)
+{
+	iomem_resource.start = IO_MEM_RESOURCE_START;
+	iomem_resource.end = IO_MEM_RESOURCE_END;
+}
+
+const char *get_system_type(void)
+{
+	return "Nintendo 64";
+}
+
+void __init prom_init(void)
+{
+	int argc, i;
+	const char **argv;

arch/mips/n64/init.c line 43

Quoted 10 lines

arch/mips/n64/init.c new file +10 -0

+
+	argc = fw_arg0;
+	argv = (const char **)fw_arg1;
+
+	for (i = 1; i < argc; i++) {
+		strlcat(arcs_cmdline, argv[i], COMMAND_LINE_SIZE);
+		if (i < (argc - 1))
+			strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
+	}
+}

Please use: fw_init_cmdline.

Quoted 41 lines

arch/mips/n64/init.c new file +16 -0

+
+void __init prom_free_prom_memory(void)
+{
+}
+
+void __init plat_mem_setup(void)
+{
+	iomem_resource_init();
+	memblock_add(0x0, 8 * 1024 * 1024); // Bootloader blocks the 4mb config
+}
+
+void __init plat_time_init(void)
+{
+	// 93.75 MHz cpu, count register runs at half rate
+	mips_hpt_frequency = 93750000 / 2;
+}

arch/mips/n64/irq.c new file +19 -0

new file mode 100644
index 0000000..3eb0079
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ *  N64 IRQ
+ *
+ *  Copyright (C) 2020 Lauri Kasanen
+ */
+#include <linux/export.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+
+#include <asm/irq_cpu.h>
+
+asmlinkage void plat_irq_dispatch(void)
+{
+	unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
+
+	if (pending & CAUSEF_IP7)
+		do_IRQ(TIMER_IRQ);
+	else if (pending & CAUSEF_IP4)

arch/mips/n64/irq.c line 29

Quoted 10 lines

arch/mips/n64/irq.c new file +10 -0

+		do_IRQ(PRENMI_IRQ);
+	else if (pending & CAUSEF_IP2)
+		do_IRQ(RCP_IRQ);
+	else if (pending & CAUSEF_IP0)
+		do_IRQ(MIPS_SOFTINT0_IRQ);
+	else if (pending & CAUSEF_IP1)
+		do_IRQ(MIPS_SOFTINT1_IRQ);
+	else
+		spurious_interrupt();
+}

Actually we have plat_irq_dispatch at irq-mips-cpu.c. Any special reason to override it?

Thanks.

- Jiaxun

Quoted 8 lines

arch/mips/n64/irq.c new file +5 -1

+
+void __init arch_init_irq(void)
+{
+	mips_cpu_irq_init();
+}
--

2.6.2

Lauri Kasanen

author

2020-12-26 07:30 UTC #2 lore raw

Quoted 9 lines · On Sat, 26 Dec 2020 11:17:42 +0800 Jiaxun Yang <[email protected]> wrote:

Quoted 9 lines
+++ b/arch/mips/n64/init.c
arch/mips/n64/init.c new file +8 -0
+void __init prom_init(void)
+{
+	int argc, i;
+	const char **argv;
+
+	argc = fw_arg0;
+	argv = (const char **)fw_arg1;
+

Quoted 8 lines

arch/mips/n64/init.c line 43
Quoted 6 lines
arch/mips/n64/init.c new file +6 -0
+	for (i = 1; i < argc; i++) {
+		strlcat(arcs_cmdline, argv[i], COMMAND_LINE_SIZE);
+		if (i < (argc - 1))
+			strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE);
+	}
+}
Please use: fw_init_cmdline.

Will do.

This was copypaste from vr41xx - that place should also be changed then (by someone who can test it).

Quoted 3 lines

Quoted 1 line
+++ b/arch/mips/n64/irq.c
Actually we have plat_irq_dispatch at irq-mips-cpu.c. Any special reason to override it?

No, I just didn't know of it. The nicer #define names can still be used in drivers.

- Lauri