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dt-bindings: mips: lantiq: Document Lantiq Xway DMA bindings

PATCH Applied Aleksander Jan Bajkowski 4 participants 4 messages Jan 3, 2021 – Jan 16, 2021

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Aleksander Jan Bajkowski

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PATCH 1/1 dt-bindings: mips: lantiq: Document Lantiq Xway DMA bindings

Document the Lantiq Xway SoC DMA Controller DT bindings.

Signed-off-by Aleksander Jan Bajkowski <[email protected]>
---
 .../bindings/mips/lantiq/lantiq,dma-xway.yaml | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml
Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml new file +32 -0
new file mode 100644
index 000000000000..40130fefa2b4
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mips/lantiq/lantiq,dma-xway.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lantiq Xway SoCs DMA Controller DT bindings
+
+maintainers:
+  - John Crispin <[email protected]>
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - lantiq,dma-xway
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    dma@e104100 {
+        compatible = "lantiq,dma-xway";
+        reg = <0xe104100 0x800>;
+    };
Signature · 1 line
2.20.1
maintainer Applied
#2 lore raw
In reply to Aleksander Jan Bajkowski
Quoted 7 lines · Aleksander Jan Bajkowski

Document the Lantiq Xway SoC DMA Controller DT bindings.

Signed-off-by Aleksander Jan Bajkowski <[email protected]>
---
 .../bindings/mips/lantiq/lantiq,dma-xway.yaml | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml

applied to mips-next.

Thomas.

Signature · 2 lines
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea.                                                [ RFC1925, 2.3 ]
#3 lore raw
In reply to Aleksander Jan Bajkowski

(another late reply from me, sorry)

Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml line 23

Quoted 3 lines
Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml new file +3 -0
+required:
+  - compatible
+  - reg

This is actually an older IP variant of what can be found in the Intel LGM SoCs. The dt-bindings are currently being upstreamed for that newer SoC in [0].

Based on "DOs and DON’Ts for designing and writing Devicetree bindings" I think some more mandatory properties are needed, even though our driver currently uses none of them:
- interrupts: as far as I know the IP on the Lantiq SoCs has (at least) one interrupt for each DMA channel. That means: 28 interrupts on the xRX200 SoCs
- I *assume* (but I have not researched if that's really the case) that the Lantiq variant also has at least one clock input and a reset line
- since we don't have a proper DMA driver yet I can't comment what we should use for #dma-cells

Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml line 29

Quoted 3 lines
Documentation/devicetree/bindings/mips/lantiq/lantiq,dma-xway.yaml new file +3 -0
+examples:
+  - |
+    dma@e104100 {

note to self: it seems that both dma@ and dma-controller@ are used in existing schemas (the latter having twice as many occurrences though):

$ grep -R dma@ Documentation/devicetree/bindings/dma/* | wc -l
20
$ grep -R dma-controller@ Documentation/devicetree/bindings/dma/* | wc -l
45

Best regards,
Martin

[0] https://patchwork.ozlabs.org/project/devicetree-bindings/patch/0864b9bfa6e2b8b5e7ad9a7a739ca3274f66493c.1610703653.git.mallikarjunax.reddy@linux.intel.com/
[1] https://www.kernel.org/doc/html/latest/devicetree/bindings/writing-bindings.html