Config and device tree updates for the Librem 5 devkit

The Librem 5 devkit is based on NXP's i.MX8MQ. Schematics are at
https://source.puri.sm/Librem5/dvk-mx8m-bsb.

This enables drivers for the following hardware components that aren't yet enabled in defconfig:

- Goodix GT5688 touchscreen
- iMX8MQ's PWM for the LCD backlight
- TI BQ25896 charge controller
- NXP SGTL5000 audio codec
- Microcrystal RV-4162-C7 RTC
- magnetometer: CONFIG_IIO_ST_MAGN_3AXIS
- the SIMCom SIM7100E/A modem

Signed-off-by Guido Günther <[email protected]>

---
 arch/arm64/configs/defconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

BUCK3 needs a regulator-enable-ramp-delay since otherwise the board freezes on etnaviv probe. With this pgc_gpu suspends and resumes as expected. This must have been always broken since gpcv2 support was enabled.

We also enable all the regulators needed for Deep Sleep Mode (DSM) as always-on:

- VDD_SOC supplied by BUCK1
- VDDA_1P8 supplied by BUCK7
- VDDA_0P9 supplied by LDO4
- VDDA_DRAM supplied by LDO3
- NVCC_DRAM supplied by BUCK8
- VDD_DRAM supplied by BUCK5

Finally LDO5 and LDO6 provide VDD_PHY_1V8 and VDD_PHY_0V9 used by the SOCs MIPI, HDMI and USB IP cores. While we would in theory be able to turn these off (and I've tested that or LDO6 and mipi with USB disabled) it is of little practical use atm since USB doesn't runtime suspend so let's revisit this at a later point.

Signed-off-by Guido Günther <[email protected]>

---
 .../boot/dts/freescale/imx8mq-librem5-devkit.dts      | 11 +++++++++++
 1 file changed, 11 insertions(+)

BUCK3 needs a regulator-enable-ramp-delay since otherwise the board freezes on etnaviv probe. With this pgc_gpu suspends and resumes as expected. This must have been always broken since gpcv2 support was enabled.

We also enable all the regulators needed for Deep Sleep Mode (DSM) as always-on:

- VDD_SOC supplied by BUCK1
- VDDA_1P8 supplied by BUCK7
- VDDA_0P9 supplied by LDO4
- VDDA_DRAM supplied by LDO3
- NVCC_DRAM supplied by BUCK8
- VDD_DRAM supplied by BUCK5

Finally LDO5 and LDO6 provide VDD_PHY_1V8 and VDD_PHY_0V9 used by the SOCs MIPI, HDMI and USB IP cores. While we would in theory be able to turn these off (and I've tested that or LDO6 and mipi with USB disabled) it is of little practical use atm since USB doesn't runtime suspend so let's revisit this at a later point.

Signed-off-by Guido Günther <[email protected]>

The board has it's own RTC chip which is backed by the (optional) battery and hence preserves data/time on poweroff when that is inserted.

Signed-off-by Guido Günther <[email protected]>

---
 arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 4 ++++
 1 file changed, 4 insertions(+)

The board has it's own RTC chip which is backed by the (optional) battery and hence preserves data/time on poweroff when that is inserted.

Signed-off-by Guido Günther <[email protected]>

Otherwise the boot hangs early on and the resulting clock tree without this already closely matches the selected rates (722534400 and 786432000).

  audio_pll2                  0        0        0   722534397          0     0  50000
     audio_pll2_bypass        0        0        0   722534397          0     0  50000
        audio_pll2_out        0        0        0   722534397          0     0  50000
  audio_pll1                  1        1        0   786431998          0     0  50000
     audio_pll1_bypass        1        1        0   786431998          0     0  50000
        audio_pll1_out        1        1        0   786431998          0     0  50000
           sai2               1        1        0    24576000          0     0  50000
              sai2_root_clk       1        1        0    24576000          0     0  50000
           sai6               0        0        0    24576000          0     0  50000
              sai6_root_clk       0        0        0    24576000          0     0  50000

Signed-off-by Guido Günther <[email protected]>

---
 arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts | 5 -----
 1 file changed, 5 deletions(-)

Otherwise the boot hangs early on and the resulting clock tree without this already closely matches the selected rates (722534400 and 786432000).

  audio_pll2                  0        0        0   722534397          0     0  50000
     audio_pll2_bypass        0        0        0   722534397          0     0  50000
        audio_pll2_out        0        0        0   722534397          0     0  50000
  audio_pll1                  1        1        0   786431998          0     0  50000
     audio_pll1_bypass        1        1        0   786431998          0     0  50000
        audio_pll1_out        1        1        0   786431998          0     0  50000
           sai2               1        1        0    24576000          0     0  50000
              sai2_root_clk       1        1        0    24576000          0     0  50000
           sai6               0        0        0    24576000          0     0  50000
              sai6_root_clk       0        0        0    24576000          0     0  50000

Signed-off-by Guido Günther <[email protected]>

This enables more components to get a working display, panel, audio and sensors. It also updates some device tree bits to make mainline boot.

I've skipped wifi (which needs some more driver work) and devfreq (since Martin is working on that).

The config changes don't depend on the DT parts so could be applied independently. The series was tested against next-20201214 and i made sure the defconfig changes also apply on top of shawnguo/imx/defconfig.

Quoted 3 lines · Guido Günther

This enables more components to get a working display, panel, audio and sensors. It also updates some device tree bits to make mainline boot.

Quoted 6 lines

I've skipped wifi (which needs some more driver work) and devfreq (since Martin is working on that).

The config changes don't depend on the DT parts so could be applied independently. The series was tested against next-20201214 and i made sure the defconfig changes also apply on top of shawnguo/imx/defconfig.

Sorry. It doesn't apply any more.

Shawn