Add peripheral support for imx8mm-nitrogen-r2 board
Subsystems (2)
v2 cover Add peripheral support for imx8mm-nitrogen-r2 board
Hi,
this patch set is to add several peripheral support for the imx8mm-nitrogen-r2 board.
Thanks,
Update in v2:
- Fix some typo found in v1;
- Fix UART description
Adrien Grassein (8):
arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
arm64: dts: imx8mm-nitrogen-r2: add USB support
arm64: dts: imx8mm-nitrogen-r2: add espi2 support
arm64: dts: imx8mm-nitrogen-r2: add UARTs
arm64: dts: imx8mm-nitrogen-r2: add PWMs
arm64: dts: imx8mm-nitrogen-r2: add FlexSPI
arm64: dts: imx8mm-nitrogen-r2: add audio
arm64: defconfig: Enable wm8960 audio driver.
.../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 307 +++++++++++++++++- arch/arm64/configs/defconfig | 1 + 2 files changed, 306 insertions(+), 2 deletions(-)
Signature · 1 line
2.25.1
PATCH v2 1/8 arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
Add usdhc3 description which corresponds to the wifi/bt chip
--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+)
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +31 -0
@@ -9,6 +9,17 @@ / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; + + reg_wlan_vmmc: regulator-wlan-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_wlan_vmmc>; + regulator-name = "reg_wlan_vmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &A53_0 {
@@ -206,6 +217,20 @@ &usdhc2 { status = "okay"; }; +/* wlan */ +&usdhc3 { + bus-width = <4>; + sdhci-caps-mask = <0x2 0x0>; + non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + vmmc-supply = <®_wlan_vmmc>; + vqmmc-1-8-v; + status = "okay"; +}; + &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>;
@@ -264,6 +289,12 @@ MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0 >; }; + pinctrl_reg_wlan_vmmc: reg-wlan-vmmcgrp { + fsl,pins = < + MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16 + >; + }; + pinctrl_uart2: uart2grp { fsl,pins = < MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
Signature · 1 line
2.25.1
Re: [PATCH v2 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
Quoted 34 lines · Adrien Grassein
Add usdhc3 description which corresponds to the wifi/bt chip
Signed-off-by Adrien Grassein <[email protected]>--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+)arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +12
-0@@ -9,6 +9,17 @@ / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; + + reg_wlan_vmmc: regulator-wlan-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_wlan_vmmc>; + regulator-name = "reg_wlan_vmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &A53_0 {@@ -206,6 +217,20 @@ &usdhc2 { status = "okay"; }; +/* wlan */
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts &usdhc2 { · line 230
Quoted 10 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +10
-0+&usdhc3 { + bus-width = <4>; + sdhci-caps-mask = <0x2 0x0>; + non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + vmmc-supply = <®_wlan_vmmc>; + vqmmc-1-8-v;
There is no such property in the bindings.
Best regards,
Krzysztof
Re: [PATCH v2 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
Quoted 35 lines · Krzysztof Kozlowski
Quoted 33 lines · Adrien Grassein
Add usdhc3 description which corresponds to the wifi/bt chip
Signed-off-by Adrien Grassein <[email protected]>--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+)arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +11
-0@@ -9,6 +9,17 @@ / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; + + reg_wlan_vmmc: regulator-wlan-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_wlan_vmmc>; + regulator-name = "reg_wlan_vmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &A53_0 {@@ -206,6 +217,20 @@ &usdhc2 { status = "okay"; };
Quoted 14 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts &usdhc2 { · line 230
Quoted 11 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +11
-0+/* wlan */ +&usdhc3 { + bus-width = <4>; + sdhci-caps-mask = <0x2 0x0>; + non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + vmmc-supply = <®_wlan_vmmc>; + vqmmc-1-8-v;There is no such property in the bindings.
Sorry, I copied a property from the FSL kernel.
I will fix this with a "fixed-regulator".
Quoted 2 lines
Best regards,
Krzysztof
Thanks,
Adrien
Re: [PATCH v2 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
Quoted 51 lines · Adrien Grassein
Quoted 35 lines · Krzysztof Kozlowski
Quoted 33 lines · Adrien Grassein
Add usdhc3 description which corresponds to the wifi/bt chip
Signed-off-by Adrien Grassein <[email protected]>--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+)arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +11
-0@@ -9,6 +9,17 @@ / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; + + reg_wlan_vmmc: regulator-wlan-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_wlan_vmmc>; + regulator-name = "reg_wlan_vmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &A53_0 {@@ -206,6 +217,20 @@ &usdhc2 { status = "okay"; };Quoted 14 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts &usdhc2 { · line 230
Quoted 11 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +11
-0+/* wlan */ +&usdhc3 { + bus-width = <4>; + sdhci-caps-mask = <0x2 0x0>; + non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + vmmc-supply = <®_wlan_vmmc>; + vqmmc-1-8-v;There is no such property in the bindings.
Quoted 2 lines
Sorry, I copied a property from the FSL kernel.
I will fix this with a "fixed-regulator".
I would assume this goes from PMIC, so check your schematics. There is little point in adding a fixed regulator which is non-controllable. I think bindings don't require it.
Best regards,
Krzysztof
Re: [PATCH v2 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
Quoted 53 lines · Krzysztof Kozlowski
Quoted 51 lines · Adrien Grassein
Quoted 49 lines · Krzysztof Kozlowski
Quoted 34 lines · Adrien Grassein
Add usdhc3 description which corresponds to the wifi/bt chip
Signed-off-by Adrien Grassein <[email protected]>--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+)arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +12
-0@@ -9,6 +9,17 @@ / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; + + reg_wlan_vmmc: regulator-wlan-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_wlan_vmmc>; + regulator-name = "reg_wlan_vmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &A53_0 {@@ -206,6 +217,20 @@ &usdhc2 { status = "okay"; }; +/* wlan */arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts &usdhc2 { · line 230
Quoted 10 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +10
-0+&usdhc3 { + bus-width = <4>; + sdhci-caps-mask = <0x2 0x0>; + non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + vmmc-supply = <®_wlan_vmmc>; + vqmmc-1-8-v;There is no such property in the bindings.
Quoted 5 lines
Quoted 2 lines
Sorry, I copied a property from the FSL kernel.
I will fix this with a "fixed-regulator".I would assume this goes from PMIC, so check your schematics. There is little point in adding a fixed regulator which is non-controllable.
No, the 1.8V is issued directly from the alimentation stage. So we can't control it.
Quoted 1 line
I think bindings don't require it.
After reading some code, I can say that vqmmc is not mandatory but it helped to find out
the caps of the mmc host. In this case, we only support 1.8V on vqmmc. It avoids driver to guess it (and avoid bad behaviour on any future change).
Quoted 4 lines
Best regards,
Krzysztof
Thanks,
Adrien
Re: [PATCH v2 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
Quoted 61 lines · Adrien Grassein
Quoted 53 lines · Krzysztof Kozlowski
Quoted 51 lines · Adrien Grassein
Quoted 49 lines · Krzysztof Kozlowski
Quoted 34 lines · Adrien Grassein
Add usdhc3 description which corresponds to the wifi/bt chip
Signed-off-by Adrien Grassein <[email protected]>--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+)arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +12
-0@@ -9,6 +9,17 @@ / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; + + reg_wlan_vmmc: regulator-wlan-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_wlan_vmmc>; + regulator-name = "reg_wlan_vmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &A53_0 {@@ -206,6 +217,20 @@ &usdhc2 { status = "okay"; }; +/* wlan */arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts &usdhc2 { · line 230
Quoted 10 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +10
-0+&usdhc3 { + bus-width = <4>; + sdhci-caps-mask = <0x2 0x0>; + non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + vmmc-supply = <®_wlan_vmmc>; + vqmmc-1-8-v;There is no such property in the bindings.
Quoted 5 lines
Quoted 2 lines
Sorry, I copied a property from the FSL kernel.
I will fix this with a "fixed-regulator".I would assume this goes from PMIC, so check your schematics. There is little point in adding a fixed regulator which is non-controllable.
Quoted 8 lines
No, the 1.8V is issued directly from the alimentation stage. So we can't control it.
Quoted 1 line
I think bindings don't require it.
After reading some code, I can say that vqmmc is not mandatory but it helped to find out
the caps of the mmc host. In this case, we only support 1.8V on vqmmc. It avoids driver to guess it (and avoid bad behaviour on any future change).
If the supply (hardware) is really 1.8 V then indeed your approach is good. So let's keep that one.
Best regards,
Krzysztof
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Re: [PATCH v2 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
Quoted 66 lines · Krzysztof Kozlowski
Quoted 64 lines · Adrien Grassein
Quoted 53 lines · Krzysztof Kozlowski
Quoted 51 lines · Adrien Grassein
Quoted 49 lines · Krzysztof Kozlowski
Quoted 34 lines · Adrien Grassein
Add usdhc3 description which corresponds to the wifi/bt chip
Signed-off-by Adrien Grassein <[email protected]>--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 31 +++++++++++++++++++ 1 file changed, 31 insertions(+)arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +12
-0@@ -9,6 +9,17 @@ / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; + + reg_wlan_vmmc: regulator-wlan-vmmc { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_wlan_vmmc>; + regulator-name = "reg_wlan_vmmc"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &A53_0 {@@ -206,6 +217,20 @@ &usdhc2 { status = "okay"; }; +/* wlan */arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts &usdhc2 { · line 230
Quoted 10 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +10
-0+&usdhc3 { + bus-width = <4>; + sdhci-caps-mask = <0x2 0x0>; + non-removable; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + vmmc-supply = <®_wlan_vmmc>; + vqmmc-1-8-v;There is no such property in the bindings.
Quoted 5 lines
Quoted 2 lines
Sorry, I copied a property from the FSL kernel.
I will fix this with a "fixed-regulator".I would assume this goes from PMIC, so check your schematics. There is little point in adding a fixed regulator which is non-controllable.
No, the 1.8V is issued directly from the alimentation stage. So we can't control it.
Quoted 9 lines
Quoted 5 lines
Quoted 1 line
I think bindings don't require it.
After reading some code, I can say that vqmmc is not mandatory but it helped to find out
the caps of the mmc host. In this case, we only support 1.8V on vqmmc. It avoids driver to guess it (and avoid bad behaviour on any future change).If the supply (hardware) is really 1.8 V then indeed your approach is good. So let's keep that one.
To be sure to understand well: should I keep the fixed regulator? Thanks,
Quoted 2 lines
Best regards,
Krzysztof
Best regards,
Adrien
Re: [PATCH v2 1/8] arm64: dts: imx8mm-nitrogen-r2: add wifi/bt chip
Quoted 13 lines · Adrien Grassein
Quoted 13 lines
Quoted 12 lines
Quoted 3 lines
I would assume this goes from PMIC, so check your schematics. There is little point in adding a fixed regulator which is non-controllable.
No, the 1.8V is issued directly from the alimentation stage. So we can't control it.
Quoted 1 line
I think bindings don't require it.
After reading some code, I can say that vqmmc is not mandatory but it helped to find out
the caps of the mmc host. In this case, we only support 1.8V on vqmmc. It avoids driver to guess it (and avoid bad behaviour on any future change).
Quoted 6 lines
Quoted 3 lines
If the supply (hardware) is really 1.8 V then indeed your approach is good. So let's keep that one.
To be sure to understand well: should I keep the fixed regulator? Thanks,
Yes, keep it, at least I am fine with it.
Best regards,
Krzysztof
PATCH v2 2/8 arm64: dts: imx8mm-nitrogen-r2: add USB support
In reply to Adrien GrasseinAdd description of USB.
usbotg2 seems to not working on all boards (including ones from variscite).
--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 42 +++++++++++++++++++ 1 file changed, 42 insertions(+)
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +42 -0
@@ -231,6 +231,34 @@ &usdhc3 { status = "okay"; }; +/* USB OTG port */ +&usbotg1 { + dr_mode = "otg"; + over-current-active-low; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg1>; + power-active-high; + status = "okay"; +}; + +/* USB Host port */ +&usbotg2 { + dr_mode = "host"; + over-current-active-low; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg2>; + power-active-high; + /* + * FIXME: having USB2 enabled hangs the boot just after: + *[ 1.655941] ci_hdrc ci_hdrc.1: EHCI Host Controller + *[ 1.660880] ci_hdrc ci_hdrc.1: new USB bus registered, assigned bus number 2 + *[ 1.681505] ci_hdrc ci_hdrc.1: USB 2.0 started, EHCI 1.00 + *[ 1.687730] hub 2-0:1.0: USB hub found + *[ 1.691528] hub 2-0:1.0: 1 port detected + */ + status = "disabled"; +}; + &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>;
@@ -302,6 +330,20 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 >; }; + pinctrl_usbotg1: usbotg1grp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x16 + MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x156 + >; + }; + + pinctrl_usbotg2: usbotg2grp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO14_USB2_OTG_PWR 0x16 + MX8MM_IOMUXC_GPIO1_IO15_USB2_OTG_OC 0x15 + >; + }; + pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK 0x190
Signature · 1 line
2.25.1
PATCH v2 3/8 arm64: dts: imx8mm-nitrogen-r2: add espi2 support
In reply to Adrien GrasseinAdd the description for espi support.
--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+)
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +30 -0
@@ -10,6 +10,14 @@ / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; + clock { + clk16m: clk16m { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <16000000>; + }; + }; + reg_wlan_vmmc: regulator-wlan-vmmc { compatible = "regulator-fixed"; pinctrl-names = "default";
@@ -38,6 +46,19 @@ &A53_3 { cpu-supply = <®_buck3>; }; +/* J15 */ +&ecspi2 { + assigned-clocks = <&clk IMX8MM_CLK_ECSPI2>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_40M>; + assigned-clock-rates = <40000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; +}; + &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec1>;
@@ -270,6 +291,15 @@ &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>; + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x140 + MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x19 + MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x19 + MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x19 + >; + }; + pinctrl_fec1: fec1grp { fsl,pins = < MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
Signature · 1 line
2.25.1
Re: [PATCH v2 3/8] arm64: dts: imx8mm-nitrogen-r2: add espi2 support
Quoted 13 lines · Adrien Grassein
Add the description for espi support.
Signed-off-by Adrien Grassein <[email protected]>Reviewed-by Krzysztof Kozlowski <[email protected]>--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+)arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +0
-0
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts / { · line 14
Quoted 5 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +2
-0@@ -10,6 +10,14 @@ / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm"; + clock { + clk16m: clk16m {
No changes here. The review tag was conditional in a way that I assumed you will implement this change.
Best regards,
Krzysztof
Re: [PATCH v2 3/8] arm64: dts: imx8mm-nitrogen-r2: add espi2 support
Quoted 18 lines · Krzysztof Kozlowski
Quoted 16 lines · Adrien Grassein
Add the description for espi support.
Signed-off-by Adrien Grassein <[email protected]>Reviewed-by Krzysztof Kozlowski <[email protected]>--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+)arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +0
-0@@ -10,6 +10,14 @@ / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
Quoted 6 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts / { · line 14
Quoted 2 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +2
-0+ clock { + clk16m: clk16m {No changes here. The review tag was conditional in a way that I assumed you will implement this change.
Sorry I misunderstood your comment. I renamed the "clocks" node. By the way, after a review, this nod is useless (not used).
Quoted 2 lines
Best regards,
Krzysztof
Thanks,
Adrien
Re: [PATCH v2 3/8] arm64: dts: imx8mm-nitrogen-r2: add espi2 support
Quoted 19 lines · Adrien Grassein
Quoted 18 lines · Krzysztof Kozlowski
Quoted 16 lines · Adrien Grassein
Add the description for espi support.
Signed-off-by Adrien Grassein <[email protected]>Reviewed-by Krzysztof Kozlowski <[email protected]>--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 30 +++++++++++++++++++ 1 file changed, 30 insertions(+)arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +0
-0@@ -10,6 +10,14 @@ / { model = "Boundary Devices i.MX8MMini Nitrogen8MM Rev2"; compatible = "boundary,imx8mm-nitrogen8mm", "fsl,imx8mm";
Quoted 8 lines
Quoted 6 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts / { · line 14
Quoted 2 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +2
-0+ clock { + clk16m: clk16m {No changes here. The review tag was conditional in a way that I assumed you will implement this change.
Sorry I misunderstood your comment. I renamed the "clocks" node. By the way, after a review, this nod is useless (not used).
The "clocks" node was okay, you can also remove it. I was commenting below the clock itself. The device nodes should have generic names, so "clock" or "clock-16m".
Best regards,
Krzysztof
PATCH v2 4/8 arm64: dts: imx8mm-nitrogen-r2: add UARTs
In reply to Adrien GrasseinAdd description and pin muxing for UARTs.
--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 50 ++++++++++++++++++- 1 file changed, 48 insertions(+), 2 deletions(-)
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +48 -2
@@ -205,12 +205,33 @@ rtc@68 { }; }; +/* BT */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + uart-has-rtscts; + status = "okay"; +}; + /* console */ &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; - assigned-clocks = <&clk IMX8MM_CLK_UART2>; - assigned-clock-parents = <&clk IMX8MM_CLK_24M>; + status = "okay"; +}; + +/* J15 */ +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +/* J9 */ +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; status = "okay"; };
@@ -353,6 +374,15 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16 >; }; + pinctrl_uart1: uart1grp { + fsl,pins = < + MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 + MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 + MX8MM_IOMUXC_UART3_RXD_UART1_DCE_CTS_B 0x140 + MX8MM_IOMUXC_UART3_TXD_UART1_DCE_RTS_B 0x140 + >; + }; + pinctrl_uart2: uart2grp { fsl,pins = < MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
@@ -360,6 +390,22 @@ MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 >; }; + pinctrl_uart3: uart3grp { + fsl,pins = < + MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x140 + MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x140 + MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x140 + MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x140 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x140 + MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x140 + >; + }; + pinctrl_usbotg1: usbotg1grp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x16
Signature · 1 line
2.25.1
Re: [PATCH v2 4/8] arm64: dts: imx8mm-nitrogen-r2: add UARTs
Quoted 19 lines · Adrien Grassein
Add description and pin muxing for UARTs.
Signed-off-by Adrien Grassein <[email protected]>--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 50 ++++++++++++++++++- 1 file changed, 48 insertions(+), 2 deletions(-)arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +4
-0@@ -205,12 +205,33 @@ rtc@68 { }; }; +/* BT */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>;
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts rtc@68 { · line 213
Quoted 10 lines
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +4
-2+ uart-has-rtscts; + status = "okay"; +}; + /* console */ &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; - assigned-clocks = <&clk IMX8MM_CLK_UART2>; - assigned-clock-parents = <&clk IMX8MM_CLK_24M>;
This is a separate patch.
Best regards,
Krzysztof
PATCH v2 5/8 arm64: dts: imx8mm-nitrogen-r2: add PWMs
In reply to Adrien GrasseinAdd description for the four PWMs.
--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+)
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +51 -0
@@ -205,6 +205,33 @@ rtc@68 { }; }; +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +&pwm2 { + assigned-clocks = <&clk IMX8MM_CLK_PWM2>; + assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_40M>; + assigned-clock-rates = <40000000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + status = "okay"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "okay"; +}; + /* BT */ &uart1 { pinctrl-names = "default";
@@ -368,6 +395,30 @@ MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0 >; }; + pinctrl_pwm1: pwm1grp { + fsl,pins = < + MX8MM_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x16 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x16 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX8MM_IOMUXC_SPDIF_TX_PWM3_OUT 0x16 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX8MM_IOMUXC_SAI3_MCLK_PWM4_OUT 0x16 + >; + }; + pinctrl_reg_wlan_vmmc: reg-wlan-vmmcgrp { fsl,pins = < MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
Signature · 1 line
2.25.1
PATCH v2 6/8 arm64: dts: imx8mm-nitrogen-r2: add FlexSPI
In reply to Adrien GrasseinAdd FlexSPI description an pin muxing.
--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +17 -0
@@ -79,6 +79,12 @@ ethphy0: ethernet-phy@4 { }; }; +&flexspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexspi>; + status = "okay"; +}; + &i2c1 { clock-frequency = <100000>; pinctrl-names = "default";
@@ -368,6 +374,17 @@ MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x159 >; }; + pinctrl_flexspi: flexspigrp { + fsl,pins = < + MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2 + MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 + MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 + MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 + MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 + MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 + >; + }; + pinctrl_hog: hoggrp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x09
Signature · 1 line
2.25.1
PATCH v2 7/8 arm64: dts: imx8mm-nitrogen-r2: add audio
In reply to Adrien GrasseinAdd audio description and pin muxing.
--- .../boot/dts/freescale/imx8mm-nitrogen-r2.dts | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+)
arch/arm64/boot/dts/freescale/imx8mm-nitrogen-r2.dts +86 -0
@@ -28,6 +28,29 @@ reg_wlan_vmmc: regulator-wlan-vmmc { gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; enable-active-high; }; + + sound-wm8960 { + audio-cpu = <&sai1>; + audio-codec = <&wm8960>; + audio-routing = + "Headphone Jack", "HP_L", + "Headphone Jack", "HP_R", + "Ext Spk", "SPK_LP", + "Ext Spk", "SPK_LN", + "Ext Spk", "SPK_RP", + "Ext Spk", "SPK_RN", + "RINPUT1", "Mic Jack", + "Mic Jack", "MICB"; + codec-master; + compatible = "fsl,imx-audio-wm8960"; + /* JD2: hp detect high for headphone*/ + hp-det-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; + /* Jack is not stuffed */ + mic-det-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; + model = "wm8960-audio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sound_wm8960>; + }; }; &A53_0 {
@@ -211,6 +234,22 @@ rtc@68 { }; }; +&i2c4 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + status = "okay"; + + wm8960: codec@1a { + compatible = "wlf,wm8960"; + reg = <0x1a>; + clocks = <&clk IMX8MM_CLK_SAI1_ROOT>; + clock-names = "mclk1"; + wlf,shared-lrclk; + #sound-dai-cells = <0>; + }; +}; + &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>;
@@ -238,6 +277,18 @@ &pwm4 { status = "okay"; }; +&sai1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai1>; + status = "okay"; +}; + +&sai2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai2>; + status = "okay"; +}; + /* BT */ &uart1 { pinctrl-names = "default";
@@ -406,6 +457,13 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3 >; }; + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 + >; + }; + pinctrl_i2c3a_rv4162: i2c3a-rv4162grp { fsl,pins = < MX8MM_IOMUXC_SAI2_RXC_GPIO4_IO22 0x1c0
@@ -442,6 +500,34 @@ MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16 >; }; + pinctrl_sai1: sai1grp { + fsl,pins = < + /* wm8960 */ + MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK 0xd6 + MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC 0xd6 + MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK 0xd6 + MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0 0xd6 + MX8MM_IOMUXC_SAI1_RXD0_SAI1_RX_DATA0 0xd6 + >; + }; + + pinctrl_sai2: sai2grp { + fsl,pins = < + /* Bluetooth PCM */ + MX8MM_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6 + MX8MM_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6 + MX8MM_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6 + MX8MM_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6 + >; + }; + + pinctrl_sound_wm8960: sound-wm8960grp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x80 + MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x80 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140
Signature · 1 line
2.25.1
PATCH v2 8/8 arm64: defconfig: Enable wm8960 audio driver.
In reply to Adrien GrasseinThis driver is used by the Nitrogen8m Mini SBC.
--- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+)
arch/arm64/configs/defconfig +1 -0
@@ -764,6 +764,7 @@ CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m CONFIG_SND_SOC_TAS571X=m CONFIG_SND_SOC_WCD934X=m CONFIG_SND_SOC_WM8904=m +CONFIG_SND_SOC_WM8960=m CONFIG_SND_SOC_WM8962=m CONFIG_SND_SOC_WSA881X=m CONFIG_SND_SOC_LPASS_WSA_MACRO=m
Signature · 1 line
2.25.1