clk: add BCM63268 timer clock and reset
Subsystems (3)
cover clk: add BCM63268 timer clock and reset
Broadcom BCM63268 has a timer clock and reset controller which has the following layout:
#define POR_RESET_STATUS (1 << 31) #define HW_RESET_STATUS (1 << 30) #define SW_RESET_STATUS (1 << 29) #define USB_REF_CLKEN (1 << 18) #define UTO_EXTIN_CLKEN (1 << 17) #define UTO_CLK50_SEL (1 << 16) #define FAP2_PLL_CLKEN (1 << 15) #define FAP2_PLL_FREQ_SHIFT 12 #define FAP1_PLL_CLKEN (1 << 11) #define FAP1_PLL_FREQ_SHIFT 8 #define WAKEON_DSL (1 << 7) #define WAKEON_EPHY (1 << 6) #define DSL_ENERGY_DETECT_ENABLE (1 << 4)
#define GPHY_1_ENERGY_DETECT_ENABLE (1 << 3)
#define EPHY_3_ENERGY_DETECT_ENABLE (1 << 2)
#define EPHY_2_ENERGY_DETECT_ENABLE (1 << 1)
#define EPHY_1_ENERGY_DETECT_ENABLE (1 << 0)
Álvaro Fernández Rojas (4):
mips: bmips: add BCM63268 timer clock definitions
mips: bmips: add BCM63268 timer reset definitions
dt-bindings: clock: Add BCM63268 timer binding
clk: bcm: Add BCM63268 timer clock and reset driver
.../clock/brcm,bcm63268-timer-clocks.yaml | 40 +++ drivers/clk/bcm/Kconfig | 9 + drivers/clk/bcm/Makefile | 1 + drivers/clk/bcm/clk-bcm63268-timer.c | 232 ++++++++++++++++++ include/dt-bindings/clock/bcm63268-clock.h | 13 + include/dt-bindings/reset/bcm63268-reset.h | 4 + 6 files changed, 299 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml create mode 100644 drivers/clk/bcm/clk-bcm63268-timer.c
Signature · 1 line
2.20.1
PATCH 1/4 mips: bmips: add BCM63268 timer clock definitions
Add missing timer clock definitions for BCM63268.
--- include/dt-bindings/clock/bcm63268-clock.h | 13 +++++++++++++ 1 file changed, 13 insertions(+)
include/dt-bindings/clock/bcm63268-clock.h +13 -0
@@ -27,4 +27,17 @@#define BCM63268_CLK_TBUS 27#define BCM63268_CLK_ROBOSW250 31 +#define BCM63268_TCLK_EPHY1 0 +#define BCM63268_TCLK_EPHY2 1 +#define BCM63268_TCLK_EPHY3 2 +#define BCM63268_TCLK_GPHY1 3 +#define BCM63268_TCLK_DSL 4 +#define BCM63268_TCLK_WAKEON_EPHY 6 +#define BCM63268_TCLK_WAKEON_DSL 7 +#define BCM63268_TCLK_FAP1 11 +#define BCM63268_TCLK_FAP2 15 +#define BCM63268_TCLK_UTO_50 16 +#define BCM63268_TCLK_UTO_EXTIN 17 +#define BCM63268_TCLK_USB_REF 18 +#endif /* __DT_BINDINGS_CLOCK_BCM63268_H */
Signature · 1 line
2.20.1
Re: [PATCH 1/4] mips: bmips: add BCM63268 timer clock definitions
Quoted 7 lines · Álvaro Fernández Rojas
Add missing timer clock definitions for BCM63268.
Signed-off-by Álvaro Fernández Rojas <[email protected]>--- include/dt-bindings/clock/bcm63268-clock.h | 13 +++++++++++++ 1 file changed, 13 insertions(+)
Stephen Boyd
maintainerRe: [PATCH 1/4] mips: bmips: add BCM63268 timer clock definitions
In reply to Álvaro Fernández RojasSubject should probably be clk related instead of mips prefixed. Or
dt-bindings: clk: ?
PATCH 2/4 mips: bmips: add BCM63268 timer reset definitions
In reply to Álvaro Fernández RojasAdd missing timer reset definitions for BCM63268.
--- include/dt-bindings/reset/bcm63268-reset.h | 4 ++++ 1 file changed, 4 insertions(+)
include/dt-bindings/reset/bcm63268-reset.h +4 -0
@@ -23,4 +23,8 @@#define BCM63268_RST_PCIE_HARD 17#define BCM63268_RST_GPHY 18 +#define BCM63268_TRST_SW 29 +#define BCM63268_TRST_HW 30 +#define BCM63268_TRST_POR 31 +#endif /* __DT_BINDINGS_RESET_BCM63268_H */
Signature · 1 line
2.20.1
Rob Herring
maintainerRe: [PATCH 2/4] mips: bmips: add BCM63268 timer reset definitions
Quoted 12 lines · Álvaro Fernández Rojas
Add missing timer reset definitions for BCM63268.
Signed-off-by Álvaro Fernández Rojas <[email protected]>--- include/dt-bindings/reset/bcm63268-reset.h | 4 ++++ 1 file changed, 4 insertions(+)include/dt-bindings/reset/bcm63268-reset.h +0
-0
include/dt-bindings/reset/bcm63268-reset.h line 28
Quoted 6 lines
include/dt-bindings/reset/bcm63268-reset.h +3
-0@@ -23,4 +23,8 @@#define BCM63268_RST_PCIE_HARD 17#define BCM63268_RST_GPHY 18 +#define BCM63268_TRST_SW 29 +#define BCM63268_TRST_HW 30 +#define BCM63268_TRST_POR 31
Numbering should be local to the provider, so shouldn't this be 0-2? Unless these numbers correspond to something in the h/w (bit positions for example).
Quoted 5 lines
include/dt-bindings/reset/bcm63268-reset.h +1
-0+#endif /* __DT_BINDINGS_RESET_BCM63268_H */ Signature · 1 line
2.20.1
Re: [PATCH 2/4] mips: bmips: add BCM63268 timer reset definitions
Hi Rob,
Quoted 16 lines · Rob Herring
Quoted 15 lines · Álvaro Fernández Rojas
Add missing timer reset definitions for BCM63268.
Signed-off-by Álvaro Fernández Rojas <[email protected]>--- include/dt-bindings/reset/bcm63268-reset.h | 4 ++++ 1 file changed, 4 insertions(+)include/dt-bindings/reset/bcm63268-reset.h +0
-0@@ -23,4 +23,8 @@#define BCM63268_RST_PCIE_HARD 17#define BCM63268_RST_GPHY 18
Quoted 7 lines
include/dt-bindings/reset/bcm63268-reset.h line 28
Quoted 3 lines
include/dt-bindings/reset/bcm63268-reset.h +3
-0+#define BCM63268_TRST_SW 29 +#define BCM63268_TRST_HW 30 +#define BCM63268_TRST_POR 31Numbering should be local to the provider, so shouldn't this be 0-2? Unless these numbers correspond to something in the h/w (bit positions for example).
Numbering corresponds to bit positions in the HW:
uint32 ClkRstCtl; #define POR_RESET_STATUS (1 << 31) #define HW_RESET_STATUS (1 << 30) #define SW_RESET_STATUS (1 << 29) #define USB_REF_CLKEN (1 << 18) #define UTO_EXTIN_CLKEN (1 << 17) #define UTO_CLK50_SEL (1 << 16) #define FAP2_PLL_CLKEN (1 << 15) #define FAP2_PLL_FREQ_SHIFT 12 #define FAP1_PLL_CLKEN (1 << 11) #define FAP1_PLL_FREQ_SHIFT 8 #define WAKEON_DSL (1 << 7) #define WAKEON_EPHY (1 << 6) #define DSL_ENERGY_DETECT_ENABLE (1 << 4)
#define GPHY_1_ENERGY_DETECT_ENABLE (1 << 3)
#define EPHY_3_ENERGY_DETECT_ENABLE (1 << 2)
#define EPHY_2_ENERGY_DETECT_ENABLE (1 << 1)
#define EPHY_1_ENERGY_DETECT_ENABLE (1 << 0)
Quoted 6 lines
Quoted 6 lines
include/dt-bindings/reset/bcm63268-reset.h +1
-0+#endif /* __DT_BINDINGS_RESET_BCM63268_H */ Signature · 1 line
2.20.1
Best regards,
Álvaro.
Re: [PATCH 2/4] mips: bmips: add BCM63268 timer reset definitions
Quoted 28 lines · Álvaro Fernández Rojas
Hi Rob,
Quoted 16 lines · Rob Herring
Quoted 15 lines · Álvaro Fernández Rojas
Add missing timer reset definitions for BCM63268.
Signed-off-by Álvaro Fernández Rojas <[email protected]>--- include/dt-bindings/reset/bcm63268-reset.h | 4 ++++ 1 file changed, 4 insertions(+)include/dt-bindings/reset/bcm63268-reset.h +0
-0@@ -23,4 +23,8 @@#define BCM63268_RST_PCIE_HARD 17#define BCM63268_RST_GPHY 18Quoted 7 lines
include/dt-bindings/reset/bcm63268-reset.h line 28
Quoted 3 lines
include/dt-bindings/reset/bcm63268-reset.h +3
-0+#define BCM63268_TRST_SW 29 +#define BCM63268_TRST_HW 30 +#define BCM63268_TRST_POR 31Numbering should be local to the provider, so shouldn't this be 0-2? Unless these numbers correspond to something in the h/w (bit positions for example).
Quoted 1 line
Numbering corresponds to bit positions in the HW:
Okay, good.
PATCH 3/4 dt-bindings: clock: Add BCM63268 timer binding
In reply to Álvaro Fernández RojasDocument the Broadcom BCM63268 Clock and Reset controller.
--- .../clock/brcm,bcm63268-timer-clocks.yaml | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml
Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml new file +40 -0
@@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/brcm,bcm63268-timer-clocks.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM63268 Timer Clock and Reset Device Tree Bindings + +maintainers: + - Álvaro Fernández Rojas <[email protected]> + +properties: + compatible: + const: brcm,bcm63268-timer-clocks + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - "#clock-cells" + - "#reset-cells" + +additionalProperties: false + +examples: + - | + timer_clk: clock-controller@100000ac { + compatible = "brcm,bcm63268-timer-clocks"; + reg = <0x100000ac 0x4>; + #clock-cells = <1>; + #reset-cells = <1>; + };
Signature · 1 line
2.20.1
Re: [PATCH 3/4] dt-bindings: clock: Add BCM63268 timer binding
Quoted 8 lines · Álvaro Fernández Rojas
Document the Broadcom BCM63268 Clock and Reset controller.
Signed-off-by Álvaro Fernández Rojas <[email protected]>--- .../clock/brcm,bcm63268-timer-clocks.yaml | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm63268-timer-clocks.yaml
PATCH 4/4 clk: bcm: Add BCM63268 timer clock and reset driver
In reply to Álvaro Fernández RojasAdd driver for BCM63268 timer clock and reset controller.
--- drivers/clk/bcm/Kconfig | 9 ++ drivers/clk/bcm/Makefile | 1 + drivers/clk/bcm/clk-bcm63268-timer.c | 232 +++++++++++++++++++++++++++ 3 files changed, 242 insertions(+) create mode 100644 drivers/clk/bcm/clk-bcm63268-timer.c
drivers/clk/bcm/Kconfig +9 -0
@@ -37,6 +37,15 @@ config CLK_BCM_63XX_GATE Enable common clock framework support for Broadcom BCM63xx DSL SoCs based on the MIPS architecture +config CLK_BCM63268_TIMER + bool "Broadcom BCM63268 timer clock and reset support" + depends on BMIPS_GENERIC || COMPILE_TEST + default BMIPS_GENERIC + select RESET_CONTROLLER + help + Enable timer clock and reset support for Broadcom BCM63268 DSL SoCs + based on the MIPS architecture. + config CLK_BCM_KONA bool "Broadcom Kona CCU clock support" depends on ARCH_BCM_MOBILE || COMPILE_TEST
drivers/clk/bcm/Makefile +1 -0
@@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 obj-$(CONFIG_CLK_BCM_63XX) += clk-bcm63xx.o obj-$(CONFIG_CLK_BCM_63XX_GATE) += clk-bcm63xx-gate.o +obj-$(CONFIG_CLK_BCM63268_TIMER) += clk-bcm63268-timer.o obj-$(CONFIG_CLK_BCM_KONA) += clk-kona.o obj-$(CONFIG_CLK_BCM_KONA) += clk-kona-setup.o obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o
drivers/clk/bcm/clk-bcm63268-timer.c new file +232 -0
232 lines not on this page · raw message
Signature · 1 line
2.20.1
kernel test robot
build botRe: [PATCH 4/4] clk: bcm: Add BCM63268 timer clock and reset driver
Thank you for the patch! Yet something to improve:
Hi "Álvaro,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on robh/for-next pza/reset/next v5.12-rc1 next-20210303] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/lvaro-Fern-ndez-Rojas/clk-add-BCM63268-timer-clock-and-reset/20210226-034945 base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next config: sparc-allyesconfig (attached as .config) compiler: sparc64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/f6057c7d442f720a3824acc27e306a67344348ce
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review lvaro-Fern-ndez-Rojas/clk-add-BCM63268-timer-clock-and-reset/20210226-034945 git checkout f6057c7d442f720a3824acc27e306a67344348ce
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=sparc
If you fix the issue, kindly add following tag as appropriate
All errors (new ones prefixed by >>):
drivers/clk/bcm/clk-bcm63268-timer.c: In function 'bcm63268_timer_reset_update':
>> drivers/clk/bcm/clk-bcm63268-timer.c:91:8: error: implicit declaration of function '__raw_readl'; did you mean '__raw_read_lock'? [-Werror=implicit-function-declaration]
91 | val = __raw_readl(reset->regs);
| ^~~~~~~~~~~
| __raw_read_lock
>> drivers/clk/bcm/clk-bcm63268-timer.c:96:2: error: implicit declaration of function '__raw_writel'; did you mean '__raw_write_lock'? [-Werror=implicit-function-declaration]
96 | __raw_writel(val, reset->regs);
| ^~~~~~~~~~~~
| __raw_write_lockcc1: some warnings being treated as errors
vim +91 drivers/clk/bcm/clk-bcm63268-timer.c
82
83 static int bcm63268_timer_reset_update(struct reset_controller_dev *rcdev,
84 unsigned long id, bool assert)
85 {
86 struct bcm63268_tclkrst_hw *reset = to_bcm63268_timer_reset(rcdev);
87 unsigned long flags;
88 uint32_t val;
89
90 spin_lock_irqsave(&reset->lock, flags);
> 91 val = __raw_readl(reset->regs);
92 if (assert)
93 val &= ~BIT(id);
94 else
95 val |= BIT(id);
> 96 __raw_writel(val, reset->regs);
97 spin_unlock_irqrestore(&reset->lock, flags);
98
99 return 0; 100 }
101
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
Stephen Boyd
maintainerRe: [PATCH 4/4] clk: bcm: Add BCM63268 timer clock and reset driver
Quoting kernel test robot (2021-03-03 22:22:44)
Quoted 24 lines
Hi "Álvaro,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on robh/for-next pza/reset/next v5.12-rc1 next-20210303] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]url: https://github.com/0day-ci/linux/commits/lvaro-Fern-ndez-Rojas/clk-add-BCM63268-timer-clock-and-reset/20210226-034945 base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next config: sparc-allyesconfig (attached as .config) compiler: sparc64-linux-gcc (GCC) 9.3.0reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/f6057c7d442f720a3824acc27e306a67344348ce
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review lvaro-Fern-ndez-Rojas/clk-add-BCM63268-timer-clock-and-reset/20210226-034945 git checkoutf6057c7d442f720a3824acc27e306a67344348ce
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=sparc
Quoted 8 lines
If you fix the issue, kindly add following tag as appropriate
Reported-by kernel test robot <[email protected]>All errors (new ones prefixed by >>):
drivers/clk/bcm/clk-bcm63268-timer.c: In function 'bcm63268_timer_reset_update':Quoted 1 line
Quoted 1 line
drivers/clk/bcm/clk-bcm63268-timer.c:91:8: error: implicit declaration of function '__raw_readl'; did you mean '__raw_read_lock'? [-Werror=implicit-function-declaration]91 | val = __raw_readl(reset->regs);
Please use readl() and writel() unless it needs to be raw to avoid some barrier? In which case relaxed should be used.
Re: [PATCH 4/4] clk: bcm: Add BCM63268 timer clock and reset driver
Quoted 28 lines · Stephen Boyd
Quoting kernel test robot (2021-03-03 22:22:44)
Quoted 27 lines
Hi "Álvaro,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on clk/clk-next]
[also build test ERROR on robh/for-next pza/reset/next v5.12-rc1 next-20210303] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]url: https://github.com/0day-ci/linux/commits/lvaro-Fern-ndez-Rojas/clk-add-BCM63268-timer-clock-and-reset/20210226-034945 base: https://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git clk-next config: sparc-allyesconfig (attached as .config) compiler: sparc64-linux-gcc (GCC) 9.3.0reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/f6057c7d442f720a3824acc27e306a67344348ce
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review lvaro-Fern-ndez-Rojas/clk-add-BCM63268-timer-clock-and-reset/20210226-034945 git checkoutf6057c7d442f720a3824acc27e306a67344348ce
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=sparcIf you fix the issue, kindly add following tag as appropriate
Reported-by kernel test robot <[email protected]>
Quoted 8 lines
Quoted 5 lines
All errors (new ones prefixed by >>):
drivers/clk/bcm/clk-bcm63268-timer.c: In function 'bcm63268_timer_reset_update':Quoted 1 line
Quoted 1 line
drivers/clk/bcm/clk-bcm63268-timer.c:91:8: error: implicit declaration of function '__raw_readl'; did you mean '__raw_read_lock'? [-Werror=implicit-function-declaration]91 | val = __raw_readl(reset->regs);Please use
readl()andwritel()unless it needs to be raw to avoid some barrier? In which case relaxed should be used.
__raw_readl() should be used here or ioread32be() because these peripherals are always to be accessed with the native CPU endian through the BUS infrastructure (UBUS). UBUS is also non-reodering, non-posting and non-gathering so no barrier needed.
Signature · 1 line
Florian
Stephen Boyd
maintainerRe: [PATCH 4/4] clk: bcm: Add BCM63268 timer clock and reset driver
In reply to Álvaro Fernández RojasQuoting Alvaro Fernandez Rojas (2021-02-25 11:42:01)
Quoted 6 lines
drivers/clk/bcm/clk-bcm63268-timer.c new file +0
-0
drivers/clk/bcm/clk-bcm63268-timer.c line 10
Quoted 10 lines
drivers/clk/bcm/clk-bcm63268-timer.c new file +10
-0@@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0 +/* +* BCM63268 Timer Clock and Reset Controller Driver +* +* Copyright (C) 2021 Álvaro Fernández Rojas <[email protected]> +*/ + +#include <linux/clk-provider.h> +#include <linux/delay.h> +#include <linux/init.h>
Is this used?
Quoted 12 lines
drivers/clk/bcm/clk-bcm63268-timer.c new file +12
-0+#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/reset-controller.h> + +#include <dt-bindings/clock/bcm63268-clock.h> + +#define BCM63268_TIMER_RESET_SLEEP_MIN_US 10000 +#define BCM63268_TIMER_RESET_SLEEP_MAX_US 20000 + +struct bcm63268_tclkrst_hw { +void __iomem *regs;
drivers/clk/bcm/clk-bcm63268-timer.c line 32
Quoted 10 lines
drivers/clk/bcm/clk-bcm63268-timer.c new file +10
-0+spinlock_t lock; + +struct reset_controller_dev rcdev; +struct clk_hw_onecell_data data; +}; + +struct bcm63268_tclk_table_entry { +const char *const name; +u8 bit; +unsigned long flags;
This isn't used. Drop it?
Quoted 119 lines
drivers/clk/bcm/clk-bcm63268-timer.c new file +119
-0+}; + +static const struct bcm63268_tclk_table_entry bcm63268_timer_clocks[] = { + { + .name ="ephy1" , + .bit =BCM63268_TCLK_EPHY1 , + }, { + .name ="ephy2" , + .bit =BCM63268_TCLK_EPHY2 , + }, { + .name ="ephy3" , + .bit =BCM63268_TCLK_EPHY3 , + }, { + .name ="gphy1" , + .bit =BCM63268_TCLK_GPHY1 , + }, { + .name ="dsl" , + .bit =BCM63268_TCLK_DSL , + }, { + .name ="wakeon_ephy" , + .bit =BCM63268_TCLK_WAKEON_EPHY , + }, { + .name ="wakeon_dsl" , + .bit =BCM63268_TCLK_WAKEON_DSL , + }, { + .name ="fap1_pll" , + .bit =BCM63268_TCLK_FAP1 , + }, { + .name ="fap2_pll" , + .bit =BCM63268_TCLK_FAP2 , + }, { + .name ="uto_50" , + .bit =BCM63268_TCLK_UTO_50 , + }, { + .name ="uto_extin" , + .bit =BCM63268_TCLK_UTO_EXTIN , + }, { + .name ="usb_ref" , + .bit =BCM63268_TCLK_USB_REF , + }, { +/* sentinel */ + } +}; + +static inline struct bcm63268_tclkrst_hw * +to_bcm63268_timer_reset (struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct bcm63268_tclkrst_hw, rcdev); +} + +static int bcm63268_timer_reset_update (struct reset_controller_dev *rcdev, +unsigned long id,bool assert) +{ +struct bcm63268_tclkrst_hw *reset =to_bcm63268_timer_reset (rcdev); +unsigned long flags; +uint32_t val; + +spin_lock_irqsave (&reset->lock, flags); + val =__raw_readl (reset->regs); +if (assert) + val &= ~BIT (id); +else + val |=BIT (id); +__raw_writel (val, reset->regs); +spin_unlock_irqrestore (&reset->lock, flags); + +return 0 ; +} + +static int bcm63268_timer_reset_assert (struct reset_controller_dev *rcdev, +unsigned long id) +{ +return bcm63268_timer_reset_update (rcdev, id, true); +} + +static int bcm63268_timer_reset_deassert (struct reset_controller_dev *rcdev, +unsigned long id) +{ +return bcm63268_timer_reset_update (rcdev, id, false); +} + +static int bcm63268_timer_reset_reset (struct reset_controller_dev *rcdev, +unsigned long id) +{ +bcm63268_timer_reset_update (rcdev, id, true); +usleep_range (BCM63268_TIMER_RESET_SLEEP_MIN_US , +BCM63268_TIMER_RESET_SLEEP_MAX_US ); + +bcm63268_timer_reset_update (rcdev, id, false); +/* +* Ensure component is taken out reset state by sleeping also after +* deasserting the reset. Otherwise, the component may not be ready +* for operation. +*/ +usleep_range (BCM63268_TIMER_RESET_SLEEP_MIN_US , +BCM63268_TIMER_RESET_SLEEP_MAX_US ); + +return 0 ; +} + +static int bcm63268_timer_reset_status (struct reset_controller_dev *rcdev, +unsigned long id) +{ +struct bcm63268_tclkrst_hw *reset =to_bcm63268_timer_reset (rcdev); + +return !(__raw_readl (reset->regs) &BIT (id)); +} + +static struct reset_control_ops bcm63268_timer_reset_ops = { + .assert = bcm63268_timer_reset_assert, + .deassert = bcm63268_timer_reset_deassert, + .reset = bcm63268_timer_reset_reset, + .status = bcm63268_timer_reset_status, +}; + +static int bcm63268_tclk_probe (struct platform_device *pdev) +{ +struct device *dev = &pdev->dev; +const struct bcm63268_tclk_table_entry *entry, *table;
drivers/clk/bcm/clk-bcm63268-timer.c line 161
Quoted 10 lines
drivers/clk/bcm/clk-bcm63268-timer.c new file +10
-0+struct bcm63268_tclkrst_hw *hw; +u8 maxbit =0 ; +int i, ret; + + table =of_device_get_match_data (dev); +if (!table) +return -EINVAL ; + +for (entry = table; entry->name; entry++) + maxbit =max_t (u8, maxbit, entry->bit);
Is max_t() required? Hopefully just max() can be used.
Quoted 11 lines
drivers/clk/bcm/clk-bcm63268-timer.c new file +11
-0+ maxbit++; + + hw =devm_kzalloc (&pdev->dev,struct_size (hw, data.hws, maxbit), +GFP_KERNEL ); +if (!hw) +return -ENOMEM ; + +platform_set_drvdata (pdev, hw); + +spin_lock_init (&hw->lock); +
drivers/clk/bcm/clk-bcm63268-timer.c line 182
Quoted 10 lines
drivers/clk/bcm/clk-bcm63268-timer.c new file +10
-0+ hw->data.num = maxbit; +for (i =0 ; i < maxbit; i++) + hw->data.hws[i] =ERR_PTR (-ENODEV ); + + hw->regs =devm_platform_ioremap_resource (pdev,0 ); +if (IS_ERR (hw->regs)) +return PTR_ERR (hw->regs); + +for (entry = table; entry->name; entry++) { +struct clk_hw *clk;
Please move this declaration to start of the function instead of local to this loop.
drivers/clk/bcm/clk-bcm63268-timer.c line 195
Quoted 13 lines
drivers/clk/bcm/clk-bcm63268-timer.c new file +13
-0+ + clk =clk_hw_register_gate (dev, entry->name,NULL , + entry->flags, hw->regs, entry->bit, +CLK_GATE_BIG_ENDIAN , &hw->lock); +if (IS_ERR (clk)) { + ret =PTR_ERR (clk); + goto out_err; + } + + hw->data.hws[entry->bit] = clk; + } + + ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get,
Please use devm or unregister this on failure.
drivers/clk/bcm/clk-bcm63268-timer.c line 205
Quoted 10 lines
drivers/clk/bcm/clk-bcm63268-timer.c new file +10
-0+ &hw->data); +if (!ret) +return 0 ; + + hw->rcdev.of_node = dev->of_node; + hw->rcdev.ops = &bcm63268_timer_reset_ops; + + ret =devm_reset_controller_register (dev, &hw->rcdev); +if (ret) +dev_err (dev,"Failed to register reset controller\n" );
Why do we only register reset controller on failure to add the clk hw provider?
Quoted 7 lines
drivers/clk/bcm/clk-bcm63268-timer.c new file +7
-0+ +out_err: +for (i =0 ; i < hw->data.num; i++) { +if (!IS_ERR (hw->data.hws[i])) +clk_hw_unregister_gate (hw->data.hws[i]); + } +