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drm/radeon/ni_dpm: Fix booting bug

PATCH In review Gustavo A. R. Silva 6 participants 15 messages May 9, 2021 – Jul 7, 2021

Subsystems (3)
DRM drivers PowerPC Radeon and amdgpu DRM drivers
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Gustavo A. R. Silva

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PATCH 1/1 drm/radeon/ni_dpm: Fix booting bug

Create new structure NISLANDS_SMC_SWSTATE_SINGLE, as initialState.levels and ACPIState.levels are never actually used as flexible arrays. Those arrays can be used as simple objects of type NISLANDS_SMC_HW_PERFORMANCE_LEVEL, instead.

Currently, the code fails because flexible array _levels_ in struct NISLANDS_SMC_SWSTATE doesn't allow for code that access the first element of initialState.levels and ACPIState.levels arrays:

drivers/gpu/drm/radeon/ni_dpm.c:
1690 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL =
1691 cpu_to_be32(ni_pi->clock_registers.mpll_ad_func_cntl);
...
1903: table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
1904: table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);

because such element cannot exist without previously allocating any dynamic memory for it (which never actually happens).

That's why struct NISLANDS_SMC_SWSTATE should only be used as type for object driverState and new struct SISLANDS_SMC_SWSTATE_SINGLE is created as type for objects initialState, ACPIState and ULVState.

Also, with the change from one-element array to flexible-array member in commit 434fb1e7444a ("drm/radeon/nislands_smc.h: Replace one-element array with flexible-array member in struct NISLANDS_SMC_SWSTATE"), the size of dpmLevels in struct NISLANDS_SMC_STATETABLE should be fixed to be NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE instead of NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1.

Bug https://lore.kernel.org/dri-devel/[email protected]/ open here
Fixes 434fb1e7444a ("drm/radeon/nislands_smc.h: Replace one-element array with flexible-array member in struct NISLANDS_SMC_SWSTATE")
Cc [email protected]
Reported-by Christian Zigotzky <[email protected]>
Tested-by Christian Zigotzky <[email protected]>
Link https://lore.kernel.org/dri-devel/[email protected]/ open here
Signed-off-by Gustavo A. R. Silva <[email protected]>
---
 drivers/gpu/drm/radeon/ni_dpm.c       | 144 +++++++++++++-------------
 drivers/gpu/drm/radeon/nislands_smc.h |  34 +++---
 2 files changed, 94 insertions(+), 84 deletions(-)
drivers/gpu/drm/radeon/ni_dpm.c +73 -71
index dd5ef6493723..769f666335ac 100644
@@ -1687,102 +1687,102 @@ static int ni_populate_smc_initial_state(struct radeon_device *rdev,
 	u32 reg;
 	int ret;
 
-	table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL =
+	table->initialState.level.mclk.vMPLL_AD_FUNC_CNTL =
 		cpu_to_be32(ni_pi->clock_registers.mpll_ad_func_cntl);
-	table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 =
+	table->initialState.level.mclk.vMPLL_AD_FUNC_CNTL_2 =
 		cpu_to_be32(ni_pi->clock_registers.mpll_ad_func_cntl_2);
-	table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =
+	table->initialState.level.mclk.vMPLL_DQ_FUNC_CNTL =
 		cpu_to_be32(ni_pi->clock_registers.mpll_dq_func_cntl);
-	table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 =
+	table->initialState.level.mclk.vMPLL_DQ_FUNC_CNTL_2 =
 		cpu_to_be32(ni_pi->clock_registers.mpll_dq_func_cntl_2);
-	table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL =
+	table->initialState.level.mclk.vMCLK_PWRMGT_CNTL =
 		cpu_to_be32(ni_pi->clock_registers.mclk_pwrmgt_cntl);
-	table->initialState.levels[0].mclk.vDLL_CNTL =
+	table->initialState.level.mclk.vDLL_CNTL =
 		cpu_to_be32(ni_pi->clock_registers.dll_cntl);
-	table->initialState.levels[0].mclk.vMPLL_SS =
+	table->initialState.level.mclk.vMPLL_SS =
 		cpu_to_be32(ni_pi->clock_registers.mpll_ss1);
-	table->initialState.levels[0].mclk.vMPLL_SS2 =
+	table->initialState.level.mclk.vMPLL_SS2 =
 		cpu_to_be32(ni_pi->clock_registers.mpll_ss2);
-	table->initialState.levels[0].mclk.mclk_value =
+	table->initialState.level.mclk.mclk_value =
 		cpu_to_be32(initial_state->performance_levels[0].mclk);
 
-	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL =
+	table->initialState.level.sclk.vCG_SPLL_FUNC_CNTL =
 		cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl);
-	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
+	table->initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 =
 		cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl_2);
-	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 =
+	table->initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 =
 		cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl_3);
-	table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 =
+	table->initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 =
 		cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl_4);
-	table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM =
+	table->initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM =
 		cpu_to_be32(ni_pi->clock_registers.cg_spll_spread_spectrum);
-	table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 =
+	table->initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 =
 		cpu_to_be32(ni_pi->clock_registers.cg_spll_spread_spectrum_2);
-	table->initialState.levels[0].sclk.sclk_value =
+	table->initialState.level.sclk.sclk_value =
 		cpu_to_be32(initial_state->performance_levels[0].sclk);
-	table->initialState.levels[0].arbRefreshState =
+	table->initialState.level.arbRefreshState =
 		NISLANDS_INITIAL_STATE_ARB_INDEX;
 
-	table->initialState.levels[0].ACIndex = 0;
+	table->initialState.level.ACIndex = 0;
 
 	ret = ni_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,
 					initial_state->performance_levels[0].vddc,
-					&table->initialState.levels[0].vddc);
+					&table->initialState.level.vddc);
 	if (!ret) {
 		u16 std_vddc;
 
 		ret = ni_get_std_voltage_value(rdev,
-					       &table->initialState.levels[0].vddc,
+					       &table->initialState.level.vddc,
 					       &std_vddc);
 		if (!ret)
 			ni_populate_std_voltage_value(rdev, std_vddc,
-						      table->initialState.levels[0].vddc.index,
-						      &table->initialState.levels[0].std_vddc);
+						      table->initialState.level.vddc.index,
+						      &table->initialState.level.std_vddc);
 	}
 
 	if (eg_pi->vddci_control)
 		ni_populate_voltage_value(rdev,
 					  &eg_pi->vddci_voltage_table,
 					  initial_state->performance_levels[0].vddci,
-					  &table->initialState.levels[0].vddci);
+					  &table->initialState.level.vddci);
 
-	ni_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd);
+	ni_populate_initial_mvdd_value(rdev, &table->initialState.level.mvdd);
 
 	reg = CG_R(0xffff) | CG_L(0);
-	table->initialState.levels[0].aT = cpu_to_be32(reg);
+	table->initialState.level.aT = cpu_to_be32(reg);
 
-	table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);
+	table->initialState.level.bSP = cpu_to_be32(pi->dsp);
 
 	if (pi->boot_in_gen2)
-		table->initialState.levels[0].gen2PCIE = 1;
+		table->initialState.level.gen2PCIE = 1;
 	else
-		table->initialState.levels[0].gen2PCIE = 0;
+		table->initialState.level.gen2PCIE = 0;
 
 	if (pi->mem_gddr5) {
-		table->initialState.levels[0].strobeMode =
+		table->initialState.level.strobeMode =
 			cypress_get_strobe_mode_settings(rdev,
 							 initial_state->performance_levels[0].mclk);
 
 		if (initial_state->performance_levels[0].mclk > pi->mclk_edc_enable_threshold)
-			table->initialState.levels[0].mcFlags = NISLANDS_SMC_MC_EDC_RD_FLAG | NISLANDS_SMC_MC_EDC_WR_FLAG;
+			table->initialState.level.mcFlags = NISLANDS_SMC_MC_EDC_RD_FLAG | NISLANDS_SMC_MC_EDC_WR_FLAG;
 		else
-			table->initialState.levels[0].mcFlags =  0;
+			table->initialState.level.mcFlags =  0;
 	}
 
 	table->initialState.levelCount = 1;
 
 	table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC;
 
-	table->initialState.levels[0].dpm2.MaxPS = 0;
-	table->initialState.levels[0].dpm2.NearTDPDec = 0;
-	table->initialState.levels[0].dpm2.AboveSafeInc = 0;
-	table->initialState.levels[0].dpm2.BelowSafeInc = 0;
+	table->initialState.level.dpm2.MaxPS = 0;
+	table->initialState.level.dpm2.NearTDPDec = 0;
+	table->initialState.level.dpm2.AboveSafeInc = 0;
+	table->initialState.level.dpm2.BelowSafeInc = 0;
 
 	reg = MIN_POWER_MASK | MAX_POWER_MASK;
-	table->initialState.levels[0].SQPowerThrottle = cpu_to_be32(reg);
+	table->initialState.level.SQPowerThrottle = cpu_to_be32(reg);
 
 	reg = MAX_POWER_DELTA_MASK | STI_SIZE_MASK | LTI_RATIO_MASK;
-	table->initialState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg);
+	table->initialState.level.SQPowerThrottle_2 = cpu_to_be32(reg);
 
 	return 0;
 }

@@ -1813,43 +1813,43 @@ static int ni_populate_smc_acpi_state(struct radeon_device *rdev,
 	if (pi->acpi_vddc) {
 		ret = ni_populate_voltage_value(rdev,
 						&eg_pi->vddc_voltage_table,
-						pi->acpi_vddc, &table->ACPIState.levels[0].vddc);
+						pi->acpi_vddc, &table->ACPIState.level.vddc);
 		if (!ret) {
 			u16 std_vddc;
 
 			ret = ni_get_std_voltage_value(rdev,
-						       &table->ACPIState.levels[0].vddc, &std_vddc);
+						       &table->ACPIState.level.vddc, &std_vddc);
 			if (!ret)
 				ni_populate_std_voltage_value(rdev, std_vddc,
-							      table->ACPIState.levels[0].vddc.index,
-							      &table->ACPIState.levels[0].std_vddc);
+							      table->ACPIState.level.vddc.index,
+							      &table->ACPIState.level.std_vddc);
 		}
 
 		if (pi->pcie_gen2) {
 			if (pi->acpi_pcie_gen2)
-				table->ACPIState.levels[0].gen2PCIE = 1;
+				table->ACPIState.level.gen2PCIE = 1;
 			else
-				table->ACPIState.levels[0].gen2PCIE = 0;
+				table->ACPIState.level.gen2PCIE = 0;
 		} else {
-			table->ACPIState.levels[0].gen2PCIE = 0;
+			table->ACPIState.level.gen2PCIE = 0;
 		}
 	} else {
 		ret = ni_populate_voltage_value(rdev,
 						&eg_pi->vddc_voltage_table,
 						pi->min_vddc_in_table,
-						&table->ACPIState.levels[0].vddc);
+						&table->ACPIState.level.vddc);
 		if (!ret) {
 			u16 std_vddc;
 
 			ret = ni_get_std_voltage_value(rdev,
-						       &table->ACPIState.levels[0].vddc,
+						       &table->ACPIState.level.vddc,
 						       &std_vddc);
 			if (!ret)
 				ni_populate_std_voltage_value(rdev, std_vddc,
-							      table->ACPIState.levels[0].vddc.index,
-							      &table->ACPIState.levels[0].std_vddc);
+							      table->ACPIState.level.vddc.index,
+							      &table->ACPIState.level.std_vddc);
 		}
-		table->ACPIState.levels[0].gen2PCIE = 0;
+		table->ACPIState.level.gen2PCIE = 0;
 	}
 
 	if (eg_pi->acpi_vddci) {

@@ -1857,7 +1857,7 @@ static int ni_populate_smc_acpi_state(struct radeon_device *rdev,
 			ni_populate_voltage_value(rdev,
 						  &eg_pi->vddci_voltage_table,
 						  eg_pi->acpi_vddci,
-						  &table->ACPIState.levels[0].vddci);
+						  &table->ACPIState.level.vddci);
 	}
 
 

@@ -1900,37 +1900,37 @@ static int ni_populate_smc_acpi_state(struct radeon_device *rdev,
 	spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
 	spll_func_cntl_2 |= SCLK_MUX_SEL(4);
 
-	table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
-	table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
-	table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
-	table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
-	table->ACPIState.levels[0].mclk.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
-	table->ACPIState.levels[0].mclk.vDLL_CNTL = cpu_to_be32(dll_cntl);
+	table->ACPIState.level.mclk.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
+	table->ACPIState.level.mclk.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
+	table->ACPIState.level.mclk.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
+	table->ACPIState.level.mclk.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
+	table->ACPIState.level.mclk.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
+	table->ACPIState.level.mclk.vDLL_CNTL = cpu_to_be32(dll_cntl);
 
-	table->ACPIState.levels[0].mclk.mclk_value = 0;
+	table->ACPIState.level.mclk.mclk_value = 0;
 
-	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl);
-	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
-	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
-	table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 = cpu_to_be32(spll_func_cntl_4);
+	table->ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl);
+	table->ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
+	table->ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
+	table->ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_4 = cpu_to_be32(spll_func_cntl_4);
 
-	table->ACPIState.levels[0].sclk.sclk_value = 0;
+	table->ACPIState.level.sclk.sclk_value = 0;
 
-	ni_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd);
+	ni_populate_mvdd_value(rdev, 0, &table->ACPIState.level.mvdd);
 
 	if (eg_pi->dynamic_ac_timing)
-		table->ACPIState.levels[0].ACIndex = 1;
+		table->ACPIState.level.ACIndex = 1;
 
-	table->ACPIState.levels[0].dpm2.MaxPS = 0;
-	table->ACPIState.levels[0].dpm2.NearTDPDec = 0;
-	table->ACPIState.levels[0].dpm2.AboveSafeInc = 0;
-	table->ACPIState.levels[0].dpm2.BelowSafeInc = 0;
+	table->ACPIState.level.dpm2.MaxPS = 0;
+	table->ACPIState.level.dpm2.NearTDPDec = 0;
+	table->ACPIState.level.dpm2.AboveSafeInc = 0;
+	table->ACPIState.level.dpm2.BelowSafeInc = 0;
 
 	reg = MIN_POWER_MASK | MAX_POWER_MASK;
-	table->ACPIState.levels[0].SQPowerThrottle = cpu_to_be32(reg);
+	table->ACPIState.level.SQPowerThrottle = cpu_to_be32(reg);
 
 	reg = MAX_POWER_DELTA_MASK | STI_SIZE_MASK | LTI_RATIO_MASK;
-	table->ACPIState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg);
+	table->ACPIState.level.SQPowerThrottle_2 = cpu_to_be32(reg);
 
 	return 0;
 }

@@ -1980,7 +1980,9 @@ static int ni_init_smc_table(struct radeon_device *rdev)
 	if (ret)
 		return ret;
 
-	table->driverState = table->initialState;
+	table->driverState.flags = table->initialState.flags;
+	table->driverState.levelCount = table->initialState.levelCount;
+	table->driverState.levels[0] = table->initialState.level;
 
 	table->ULVState = table->initialState;
drivers/gpu/drm/radeon/nislands_smc.h +21 -13
index 7395cb6b3cac..42f3bab0f9ee 100644
@@ -143,6 +143,14 @@ struct NISLANDS_SMC_SWSTATE
 
 typedef struct NISLANDS_SMC_SWSTATE NISLANDS_SMC_SWSTATE;
 
+struct NISLANDS_SMC_SWSTATE_SINGLE {
+	uint8_t                             flags;
+	uint8_t                             levelCount;
+	uint8_t                             padding2;
+	uint8_t                             padding3;
+	NISLANDS_SMC_HW_PERFORMANCE_LEVEL   level;
+};
+
 #define NISLANDS_SMC_VOLTAGEMASK_VDDC  0
 #define NISLANDS_SMC_VOLTAGEMASK_MVDD  1
 #define NISLANDS_SMC_VOLTAGEMASK_VDDCI 2

@@ -160,19 +168,19 @@ typedef struct NISLANDS_SMC_VOLTAGEMASKTABLE NISLANDS_SMC_VOLTAGEMASKTABLE;
 
 struct NISLANDS_SMC_STATETABLE
 {
-    uint8_t                             thermalProtectType;
-    uint8_t                             systemFlags;
-    uint8_t                             maxVDDCIndexInPPTable;
-    uint8_t                             extraFlags;
-    uint8_t                             highSMIO[NISLANDS_MAX_NO_VREG_STEPS];
-    uint32_t                            lowSMIO[NISLANDS_MAX_NO_VREG_STEPS];
-    NISLANDS_SMC_VOLTAGEMASKTABLE       voltageMaskTable;
-    PP_NIslands_DPM2Parameters          dpm2Params;
-    NISLANDS_SMC_SWSTATE                initialState;
-    NISLANDS_SMC_SWSTATE                ACPIState;
-    NISLANDS_SMC_SWSTATE                ULVState;
-    NISLANDS_SMC_SWSTATE                driverState;
-    NISLANDS_SMC_HW_PERFORMANCE_LEVEL   dpmLevels[NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1];
+	uint8_t                             thermalProtectType;
+	uint8_t                             systemFlags;
+	uint8_t                             maxVDDCIndexInPPTable;
+	uint8_t                             extraFlags;
+	uint8_t                             highSMIO[NISLANDS_MAX_NO_VREG_STEPS];
+	uint32_t                            lowSMIO[NISLANDS_MAX_NO_VREG_STEPS];
+	NISLANDS_SMC_VOLTAGEMASKTABLE       voltageMaskTable;
+	PP_NIslands_DPM2Parameters          dpm2Params;
+	struct NISLANDS_SMC_SWSTATE_SINGLE  initialState;
+	struct NISLANDS_SMC_SWSTATE_SINGLE  ACPIState;
+	struct NISLANDS_SMC_SWSTATE_SINGLE  ULVState;
+	NISLANDS_SMC_SWSTATE                driverState;
+	NISLANDS_SMC_HW_PERFORMANCE_LEVEL   dpmLevels[NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE];
 };
 
 typedef struct NISLANDS_SMC_STATETABLE NISLANDS_SMC_STATETABLE;
Signature · 6 lines
2.27.0

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/amd-gfx
#1 lore raw
Quoted 32 lines · Gustavo A. R. Silva

Create new structure NISLANDS_SMC_SWSTATE_SINGLE, as initialState.levels and ACPIState.levels are never actually used as flexible arrays. Those arrays can be used as simple objects of type NISLANDS_SMC_HW_PERFORMANCE_LEVEL, instead.

Currently, the code fails because flexible array _levels_ in struct NISLANDS_SMC_SWSTATE doesn't allow for code that access the first element of initialState.levels and ACPIState.levels arrays:

drivers/gpu/drm/radeon/ni_dpm.c:
1690 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL =
1691 cpu_to_be32(ni_pi->clock_registers.mpll_ad_func_cntl);
...
1903: table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
1904: table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);

because such element cannot exist without previously allocating any dynamic memory for it (which never actually happens).

That's why struct NISLANDS_SMC_SWSTATE should only be used as type for object driverState and new struct SISLANDS_SMC_SWSTATE_SINGLE is created as type for objects initialState, ACPIState and ULVState.

Also, with the change from one-element array to flexible-array member in commit 434fb1e7444a ("drm/radeon/nislands_smc.h: Replace one-element array with flexible-array member in struct NISLANDS_SMC_SWSTATE"), the size of dpmLevels in struct NISLANDS_SMC_STATETABLE should be fixed to be NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE instead of NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1.

Quoted 7 lines
Bug https://lore.kernel.org/dri-devel/[email protected]/ open here
Fixes 434fb1e7444a ("drm/radeon/nislands_smc.h: Replace one-element array with flexible-array member in struct NISLANDS_SMC_SWSTATE")
Cc [email protected]
Reported-by Christian Zigotzky <[email protected]>
Tested-by Christian Zigotzky <[email protected]>
Link https://lore.kernel.org/dri-devel/[email protected]/ open here
Signed-off-by Gustavo A. R. Silva <[email protected]>

This seems like a lot of churn just to use flexible arrays. That said, if static checkers are going to keep complaining about single element arrays, I don't mind applying these patches since this code is not likely to change. Applied. Thanks.

Alex

Alex

Quoted 342 lines
---
 drivers/gpu/drm/radeon/ni_dpm.c       | 144 +++++++++++++-------------
 drivers/gpu/drm/radeon/nislands_smc.h |  34 +++---
 2 files changed, 94 insertions(+), 84 deletions(-)
drivers/gpu/drm/radeon/ni_dpm.c +73 -71
index dd5ef6493723..769f666335ac 100644
@@ -1687,102 +1687,102 @@ static int ni_populate_smc_initial_state(struct radeon_device *rdev,
        u32 reg;
        int ret;
 
-       table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL =
+       table->initialState.level.mclk.vMPLL_AD_FUNC_CNTL =
                cpu_to_be32(ni_pi->clock_registers.mpll_ad_func_cntl);
-       table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 =
+       table->initialState.level.mclk.vMPLL_AD_FUNC_CNTL_2 =
                cpu_to_be32(ni_pi->clock_registers.mpll_ad_func_cntl_2);
-       table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =
+       table->initialState.level.mclk.vMPLL_DQ_FUNC_CNTL =
                cpu_to_be32(ni_pi->clock_registers.mpll_dq_func_cntl);
-       table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 =
+       table->initialState.level.mclk.vMPLL_DQ_FUNC_CNTL_2 =
                cpu_to_be32(ni_pi->clock_registers.mpll_dq_func_cntl_2);
-       table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL =
+       table->initialState.level.mclk.vMCLK_PWRMGT_CNTL =
                cpu_to_be32(ni_pi->clock_registers.mclk_pwrmgt_cntl);
-       table->initialState.levels[0].mclk.vDLL_CNTL =
+       table->initialState.level.mclk.vDLL_CNTL =
                cpu_to_be32(ni_pi->clock_registers.dll_cntl);
-       table->initialState.levels[0].mclk.vMPLL_SS =
+       table->initialState.level.mclk.vMPLL_SS =
                cpu_to_be32(ni_pi->clock_registers.mpll_ss1);
-       table->initialState.levels[0].mclk.vMPLL_SS2 =
+       table->initialState.level.mclk.vMPLL_SS2 =
                cpu_to_be32(ni_pi->clock_registers.mpll_ss2);
-       table->initialState.levels[0].mclk.mclk_value =
+       table->initialState.level.mclk.mclk_value =
                cpu_to_be32(initial_state->performance_levels[0].mclk);
 
-       table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL =
+       table->initialState.level.sclk.vCG_SPLL_FUNC_CNTL =
                cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl);
-       table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
+       table->initialState.level.sclk.vCG_SPLL_FUNC_CNTL_2 =
                cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl_2);
-       table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 =
+       table->initialState.level.sclk.vCG_SPLL_FUNC_CNTL_3 =
                cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl_3);
-       table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 =
+       table->initialState.level.sclk.vCG_SPLL_FUNC_CNTL_4 =
                cpu_to_be32(ni_pi->clock_registers.cg_spll_func_cntl_4);
-       table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM =
+       table->initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM =
                cpu_to_be32(ni_pi->clock_registers.cg_spll_spread_spectrum);
-       table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 =
+       table->initialState.level.sclk.vCG_SPLL_SPREAD_SPECTRUM_2 =
                cpu_to_be32(ni_pi->clock_registers.cg_spll_spread_spectrum_2);
-       table->initialState.levels[0].sclk.sclk_value =
+       table->initialState.level.sclk.sclk_value =
                cpu_to_be32(initial_state->performance_levels[0].sclk);
-       table->initialState.levels[0].arbRefreshState =
+       table->initialState.level.arbRefreshState =
                NISLANDS_INITIAL_STATE_ARB_INDEX;
 
-       table->initialState.levels[0].ACIndex = 0;
+       table->initialState.level.ACIndex = 0;
 
        ret = ni_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,
                                        initial_state->performance_levels[0].vddc,
-                                       &table->initialState.levels[0].vddc);
+                                       &table->initialState.level.vddc);
        if (!ret) {
                u16 std_vddc;
 
                ret = ni_get_std_voltage_value(rdev,
-                                              &table->initialState.levels[0].vddc,
+                                              &table->initialState.level.vddc,
                                               &std_vddc);
                if (!ret)
                        ni_populate_std_voltage_value(rdev, std_vddc,
-                                                     table->initialState.levels[0].vddc.index,
-                                                     &table->initialState.levels[0].std_vddc);
+                                                     table->initialState.level.vddc.index,
+                                                     &table->initialState.level.std_vddc);
        }
 
        if (eg_pi->vddci_control)
                ni_populate_voltage_value(rdev,
                                          &eg_pi->vddci_voltage_table,
                                          initial_state->performance_levels[0].vddci,
-                                         &table->initialState.levels[0].vddci);
+                                         &table->initialState.level.vddci);
 
-       ni_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd);
+       ni_populate_initial_mvdd_value(rdev, &table->initialState.level.mvdd);
 
        reg = CG_R(0xffff) | CG_L(0);
-       table->initialState.levels[0].aT = cpu_to_be32(reg);
+       table->initialState.level.aT = cpu_to_be32(reg);
 
-       table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);
+       table->initialState.level.bSP = cpu_to_be32(pi->dsp);
 
        if (pi->boot_in_gen2)
-               table->initialState.levels[0].gen2PCIE = 1;
+               table->initialState.level.gen2PCIE = 1;
        else
-               table->initialState.levels[0].gen2PCIE = 0;
+               table->initialState.level.gen2PCIE = 0;
 
        if (pi->mem_gddr5) {
-               table->initialState.levels[0].strobeMode =
+               table->initialState.level.strobeMode =
                        cypress_get_strobe_mode_settings(rdev,
                                                         initial_state->performance_levels[0].mclk);
 
                if (initial_state->performance_levels[0].mclk > pi->mclk_edc_enable_threshold)
-                       table->initialState.levels[0].mcFlags = NISLANDS_SMC_MC_EDC_RD_FLAG | NISLANDS_SMC_MC_EDC_WR_FLAG;
+                       table->initialState.level.mcFlags = NISLANDS_SMC_MC_EDC_RD_FLAG | NISLANDS_SMC_MC_EDC_WR_FLAG;
                else
-                       table->initialState.levels[0].mcFlags =  0;
+                       table->initialState.level.mcFlags =  0;
        }
 
        table->initialState.levelCount = 1;
 
        table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC;
 
-       table->initialState.levels[0].dpm2.MaxPS = 0;
-       table->initialState.levels[0].dpm2.NearTDPDec = 0;
-       table->initialState.levels[0].dpm2.AboveSafeInc = 0;
-       table->initialState.levels[0].dpm2.BelowSafeInc = 0;
+       table->initialState.level.dpm2.MaxPS = 0;
+       table->initialState.level.dpm2.NearTDPDec = 0;
+       table->initialState.level.dpm2.AboveSafeInc = 0;
+       table->initialState.level.dpm2.BelowSafeInc = 0;
 
        reg = MIN_POWER_MASK | MAX_POWER_MASK;
-       table->initialState.levels[0].SQPowerThrottle = cpu_to_be32(reg);
+       table->initialState.level.SQPowerThrottle = cpu_to_be32(reg);
 
        reg = MAX_POWER_DELTA_MASK | STI_SIZE_MASK | LTI_RATIO_MASK;
-       table->initialState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg);
+       table->initialState.level.SQPowerThrottle_2 = cpu_to_be32(reg);
 
        return 0;
 }

@@ -1813,43 +1813,43 @@ static int ni_populate_smc_acpi_state(struct radeon_device *rdev,
        if (pi->acpi_vddc) {
                ret = ni_populate_voltage_value(rdev,
                                                &eg_pi->vddc_voltage_table,
-                                               pi->acpi_vddc, &table->ACPIState.levels[0].vddc);
+                                               pi->acpi_vddc, &table->ACPIState.level.vddc);
                if (!ret) {
                        u16 std_vddc;
 
                        ret = ni_get_std_voltage_value(rdev,
-                                                      &table->ACPIState.levels[0].vddc, &std_vddc);
+                                                      &table->ACPIState.level.vddc, &std_vddc);
                        if (!ret)
                                ni_populate_std_voltage_value(rdev, std_vddc,
-                                                             table->ACPIState.levels[0].vddc.index,
-                                                             &table->ACPIState.levels[0].std_vddc);
+                                                             table->ACPIState.level.vddc.index,
+                                                             &table->ACPIState.level.std_vddc);
                }
 
                if (pi->pcie_gen2) {
                        if (pi->acpi_pcie_gen2)
-                               table->ACPIState.levels[0].gen2PCIE = 1;
+                               table->ACPIState.level.gen2PCIE = 1;
                        else
-                               table->ACPIState.levels[0].gen2PCIE = 0;
+                               table->ACPIState.level.gen2PCIE = 0;
                } else {
-                       table->ACPIState.levels[0].gen2PCIE = 0;
+                       table->ACPIState.level.gen2PCIE = 0;
                }
        } else {
                ret = ni_populate_voltage_value(rdev,
                                                &eg_pi->vddc_voltage_table,
                                                pi->min_vddc_in_table,
-                                               &table->ACPIState.levels[0].vddc);
+                                               &table->ACPIState.level.vddc);
                if (!ret) {
                        u16 std_vddc;
 
                        ret = ni_get_std_voltage_value(rdev,
-                                                      &table->ACPIState.levels[0].vddc,
+                                                      &table->ACPIState.level.vddc,
                                                       &std_vddc);
                        if (!ret)
                                ni_populate_std_voltage_value(rdev, std_vddc,
-                                                             table->ACPIState.levels[0].vddc.index,
-                                                             &table->ACPIState.levels[0].std_vddc);
+                                                             table->ACPIState.level.vddc.index,
+                                                             &table->ACPIState.level.std_vddc);
                }
-               table->ACPIState.levels[0].gen2PCIE = 0;
+               table->ACPIState.level.gen2PCIE = 0;
        }
 
        if (eg_pi->acpi_vddci) {

@@ -1857,7 +1857,7 @@ static int ni_populate_smc_acpi_state(struct radeon_device *rdev,
                        ni_populate_voltage_value(rdev,
                                                  &eg_pi->vddci_voltage_table,
                                                  eg_pi->acpi_vddci,
-                                                 &table->ACPIState.levels[0].vddci);
+                                                 &table->ACPIState.level.vddci);
        }
 
 

@@ -1900,37 +1900,37 @@ static int ni_populate_smc_acpi_state(struct radeon_device *rdev,
        spll_func_cntl_2 &= ~SCLK_MUX_SEL_MASK;
        spll_func_cntl_2 |= SCLK_MUX_SEL(4);
 
-       table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
-       table->ACPIState.levels[0].mclk.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
-       table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
-       table->ACPIState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
-       table->ACPIState.levels[0].mclk.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
-       table->ACPIState.levels[0].mclk.vDLL_CNTL = cpu_to_be32(dll_cntl);
+       table->ACPIState.level.mclk.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
+       table->ACPIState.level.mclk.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
+       table->ACPIState.level.mclk.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
+       table->ACPIState.level.mclk.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
+       table->ACPIState.level.mclk.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
+       table->ACPIState.level.mclk.vDLL_CNTL = cpu_to_be32(dll_cntl);
 
-       table->ACPIState.levels[0].mclk.mclk_value = 0;
+       table->ACPIState.level.mclk.mclk_value = 0;
 
-       table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl);
-       table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
-       table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
-       table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 = cpu_to_be32(spll_func_cntl_4);
+       table->ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl);
+       table->ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2);
+       table->ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3);
+       table->ACPIState.level.sclk.vCG_SPLL_FUNC_CNTL_4 = cpu_to_be32(spll_func_cntl_4);
 
-       table->ACPIState.levels[0].sclk.sclk_value = 0;
+       table->ACPIState.level.sclk.sclk_value = 0;
 
-       ni_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd);
+       ni_populate_mvdd_value(rdev, 0, &table->ACPIState.level.mvdd);
 
        if (eg_pi->dynamic_ac_timing)
-               table->ACPIState.levels[0].ACIndex = 1;
+               table->ACPIState.level.ACIndex = 1;
 
-       table->ACPIState.levels[0].dpm2.MaxPS = 0;
-       table->ACPIState.levels[0].dpm2.NearTDPDec = 0;
-       table->ACPIState.levels[0].dpm2.AboveSafeInc = 0;
-       table->ACPIState.levels[0].dpm2.BelowSafeInc = 0;
+       table->ACPIState.level.dpm2.MaxPS = 0;
+       table->ACPIState.level.dpm2.NearTDPDec = 0;
+       table->ACPIState.level.dpm2.AboveSafeInc = 0;
+       table->ACPIState.level.dpm2.BelowSafeInc = 0;
 
        reg = MIN_POWER_MASK | MAX_POWER_MASK;
-       table->ACPIState.levels[0].SQPowerThrottle = cpu_to_be32(reg);
+       table->ACPIState.level.SQPowerThrottle = cpu_to_be32(reg);
 
        reg = MAX_POWER_DELTA_MASK | STI_SIZE_MASK | LTI_RATIO_MASK;
-       table->ACPIState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg);
+       table->ACPIState.level.SQPowerThrottle_2 = cpu_to_be32(reg);
 
        return 0;
 }

@@ -1980,7 +1980,9 @@ static int ni_init_smc_table(struct radeon_device *rdev)
        if (ret)
                return ret;
 
-       table->driverState = table->initialState;
+       table->driverState.flags = table->initialState.flags;
+       table->driverState.levelCount = table->initialState.levelCount;
+       table->driverState.levels[0] = table->initialState.level;
 
        table->ULVState = table->initialState;
drivers/gpu/drm/radeon/nislands_smc.h +21 -14
index 7395cb6b3cac..42f3bab0f9ee 100644
@@ -143,6 +143,14 @@ struct NISLANDS_SMC_SWSTATE
 
 typedef struct NISLANDS_SMC_SWSTATE NISLANDS_SMC_SWSTATE;
 
+struct NISLANDS_SMC_SWSTATE_SINGLE {
+       uint8_t                             flags;
+       uint8_t                             levelCount;
+       uint8_t                             padding2;
+       uint8_t                             padding3;
+       NISLANDS_SMC_HW_PERFORMANCE_LEVEL   level;
+};
+
 #define NISLANDS_SMC_VOLTAGEMASK_VDDC  0
 #define NISLANDS_SMC_VOLTAGEMASK_MVDD  1
 #define NISLANDS_SMC_VOLTAGEMASK_VDDCI 2

@@ -160,19 +168,19 @@ typedef struct NISLANDS_SMC_VOLTAGEMASKTABLE NISLANDS_SMC_VOLTAGEMASKTABLE;
 
 struct NISLANDS_SMC_STATETABLE
 {
-    uint8_t                             thermalProtectType;
-    uint8_t                             systemFlags;
-    uint8_t                             maxVDDCIndexInPPTable;
-    uint8_t                             extraFlags;
-    uint8_t                             highSMIO[NISLANDS_MAX_NO_VREG_STEPS];
-    uint32_t                            lowSMIO[NISLANDS_MAX_NO_VREG_STEPS];
-    NISLANDS_SMC_VOLTAGEMASKTABLE       voltageMaskTable;
-    PP_NIslands_DPM2Parameters          dpm2Params;
-    NISLANDS_SMC_SWSTATE                initialState;
-    NISLANDS_SMC_SWSTATE                ACPIState;
-    NISLANDS_SMC_SWSTATE                ULVState;
-    NISLANDS_SMC_SWSTATE                driverState;
-    NISLANDS_SMC_HW_PERFORMANCE_LEVEL   dpmLevels[NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE - 1];
+       uint8_t                             thermalProtectType;
+       uint8_t                             systemFlags;
+       uint8_t                             maxVDDCIndexInPPTable;
+       uint8_t                             extraFlags;
+       uint8_t                             highSMIO[NISLANDS_MAX_NO_VREG_STEPS];
+       uint32_t                            lowSMIO[NISLANDS_MAX_NO_VREG_STEPS];
+       NISLANDS_SMC_VOLTAGEMASKTABLE       voltageMaskTable;
+       PP_NIslands_DPM2Parameters          dpm2Params;
+       struct NISLANDS_SMC_SWSTATE_SINGLE  initialState;
+       struct NISLANDS_SMC_SWSTATE_SINGLE  ACPIState;
+       struct NISLANDS_SMC_SWSTATE_SINGLE  ULVState;
+       NISLANDS_SMC_SWSTATE                driverState;
+       NISLANDS_SMC_HW_PERFORMANCE_LEVEL   dpmLevels[NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE];
 };
 
 typedef struct NISLANDS_SMC_STATETABLE NISLANDS_SMC_STATETABLE;
--

2.27.0

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#2 lore raw

Hi Alex,

Quoted 2 lines · Alex Deucher

On Sun, May 9, 2021 at 6:48 PM Gustavo A. R. Silva <[email protected]> wrote:

[..]

Quoted 9 lines
Quoted 8 lines
Bug https://lore.kernel.org/dri-devel/[email protected]/ open here
Fixes 434fb1e7444a ("drm/radeon/nislands_smc.h: Replace one-element array with flexible-array member in struct NISLANDS_SMC_SWSTATE")
Cc [email protected]
Reported-by Christian Zigotzky <[email protected]>
Tested-by Christian Zigotzky <[email protected]>
Link https://lore.kernel.org/dri-devel/[email protected]/ open here
Signed-off-by Gustavo A. R. Silva <[email protected]>
Quoted 4 lines

This seems like a lot of churn just to use flexible arrays. That said, if static checkers are going to keep complaining about single element arrays, I don't mind applying these patches since this code is not likely to change. Applied. Thanks.

This is not only about the one-element arrays. These fixes (together with commits 434fb1e7444a and 96e27e8d919e) allow us to fix more than a dozen of these out-of-bounds warnings:

drivers/gpu/drm/radeon/ni_dpm.c:2521:20: warning: array subscript 1 is above array bounds of ‘NISLANDS_SMC_HW_PERFORMANCE_LEVEL[1]’ {aka ‘struct NISLANDS_SMC_HW_PERFORMANCE_LEVEL[1]’} [-Warray-bounds]

 2521 |   smc_state->levels[i].dpm2.MaxPS =
      |   ~~~~~~~~~~~~~~~~~^~~

which should be fixed in order to globally enable -Warray-bounds. :)

Thanks!
--
Gustavo

#3 lore raw

Xorg doesn't work anymore after the latest DRM updates

Hi All,

Xorg doesn't work anymore after the latest DRM updates. [1]

Error messages:

Jul 03 08:54:51 Fienix systemd[1]: Starting Light Display Manager...
Jul 03 08:54:51 Fienix systemd[1]: Started Light Display Manager.
Jul 03 08:54:51 Fienix kernel: BUG: Kernel NULL pointer dereference on read at 0x00000010
Jul 03 08:54:51 Fienix kernel: Faulting instruction address: 0xc000000000630750
Jul 03 08:54:51 Fienix kernel: Oops: Kernel access of bad area, sig: 11 [#1]
Jul 03 08:54:51 Fienix kernel: BE PAGE_SIZE=4K PREEMPT SMP NR_CPUS=4 CoreNet Generic
Jul 03 08:54:51 Fienix kernel: Modules linked in: algif_skcipher bnep tuner_simple tuner_types tea5767 tuner tda7432 tvaudio msp3400 bttv tea575x tveeprom videobuf_dma_sg videobuf_core rc_core videodev mc btusb btrtl btbcm btintel bluetooth ecdh_generic ecc uio_pdrv_genirq uio
Jul 03 08:54:51 Fienix kernel: CPU: 3 PID: 4300 Comm: Xorg.wrap Not tainted 5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty #1
Jul 03 08:54:51 Fienix kernel: NIP:  c000000000630750 LR: c00000000060fedc CTR: c000000000630728
Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903470 TRAP: 0300 Not tainted  (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)
Jul 03 08:54:51 Fienix kernel: MSR:  0000000080029002 <CE,EE,ME>  CR: 20000222  XER: 20000000
Jul 03 08:54:51 Fienix kernel: DEAR: 0000000000000010 ESR: 0000000000000000 IRQMASK: 0

                               GPR00: c00000000060fedc c00000008d903710 c00000000190c400 c000000085d59c00
                               GPR04: c00000008d9035b8 ffffffffffffffff c0000000870a4900 c000000085b62d00
                               GPR08: 000000000000000f 0000000000000000 c000000000630728 0000000000000003
                               GPR12: 0000000020000222 c00000003fffeac0 00000000ffe51070 000000000086007c
                               GPR16: 0000000000862820 00000000ffb7ec68 0000000000000000 00000000ffffffff
                               GPR20: 00000000c04064a0 0000000000450088 00000000ffca79e4 5deadbeef0000122
                               GPR24: 5deadbeef0000100 0000000000000000 c0000000876028f0 c000000080bd4000
                               GPR28: c000000087603c48 c000000085d59d78 c000000085d59c00 c000000085d59c78

Jul 03 08:54:51 Fienix kernel: NIP [c000000000630750] .radeon_ttm_bo_destroy+0x28/0xc0
Jul 03 08:54:51 Fienix kernel: LR [c00000000060fedc] .ttm_bo_put+0x2ec/0x344
Jul 03 08:54:51 Fienix kernel: Call Trace:
Jul 03 08:54:51 Fienix kernel: [c00000008d903710] [c00000000060fbe4] .ttm_bo_cleanup_memtype_use+0x54/0x60 (unreliable)
Jul 03 08:54:51 Fienix kernel: [c00000008d903790] [c00000000060fedc] .ttm_bo_put+0x2ec/0x344
Jul 03 08:54:51 Fienix kernel: [c00000008d903820] [c000000000630b50] .radeon_bo_unref+0x28/0x3c
Jul 03 08:54:51 Fienix kernel: [c00000008d9038a0] [c0000000006d1f6c] .radeon_vm_fini+0x1b0/0x1b8
Jul 03 08:54:51 Fienix kernel: [c00000008d903940] [c000000000618e38] .radeon_driver_postclose_kms+0x128/0x178
Jul 03 08:54:51 Fienix kernel: [c00000008d9039e0] [c0000000005deb14] .drm_file_free+0x1d8/0x278
Jul 03 08:54:51 Fienix kernel: [c00000008d903aa0] [c0000000005def00] .drm_release+0x64/0xc8
Jul 03 08:54:51 Fienix kernel: [c00000008d903b30] [c00000000017636c] .__fput+0x11c/0x25c
Jul 03 08:54:51 Fienix kernel: [c00000008d903bd0] [c00000000008b1e8] .task_work_run+0xa4/0xbc
Jul 03 08:54:51 Fienix kernel: [c00000008d903c70] [c000000000004bf4] .do_notify_resume+0x144/0x2f0
Jul 03 08:54:51 Fienix kernel: [c00000008d903d70] [c00000000000b380] .syscall_exit_prepare+0x110/0x130
Jul 03 08:54:51 Fienix kernel: [c00000008d903e10] [c000000000000688] system_call_common+0x100/0x1fc
Jul 03 08:54:51 Fienix kernel: --- interrupt: c00 at 0x3f4f58
Jul 03 08:54:51 Fienix kernel: NIP:  00000000003f4f58 LR: 00000000003f4f2c CTR: 0000000000000000
Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903e80 TRAP: 0c00 Not tainted  (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)
Jul 03 08:54:51 Fienix kernel: MSR:  000000000002d002 <CE,EE,PR,ME>  CR: 20000420  XER: 00000000
Jul 03 08:54:51 Fienix kernel: IRQMASK: 0

                               GPR00: 0000000000000006 00000000ffca66a0 00000000f798a310 0000000000000000
                               GPR04: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
                               GPR08: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
                               GPR12: 0000000000000000 000000000044fff4 00000000ffe51070 000000000086007c
                               GPR16: 0000000000862820 00000000ffb7ec68 0000000000000000 00000000ffffffff
                               GPR20: 00000000c04064a0 0000000000450088 00000000ffca79e4 00000000004317ac
                               GPR24: 00000000004317b8 00000000ffca66d0 0000000000000001 00000000ffca673c
                               GPR28: 0000000000000001 0000000000000000 000000000041cff4 0000000000000003

Jul 03 08:54:51 Fienix kernel: NIP [00000000003f4f58] 0x3f4f58
Jul 03 08:54:51 Fienix kernel: LR [00000000003f4f2c] 0x3f4f2c
Jul 03 08:54:51 Fienix kernel: --- interrupt: c00
Jul 03 08:54:51 Fienix kernel: Instruction dump:
Jul 03 08:54:51 Fienix kernel: 40c2fff4 4e800020 7c0802a6 fbc1fff0 f8010010 3bc3ff88 fbe1fff8 38a0ffff
Jul 03 08:54:51 Fienix kernel: f821ff81 7c7f1b78 e9230168 7fc3f378 <80890010> 4bffff51 e87f0208 38631df8
Jul 03 08:54:51 Fienix kernel: ---[ end trace ddf73d2d70058380 ]---
Jul 03 08:54:51 Fienix kernel:
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Main process exited, code=exited, status=1/FAILURE
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Failed with result 'exit-code'.
Jul 03 08:54:51 Fienix avahi-daemon[3857]: Registering new address record for 2a02:8109:89c0:ebfc:d372:f06c:9247:7d54 on enP4096p4s4.*.
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Scheduled restart job, restart counter is at 1.
Jul 03 08:54:51 Fienix systemd[1]: Stopped Light Display Manager.

----
Systems: A-EON AmigaOne X1000 and X5000 with Radeon HD6970 graphics cards. [2] [3] [4]

The biggest problem is, that I don't have time for bisecting and fixing this issue.

Cheers,
Christian

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e058a84bfddc42ba356a2316f2cf1141974625c9
[2] http://wiki.amiga.org/index.php?title=X5000
[3] https://en.wikipedia.org/wiki/AmigaOne_X1000
[4] https://forum.hyperion-entertainment.com/viewtopic.php?f=58&t=4378

#4 lore raw

Re: Xorg doesn't work anymore after the latest DRM updates

Oh dear, there is another issue after the latest PowerPC updates. The X5000 doesn't boot anymore.

Error messages:

Oops: Exeption in kernel node, sig: 4 [#1]
...
Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004

---

Unfortunately we have two issues at the same time. We are knocked out and unfortunately I don't have any time for bisecting.

- Christian

Quoted 80 lines · Christian Zigotzky

Hi All,

Xorg doesn't work anymore after the latest DRM updates. [1]

Error messages:

Jul 03 08:54:51 Fienix systemd[1]: Starting Light Display Manager...
Jul 03 08:54:51 Fienix systemd[1]: Started Light Display Manager.
Jul 03 08:54:51 Fienix kernel: BUG: Kernel NULL pointer dereference on read at 0x00000010
Jul 03 08:54:51 Fienix kernel: Faulting instruction address: 0xc000000000630750
Jul 03 08:54:51 Fienix kernel: Oops: Kernel access of bad area, sig: 11 [#1]
Jul 03 08:54:51 Fienix kernel: BE PAGE_SIZE=4K PREEMPT SMP NR_CPUS=4 CoreNet Generic
Jul 03 08:54:51 Fienix kernel: Modules linked in: algif_skcipher bnep tuner_simple tuner_types tea5767 tuner tda7432 tvaudio msp3400 bttv tea575x tveeprom videobuf_dma_sg videobuf_core rc_core videodev mc btusb btrtl btbcm btintel bluetooth ecdh_generic ecc uio_pdrv_genirq uio
Jul 03 08:54:51 Fienix kernel: CPU: 3 PID: 4300 Comm: Xorg.wrap Not tainted 5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty #1
Jul 03 08:54:51 Fienix kernel: NIP:  c000000000630750 LR: c00000000060fedc CTR: c000000000630728
Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903470 TRAP: 0300 Not tainted  (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)
Jul 03 08:54:51 Fienix kernel: MSR:  0000000080029002 <CE,EE,ME>  CR: 20000222  XER: 20000000
Jul 03 08:54:51 Fienix kernel: DEAR: 0000000000000010 ESR: 0000000000000000 IRQMASK: 0

                               GPR00: c00000000060fedc c00000008d903710 c00000000190c400 c000000085d59c00
                               GPR04: c00000008d9035b8 ffffffffffffffff c0000000870a4900 c000000085b62d00
                               GPR08: 000000000000000f 0000000000000000 c000000000630728 0000000000000003
                               GPR12: 0000000020000222 c00000003fffeac0 00000000ffe51070 000000000086007c
                               GPR16: 0000000000862820 00000000ffb7ec68 0000000000000000 00000000ffffffff
                               GPR20: 00000000c04064a0 0000000000450088 00000000ffca79e4 5deadbeef0000122
                               GPR24: 5deadbeef0000100 0000000000000000 c0000000876028f0 c000000080bd4000
                               GPR28: c000000087603c48 c000000085d59d78 c000000085d59c00 c000000085d59c78

Jul 03 08:54:51 Fienix kernel: NIP [c000000000630750] .radeon_ttm_bo_destroy+0x28/0xc0
Jul 03 08:54:51 Fienix kernel: LR [c00000000060fedc] .ttm_bo_put+0x2ec/0x344
Jul 03 08:54:51 Fienix kernel: Call Trace:
Jul 03 08:54:51 Fienix kernel: [c00000008d903710] [c00000000060fbe4] .ttm_bo_cleanup_memtype_use+0x54/0x60 (unreliable)
Jul 03 08:54:51 Fienix kernel: [c00000008d903790] [c00000000060fedc] .ttm_bo_put+0x2ec/0x344
Jul 03 08:54:51 Fienix kernel: [c00000008d903820] [c000000000630b50] .radeon_bo_unref+0x28/0x3c
Jul 03 08:54:51 Fienix kernel: [c00000008d9038a0] [c0000000006d1f6c] .radeon_vm_fini+0x1b0/0x1b8
Jul 03 08:54:51 Fienix kernel: [c00000008d903940] [c000000000618e38] .radeon_driver_postclose_kms+0x128/0x178
Jul 03 08:54:51 Fienix kernel: [c00000008d9039e0] [c0000000005deb14] .drm_file_free+0x1d8/0x278
Jul 03 08:54:51 Fienix kernel: [c00000008d903aa0] [c0000000005def00] .drm_release+0x64/0xc8
Jul 03 08:54:51 Fienix kernel: [c00000008d903b30] [c00000000017636c] .__fput+0x11c/0x25c
Jul 03 08:54:51 Fienix kernel: [c00000008d903bd0] [c00000000008b1e8] .task_work_run+0xa4/0xbc
Jul 03 08:54:51 Fienix kernel: [c00000008d903c70] [c000000000004bf4] .do_notify_resume+0x144/0x2f0
Jul 03 08:54:51 Fienix kernel: [c00000008d903d70] [c00000000000b380] .syscall_exit_prepare+0x110/0x130
Jul 03 08:54:51 Fienix kernel: [c00000008d903e10] [c000000000000688] system_call_common+0x100/0x1fc
Jul 03 08:54:51 Fienix kernel: --- interrupt: c00 at 0x3f4f58
Jul 03 08:54:51 Fienix kernel: NIP:  00000000003f4f58 LR: 00000000003f4f2c CTR: 0000000000000000
Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903e80 TRAP: 0c00 Not tainted  (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)
Jul 03 08:54:51 Fienix kernel: MSR:  000000000002d002 <CE,EE,PR,ME>  CR: 20000420  XER: 00000000
Jul 03 08:54:51 Fienix kernel: IRQMASK: 0

                               GPR00: 0000000000000006 00000000ffca66a0 00000000f798a310 0000000000000000
                               GPR04: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
                               GPR08: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
                               GPR12: 0000000000000000 000000000044fff4 00000000ffe51070 000000000086007c
                               GPR16: 0000000000862820 00000000ffb7ec68 0000000000000000 00000000ffffffff
                               GPR20: 00000000c04064a0 0000000000450088 00000000ffca79e4 00000000004317ac
                               GPR24: 00000000004317b8 00000000ffca66d0 0000000000000001 00000000ffca673c
                               GPR28: 0000000000000001 0000000000000000 000000000041cff4 0000000000000003

Jul 03 08:54:51 Fienix kernel: NIP [00000000003f4f58] 0x3f4f58
Jul 03 08:54:51 Fienix kernel: LR [00000000003f4f2c] 0x3f4f2c
Jul 03 08:54:51 Fienix kernel: --- interrupt: c00
Jul 03 08:54:51 Fienix kernel: Instruction dump:
Jul 03 08:54:51 Fienix kernel: 40c2fff4 4e800020 7c0802a6 fbc1fff0 f8010010 3bc3ff88 fbe1fff8 38a0ffff
Jul 03 08:54:51 Fienix kernel: f821ff81 7c7f1b78 e9230168 7fc3f378 <80890010> 4bffff51 e87f0208 38631df8
Jul 03 08:54:51 Fienix kernel: ---[ end trace ddf73d2d70058380 ]---
Jul 03 08:54:51 Fienix kernel:
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Main process exited, code=exited, status=1/FAILURE
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Failed with result 'exit-code'.
Jul 03 08:54:51 Fienix avahi-daemon[3857]: Registering new address record for 2a02:8109:89c0:ebfc:d372:f06c:9247:7d54 on enP4096p4s4.*.
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Scheduled restart job, restart counter is at 1.
Jul 03 08:54:51 Fienix systemd[1]: Stopped Light Display Manager.

----
Systems: A-EON AmigaOne X1000 and X5000 with Radeon HD6970 graphics cards. [2] [3] [4]

The biggest problem is, that I don't have time for bisecting and fixing this issue.

Cheers,
Christian

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e058a84bfddc42ba356a2316f2cf1141974625c9
[2] http://wiki.amiga.org/index.php?title=X5000
[3] https://en.wikipedia.org/wiki/AmigaOne_X1000
[4] https://forum.hyperion-entertainment.com/viewtopic.php?f=58&t=4378

#5 lore raw

[FSL P50xx] IRQ issues

Hi All,

Our FSL P50xx machines don't boot anymore because of IRQ issues. [1]

Please check the IRQ changes in the latest PowerPC updates 5.14-1. [2]

Thanks,
Christian

[1] https://forum.hyperion-entertainment.com/download/file.php?id=2592&mode=view
[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=019b3fd94ba73d3ac615f0537440b81f129821f6

Quoted 18 lines · Christian Zigotzky

Oh dear, there is another issue after the latest PowerPC updates. The X5000 [1] doesn't boot anymore.

Error messages:

Oops: Exeption in kernel node, sig: 4 [#1]
...
Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004

---

Unfortunately we have two issues at the same time. We are knocked out and unfortunately I don't have any time for bisecting.

- Christian

Quoted 3 lines

[1] http://wiki.amiga.org/index.php?title=X5000

reviewer
#6 lore raw

Re: [FSL P50xx] IRQ issues

Excerpts from Christian Zigotzky's message of July 6, 2021 4:49 am:

Quoted 6 lines

Hi All,

Our FSL P50xx machines don't boot anymore because of IRQ issues. [1]

Please check the IRQ changes in the latest PowerPC updates 5.14-1. [2]

Quoted 7 lines

Thanks,
Christian

[1]
https://forum.hyperion-entertainment.com/download/file.php?id=2592&mode=view
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=019b3fd94ba73d3ac615f0537440b81f129821f6

This looks like mtmsrd in the 64e code. I think this should fix it.

QEMU does not seem to trap on this, maybe something to improve.

Thanks,
Nick
--

arch/powerpc/kernel/interrupt_64.S +5 -1
index 4063e8a3f704..d4212d2ff0b5 100644
@@ -311,9 +311,13 @@ END_BTB_FLUSH_SECTION
 	 * trace_hardirqs_off().
 	 */
 	li	r11,IRQS_ALL_DISABLED
-	li	r12,-1 /* Set MSR_EE and MSR_RI */
 	stb	r11,PACAIRQSOFTMASK(r13)
+#ifdef CONFIG_PPC_BOOK3S
+	li	r12,-1 /* Set MSR_EE and MSR_RI */
 	mtmsrd	r12,1
+#else
+	wrteei	1
+#endif
 
 	/* Calling convention has r9 = orig r0, r10 = regs */
 	mr	r9,r0
#7 lore raw

Re: [FSL P50xx] IRQ issues

Hi Nick,

Thanks a lot for your patch! We will test it as soon as possible. You're right that this issue doesn't exist in a virtual e5500 QEMU machine.

Have a nice day,
Christian

Quoted 41 lines · Nicholas Piggin

Excerpts from Christian Zigotzky's message of July 6, 2021 4:49 am:

Quoted 6 lines

Hi All,

Our FSL P50xx machines don't boot anymore because of IRQ issues. [1]

Please check the IRQ changes in the latest PowerPC updates 5.14-1. [2]

Quoted 7 lines

Thanks,
Christian

[1]
https://forum.hyperion-entertainment.com/download/file.php?id=2592&mode=view
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=019b3fd94ba73d3ac615f0537440b81f129821f6

This looks like mtmsrd in the 64e code. I think this should fix it.

QEMU does not seem to trap on this, maybe something to improve.

Thanks,
Nick
--

arch/powerpc/kernel/interrupt_64.S +5 -1
index 4063e8a3f704..d4212d2ff0b5 100644
@@ -311,9 +311,13 @@ END_BTB_FLUSH_SECTION
  	 * trace_hardirqs_off().
  	 */
  	li	r11,IRQS_ALL_DISABLED
-	li	r12,-1 /* Set MSR_EE and MSR_RI */
  	stb	r11,PACAIRQSOFTMASK(r13)
+#ifdef CONFIG_PPC_BOOK3S
+	li	r12,-1 /* Set MSR_EE and MSR_RI */
  	mtmsrd	r12,1
+#else
+	wrteei	1
+#endif
 
  	/* Calling convention has r9 = orig r0, r10 = regs */
  	mr	r9,r0
#8 lore raw

Re: [FSL P50xx] IRQ issues

Hi Nick,

Your patch works (see patch below)! Many thanks for your help! We tested it on an A-EON AmigaOne X5000/20 and in a virtual e5500 QEMU machine today.

Screenshots:

- http://www.skateman.nl/wp-content/uploads/2021/07/Screenshot-at-2021-07-06-113237.png
- https://i.ibb.co/h813RRp/Kernel-5-14-alpha3-Power-PC.png

Thanks,
Christian

Quoted 51 lines · Christian Zigotzky

Hi Nick,

Thanks a lot for your patch! We will test it as soon as possible. You're right that this issue doesn't exist in a virtual e5500 QEMU machine.

Have a nice day,
Christian

Quoted 42 lines · Nicholas Piggin

Excerpts from Christian Zigotzky's message of July 6, 2021 4:49 am:

Quoted 6 lines

Hi All,

Our FSL P50xx machines don't boot anymore because of IRQ issues. [1]

Please check the IRQ changes in the latest PowerPC updates 5.14-1. [2]

Quoted 9 lines

Thanks,
Christian

[1]
https://forum.hyperion-entertainment.com/download/file.php?id=2592&mode=view

[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=019b3fd94ba73d3ac615f0537440b81f129821f6

This looks like mtmsrd in the 64e code. I think this should fix it.

QEMU does not seem to trap on this, maybe something to improve.

Thanks,
Nick

arch/powerpc/kernel/interrupt_64.S +0 -0
index 4063e8a3f704..d4212d2ff0b5 100644
@@ -311,9 +311,13 @@ END_BTB_FLUSH_SECTION
        * trace_hardirqs_off().
        */

      li    r11,IRQS_ALL_DISABLED
-    li    r12,-1 /* Set MSR_EE and MSR_RI */
      stb    r11,PACAIRQSOFTMASK(r13)
+#ifdef CONFIG_PPC_BOOK3S
+    li    r12,-1 /* Set MSR_EE and MSR_RI */
      mtmsrd    r12,1

arch/powerpc/kernel/interrupt_64.S +3 -0
+#else
+    wrteei    1
+#endif

        /* Calling convention has r9 = orig r0, r10 = regs */ mr    r9,r0

reviewer
#9 lore raw

Re: [FSL P50xx] IRQ issues

Nice, thanks for reporting and testing. I submitted a qemu patch to hopefully avoid this happening again in future.

Thanks,
Nick

Excerpts from Christian Zigotzky's message of July 7, 2021 1:22 am:

Quoted 71 lines

Hi Nick,

Your patch works (see patch below)! Many thanks for your help! We tested it on an A-EON AmigaOne X5000/20 and in a virtual e5500 QEMU machine today.

Screenshots:

-
http://www.skateman.nl/wp-content/uploads/2021/07/Screenshot-at-2021-07-06-113237.png
- https://i.ibb.co/h813RRp/Kernel-5-14-alpha3-Power-PC.png

Thanks,
Christian

Quoted 54 lines · Christian Zigotzky

Hi Nick,

Thanks a lot for your patch! We will test it as soon as possible. You're right that this issue doesn't exist in a virtual e5500 QEMU machine.

Have a nice day,
Christian

Quoted 43 lines · Nicholas Piggin

Excerpts from Christian Zigotzky's message of July 6, 2021 4:49 am:

Quoted 6 lines

Hi All,

Our FSL P50xx machines don't boot anymore because of IRQ issues. [1]

Please check the IRQ changes in the latest PowerPC updates 5.14-1. [2]

Quoted 9 lines

Thanks,
Christian

[1]
https://forum.hyperion-entertainment.com/download/file.php?id=2592&mode=view

[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=019b3fd94ba73d3ac615f0537440b81f129821f6

This looks like mtmsrd in the 64e code. I think this should fix it.

QEMU does not seem to trap on this, maybe something to improve.

Thanks,
Nick

arch/powerpc/kernel/interrupt_64.S +0 -0
index 4063e8a3f704..d4212d2ff0b5 100644
@@ -311,9 +311,13 @@ END_BTB_FLUSH_SECTION
        * trace_hardirqs_off().
        */

      li    r11,IRQS_ALL_DISABLED
-    li    r12,-1 /* Set MSR_EE and MSR_RI */
      stb    r11,PACAIRQSOFTMASK(r13)
+#ifdef CONFIG_PPC_BOOK3S
+    li    r12,-1 /* Set MSR_EE and MSR_RI */
      mtmsrd    r12,1

arch/powerpc/kernel/interrupt_64.S +3 -0
+#else
+    wrteei    1
+#endif

        /* Calling convention has r9 = orig r0, r10 = regs */ mr    r9,r0

reviewer
#10 lore raw

Re: [FSL P50xx] IRQ issues

In reply to Nicholas Piggin

Excerpts from Nicholas Piggin's message of July 6, 2021 9:36 am:

Quoted 10 lines

Excerpts from Christian Zigotzky's message of July 6, 2021 4:49 am:

Quoted 9 lines

Hi All,

Our FSL P50xx machines don't boot anymore because of IRQ issues. [1]

Please check the IRQ changes in the latest PowerPC updates 5.14-1. [2]

Thanks,
Christian

Quoted 8 lines
Quoted 4 lines

[1]
https://forum.hyperion-entertainment.com/download/file.php?id=2592&mode=view
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=019b3fd94ba73d3ac615f0537440b81f129821f6

This looks like mtmsrd in the 64e code. I think this should fix it.

QEMU does not seem to trap on this, maybe something to improve.

With a patch to qemu to make it take an illegal instruction on mtmsrd I can reproduce basically what you have, and this patch makes it work. I think this is the best short term fix.

Thanks,
Nick

Quoted 25 lines

Thanks,
Nick
--

arch/powerpc/kernel/interrupt_64.S +5 -1
index 4063e8a3f704..d4212d2ff0b5 100644
@@ -311,9 +311,13 @@ END_BTB_FLUSH_SECTION
 	 * trace_hardirqs_off().
 	 */
 	li	r11,IRQS_ALL_DISABLED
-	li	r12,-1 /* Set MSR_EE and MSR_RI */
 	stb	r11,PACAIRQSOFTMASK(r13)
+#ifdef CONFIG_PPC_BOOK3S
+	li	r12,-1 /* Set MSR_EE and MSR_RI */
 	mtmsrd	r12,1
+#else
+	wrteei	1
+#endif
 
 	/* Calling convention has r9 = orig r0, r10 = regs */
 	mr	r9,r0
#11 lore raw

Re: Xorg doesn't work anymore after the latest DRM updates

In reply to Christian Zigotzky

Hi Christian,

This issue looks similar to the one Mikel Rychliski fixed recently  : https://patchwork.freedesktop.org/patch/440791. Let us know if this helps.

Regards,

Nirmoy

Quoted 73 lines · Christian Zigotzky

Hi All,

Xorg doesn't work anymore after the latest DRM updates. [1]

Error messages:

Jul 03 08:54:51 Fienix systemd[1]: Starting Light Display Manager...
Jul 03 08:54:51 Fienix systemd[1]: Started Light Display Manager.
Jul 03 08:54:51 Fienix kernel: BUG: Kernel NULL pointer dereference on read at 0x00000010
Jul 03 08:54:51 Fienix kernel: Faulting instruction address: 0xc000000000630750
Jul 03 08:54:51 Fienix kernel: Oops: Kernel access of bad area, sig: 11 [#1]
Jul 03 08:54:51 Fienix kernel: BE PAGE_SIZE=4K PREEMPT SMP NR_CPUS=4 CoreNet Generic
Jul 03 08:54:51 Fienix kernel: Modules linked in: algif_skcipher bnep tuner_simple tuner_types tea5767 tuner tda7432 tvaudio msp3400 bttv tea575x tveeprom videobuf_dma_sg videobuf_core rc_core videodev mc btusb btrtl btbcm btintel bluetooth ecdh_generic ecc uio_pdrv_genirq uio
Jul 03 08:54:51 Fienix kernel: CPU: 3 PID: 4300 Comm: Xorg.wrap Not tainted 5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty #1
Jul 03 08:54:51 Fienix kernel: NIP:  c000000000630750 LR: c00000000060fedc CTR: c000000000630728
Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903470 TRAP: 0300 Not tainted  (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)
Jul 03 08:54:51 Fienix kernel: MSR:  0000000080029002 <CE,EE,ME>  CR: 20000222  XER: 20000000
Jul 03 08:54:51 Fienix kernel: DEAR: 0000000000000010 ESR: 0000000000000000 IRQMASK: 0

                               GPR00: c00000000060fedc c00000008d903710 c00000000190c400 c000000085d59c00
                               GPR04: c00000008d9035b8 ffffffffffffffff c0000000870a4900 c000000085b62d00
                               GPR08: 000000000000000f 0000000000000000 c000000000630728 0000000000000003
                               GPR12: 0000000020000222 c00000003fffeac0 00000000ffe51070 000000000086007c
                               GPR16: 0000000000862820 00000000ffb7ec68 0000000000000000 00000000ffffffff
                               GPR20: 00000000c04064a0 0000000000450088 00000000ffca79e4 5deadbeef0000122
                               GPR24: 5deadbeef0000100 0000000000000000 c0000000876028f0 c000000080bd4000
                               GPR28: c000000087603c48 c000000085d59d78 c000000085d59c00 c000000085d59c78

Jul 03 08:54:51 Fienix kernel: NIP [c000000000630750] .radeon_ttm_bo_destroy+0x28/0xc0
Jul 03 08:54:51 Fienix kernel: LR [c00000000060fedc] .ttm_bo_put+0x2ec/0x344
Jul 03 08:54:51 Fienix kernel: Call Trace:
Jul 03 08:54:51 Fienix kernel: [c00000008d903710] [c00000000060fbe4] .ttm_bo_cleanup_memtype_use+0x54/0x60 (unreliable)
Jul 03 08:54:51 Fienix kernel: [c00000008d903790] [c00000000060fedc] .ttm_bo_put+0x2ec/0x344
Jul 03 08:54:51 Fienix kernel: [c00000008d903820] [c000000000630b50] .radeon_bo_unref+0x28/0x3c
Jul 03 08:54:51 Fienix kernel: [c00000008d9038a0] [c0000000006d1f6c] .radeon_vm_fini+0x1b0/0x1b8
Jul 03 08:54:51 Fienix kernel: [c00000008d903940] [c000000000618e38] .radeon_driver_postclose_kms+0x128/0x178
Jul 03 08:54:51 Fienix kernel: [c00000008d9039e0] [c0000000005deb14] .drm_file_free+0x1d8/0x278
Jul 03 08:54:51 Fienix kernel: [c00000008d903aa0] [c0000000005def00] .drm_release+0x64/0xc8
Jul 03 08:54:51 Fienix kernel: [c00000008d903b30] [c00000000017636c] .__fput+0x11c/0x25c
Jul 03 08:54:51 Fienix kernel: [c00000008d903bd0] [c00000000008b1e8] .task_work_run+0xa4/0xbc
Jul 03 08:54:51 Fienix kernel: [c00000008d903c70] [c000000000004bf4] .do_notify_resume+0x144/0x2f0
Jul 03 08:54:51 Fienix kernel: [c00000008d903d70] [c00000000000b380] .syscall_exit_prepare+0x110/0x130
Jul 03 08:54:51 Fienix kernel: [c00000008d903e10] [c000000000000688] system_call_common+0x100/0x1fc
Jul 03 08:54:51 Fienix kernel: --- interrupt: c00 at 0x3f4f58
Jul 03 08:54:51 Fienix kernel: NIP:  00000000003f4f58 LR: 00000000003f4f2c CTR: 0000000000000000
Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903e80 TRAP: 0c00 Not tainted  (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)
Jul 03 08:54:51 Fienix kernel: MSR:  000000000002d002 <CE,EE,PR,ME>  CR: 20000420  XER: 00000000
Jul 03 08:54:51 Fienix kernel: IRQMASK: 0

                               GPR00: 0000000000000006 00000000ffca66a0 00000000f798a310 0000000000000000
                               GPR04: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
                               GPR08: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
                               GPR12: 0000000000000000 000000000044fff4 00000000ffe51070 000000000086007c
                               GPR16: 0000000000862820 00000000ffb7ec68 0000000000000000 00000000ffffffff
                               GPR20: 00000000c04064a0 0000000000450088 00000000ffca79e4 00000000004317ac
                               GPR24: 00000000004317b8 00000000ffca66d0 0000000000000001 00000000ffca673c
                               GPR28: 0000000000000001 0000000000000000 000000000041cff4 0000000000000003

Jul 03 08:54:51 Fienix kernel: NIP [00000000003f4f58] 0x3f4f58
Jul 03 08:54:51 Fienix kernel: LR [00000000003f4f2c] 0x3f4f2c
Jul 03 08:54:51 Fienix kernel: --- interrupt: c00
Jul 03 08:54:51 Fienix kernel: Instruction dump:
Jul 03 08:54:51 Fienix kernel: 40c2fff4 4e800020 7c0802a6 fbc1fff0 f8010010 3bc3ff88 fbe1fff8 38a0ffff
Jul 03 08:54:51 Fienix kernel: f821ff81 7c7f1b78 e9230168 7fc3f378 <80890010> 4bffff51 e87f0208 38631df8
Jul 03 08:54:51 Fienix kernel: ---[ end trace ddf73d2d70058380 ]---
Jul 03 08:54:51 Fienix kernel:
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Main process exited, code=exited, status=1/FAILURE
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Failed with result 'exit-code'.
Jul 03 08:54:51 Fienix avahi-daemon[3857]: Registering new address record for 2a02:8109:89c0:ebfc:d372:f06c:9247:7d54 on enP4096p4s4.*.
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Scheduled restart job, restart counter is at 1.
Jul 03 08:54:51 Fienix systemd[1]: Stopped Light Display Manager.

----
Systems: A-EON AmigaOne X1000 and X5000 with Radeon HD6970 graphics cards. [2] [3] [4]

The biggest problem is, that I don't have time for bisecting and fixing this issue.

Quoted 7 lines

Cheers,
Christian

[1] https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ftorvalds%2Flinux.git%2Fcommit%2F%3Fid%3De058a84bfddc42ba356a2316f2cf1141974625c9&amp;data=04%7C01%7Cnirmoy.das%40amd.com%7C768265d3eac043d86e8408d93df546b5%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637608946231764861%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=HuEHizNvWrFmdqsQRErO1ie6Ora83sceTEphzovMzWI%3D&amp;reserved=0
[2] https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwiki.amiga.org%2Findex.php%3Ftitle%3DX5000&amp;data=04%7C01%7Cnirmoy.das%40amd.com%7C768265d3eac043d86e8408d93df546b5%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637608946231774816%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=bQ9Gm%2BVyEldUEj1hhCj4HPHlb799E3d3MRkUJl0gYzw%3D&amp;reserved=0
[3] https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fen.wikipedia.org%2Fwiki%2FAmigaOne_X1000&amp;data=04%7C01%7Cnirmoy.das%40amd.com%7C768265d3eac043d86e8408d93df546b5%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637608946231774816%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=iDPYGp1%2B7N5DUtNX0rcDqA9MkQPjw1EfFGW%2BD2aqc3g%3D&amp;reserved=0
[4] https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fforum.hyperion-entertainment.com%2Fviewtopic.php%3Ff%3D58%26t%3D4378&amp;data=04%7C01%7Cnirmoy.das%40amd.com%7C768265d3eac043d86e8408d93df546b5%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637608946231774816%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000&amp;sdata=ti%2FY3avH3zJUjJ5852lLYUtirhzuKqqmW1zwUcp2u0A%3D&amp;reserved=0

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#12 lore raw

Re: Xorg doesn't work anymore after the latest DRM updates

Hi Nirmoy,

Many thanks for this information. We will test this patch asap.

Have a nice day,
Christian

Quoted 91 lines · Nirmoy

Hi Christian,

This issue looks similar to the one Mikel Rychliski fixed recently  : https://patchwork.freedesktop.org/patch/440791. Let us know if this helps.

Regards,

Nirmoy

Quoted 80 lines · Christian Zigotzky

Hi All,

Xorg doesn't work anymore after the latest DRM updates. [1]

Error messages:

Jul 03 08:54:51 Fienix systemd[1]: Starting Light Display Manager...
Jul 03 08:54:51 Fienix systemd[1]: Started Light Display Manager.
Jul 03 08:54:51 Fienix kernel: BUG: Kernel NULL pointer dereference on read at 0x00000010
Jul 03 08:54:51 Fienix kernel: Faulting instruction address: 0xc000000000630750
Jul 03 08:54:51 Fienix kernel: Oops: Kernel access of bad area, sig: 11 [#1]
Jul 03 08:54:51 Fienix kernel: BE PAGE_SIZE=4K PREEMPT SMP NR_CPUS=4 CoreNet Generic
Jul 03 08:54:51 Fienix kernel: Modules linked in: algif_skcipher bnep tuner_simple tuner_types tea5767 tuner tda7432 tvaudio msp3400 bttv tea575x tveeprom videobuf_dma_sg videobuf_core rc_core videodev mc btusb btrtl btbcm btintel bluetooth ecdh_generic ecc uio_pdrv_genirq uio
Jul 03 08:54:51 Fienix kernel: CPU: 3 PID: 4300 Comm: Xorg.wrap Not tainted 5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty #1
Jul 03 08:54:51 Fienix kernel: NIP:  c000000000630750 LR: c00000000060fedc CTR: c000000000630728
Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903470 TRAP: 0300 Not tainted  (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)
Jul 03 08:54:51 Fienix kernel: MSR:  0000000080029002 <CE,EE,ME>  CR: 20000222  XER: 20000000
Jul 03 08:54:51 Fienix kernel: DEAR: 0000000000000010 ESR: 0000000000000000 IRQMASK: 0

                                GPR00: c00000000060fedc c00000008d903710 c00000000190c400 c000000085d59c00
                                GPR04: c00000008d9035b8 ffffffffffffffff c0000000870a4900 c000000085b62d00
                                GPR08: 000000000000000f 0000000000000000 c000000000630728 0000000000000003
                                GPR12: 0000000020000222 c00000003fffeac0 00000000ffe51070 000000000086007c
                                GPR16: 0000000000862820 00000000ffb7ec68 0000000000000000 00000000ffffffff
                                GPR20: 00000000c04064a0 0000000000450088 00000000ffca79e4 5deadbeef0000122
                                GPR24: 5deadbeef0000100 0000000000000000 c0000000876028f0 c000000080bd4000
                                GPR28: c000000087603c48 c000000085d59d78 c000000085d59c00 c000000085d59c78

Jul 03 08:54:51 Fienix kernel: NIP [c000000000630750] .radeon_ttm_bo_destroy+0x28/0xc0
Jul 03 08:54:51 Fienix kernel: LR [c00000000060fedc] .ttm_bo_put+0x2ec/0x344
Jul 03 08:54:51 Fienix kernel: Call Trace:
Jul 03 08:54:51 Fienix kernel: [c00000008d903710] [c00000000060fbe4] .ttm_bo_cleanup_memtype_use+0x54/0x60 (unreliable)
Jul 03 08:54:51 Fienix kernel: [c00000008d903790] [c00000000060fedc] .ttm_bo_put+0x2ec/0x344
Jul 03 08:54:51 Fienix kernel: [c00000008d903820] [c000000000630b50] .radeon_bo_unref+0x28/0x3c
Jul 03 08:54:51 Fienix kernel: [c00000008d9038a0] [c0000000006d1f6c] .radeon_vm_fini+0x1b0/0x1b8
Jul 03 08:54:51 Fienix kernel: [c00000008d903940] [c000000000618e38] .radeon_driver_postclose_kms+0x128/0x178
Jul 03 08:54:51 Fienix kernel: [c00000008d9039e0] [c0000000005deb14] .drm_file_free+0x1d8/0x278
Jul 03 08:54:51 Fienix kernel: [c00000008d903aa0] [c0000000005def00] .drm_release+0x64/0xc8
Jul 03 08:54:51 Fienix kernel: [c00000008d903b30] [c00000000017636c] .__fput+0x11c/0x25c
Jul 03 08:54:51 Fienix kernel: [c00000008d903bd0] [c00000000008b1e8] .task_work_run+0xa4/0xbc
Jul 03 08:54:51 Fienix kernel: [c00000008d903c70] [c000000000004bf4] .do_notify_resume+0x144/0x2f0
Jul 03 08:54:51 Fienix kernel: [c00000008d903d70] [c00000000000b380] .syscall_exit_prepare+0x110/0x130
Jul 03 08:54:51 Fienix kernel: [c00000008d903e10] [c000000000000688] system_call_common+0x100/0x1fc
Jul 03 08:54:51 Fienix kernel: --- interrupt: c00 at 0x3f4f58
Jul 03 08:54:51 Fienix kernel: NIP:  00000000003f4f58 LR: 00000000003f4f2c CTR: 0000000000000000
Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903e80 TRAP: 0c00 Not tainted  (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)
Jul 03 08:54:51 Fienix kernel: MSR:  000000000002d002 <CE,EE,PR,ME>  CR: 20000420  XER: 00000000
Jul 03 08:54:51 Fienix kernel: IRQMASK: 0

                                GPR00: 0000000000000006 00000000ffca66a0 00000000f798a310 0000000000000000
                                GPR04: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
                                GPR08: 0000000000000000 0000000000000000 0000000000000000 0000000000000000
                                GPR12: 0000000000000000 000000000044fff4 00000000ffe51070 000000000086007c
                                GPR16: 0000000000862820 00000000ffb7ec68 0000000000000000 00000000ffffffff
                                GPR20: 00000000c04064a0 0000000000450088 00000000ffca79e4 00000000004317ac
                                GPR24: 00000000004317b8 00000000ffca66d0 0000000000000001 00000000ffca673c
                                GPR28: 0000000000000001 0000000000000000 000000000041cff4 0000000000000003

Jul 03 08:54:51 Fienix kernel: NIP [00000000003f4f58] 0x3f4f58
Jul 03 08:54:51 Fienix kernel: LR [00000000003f4f2c] 0x3f4f2c
Jul 03 08:54:51 Fienix kernel: --- interrupt: c00
Jul 03 08:54:51 Fienix kernel: Instruction dump:
Jul 03 08:54:51 Fienix kernel: 40c2fff4 4e800020 7c0802a6 fbc1fff0 f8010010 3bc3ff88 fbe1fff8 38a0ffff
Jul 03 08:54:51 Fienix kernel: f821ff81 7c7f1b78 e9230168 7fc3f378 <80890010> 4bffff51 e87f0208 38631df8
Jul 03 08:54:51 Fienix kernel: ---[ end trace ddf73d2d70058380 ]---
Jul 03 08:54:51 Fienix kernel:
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Main process exited, code=exited, status=1/FAILURE
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Failed with result 'exit-code'.
Jul 03 08:54:51 Fienix avahi-daemon[3857]: Registering new address record for 2a02:8109:89c0:ebfc:d372:f06c:9247:7d54 on enP4096p4s4.*.
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Scheduled restart job, restart counter is at 1.
Jul 03 08:54:51 Fienix systemd[1]: Stopped Light Display Manager.

----
Systems: A-EON AmigaOne X1000 and X5000 with Radeon HD6970 graphics cards. [2] [3] [4]

The biggest problem is, that I don't have time for bisecting and fixing this issue.

Cheers,
Christian

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e058a84bfddc42ba356a2316f2cf1141974625c9
[2] http://wiki.amiga.org/index.php?title=X5000
[3] https://en.wikipedia.org/wiki/AmigaOne_X1000
[4] https://forum.hyperion-entertainment.com/viewtopic.php?f=58&t=4378

#13 lore raw

Re: Xorg doesn't work anymore after the latest DRM updates

Hi Nirmoy,

This patch works! Thanks a lot! We tested it on an A-EON AmigaOne X5000/20 today.

Screenshot: http://www.skateman.nl/wp-content/uploads/2021/07/Screenshot-at-2021-07-06-113237.png

Cheers,
Christian

Quoted 154 lines · Christian Zigotzky

Hi Nirmoy,

Many thanks for this information. We will test this patch asap.

Have a nice day,
Christian

Quoted 4 lines · Nirmoy

Hi Christian,

This issue looks similar to the one Mikel Rychliski fixed recently

: https://patchwork.freedesktop.org/patch/440791. Let us know if this helps.

Quoted 16 lines

Regards,

Nirmoy

Quoted 9 lines · Christian Zigotzky

Hi All,

Xorg doesn't work anymore after the latest DRM updates. [1]

Error messages:

Jul 03 08:54:51 Fienix systemd[1]: Starting Light Display Manager...
Jul 03 08:54:51 Fienix systemd[1]: Started Light Display Manager.
Jul 03 08:54:51 Fienix kernel: BUG: Kernel NULL pointer dereference

on read at 0x00000010

Quoted 1 line
Quoted 1 line
Jul 03 08:54:51 Fienix kernel: Faulting instruction address:

0xc000000000630750

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Jul 03 08:54:51 Fienix kernel: Oops: Kernel access of bad area,

sig: 11 [#1]

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Quoted 1 line
Jul 03 08:54:51 Fienix kernel: BE PAGE_SIZE=4K PREEMPT SMP

NR_CPUS=4 CoreNet Generic

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Quoted 1 line
Jul 03 08:54:51 Fienix kernel: Modules linked in: algif_skcipher

bnep tuner_simple tuner_types tea5767 tuner tda7432 tvaudio msp3400 bttv tea575x tveeprom videobuf_dma_sg videobuf_core rc_core videodev mc btusb btrtl btbcm btintel bluetooth ecdh_generic ecc uio_pdrv_genirq uio

Quoted 1 line
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Jul 03 08:54:51 Fienix kernel: CPU: 3 PID: 4300 Comm: Xorg.wrap Not

tainted 5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty #1

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Jul 03 08:54:51 Fienix kernel: NIP:  c000000000630750 LR:

c00000000060fedc CTR: c000000000630728

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Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903470 TRAP: 0300

Not tainted (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)

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Jul 03 08:54:51 Fienix kernel: MSR:  0000000080029002 <CE,EE,ME> 

CR: 20000222  XER: 20000000

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Jul 03 08:54:51 Fienix kernel: DEAR: 0000000000000010 ESR:

0000000000000000 IRQMASK: 0

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                                GPR00: c00000000060fedc

c00000008d903710 c00000000190c400 c000000085d59c00

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                                GPR04: c00000008d9035b8

ffffffffffffffff c0000000870a4900 c000000085b62d00

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                                GPR08: 000000000000000f

0000000000000000 c000000000630728 0000000000000003

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                                GPR12: 0000000020000222

c00000003fffeac0 00000000ffe51070 000000000086007c

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                                GPR16: 0000000000862820

00000000ffb7ec68 0000000000000000 00000000ffffffff

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                                GPR20: 00000000c04064a0

0000000000450088 00000000ffca79e4 5deadbeef0000122

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                                GPR24: 5deadbeef0000100

0000000000000000 c0000000876028f0 c000000080bd4000

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                                GPR28: c000000087603c48

c000000085d59d78 c000000085d59c00 c000000085d59c78

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Jul 03 08:54:51 Fienix kernel: NIP [c000000000630750]

.radeon_ttm_bo_destroy+0x28/0xc0

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Jul 03 08:54:51 Fienix kernel: LR [c00000000060fedc]

.ttm_bo_put+0x2ec/0x344

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Jul 03 08:54:51 Fienix kernel: Call Trace:
Jul 03 08:54:51 Fienix kernel: [c00000008d903710]

[c00000000060fbe4] .ttm_bo_cleanup_memtype_use+0x54/0x60 (unreliable)

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Jul 03 08:54:51 Fienix kernel: [c00000008d903790]

[c00000000060fedc] .ttm_bo_put+0x2ec/0x344

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Jul 03 08:54:51 Fienix kernel: [c00000008d903820]

[c000000000630b50] .radeon_bo_unref+0x28/0x3c

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Jul 03 08:54:51 Fienix kernel: [c00000008d9038a0]

[c0000000006d1f6c] .radeon_vm_fini+0x1b0/0x1b8

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Jul 03 08:54:51 Fienix kernel: [c00000008d903940]

[c000000000618e38] .radeon_driver_postclose_kms+0x128/0x178

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Jul 03 08:54:51 Fienix kernel: [c00000008d9039e0]

[c0000000005deb14] .drm_file_free+0x1d8/0x278

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Jul 03 08:54:51 Fienix kernel: [c00000008d903aa0]

[c0000000005def00] .drm_release+0x64/0xc8

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Jul 03 08:54:51 Fienix kernel: [c00000008d903b30]

[c00000000017636c] .__fput+0x11c/0x25c

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Jul 03 08:54:51 Fienix kernel: [c00000008d903bd0]

[c00000000008b1e8] .task_work_run+0xa4/0xbc

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Jul 03 08:54:51 Fienix kernel: [c00000008d903c70]

[c000000000004bf4] .do_notify_resume+0x144/0x2f0

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Jul 03 08:54:51 Fienix kernel: [c00000008d903d70]

[c00000000000b380] .syscall_exit_prepare+0x110/0x130

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Jul 03 08:54:51 Fienix kernel: [c00000008d903e10]

[c000000000000688] system_call_common+0x100/0x1fc

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Jul 03 08:54:51 Fienix kernel: --- interrupt: c00 at 0x3f4f58
Jul 03 08:54:51 Fienix kernel: NIP:  00000000003f4f58 LR:

00000000003f4f2c CTR: 0000000000000000

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Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903e80 TRAP: 0c00

Not tainted (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)

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Jul 03 08:54:51 Fienix kernel: MSR:  000000000002d002

<CE,EE,PR,ME>  CR: 20000420  XER: 00000000

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Jul 03 08:54:51 Fienix kernel: IRQMASK: 0

                                GPR00: 0000000000000006

00000000ffca66a0 00000000f798a310 0000000000000000

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                                GPR04: 0000000000000000

0000000000000000 0000000000000000 0000000000000000

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                                GPR08: 0000000000000000

0000000000000000 0000000000000000 0000000000000000

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                                GPR12: 0000000000000000

000000000044fff4 00000000ffe51070 000000000086007c

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                                GPR16: 0000000000862820

00000000ffb7ec68 0000000000000000 00000000ffffffff

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                                GPR20: 00000000c04064a0

0000000000450088 00000000ffca79e4 00000000004317ac

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                                GPR24: 00000000004317b8

00000000ffca66d0 0000000000000001 00000000ffca673c

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                                GPR28: 0000000000000001

0000000000000000 000000000041cff4 0000000000000003

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Jul 03 08:54:51 Fienix kernel: NIP [00000000003f4f58] 0x3f4f58
Jul 03 08:54:51 Fienix kernel: LR [00000000003f4f2c] 0x3f4f2c
Jul 03 08:54:51 Fienix kernel: --- interrupt: c00
Jul 03 08:54:51 Fienix kernel: Instruction dump:
Jul 03 08:54:51 Fienix kernel: 40c2fff4 4e800020 7c0802a6 fbc1fff0

f8010010 3bc3ff88 fbe1fff8 38a0ffff

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Jul 03 08:54:51 Fienix kernel: f821ff81 7c7f1b78 e9230168 7fc3f378

<80890010> 4bffff51 e87f0208 38631df8

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Jul 03 08:54:51 Fienix kernel: ---[ end trace ddf73d2d70058380 ]---
Jul 03 08:54:51 Fienix kernel:
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Main process

exited, code=exited, status=1/FAILURE

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Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Failed with

result 'exit-code'.

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Jul 03 08:54:51 Fienix avahi-daemon[3857]: Registering new address

record for 2a02:8109:89c0:ebfc:d372:f06c:9247:7d54 on enP4096p4s4.*.

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Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Scheduled

restart job, restart counter is at 1.

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Jul 03 08:54:51 Fienix systemd[1]: Stopped Light Display Manager.

----
Systems: A-EON AmigaOne X1000 and X5000 with Radeon HD6970 graphics

cards. [2] [3] [4]

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Quoted 2 lines

The biggest problem is, that I don't have time for bisecting and

fixing this issue.

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Quoted 5 lines

Cheers,
Christian

[1]

https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e058a84bfddc42ba356a2316f2cf1141974625c9

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[2] http://wiki.amiga.org/index.php?title=X5000
[3] https://en.wikipedia.org/wiki/AmigaOne_X1000
[4] https://forum.hyperion-entertainment.com/viewtopic.php?f=58&t=4378

#14 lore raw

Re: Xorg doesn't work anymore after the latest DRM updates

Happy to help, Christian :)

Nirmoy

Quoted 168 lines · Christian Zigotzky

Hi Nirmoy,

This patch works! Thanks a lot! We tested it on an A-EON AmigaOne X5000/20 today.

Screenshot: https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.skateman.nl%2Fwp-content%2Fuploads%2F2021%2F07%2FScreenshot-at-2021-07-06-113237.png&amp;data=04%7C01%7Cnirmoy.das%40amd.com%7C1879913cfa594f104bb508d94093713e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637611824271179607%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=JehEsOxoinPX%2BSC8YzjBwKNOFcAquiVwHUS35pf%2FGu4%3D&amp;reserved=0

Cheers,
Christian

Quoted 157 lines · Christian Zigotzky

Hi Nirmoy,

Many thanks for this information. We will test this patch asap.

Have a nice day,
Christian

Quoted 4 lines · Nirmoy

Hi Christian,

This issue looks similar to the one Mikel Rychliski fixed recently

: https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatchwork.freedesktop.org%2Fpatch%2F440791&amp;data=04%7C01%7Cnirmoy.das%40amd.com%7C1879913cfa594f104bb508d94093713e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637611824271179607%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=QaPHA%2FlS%2Bt1wI1Awce6%2FMG2rdUv2Zk1DZMRiR47mcGA%3D&amp;reserved=0. Let us know if this helps.

Quoted 16 lines

Regards,

Nirmoy

Quoted 9 lines · Christian Zigotzky

Hi All,

Xorg doesn't work anymore after the latest DRM updates. [1]

Error messages:

Jul 03 08:54:51 Fienix systemd[1]: Starting Light Display Manager...
Jul 03 08:54:51 Fienix systemd[1]: Started Light Display Manager.
Jul 03 08:54:51 Fienix kernel: BUG: Kernel NULL pointer

dereference on read at 0x00000010

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Jul 03 08:54:51 Fienix kernel: Faulting instruction address:

0xc000000000630750

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Jul 03 08:54:51 Fienix kernel: Oops: Kernel access of bad area,

sig: 11 [#1]

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Jul 03 08:54:51 Fienix kernel: BE PAGE_SIZE=4K PREEMPT SMP

NR_CPUS=4 CoreNet Generic

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Jul 03 08:54:51 Fienix kernel: Modules linked in: algif_skcipher

bnep tuner_simple tuner_types tea5767 tuner tda7432 tvaudio msp3400 bttv tea575x tveeprom videobuf_dma_sg videobuf_core rc_core videodev mc btusb btrtl btbcm btintel bluetooth ecdh_generic ecc uio_pdrv_genirq uio

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Jul 03 08:54:51 Fienix kernel: CPU: 3 PID: 4300 Comm: Xorg.wrap

Not tainted 5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty #1

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Jul 03 08:54:51 Fienix kernel: NIP:  c000000000630750 LR:

c00000000060fedc CTR: c000000000630728

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Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903470 TRAP: 0300

Not tainted (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)

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Jul 03 08:54:51 Fienix kernel: MSR:  0000000080029002 <CE,EE,ME> 

CR: 20000222  XER: 20000000

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Jul 03 08:54:51 Fienix kernel: DEAR: 0000000000000010 ESR:

0000000000000000 IRQMASK: 0

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                                GPR00: c00000000060fedc

c00000008d903710 c00000000190c400 c000000085d59c00

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                                GPR04: c00000008d9035b8

ffffffffffffffff c0000000870a4900 c000000085b62d00

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                                GPR08: 000000000000000f

0000000000000000 c000000000630728 0000000000000003

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                                GPR12: 0000000020000222

c00000003fffeac0 00000000ffe51070 000000000086007c

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                                GPR16: 0000000000862820

00000000ffb7ec68 0000000000000000 00000000ffffffff

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                                GPR20: 00000000c04064a0

0000000000450088 00000000ffca79e4 5deadbeef0000122

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                                GPR24: 5deadbeef0000100

0000000000000000 c0000000876028f0 c000000080bd4000

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                                GPR28: c000000087603c48

c000000085d59d78 c000000085d59c00 c000000085d59c78

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Jul 03 08:54:51 Fienix kernel: NIP [c000000000630750]

.radeon_ttm_bo_destroy+0x28/0xc0

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Jul 03 08:54:51 Fienix kernel: LR [c00000000060fedc]

.ttm_bo_put+0x2ec/0x344

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Jul 03 08:54:51 Fienix kernel: Call Trace:
Jul 03 08:54:51 Fienix kernel: [c00000008d903710]

[c00000000060fbe4] .ttm_bo_cleanup_memtype_use+0x54/0x60 (unreliable)

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Jul 03 08:54:51 Fienix kernel: [c00000008d903790]

[c00000000060fedc] .ttm_bo_put+0x2ec/0x344

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Jul 03 08:54:51 Fienix kernel: [c00000008d903820]

[c000000000630b50] .radeon_bo_unref+0x28/0x3c

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Jul 03 08:54:51 Fienix kernel: [c00000008d9038a0]

[c0000000006d1f6c] .radeon_vm_fini+0x1b0/0x1b8

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Jul 03 08:54:51 Fienix kernel: [c00000008d903940]

[c000000000618e38] .radeon_driver_postclose_kms+0x128/0x178

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Jul 03 08:54:51 Fienix kernel: [c00000008d9039e0]

[c0000000005deb14] .drm_file_free+0x1d8/0x278

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Jul 03 08:54:51 Fienix kernel: [c00000008d903aa0]

[c0000000005def00] .drm_release+0x64/0xc8

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Jul 03 08:54:51 Fienix kernel: [c00000008d903b30]

[c00000000017636c] .__fput+0x11c/0x25c

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Jul 03 08:54:51 Fienix kernel: [c00000008d903bd0]

[c00000000008b1e8] .task_work_run+0xa4/0xbc

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Jul 03 08:54:51 Fienix kernel: [c00000008d903c70]

[c000000000004bf4] .do_notify_resume+0x144/0x2f0

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Jul 03 08:54:51 Fienix kernel: [c00000008d903d70]

[c00000000000b380] .syscall_exit_prepare+0x110/0x130

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Jul 03 08:54:51 Fienix kernel: [c00000008d903e10]

[c000000000000688] system_call_common+0x100/0x1fc

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Jul 03 08:54:51 Fienix kernel: --- interrupt: c00 at 0x3f4f58
Jul 03 08:54:51 Fienix kernel: NIP:  00000000003f4f58 LR:

00000000003f4f2c CTR: 0000000000000000

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Jul 03 08:54:51 Fienix kernel: REGS: c00000008d903e80 TRAP: 0c00

Not tainted (5.14.0-a3_A-EON_X5000-07637-g3dbdb38e2869-dirty)

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Jul 03 08:54:51 Fienix kernel: MSR:  000000000002d002

<CE,EE,PR,ME>  CR: 20000420  XER: 00000000

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Jul 03 08:54:51 Fienix kernel: IRQMASK: 0

                                GPR00: 0000000000000006

00000000ffca66a0 00000000f798a310 0000000000000000

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                                GPR04: 0000000000000000

0000000000000000 0000000000000000 0000000000000000

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                                GPR08: 0000000000000000

0000000000000000 0000000000000000 0000000000000000

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                                GPR12: 0000000000000000

000000000044fff4 00000000ffe51070 000000000086007c

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                                GPR16: 0000000000862820

00000000ffb7ec68 0000000000000000 00000000ffffffff

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                                GPR20: 00000000c04064a0

0000000000450088 00000000ffca79e4 00000000004317ac

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                                GPR24: 00000000004317b8

00000000ffca66d0 0000000000000001 00000000ffca673c

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                                GPR28: 0000000000000001

0000000000000000 000000000041cff4 0000000000000003

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Jul 03 08:54:51 Fienix kernel: NIP [00000000003f4f58] 0x3f4f58
Jul 03 08:54:51 Fienix kernel: LR [00000000003f4f2c] 0x3f4f2c
Jul 03 08:54:51 Fienix kernel: --- interrupt: c00
Jul 03 08:54:51 Fienix kernel: Instruction dump:
Jul 03 08:54:51 Fienix kernel: 40c2fff4 4e800020 7c0802a6 fbc1fff0

f8010010 3bc3ff88 fbe1fff8 38a0ffff

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Jul 03 08:54:51 Fienix kernel: f821ff81 7c7f1b78 e9230168 7fc3f378

<80890010> 4bffff51 e87f0208 38631df8

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Jul 03 08:54:51 Fienix kernel: ---[ end trace ddf73d2d70058380 ]---
Jul 03 08:54:51 Fienix kernel:
Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Main process

exited, code=exited, status=1/FAILURE

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Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Failed with

result 'exit-code'.

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Jul 03 08:54:51 Fienix avahi-daemon[3857]: Registering new address

record for 2a02:8109:89c0:ebfc:d372:f06c:9247:7d54 on enP4096p4s4.*.

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Jul 03 08:54:51 Fienix systemd[1]: lightdm.service: Scheduled

restart job, restart counter is at 1.

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Jul 03 08:54:51 Fienix systemd[1]: Stopped Light Display Manager.

----
Systems: A-EON AmigaOne X1000 and X5000 with Radeon HD6970

graphics cards. [2] [3] [4]

Quoted 2 lines
Quoted 2 lines

The biggest problem is, that I don't have time for bisecting and

fixing this issue.

Quoted 5 lines
Quoted 5 lines

Cheers,
Christian

[1]

https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgit.kernel.org%2Fpub%2Fscm%2Flinux%2Fkernel%2Fgit%2Ftorvalds%2Flinux.git%2Fcommit%2F%3Fid%3De058a84bfddc42ba356a2316f2cf1141974625c9&amp;data=04%7C01%7Cnirmoy.das%40amd.com%7C1879913cfa594f104bb508d94093713e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637611824271179607%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=G2y8f5f7DV708uZg6VLjyg1T%2F2dHjT8i4TtM2uBUA4U%3D&amp;reserved=0

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[2]

https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwiki.amiga.org%2Findex.php%3Ftitle%3DX5000&amp;data=04%7C01%7Cnirmoy.das%40amd.com%7C1879913cfa594f104bb508d94093713e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637611824271179607%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=9HTYhxjWHOZ00NeA9MKwB7tv0Dool2wT%2FfrxZ7kcNLs%3D&amp;reserved=0

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[3]

https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fen.wikipedia.org%2Fwiki%2FAmigaOne_X1000&amp;data=04%7C01%7Cnirmoy.das%40amd.com%7C1879913cfa594f104bb508d94093713e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637611824271179607%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=rKh5xH7kKS1wLz64CIT39d9sBnAXGTMobIZTGbFcC78%3D&amp;reserved=0

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[4]

https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fforum.hyperion-entertainment.com%2Fviewtopic.php%3Ff%3D58%26t%3D4378&amp;data=04%7C01%7Cnirmoy.das%40amd.com%7C1879913cfa594f104bb508d94093713e%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637611824271179607%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&amp;sdata=Yr1WzsrzEhWC5Z7zUVHcWPn9eesHq9XggMtXFYn7seA%3D&amp;reserved=0