MIPS: smp-mt: enable all hardware interrupts on second VPE

From: Aleksander Jan Bajkowski <[email protected]>

This patch is marked as RFC because I'm not sure if it's a good place to put this code.

This patch is needed to handle interrupts by the second VPE on Lantiq. It seems the Lantiq SoC is using all the hardware interrupt lines. Currently changing smp_affinity to the second VPE hangs interrupts.

Tested on lantiq xRX200 and xRX330 (MIPS 34Kc core).

Aleksander Jan Bajkowski (1):
MIPS: smp-mt: enable all hardware interrupts on second VPE

 arch/mips/kernel/smp-mt.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

2.30.2

This patch is needed to handle interrupts by the second VPE on Lantiq. It seems the Lantiq SoC is using all the hardware interrupt lines. Currently changing smp_affinity to the second VPE hangs interrupts.

Tested on lantiq xRX200 and xRX330 (MIPS 34Kc core).

---
 arch/mips/kernel/smp-mt.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

index 5f04a0141068..f21cd0eb1fa7 100644
@@ -113,8 +113,7 @@ static void vsmp_init_secondary(void)
 					 STATUSF_IP4 | STATUSF_IP5 |
 					 STATUSF_IP6 | STATUSF_IP7);
 	else
-		change_c0_status(ST0_IM, STATUSF_IP0 | STATUSF_IP1 |
-					 STATUSF_IP6 | STATUSF_IP7);
+		set_c0_status(ST0_IM);
 }
 
 static void vsmp_smp_finish(void)

2.30.2