Skip to contentSkip to conversation

ASoC: qcom: Add four speaker support on MI2S secondary

PATCH In review Srinivasa Rao Mandadapu 4 participants 4 messages Jun 9, 2021 – Jun 14, 2021

Subsystems (4)
lore
Share & tools
lore
#0 lore raw

PATCH v3 1/1 ASoC: qcom: Add four speaker support on MI2S secondary

Add four speaker support on MI2S secondary block by using I2S SD1 line on gpio52 pin, and add channel map control support in the lpass-cpu audio driver.

---
Changes Since V2:
-- Added empty entry at the end of channel maps array.
Changes Since V1:
-- removed set_channel_map/get_channel_map implementation as default kcontrols
added in pcm_new API.

 sound/soc/qcom/lpass-cpu.c    | 33 +++++++++++++++++++++++++++++++++
 sound/soc/qcom/lpass-sc7180.c |  1 +
 sound/soc/qcom/lpass.h        |  2 ++
 3 files changed, 36 insertions(+)
sound/soc/qcom/lpass-cpu.c +33 -0
index c62d2612e8f5..aff39c9f6326 100644
@@ -29,6 +29,15 @@
 #define LPASS_CPU_I2S_SD0_1_2_MASK	GENMASK(2, 0)
 #define LPASS_CPU_I2S_SD0_1_2_3_MASK	GENMASK(3, 0)
 
+/*
+ * Channel maps for Quad channel playbacks on MI2S Secondary
+ */
+static struct snd_pcm_chmap_elem lpass_quad_chmaps[] = {
+		{ .channels = 4,
+		  .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_RL,
+				SNDRV_CHMAP_FR, SNDRV_CHMAP_RR } },
+		{ }
+};
 static int lpass_cpu_init_i2sctl_bitfields(struct device *dev,
 			struct lpaif_i2sctl *i2sctl, struct regmap *map)
 {
@@ -324,6 +333,25 @@ const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops = {
 };
 EXPORT_SYMBOL_GPL(asoc_qcom_lpass_cpu_dai_ops);
 
+int lpass_cpu_pcm_new(struct snd_soc_pcm_runtime *rtd,
+				struct snd_soc_dai *dai)
+{
+	int ret;
+	struct snd_soc_dai_driver *drv = dai->driver;
+	struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+
+	if (drvdata->mi2s_playback_sd_mode[dai->id] == LPAIF_I2SCTL_MODE_QUAD01) {
+		ret =  snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK,
+				lpass_quad_chmaps, drv->playback.channels_max, 0,
+				NULL);
+		if (ret < 0)
+			return ret;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(lpass_cpu_pcm_new);
+
 int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai)
 {
 	struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
@@ -856,6 +884,11 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)
 				PTR_ERR(drvdata->mi2s_bit_clk[dai_id]));
 			return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]);
 		}
+		if (drvdata->mi2s_playback_sd_mode[dai_id] ==
+			LPAIF_I2SCTL_MODE_QUAD01) {
+			variant->dai_driver[dai_id].playback.channels_min = 4;
+			variant->dai_driver[dai_id].playback.channels_max = 4;
+		}
 	}
 
 	/* Allocation for i2sctl regmap fields */
sound/soc/qcom/lpass-sc7180.c +1 -0
index 8c168d3c589e..77a556b27cf0 100644
@@ -58,6 +58,7 @@ static struct snd_soc_dai_driver sc7180_lpass_cpu_dai_driver[] = {
 		},
 		.probe	= &asoc_qcom_lpass_cpu_dai_probe,
 		.ops    = &asoc_qcom_lpass_cpu_dai_ops,
+		.pcm_new = lpass_cpu_pcm_new,
 	}, {
 		.id = LPASS_DP_RX,
 		.name = "Hdmi",
sound/soc/qcom/lpass.h +2 -0
index 83b2e08ade06..623ddccdafff 100644
@@ -259,5 +259,7 @@ void asoc_qcom_lpass_cpu_platform_shutdown(struct platform_device *pdev);
 int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev);
 int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai);
 extern const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops;
+int lpass_cpu_pcm_new(struct snd_soc_pcm_runtime *rtd,
+				struct snd_soc_dai *dai);
 
 #endif /* __LPASS_H__ */
Signature · 2 lines
Qualcomm India Private Limited, on behalf of Qualcomm Innovation Center, Inc.,
is a member of Code Aurora Forum, a Linux Foundation Collaborative Project.
Reviewed-by on v3 1/1
#1 lore raw
Quoted 6 lines · Srinivasa Rao Mandadapu

Add four speaker support on MI2S secondary block by using I2S SD1 line on gpio52 pin, and add channel map control support in the lpass-cpu audio driver.

---

LGTM,

--srini

Quoted 93 lines

Changes Since V2:
-- Added empty entry at the end of channel maps array.
Changes Since V1:
-- removed set_channel_map/get_channel_map implementation as default kcontrols
added in pcm_new API.

  sound/soc/qcom/lpass-cpu.c    | 33 +++++++++++++++++++++++++++++++++
  sound/soc/qcom/lpass-sc7180.c |  1 +
  sound/soc/qcom/lpass.h        |  2 ++
  3 files changed, 36 insertions(+)
sound/soc/qcom/lpass-cpu.c +33 -0
index c62d2612e8f5..aff39c9f6326 100644
@@ -29,6 +29,15 @@
  #define LPASS_CPU_I2S_SD0_1_2_MASK	GENMASK(2, 0)
  #define LPASS_CPU_I2S_SD0_1_2_3_MASK	GENMASK(3, 0)
 
+/*
+ * Channel maps for Quad channel playbacks on MI2S Secondary
+ */
+static struct snd_pcm_chmap_elem lpass_quad_chmaps[] = {
+		{ .channels = 4,
+		  .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_RL,
+				SNDRV_CHMAP_FR, SNDRV_CHMAP_RR } },
+		{ }
+};
  static int lpass_cpu_init_i2sctl_bitfields(struct device *dev,
  			struct lpaif_i2sctl *i2sctl, struct regmap *map)
  {
@@ -324,6 +333,25 @@ const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops = {
  };
  EXPORT_SYMBOL_GPL(asoc_qcom_lpass_cpu_dai_ops);
 
+int lpass_cpu_pcm_new(struct snd_soc_pcm_runtime *rtd,
+				struct snd_soc_dai *dai)
+{
+	int ret;
+	struct snd_soc_dai_driver *drv = dai->driver;
+	struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
+
+	if (drvdata->mi2s_playback_sd_mode[dai->id] == LPAIF_I2SCTL_MODE_QUAD01) {
+		ret =  snd_pcm_add_chmap_ctls(rtd->pcm, SNDRV_PCM_STREAM_PLAYBACK,
+				lpass_quad_chmaps, drv->playback.channels_max, 0,
+				NULL);
+		if (ret < 0)
+			return ret;
+	}
+
+	return 0;
+}
+EXPORT_SYMBOL_GPL(lpass_cpu_pcm_new);
+
  int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai)
  {
  	struct lpass_data *drvdata = snd_soc_dai_get_drvdata(dai);
@@ -856,6 +884,11 @@ int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev)
  				PTR_ERR(drvdata->mi2s_bit_clk[dai_id]));
  			return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]);
  		}
+		if (drvdata->mi2s_playback_sd_mode[dai_id] ==
+			LPAIF_I2SCTL_MODE_QUAD01) {
+			variant->dai_driver[dai_id].playback.channels_min = 4;
+			variant->dai_driver[dai_id].playback.channels_max = 4;
+		}
  	}
 
  	/* Allocation for i2sctl regmap fields */
sound/soc/qcom/lpass-sc7180.c +1 -0
index 8c168d3c589e..77a556b27cf0 100644
@@ -58,6 +58,7 @@ static struct snd_soc_dai_driver sc7180_lpass_cpu_dai_driver[] = {
  		},
  		.probe	= &asoc_qcom_lpass_cpu_dai_probe,
  		.ops    = &asoc_qcom_lpass_cpu_dai_ops,
+		.pcm_new = lpass_cpu_pcm_new,
  	}, {
  		.id = LPASS_DP_RX,
  		.name = "Hdmi",
sound/soc/qcom/lpass.h +2 -0
index 83b2e08ade06..623ddccdafff 100644
@@ -259,5 +259,7 @@ void asoc_qcom_lpass_cpu_platform_shutdown(struct platform_device *pdev);
  int asoc_qcom_lpass_cpu_platform_probe(struct platform_device *pdev);
  int asoc_qcom_lpass_cpu_dai_probe(struct snd_soc_dai *dai);
  extern const struct snd_soc_dai_ops asoc_qcom_lpass_cpu_dai_ops;
+int lpass_cpu_pcm_new(struct snd_soc_pcm_runtime *rtd,
+				struct snd_soc_dai *dai);
 
  #endif /* __LPASS_H__ */
#2 lore raw
In reply to Srinivasa Rao Mandadapu

Quoting Srinivasa Rao Mandadapu (2021-06-09 06:30:39)

sound/soc/qcom/lpass-cpu.c line 35

Quoted 12 lines
sound/soc/qcom/lpass-cpu.c +4 -0
index c62d2612e8f5..aff39c9f6326 100644
@@ -29,6 +29,15 @@
 #define LPASS_CPU_I2S_SD0_1_2_MASK     GENMASK(2, 0)
 #define LPASS_CPU_I2S_SD0_1_2_3_MASK   GENMASK(3, 0)
 
+/*
+ * Channel maps for Quad channel playbacks on MI2S Secondary
+ */
+static struct snd_pcm_chmap_elem lpass_quad_chmaps[] = {

Can this be const?

Quoted 8 lines
sound/soc/qcom/lpass-cpu.c +5 -0
+               { .channels = 4,
+                 .map = { SNDRV_CHMAP_FL, SNDRV_CHMAP_RL,
+                               SNDRV_CHMAP_FR, SNDRV_CHMAP_RR } },
+               { }
+};
 static int lpass_cpu_init_i2sctl_bitfields(struct device *dev,
                        struct lpaif_i2sctl *i2sctl, struct regmap *map)
 {
maintainer
#3 lore raw
In reply to Srinivasa Rao Mandadapu
Quoted 3 lines · Srinivasa Rao Mandadapu

Add four speaker support on MI2S secondary block by using I2S SD1 line on gpio52 pin, and add channel map control support in the lpass-cpu audio driver.

Applied to

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/1] ASoC: qcom: Add four speaker support on MI2S secondary

      commit: c223f41c1a52bfe10f1d3311679b1d1f9813e500

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks,
Mark