Skip to contentSkip to conversation

mtd: rawnand: qcom: Update code word value for raw read

PATCH Superseded Md Sadre Alam 2 participants 3 messages Sep 7, 2021

Subsystems (3)
Memory technology devices (MTD) NAND flash Qualcomm NAND controller driver

v5 of 6 Superseded Latest is v6 →

lore
Share & tools
lore

Md Sadre Alam

author
#0 lore raw

PATCH v5 1/1 mtd: rawnand: qcom: Update code word value for raw read

From QPIC V2 onwards there is a separate register to read last code word "QPIC_NAND_READ_LOCATION_LAST_CW_n".

qcom_nandc_read_cw_raw() is used to read only one code word at a time. If we will configure number of code words to 1 in in QPIC_NAND_DEV0_CFG0 register then QPIC controller thinks its reading the last code word, since from QPIC V2 onwards we are having separate register to read the last code word, we have to configure "QPIC_NAND_READ_LOCATION_LAST_CW_n" register to fetch data from controller buffer to system memory.

Fixes 503ee5aad43054a26cfd5cc592a31270c05539cd ("mtd: rawnand: qcom: update last code word register")
Cc [email protected]
Signed-off-by Md Sadre Alam <[email protected]>

---
Changes in V5:

* Incorporated "hash commit" comment from Mani.
* Updated commit hash

Changes in V4:

* Incorporated "Change log" comment from Miquèl
* Updated change log

Changes in V3:

* Incorporated "Fixes tags are missing" comment from Miquèl
* Added Fixes tag Fixes:503ee5aa ("mtd: rawnand: qcom: update last code word register")

Changes in V2:

* Incorporated "stable tags are missing" comment from Miquèl
* Added stable tags Cc:[email protected]

 drivers/mtd/nand/raw/qcom_nandc.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)
drivers/mtd/nand/raw/qcom_nandc.c +6 -2
index ef0bade..04e6f7b 100644
@@ -1676,13 +1676,17 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
 	struct nand_ecc_ctrl *ecc = &chip->ecc;
 	int data_size1, data_size2, oob_size1, oob_size2;
 	int ret, reg_off = FLASH_BUF_ACC, read_loc = 0;
+	int raw_cw = cw;
 
 	nand_read_page_op(chip, page, 0, NULL, 0);
 	host->use_ecc = false;
 
+	if (nandc->props->qpic_v2)
+		raw_cw = ecc->steps - 1;
+
 	clear_bam_transaction(nandc);
 	set_address(host, host->cw_size * cw, page);
-	update_rw_regs(host, 1, true, cw);
+	update_rw_regs(host, 1, true, raw_cw);
 	config_nand_page_read(chip);
 
 	data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);

@@ -1711,7 +1715,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
 		nandc_set_read_loc(chip, cw, 3, read_loc, oob_size2, 1);
 	}
 
-	config_nand_cw_read(chip, false, cw);
+	config_nand_cw_read(chip, false, raw_cw);
 
 	read_data_dma(nandc, reg_off, data_buf, data_size1, 0);
 	reg_off += data_size1;
Signature · 1 line
2.7.4
maintainer
#1 lore raw

[email protected] wrote on Tue, 7 Sep 2021 12:09:31 +0530:

Quoted 12 lines

From QPIC V2 onwards there is a separate register to read last code word "QPIC_NAND_READ_LOCATION_LAST_CW_n".

qcom_nandc_read_cw_raw() is used to read only one code word at a time. If we will configure number of code words to 1 in in QPIC_NAND_DEV0_CFG0 register then QPIC controller thinks its reading the last code word, since from QPIC V2 onwards we are having separate register to read the last code word, we have to configure "QPIC_NAND_READ_LOCATION_LAST_CW_n" register to fetch data from controller buffer to system memory.

Quoted 1 line
Fixes 503ee5aad43054a26cfd5cc592a31270c05539cd ("mtd: rawnand: qcom: update last code word register")

Still wrong. It's 12 digits, as reported by Manivannan.

Quoted 53 lines
Cc [email protected]
Signed-off-by Md Sadre Alam <[email protected]>

---
Changes in V5:

* Incorporated "hash commit" comment from Mani.
* Updated commit hash

Changes in V4:

* Incorporated "Change log" comment from Miquèl
* Updated change log

Changes in V3:

* Incorporated "Fixes tags are missing" comment from Miquèl
* Added Fixes tag Fixes:503ee5aa ("mtd: rawnand: qcom: update last code word register")

Changes in V2:

* Incorporated "stable tags are missing" comment from Miquèl
* Added stable tags Cc:[email protected]

 drivers/mtd/nand/raw/qcom_nandc.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)
drivers/mtd/nand/raw/qcom_nandc.c +5 -1
index ef0bade..04e6f7b 100644
@@ -1676,13 +1676,17 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
 	struct nand_ecc_ctrl *ecc = &chip->ecc;
 	int data_size1, data_size2, oob_size1, oob_size2;
 	int ret, reg_off = FLASH_BUF_ACC, read_loc = 0;
+	int raw_cw = cw;
 
 	nand_read_page_op(chip, page, 0, NULL, 0);
 	host->use_ecc = false;
 
+	if (nandc->props->qpic_v2)
+		raw_cw = ecc->steps - 1;
+
 	clear_bam_transaction(nandc);
 	set_address(host, host->cw_size * cw, page);
-	update_rw_regs(host, 1, true, cw);
+	update_rw_regs(host, 1, true, raw_cw);
 	config_nand_page_read(chip);
 
 	data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);

drivers/mtd/nand/raw/qcom_nandc.c qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip, · line 1721

Quoted 8 lines
drivers/mtd/nand/raw/qcom_nandc.c +1 -1
@@ -1711,7 +1715,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
 		nandc_set_read_loc(chip, cw, 3, read_loc, oob_size2, 1);
 	}
 
-	config_nand_cw_read(chip, false, cw);
+	config_nand_cw_read(chip, false, raw_cw);
 
 	read_data_dma(nandc, reg_off, data_buf, data_size1, 0);
 	reg_off += data_size1;

Thanks,
Miquèl

author
#2 lore raw
Quoted 14 lines · Miquel Raynal

[email protected] wrote on Tue, 7 Sep 2021 12:09:31 +0530:

Quoted 12 lines

From QPIC V2 onwards there is a separate register to read last code word "QPIC_NAND_READ_LOCATION_LAST_CW_n".

qcom_nandc_read_cw_raw() is used to read only one code word at a time. If we will configure number of code words to 1 in in QPIC_NAND_DEV0_CFG0 register then QPIC controller thinks its reading the last code word, since from QPIC V2 onwards we are having separate register to read the last code word, we have to configure "QPIC_NAND_READ_LOCATION_LAST_CW_n" register to fetch data from controller buffer to system memory.

Quoted 3 lines
Quoted 1 line
Fixes 503ee5aad43054a26cfd5cc592a31270c05539cd ("mtd: rawnand: qcom: update last code word register")

Still wrong. It's 12 digits, as reported by Manivannan.

Updated in patch V6.

Quoted 69 lines
Quoted 64 lines
Cc [email protected]
Signed-off-by Md Sadre Alam <[email protected]>

---
Changes in V5:

* Incorporated "hash commit" comment from Mani.
* Updated commit hash

Changes in V4:

* Incorporated "Change log" comment from Miquèl
* Updated change log

Changes in V3:

* Incorporated "Fixes tags are missing" comment from Miquèl
* Added Fixes tag Fixes:503ee5aa ("mtd: rawnand: qcom: update last
code word register")

Changes in V2:

* Incorporated "stable tags are missing" comment from Miquèl
* Added stable tags Cc:[email protected]

 drivers/mtd/nand/raw/qcom_nandc.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)
drivers/mtd/nand/raw/qcom_nandc.c +5 -1
index ef0bade..04e6f7b 100644
@@ -1676,13 +1676,17 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, 
 struct nand_chip *chip,
 	struct nand_ecc_ctrl *ecc = &chip->ecc;
 	int data_size1, data_size2, oob_size1, oob_size2;
 	int ret, reg_off = FLASH_BUF_ACC, read_loc = 0;
+	int raw_cw = cw;
 
 	nand_read_page_op(chip, page, 0, NULL, 0);
 	host->use_ecc = false;
 
+	if (nandc->props->qpic_v2)
+		raw_cw = ecc->steps - 1;
+
 	clear_bam_transaction(nandc);
 	set_address(host, host->cw_size * cw, page);
-	update_rw_regs(host, 1, true, cw);
+	update_rw_regs(host, 1, true, raw_cw);
 	config_nand_page_read(chip);
drivers/mtd/nand/raw/qcom_nandc.c +1 -1
 	data_size1 = mtd->writesize - host->cw_size * (ecc->steps - 1);

@@ -1711,7 +1715,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, 
 struct nand_chip *chip,
 		nandc_set_read_loc(chip, cw, 3, read_loc, oob_size2, 1);
 	}
 
-	config_nand_cw_read(chip, false, cw);
+	config_nand_cw_read(chip, false, raw_cw);
 
 	read_data_dma(nandc, reg_off, data_buf, data_size1, 0);
Quoted 1 line

reg_off += data_size1;

Thanks,
Miquèl