enable protocol agnostic flow offloading in FDIR
cover enable protocol agnostic flow offloading in FDIR
Protocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library, using existing rte_flow raw API, without public API change.
[PATCH 1/3] app/testpmd: update Max RAW pattern size to 512. [PATCH 2/3] net/ice: enable protocol agnostic flow offloading in FDIR. [PATCH 3/3] doc: enable protocol agnostic flow in FDIR.
Junfeng Guo (3):
app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
doc: enable protocol agnostic flow in FDIR
app/test-pmd/cmdline_flow.c | 2 +- doc/guides/rel_notes/release_21_11.rst | 5 + drivers/net/ice/ice_ethdev.h | 5 + drivers/net/ice/ice_fdir_filter.c | 167 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 ++ drivers/net/ice/ice_generic_flow.h | 3 + 6 files changed, 188 insertions(+), 1 deletion(-)
Signature · 1 line
2.25.1
PATCH 1/3 app/testpmd: update Max RAW pattern size to 512
Update max size for pattern in struct rte_flow_item_raw to enable protocol agnostic flow offloading.
--- app/test-pmd/cmdline_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
app/test-pmd/cmdline_flow.c +1 -1
@@ -459,7 +459,7 @@ enum index { };/** Maximum size for pattern in struct rte_flow_item_raw. */ -#define ITEM_RAW_PATTERN_SIZE 40 +#define ITEM_RAW_PATTERN_SIZE 512/** Maximum size for GENEVE option data pattern in bytes. */ #define ITEM_GENEVE_OPT_DATA_SIZE 124
Signature · 1 line
2.25.1
v2 cover enable protocol agnostic flow offloading in FDIR
Protocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing rte_flow raw API
[PATCH v2 1/3] app/testpmd: update Max RAW pattern size to 512. [PATCH v2 2/3] net/ice: enable protocol agnostic flow offloading in FDIR. [PATCH v2 3/3] doc: enable protocol agnostic flow in FDIR.
Junfeng Guo (3):
app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
doc: enable protocol agnostic flow in FDIR
* v2
Enabled vxlan port add for raw flow and updated commit message
app/test-pmd/cmdline_flow.c | 2 +- doc/guides/rel_notes/release_21_11.rst | 5 + drivers/net/ice/ice_ethdev.h | 5 + drivers/net/ice/ice_fdir_filter.c | 172 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 6 files changed, 193 insertions(+), 1 deletion(-)
Signature · 1 line
2.25.1
PATCH v2 1/3 app/testpmd: update Max RAW pattern size to 512
Update max size for pattern in struct rte_flow_item_raw to enable protocol agnostic flow offloading.
--- app/test-pmd/cmdline_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
app/test-pmd/cmdline_flow.c +1 -1
@@ -459,7 +459,7 @@ enum index { };/** Maximum size for pattern in struct rte_flow_item_raw. */ -#define ITEM_RAW_PATTERN_SIZE 40 +#define ITEM_RAW_PATTERN_SIZE 512/** Maximum size for GENEVE option data pattern in bytes. */ #define ITEM_GENEVE_OPT_DATA_SIZE 124
Signature · 1 line
2.25.1
PATCH v2 2/3 net/ice: enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing rte_flow raw API.
Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
Note that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of 0x0800 (with 0xFFFF) in the mask byte string example. The prefix '0x' for the spec and mask byte (hex) strings are also omitted here.
--- drivers/net/ice/ice_ethdev.h | 5 + drivers/net/ice/ice_fdir_filter.c | 172 +++++++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 ++ drivers/net/ice/ice_generic_flow.h | 3 + 4 files changed, 187 insertions(+)
drivers/net/ice/ice_ethdev.h +5 -0
@@ -316,6 +316,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +const u8 *pkt_buf; +bool parser_ena; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)
drivers/net/ice/ice_fdir_filter.c +172 -0
233 lines not on this page · raw message
drivers/net/ice/ice_generic_flow.c +7 -0
@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = { RTE_FLOW_ITEM_TYPE_END, }; +/* raw */ +enum rte_flow_item_type pattern_raw[] = { +RTE_FLOW_ITEM_TYPE_RAW , +RTE_FLOW_ITEM_TYPE_END , +}; +/* L2 */ enum rte_flow_item_type pattern_ethertype[] = {RTE_FLOW_ITEM_TYPE_ETH ,
@@ -2081,6 +2087,7 @@ struct ice_ptype_match { };static struct ice_ptype_match ice_ptype_map[] = { + {pattern_raw,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4_udp,ICE_PTYPE_IPV4_UDP_PAY }, {pattern_eth_ipv4_tcp,ICE_PTYPE_IPV4_TCP_PAY },
drivers/net/ice/ice_generic_flow.h +3 -0
@@ -124,6 +124,9 @@/* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; +/* raw pattern */ +extern enum rte_flow_item_type pattern_raw[]; +/* L2 */ extern enum rte_flow_item_type pattern_ethertype[];extern enum rte_flow_item_type pattern_ethertype_vlan[];
Signature · 1 line
2.25.1
PATCH v2 3/3 doc: enable protocol agnostic flow in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled based on the Parser Library, using existing rte_flow raw API.
--- doc/guides/rel_notes/release_21_11.rst | 5 +++++ 1 file changed, 5 insertions(+)
doc/guides/rel_notes/release_21_11.rst +5 -0
@@ -62,6 +62,11 @@ New Features * Added bus-level parsing of the devargs syntax. * Kept compatibility with the legacy syntax as parsing fallback. +* **Updated Intel ice driver.** + + * Enabled protocol agnostic flow offloading in Flow Director based on the + parser library, using existing rte_flow raw API. + * **Add new RSS offload types for IPv4/L4 checksum in RSS flow.** Add macros ETH_RSS_IPV4_CHKSUM and ETH_RSS_L4_CHKSUM, now IPv4 and
Signature · 1 line
2.25.1
v3 cover enable protocol agnostic flow offloading in FDIR
Protocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing rte_flow raw API
[PATCH v3 1/5] net/ice/base: add method to disable FDIR SWAP option. [PATCH v3 2/5] net/ice/base: add function to set HW profile for raw flow. [PATCH v3 3/5] app/testpmd: update Max RAW pattern size to 512. [PATCH v3 4/5] net/ice: enable protocol agnostic flow offloading in FDIR. [PATCH v3 5/5] doc: enable protocol agnostic flow in FDIR.
Junfeng Guo (5):
net/ice/base: add method to disable FDIR SWAP option net/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
doc: enable protocol agnostic flow in FDIR
* v3:
Added necessary base code for raw flow in FDIR.
* v2:
Enabled vxlan port add for raw flow and updated commit message
app/test-pmd/cmdline_flow.c | 2 +- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/base/ice_flex_pipe.c | 100 +++++++++++++- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flow.c | 86 ++++++++++++- drivers/net/ice/base/ice_flow.h | 4 + drivers/net/ice/ice_ethdev.h | 5 + drivers/net/ice/ice_fdir_filter.c | 172 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 10 files changed, 381 insertions(+), 5 deletions(-)
Signature · 1 line
2.25.1
PATCH v3 1/5 net/ice/base: add method to disable FDIR SWAP option
The SWAP Flag in the FDIR Programming Descriptor doesn't work, thus add a method to disable the FDIR SWAP option by setting the swap and inset register set with certain values. The boolean fd_swap is used to enable/disable the SWAP option.
--- drivers/net/ice/base/ice_flex_pipe.c | 44 ++++++++++++++++++++++++++-- drivers/net/ice/base/ice_flex_pipe.h | 3 +- drivers/net/ice/base/ice_flow.c | 2 +- 3 files changed, 45 insertions(+), 4 deletions(-)
drivers/net/ice/base/ice_flex_pipe.c +42 -2
@@ -4952,6 +4952,43 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,return ICE_SUCCESS ; } +/** +* ice_disable_fd_swap - set register appropriately to disable FD swap +* @hw: pointer to the HW struct +* @prof_id: profile ID +*/ +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id) +{ +u8 swap_val =ICE_SWAP_VALID ; +u8 i; +/* Since the SWAP Flag in the Programming Desc doesn't work, +* here add method to disable the SWAP Option via setting +* certain SWAP and INSET register set. +*/ +for (i =0 ; i < hw->blk[ICE_BLK_FD ].es.fvw /4 ; i++) { +u32 raw_swap =0 ; +u32 raw_in =0 ; +u8 j; + +for (j =0 ; j <4 ; j++) { + raw_swap |= (swap_val++) << (j *BITS_PER_BYTE ); + raw_in |=ICE_INSET_DFLT << (j *BITS_PER_BYTE ); + } + +/* write the FDIR swap register set */ +wr32 (hw,GLQF_FDSWAP (prof_id, i), raw_swap); + +ice_debug (hw,ICE_DBG_INIT ,"swap wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDSWAP (prof_id, i), raw_swap); + +/* write the FDIR inset register set */ +wr32 (hw,GLQF_FDINSET (prof_id, i), raw_in); + +ice_debug (hw,ICE_DBG_INIT ,"inset wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDINSET (prof_id, i), raw_in); + } +} +/** * ice_add_prof - add profile * @hw: pointer to the HW struct
@@ -4962,6 +4999,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,* @attr_cnt: number of elements in attrib array * @es: extraction sequence (length of array is determined by the block) * @masks: mask for extraction sequence +* @fd_swap: enable/disable FDIR paired src/dst fields swap option * * This function registers a profile, which matches a set of PTYPES with a * particular extraction sequence. While the hardware profile is allocated
@@ -4971,7 +5009,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks) +struct ice_fv_word *es,u16 *masks,bool fd_swap) {u32 bytes =DIVIDE_AND_ROUND_UP (ICE_FLOW_PTYPE_MAX ,BITS_PER_BYTE );ice_declare_bitmap (ptgs_used,ICE_XLT1_CNT );
@@ -4991,7 +5029,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_alloc_prof_id (hw, blk, &prof_id);if (status) goto err_ice_add_prof; -if (blk ==ICE_BLK_FD ) { +if (blk ==ICE_BLK_FD && fd_swap) {/* For Flow Director block, the extraction sequence may * need to be altered in the case where there are paired * fields that have no match. This is necessary because
@@ -5002,6 +5040,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_update_fd_swap (hw, prof_id, es);if (status) goto err_ice_add_prof; + }else if (blk ==ICE_BLK_FD ) { +ice_disable_fd_swap (hw, prof_id); } status =ice_update_prof_masking (hw, blk, prof_id, masks);if (status)
drivers/net/ice/base/ice_flex_pipe.h +2 -1
@@ -61,10 +61,11 @@ bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);/* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi (struct ice_hw *hw,enum ice_block blk,u16 vsi,u16 *vsig); +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id);enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks); +struct ice_fv_word *es,u16 *masks,bool fd_swap);void ice_init_all_prof_masks (struct ice_hw *hw);void ice_shutdown_all_prof_masks (struct ice_hw *hw); struct ice_prof_map *
drivers/net/ice/base/ice_flow.c +1 -1
@@ -2244,7 +2244,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,/* Add a HW profile for this flow profile */ status =ice_add_prof (hw, blk, prof_id, (u8 *)params->ptypes, params->attr, params->attr_cnt, params->es, - params->mask); + params->mask, true);if (status) {ice_debug (hw,ICE_DBG_FLOW ,"Error adding a HW flow profile\n" ); goto out;
Signature · 1 line
2.25.1
PATCH v3 2/5 net/ice/base: add function to set HW profile for raw flow
In reply to Junfeng GuoBased on the parser library, we can directly set HW profile and associate the main/ctrl vsi.
--- drivers/net/ice/base/ice_flex_pipe.c | 56 +++++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 3 + drivers/net/ice/base/ice_flow.c | 84 ++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 4 ++ 4 files changed, 147 insertions(+)
drivers/net/ice/base/ice_flex_pipe.c +56 -0
@@ -6365,3 +6365,59 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)return status; } + +/** +* ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI flow entry +* @hw: pointer to the HW struct +* @blk: HW block +* @dest_vsi_handle: dest VSI handle +* @fdir_vsi_handle: fdir programming VSI handle +* @id: profile id (handle) +* +* Calling this function will update the hardware tables to enable the +* profile indicated by the ID parameter for the VSIs specified in the VSI +* array. Once successfully called, the flow will be enabled. +*/ +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id) +{ +enum ice_status status =ICE_SUCCESS ; +u16 vsi_num; +u16 vsig; + + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); +if (!ice_vsig_find_vsi (hw, blk, vsi_num, &vsig) && !vsig) +if (!ice_has_prof_vsig (hw, blk, vsig, id)) { + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { +ice_debug (hw,ICE_DBG_FLOW ,"HW profile add failed for main VSI flow entry, %d\n" , + status); + goto err_add_prof; + } + } + +if (blk !=ICE_BLK_FD ) +return status; + + vsi_num =ice_get_hw_vsi_num (hw, fdir_vsi_handle); +if (!ice_vsig_find_vsi (hw, blk, vsi_num, &vsig) && !vsig) +if (!ice_has_prof_vsig (hw, blk, vsig, id)) { + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { +ice_debug (hw,ICE_DBG_FLOW ,"HW profile add failed for ctrl VSI flow entry, %d\n" , + status); + goto err_add_entry; + } + } + +return status; + +err_add_entry: + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); +ice_rem_prof_id_flow (hw, blk, vsi_num, id); +err_add_prof: +ice_flow_rem_prof (hw, blk, id); + +return status; +}
drivers/net/ice/base/ice_flex_pipe.h +3 -0
@@ -76,6 +76,9 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);enum ice_status ice_rem_prof_id_flow (struct ice_hw *hw,enum ice_block blk,u16 vsi,u64 hdl); +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id);enum ice_status ice_init_pkg (struct ice_hw *hw,u8 *buff,u32 len);enum ice_status ice_copy_and_init_pkg (struct ice_hw *hw,const u8 *buf,u32 len);
drivers/net/ice/base/ice_flow.c +84 -0
90 lines not on this page · raw message
drivers/net/ice/base/ice_flow.h +4 -0
@@ -548,6 +548,10 @@ enum ice_status ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, u16 vsig);enum ice_status +ice_flow_set_hw_prof (struct ice_hw *hw,u16 dest_vsi_handle, +u16 fdir_vsi_handle,struct ice_parser_profile *prof, +enum ice_block blk); +enum ice_status ice_flow_get_hw_prof (struct ice_hw *hw,enum ice_block blk,u64 prof_id,u8 *hw_prof);
Signature · 1 line
2.25.1
PATCH v3 3/5 app/testpmd: update Max RAW pattern size to 512
In reply to Junfeng GuoUpdate max size for pattern in struct rte_flow_item_raw to enable protocol agnostic flow offloading.
--- app/test-pmd/cmdline_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
app/test-pmd/cmdline_flow.c +1 -1
@@ -458,7 +458,7 @@ enum index { };/** Maximum size for pattern in struct rte_flow_item_raw. */ -#define ITEM_RAW_PATTERN_SIZE 40 +#define ITEM_RAW_PATTERN_SIZE 512/** Maximum size for GENEVE option data pattern in bytes. */ #define ITEM_GENEVE_OPT_DATA_SIZE 124
Signature · 1 line
2.25.1
PATCH v3 4/5 net/ice: enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing rte_flow raw API.
Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
Note that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of 0x0800 (with 0xFFFF) in the mask byte string example. The prefix '0x' for the spec and mask byte (hex) strings are also omitted here.
--- drivers/net/ice/ice_ethdev.h | 5 + drivers/net/ice/ice_fdir_filter.c | 172 +++++++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 ++ drivers/net/ice/ice_generic_flow.h | 3 + 4 files changed, 187 insertions(+)
drivers/net/ice/ice_ethdev.h +5 -0
@@ -317,6 +317,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +const u8 *pkt_buf; +bool parser_ena; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)
drivers/net/ice/ice_fdir_filter.c +172 -0
233 lines not on this page · raw message
drivers/net/ice/ice_generic_flow.c +7 -0
@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = { RTE_FLOW_ITEM_TYPE_END, }; +/* raw */ +enum rte_flow_item_type pattern_raw[] = { +RTE_FLOW_ITEM_TYPE_RAW , +RTE_FLOW_ITEM_TYPE_END , +}; +/* L2 */ enum rte_flow_item_type pattern_ethertype[] = {RTE_FLOW_ITEM_TYPE_ETH ,
@@ -2081,6 +2087,7 @@ struct ice_ptype_match { };static struct ice_ptype_match ice_ptype_map[] = { + {pattern_raw,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4_udp,ICE_PTYPE_IPV4_UDP_PAY }, {pattern_eth_ipv4_tcp,ICE_PTYPE_IPV4_TCP_PAY },
drivers/net/ice/ice_generic_flow.h +3 -0
@@ -124,6 +124,9 @@/* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; +/* raw pattern */ +extern enum rte_flow_item_type pattern_raw[]; +/* L2 */ extern enum rte_flow_item_type pattern_ethertype[];extern enum rte_flow_item_type pattern_ethertype_vlan[];
Signature · 1 line
2.25.1
PATCH v3 5/5 doc: enable protocol agnostic flow in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled based on the Parser Library, using existing rte_flow raw API.
--- doc/guides/rel_notes/release_21_11.rst | 1 + 1 file changed, 1 insertion(+)
doc/guides/rel_notes/release_21_11.rst +1 -0
@@ -98,6 +98,7 @@ New Features * **Updated Intel ice driver.** + * Added protocol agnostic flow offloading support in Flow Director. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow. * Added DEV_RX_OFFLOAD_TIMESTAMP support.
Signature · 1 line
2.25.1
v4 cover enable protocol agnostic flow offloading in FDIR
Protocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing rte_flow raw API
[PATCH v4 1/4] net/ice/base: add method to disable FDIR SWAP option. [PATCH v4 2/4] net/ice/base: add function to set HW profile for raw flow. [PATCH v4 3/4] app/testpmd: update Max RAW pattern size to 512. [PATCH v4 4/4] net/ice: enable protocol agnostic flow offloading in FDIR.
Junfeng Guo (4):
net/ice/base: add method to disable FDIR SWAP option net/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
* v4:
Added list to check inputset conflict.
* v3:
Added necessary base code for raw flow in FDIR.
* v2:
Enabled vxlan port add for raw flow and updated commit message
app/test-pmd/cmdline_flow.c | 2 +- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/base/ice_flex_pipe.c | 99 +++++++++- drivers/net/ice/base/ice_flex_pipe.h | 7 +- drivers/net/ice/base/ice_flow.c | 87 ++++++++- drivers/net/ice/base/ice_flow.h | 4 + drivers/net/ice/ice_ethdev.h | 17 ++ drivers/net/ice/ice_fdir_filter.c | 249 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 10 files changed, 471 insertions(+), 5 deletions(-)
Signature · 1 line
2.25.1
PATCH v4 1/4 net/ice/base: add method to disable FDIR SWAP option
The SWAP Flag in the FDIR Programming Descriptor doesn't work, thus add a method to disable the FDIR SWAP option by setting the swap and inset register set with certain values. The boolean fd_swap is used to enable/disable the SWAP option.
--- drivers/net/ice/base/ice_flex_pipe.c | 44 ++++++++++++++++++++++++++-- drivers/net/ice/base/ice_flex_pipe.h | 3 +- drivers/net/ice/base/ice_flow.c | 2 +- 3 files changed, 45 insertions(+), 4 deletions(-)
drivers/net/ice/base/ice_flex_pipe.c +42 -2
@@ -4952,6 +4952,43 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,return ICE_SUCCESS ; } +/** +* ice_disable_fd_swap - set register appropriately to disable FD swap +* @hw: pointer to the HW struct +* @prof_id: profile ID +*/ +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id) +{ +u8 swap_val =ICE_SWAP_VALID ; +u8 i; +/* Since the SWAP Flag in the Programming Desc doesn't work, +* here add method to disable the SWAP Option via setting +* certain SWAP and INSET register set. +*/ +for (i =0 ; i < hw->blk[ICE_BLK_FD ].es.fvw /4 ; i++) { +u32 raw_swap =0 ; +u32 raw_in =0 ; +u8 j; + +for (j =0 ; j <4 ; j++) { + raw_swap |= (swap_val++) << (j *BITS_PER_BYTE ); + raw_in |=ICE_INSET_DFLT << (j *BITS_PER_BYTE ); + } + +/* write the FDIR swap register set */ +wr32 (hw,GLQF_FDSWAP (prof_id, i), raw_swap); + +ice_debug (hw,ICE_DBG_INIT ,"swap wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDSWAP (prof_id, i), raw_swap); + +/* write the FDIR inset register set */ +wr32 (hw,GLQF_FDINSET (prof_id, i), raw_in); + +ice_debug (hw,ICE_DBG_INIT ,"inset wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDINSET (prof_id, i), raw_in); + } +} +/** * ice_add_prof - add profile * @hw: pointer to the HW struct
@@ -4962,6 +4999,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,* @attr_cnt: number of elements in attrib array * @es: extraction sequence (length of array is determined by the block) * @masks: mask for extraction sequence +* @fd_swap: enable/disable FDIR paired src/dst fields swap option * * This function registers a profile, which matches a set of PTYPES with a * particular extraction sequence. While the hardware profile is allocated
@@ -4971,7 +5009,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks) +struct ice_fv_word *es,u16 *masks,bool fd_swap) {u32 bytes =DIVIDE_AND_ROUND_UP (ICE_FLOW_PTYPE_MAX ,BITS_PER_BYTE );ice_declare_bitmap (ptgs_used,ICE_XLT1_CNT );
@@ -4991,7 +5029,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_alloc_prof_id (hw, blk, &prof_id);if (status) goto err_ice_add_prof; -if (blk ==ICE_BLK_FD ) { +if (blk ==ICE_BLK_FD && fd_swap) {/* For Flow Director block, the extraction sequence may * need to be altered in the case where there are paired * fields that have no match. This is necessary because
@@ -5002,6 +5040,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_update_fd_swap (hw, prof_id, es);if (status) goto err_ice_add_prof; + }else if (blk ==ICE_BLK_FD ) { +ice_disable_fd_swap (hw, prof_id); } status =ice_update_prof_masking (hw, blk, prof_id, masks);if (status)
drivers/net/ice/base/ice_flex_pipe.h +2 -1
@@ -61,10 +61,11 @@ bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);/* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi (struct ice_hw *hw,enum ice_block blk,u16 vsi,u16 *vsig); +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id);enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks); +struct ice_fv_word *es,u16 *masks,bool fd_swap);void ice_init_all_prof_masks (struct ice_hw *hw);void ice_shutdown_all_prof_masks (struct ice_hw *hw); struct ice_prof_map *
drivers/net/ice/base/ice_flow.c +1 -1
@@ -2244,7 +2244,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,/* Add a HW profile for this flow profile */ status =ice_add_prof (hw, blk, prof_id, (u8 *)params->ptypes, params->attr, params->attr_cnt, params->es, - params->mask); + params->mask, true);if (status) {ice_debug (hw,ICE_DBG_FLOW ,"Error adding a HW flow profile\n" ); goto out;
Signature · 1 line
2.25.1
PATCH v4 2/4 net/ice/base: add function to set HW profile for raw flow
In reply to Junfeng GuoBased on the parser library, we can directly set HW profile and associate the main/ctrl vsi.
--- drivers/net/ice/base/ice_flex_pipe.c | 55 ++++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 4 ++ drivers/net/ice/base/ice_flow.c | 85 ++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 4 ++ 4 files changed, 148 insertions(+)
drivers/net/ice/base/ice_flex_pipe.c +55 -0
@@ -6365,3 +6365,58 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)return status; } + +/** +* ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI flow entry +* @hw: pointer to the HW struct +* @blk: HW block +* @dest_vsi_handle: dest VSI handle +* @fdir_vsi_handle: fdir programming VSI handle +* @id: profile id (handle) +* @fv_found: found fv in fdir fv list +* +* Calling this function will update the hardware tables to enable the +* profile indicated by the ID parameter for the VSIs specified in the VSI +* array. Once successfully called, the flow will be enabled. +*/ +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id, +bool fv_found) +{ +enum ice_status status =ICE_SUCCESS ; +u16 vsi_num; + + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); +if (!fv_found) { + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { +ice_debug (hw,ICE_DBG_FLOW ,"HW profile add failed for main VSI flow entry, %d\n" , + status); + goto err_add_prof; + } + } + +if (blk !=ICE_BLK_FD ) +return status; + + vsi_num =ice_get_hw_vsi_num (hw, fdir_vsi_handle); +if (!fv_found) { + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { +ice_debug (hw,ICE_DBG_FLOW ,"HW profile add failed for ctrl VSI flow entry, %d\n" , + status); + goto err_add_entry; + } + } + +return status; + +err_add_entry: + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); +ice_rem_prof_id_flow (hw, blk, vsi_num, id); +err_add_prof: +ice_flow_rem_prof (hw, blk, id); + +return status; +}
drivers/net/ice/base/ice_flex_pipe.h +4 -0
@@ -76,6 +76,10 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);enum ice_status ice_rem_prof_id_flow (struct ice_hw *hw,enum ice_block blk,u16 vsi,u64 hdl); +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id, +bool fv_found);enum ice_status ice_init_pkg (struct ice_hw *hw,u8 *buff,u32 len);enum ice_status ice_copy_and_init_pkg (struct ice_hw *hw,const u8 *buf,u32 len);
drivers/net/ice/base/ice_flow.c +85 -0
91 lines not on this page · raw message
drivers/net/ice/base/ice_flow.h +4 -0
@@ -548,6 +548,10 @@ enum ice_status ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, u16 vsig);enum ice_status +ice_flow_set_hw_prof (struct ice_hw *hw,u16 dest_vsi_handle, +u16 fdir_vsi_handle,struct ice_parser_profile *prof, +enum ice_block blk,bool fv_found); +enum ice_status ice_flow_get_hw_prof (struct ice_hw *hw,enum ice_block blk,u64 prof_id,u8 *hw_prof);
Signature · 1 line
2.25.1
Re: [dpdk-dev] [PATCH v4 2/4] net/ice/base: add function to set HW profile for raw flow
Quoted 44 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Tuesday, October 26, 2021 8:01 PM
To: Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Wang, Haiyue <[email protected]>; Yan, Zhirun <[email protected]>; Guo, Junfeng <[email protected]>
Subject: [PATCH v4 2/4]net/ice/base: add function to set HW profile for raw flowBased on the parser library, we can directly set HW profile and associate the main/ctrl vsi.
Signed-off-by Junfeng Guo <[email protected]>--- drivers/net/ice/base/ice_flex_pipe.c | 55 ++++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 4 ++ drivers/net/ice/base/ice_flow.c | 85 ++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 4 ++ 4 files changed, 148 insertions(+)drivers/net/ice/base/ice_flex_pipe.c +10
-0@@ -6365,3 +6365,58 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl) return status; } + +/** +* ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI flow +entry +* @hw: pointer to the HW struct +* @blk: HW block +* @dest_vsi_handle: dest VSI handle +* @fdir_vsi_handle: fdir programming VSI handle +* @id: profile id (handle) +* @fv_found: found fv in fdir fv list
drivers/net/ice/base/ice_flex_pipe.c ice_rem_prof_id_flow(struct ice_hw *hw, enum · line 6385
Quoted 10 lines
drivers/net/ice/base/ice_flex_pipe.c +10
-0+* +* Calling this function will update the hardware tables to enable the +* profile indicated by the ID parameter for the VSIs specified in the +VSI +* array. Once successfully called, the flow will be enabled. +*/ +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id, +bool fv_found)
Do we really need this fv_found parameter?
If fv_found is true, seems nothing has been done in this function, why not just check the flag outside the function?
Re: [dpdk-dev] [PATCH v4 2/4] net/ice/base: add function to set HW profile for raw flow
Quoted 67 lines
-----Original Message-----
From: Zhang, Qi Z <[email protected]>
Sent: Wednesday, October 27, 2021 08:58
To: Guo, Junfeng <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Wang, Haiyue <[email protected]>; Yan, Zhirun <[email protected]>
Subject: RE: [PATCH v4 2/4]net/ice/base: add function to set HW profile for raw flowQuoted 4 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Tuesday, October 26, 2021 8:01 PM
To: Zhang, Qi Z <[email protected]>; Wu, JingjingQuoted 2 lines
Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Wang,Haiyue
Quoted 1 line
<[email protected]>; Yan, Zhirun <[email protected]>; Guo,
Junfeng
Quoted 2 lines
<[email protected]>
Subject: [PATCH v4 2/4]net/ice/base: add function to set HW profile forraw
Quoted 3 lines
flow
Based on the parser library, we can directly set HW profile and associate
the
Quoted 7 lines
main/ctrl vsi.
Signed-off-by Junfeng Guo <[email protected]>--- drivers/net/ice/base/ice_flex_pipe.c | 55 ++++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 4 ++ drivers/net/ice/base/ice_flow.c | 85++++++++++++++++++++++++++++
drivers/net/ice/base/ice_flex_pipe.c ice_rem_prof_id_flow(struct ice_hw *hw,
Quoted 9 lines
drivers/net/ice/base/ice_flow.h | 4 ++ 4 files changed, 148 insertions(+)drivers/net/ice/base/ice_flex_pipe.c +0
-0@@ -6365,3 +6365,58 @@ ice_rem_prof_id_flow(struct ice_hw *hw,enum
Quoted 18 lines
drivers/net/ice/base/ice_flex_pipe.c +14
-0ice_block blk, u16 vsi, u64 hdl) return status; } + +/** +* ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI flow +entry +* @hw: pointer to the HW struct +* @blk: HW block +* @dest_vsi_handle: dest VSI handle +* @fdir_vsi_handle: fdir programming VSI handle +* @id: profile id (handle) +* @fv_found: found fv in fdir fv list +* +* Calling this function will update the hardware tables to enable the +* profile indicated by the ID parameter for the VSIs specified in the +VSI
Quoted 8 lines
drivers/net/ice/base/ice_flex_pipe.c ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl) · line 6385
Quoted 6 lines
+ * array. Once successfully called, the flow will be enabled.
+ */drivers/net/ice/base/ice_flex_pipe.c +4
-0+enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id, +bool fv_found)Do we really need this
fv_foundparameter?
The value of fv_found is set based on the maintained profile info list in the PMD. So we need this parameter to add profile id flow for FDIR in the shared code.
Quoted 3 lines
If
fv_foundis true, seems nothing has been done in this function, why not just check the flag outside the function?
Yes, ice_add_prof_id_flow should be processed after ice_add_prof.
It's ok if we just move the ice_add_prof_id_flow processing into func ice_flow_set_hw_prof, and delete the func ice_flow_assoc_hw_prof to reduce the code size.
For RSS, the ice_add_prof_id_flow for adding dest_vsi_handle should always be processed. So this function has other RSS logic to add soon.
Quoted 3 lines
Re: [dpdk-dev] [PATCH v4 2/4] net/ice/base: add function to set HW profile for raw flow
Quoted 91 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Wednesday, October 27, 2021 9:58 AM
To: Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Wang, Haiyue <[email protected]>; Yan, Zhirun <[email protected]>
Subject: RE: [PATCH v4 2/4]net/ice/base: add function to set HW profile for raw flowQuoted 68 lines
-----Original Message-----
From: Zhang, Qi Z <[email protected]>
Sent: Wednesday, October 27, 2021 08:58
To: Guo, Junfeng <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Wang, Haiyue <[email protected]>; Yan, Zhirun <[email protected]>
Subject: RE: [PATCH v4 2/4]net/ice/base: add function to set HW profile for raw flowQuoted 4 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Tuesday, October 26, 2021 8:01 PM
To: Zhang, Qi Z <[email protected]>; Wu, JingjingQuoted 2 lines
Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Wang,Haiyue
Quoted 1 line
<[email protected]>; Yan, Zhirun <[email protected]>; Guo,
Junfeng
Quoted 3 lines
<[email protected]>
Subject: [PATCH v4 2/4]net/ice/base: add function to set HW profile forraw
Quoted 4 lines
flow
Based on the parser library, we can directly set HW profile and associate
the
Quoted 7 lines
main/ctrl vsi.
Signed-off-by Junfeng Guo <[email protected]>--- drivers/net/ice/base/ice_flex_pipe.c | 55 ++++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 4 ++ drivers/net/ice/base/ice_flow.c | 85++++++++++++++++++++++++++++
drivers/net/ice/base/ice_flex_pipe.c ice_rem_prof_id_flow(struct ice_hw *hw,
Quoted 9 lines
drivers/net/ice/base/ice_flow.h | 4 ++ 4 files changed, 148 insertions(+)drivers/net/ice/base/ice_flex_pipe.c +0
-0@@ -6365,3 +6365,58 @@ ice_rem_prof_id_flow(struct ice_hw *hw,enum
Quoted 19 lines
drivers/net/ice/base/ice_flex_pipe.c +15
-0ice_block blk, u16 vsi, u64 hdl) return status; } + +/** +* ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI +flow entry +* @hw: pointer to the HW struct +* @blk: HW block +* @dest_vsi_handle: dest VSI handle +* @fdir_vsi_handle: fdir programming VSI handle +* @id: profile id (handle) +* @fv_found: found fv in fdir fv list +* +* Calling this function will update the hardware tables to enable +the +* profile indicated by the ID parameter for the VSIs specified in +the VSI Quoted 8 lines
drivers/net/ice/base/ice_flex_pipe.c ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl) · line 6385
Quoted 6 lines
+ * array. Once successfully called, the flow will be enabled.
+ */drivers/net/ice/base/ice_flex_pipe.c +4
-0+enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id, +bool fv_found)Do we really need this
fv_foundparameter?
Quoted 2 lines
The value of
fv_foundis set based on the maintained profile info list in the PMD. So we need this parameter to add profile id flow for FDIR in the shared code.
I mean if we parse fv_found = true into ice_flow_assoc_hw_prof, nothing will happen, So why not just remove the parameter and we can do below
If (!fv_found) ice_flow_assoc_hw_prof(...)
its always better to reduce unnecessary context for simple purpose in a function.
Quoted 18 lines
Quoted 4 lines
If
fv_foundis true, seems nothing has been done in this function, why not just check the flag outside the function?Yes,
ice_add_prof_id_flowshould be processed afterice_add_prof. It's ok if we just move theice_add_prof_id_flowprocessing into funcice_flow_set_hw_prof, and delete the funcice_flow_assoc_hw_profto reduce the code size.For RSS, the
ice_add_prof_id_flowfor addingdest_vsi_handleshould always be processed.
So this function has other RSS logic to add soon.Quoted 3 lines
Re: [dpdk-dev] [PATCH v4 2/4] net/ice/base: add function to set HW profile for raw flow
Quoted 118 lines
-----Original Message-----
From: Zhang, Qi Z <[email protected]>
Sent: Wednesday, October 27, 2021 10:18
To: Guo, Junfeng <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Wang, Haiyue <[email protected]>; Yan, Zhirun <[email protected]>
Subject: RE: [PATCH v4 2/4]net/ice/base: add function to set HW profile for raw flowQuoted 4 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Wednesday, October 27, 2021 9:58 AM
To: Zhang, Qi Z <[email protected]>; Wu, JingjingQuoted 2 lines
Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Wang,Haiyue
Quoted 2 lines
<[email protected]>; Yan, Zhirun <[email protected]>
Subject: RE: [PATCH v4 2/4]net/ice/base: add function to set HWprofile for
Quoted 10 lines
raw flow
Quoted 6 lines
-----Original Message-----
From: Zhang, Qi Z <[email protected]>
Sent: Wednesday, October 27, 2021 08:58
To: Guo, Junfeng <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Wang,Haiyue
Quoted 10 lines
Quoted 10 lines
<[email protected]>; Yan, Zhirun <[email protected]>
Subject: RE: [PATCH v4 2/4]net/ice/base: add function to set HW profile for raw flowQuoted 4 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Tuesday, October 26, 2021 8:01 PM
To: Zhang, Qi Z <[email protected]>; Wu, JingjingQuoted 5 lines
Quoted 5 lines
Quoted 2 lines
Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Wang,Haiyue
Quoted 1 line
<[email protected]>; Yan, Zhirun <[email protected]>;
Guo,
Quoted 21 lines
Quoted 21 lines
Junfeng
Quoted 3 lines
<[email protected]>
Subject: [PATCH v4 2/4]net/ice/base: add function to set HW profile forraw
Quoted 4 lines
flow
Based on the parser library, we can directly set HW profile and associate
the
Quoted 7 lines
main/ctrl vsi.
Signed-off-by Junfeng Guo <[email protected]>--- drivers/net/ice/base/ice_flex_pipe.c | 55 ++++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 4 ++ drivers/net/ice/base/ice_flow.c | 85++++++++++++++++++++++++++++
Quoted 3 lines
drivers/net/ice/base/ice_flow.h | 4 ++ 4 files changed, 148 insertions(+)Quoted 6 lines
Quoted 6 lines
drivers/net/ice/base/ice_flex_pipe.c ice_rem_prof_id_flow(struct ice_hw
Quoted 6 lines
drivers/net/ice/base/ice_flex_pipe.c +0
-0@@ -6365,3 +6365,58 @@ ice_rem_prof_id_flow(struct ice_hw*hw,
Quoted 29 lines
Quoted 20 lines
enum
Quoted 19 lines
drivers/net/ice/base/ice_flex_pipe.c +15
-0ice_block blk, u16 vsi, u64 hdl) return status; } + +/** +* ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI +flow entry +* @hw: pointer to the HW struct +* @blk: HW block +* @dest_vsi_handle: dest VSI handle +* @fdir_vsi_handle: fdir programming VSI handle +* @id: profile id (handle) +* @fv_found: found fv in fdir fv list +* +* Calling this function will update the hardware tables to enable +the +* profile indicated by the ID parameter for the VSIs specified in +the VSI Quoted 8 lines
drivers/net/ice/base/ice_flex_pipe.c ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl) · line 6385
Quoted 6 lines
+ * array. Once successfully called, the flow will be enabled.
+ */drivers/net/ice/base/ice_flex_pipe.c +4
-0+enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id, +bool fv_found)Do we really need this
fv_foundparameter?Quoted 1 line
The value of
fv_foundis set based on the maintained profile info list inthe PMD.
Quoted 1 line
So we need this parameter to add profile id flow for FDIR in the shared
code.
I mean if we parse
fv_found= true intoice_flow_assoc_hw_prof, nothing will happen,
So why not just remove the parameter and we can do below
Quoted 5 lines
If (!fv_found)
ice_flow_assoc_hw_prof(...)its always better to reduce unnecessary context for simple purpose in a function.
Sure, updated in the coming patch set. Thanks!
Quoted 22 lines
Quoted 9 lines
Quoted 5 lines
If
fv_foundis true, seems nothing has been done in this function, why not just check the flag outside the function?Yes,
ice_add_prof_id_flowshould be processed afterice_add_prof. It's ok if we just move theice_add_prof_id_flowprocessing into funcice_flow_set_hw_prof, and delete the funcice_flow_assoc_hw_proftoreduce
Quoted 3 lines
the code size.
For RSS, the
ice_add_prof_id_flowfor addingdest_vsi_handleshouldalways be
Quoted 7 lines
processed.
So this function has other RSS logic to add soon.Quoted 3 lines
PATCH v4 3/4 app/testpmd: update Max RAW pattern size to 512
In reply to Junfeng GuoUpdate max size for pattern in struct rte_flow_item_raw to enable protocol agnostic flow offloading.
--- app/test-pmd/cmdline_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
app/test-pmd/cmdline_flow.c +1 -1
@@ -495,7 +495,7 @@ enum index { };/** Maximum size for pattern in struct rte_flow_item_raw. */ -#define ITEM_RAW_PATTERN_SIZE 40 +#define ITEM_RAW_PATTERN_SIZE 512/** Maximum size for GENEVE option data pattern in bytes. */ #define ITEM_GENEVE_OPT_DATA_SIZE 124
Signature · 1 line
2.25.1
v5 cover enable protocol agnostic flow offloading in FDIR
Protocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing rte_flow raw API
[PATCH v4 1/4] net/ice/base: add method to disable FDIR SWAP option. [PATCH v4 2/4] net/ice/base: add function to set HW profile for raw flow. [PATCH v4 3/4] app/testpmd: update Max RAW pattern size to 512. [PATCH v4 4/4] net/ice: enable protocol agnostic flow offloading in FDIR.
Junfeng Guo (4):
net/ice/base: add method to disable FDIR SWAP option net/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
* v5:
Optimized some code logic.
* v4:
Added list to check inputset conflict.
* v3:
Added necessary base code for raw flow in FDIR.
* v2:
Enabled vxlan port add for raw flow and updated commit message
app/test-pmd/cmdline_flow.c | 2 +- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/base/ice_flex_pipe.c | 93 ++++++++- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flow.c | 89 ++++++++- drivers/net/ice/base/ice_flow.h | 4 + drivers/net/ice/ice_ethdev.h | 17 ++ drivers/net/ice/ice_fdir_filter.c | 249 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 10 files changed, 466 insertions(+), 5 deletions(-)
Signature · 1 line
2.25.1
PATCH v5 1/4 net/ice/base: add method to disable FDIR SWAP option
The SWAP Flag in the FDIR Programming Descriptor doesn't work, thus add a method to disable the FDIR SWAP option by setting the swap and inset register set with certain values. The boolean fd_swap is used to enable/disable the SWAP option.
--- drivers/net/ice/base/ice_flex_pipe.c | 44 ++++++++++++++++++++++++++-- drivers/net/ice/base/ice_flex_pipe.h | 3 +- drivers/net/ice/base/ice_flow.c | 2 +- 3 files changed, 45 insertions(+), 4 deletions(-)
drivers/net/ice/base/ice_flex_pipe.c +42 -2
@@ -4952,6 +4952,43 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,return ICE_SUCCESS ; } +/** +* ice_disable_fd_swap - set register appropriately to disable FD swap +* @hw: pointer to the HW struct +* @prof_id: profile ID +*/ +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id) +{ +u8 swap_val =ICE_SWAP_VALID ; +u8 i; +/* Since the SWAP Flag in the Programming Desc doesn't work, +* here add method to disable the SWAP Option via setting +* certain SWAP and INSET register set. +*/ +for (i =0 ; i < hw->blk[ICE_BLK_FD ].es.fvw /4 ; i++) { +u32 raw_swap =0 ; +u32 raw_in =0 ; +u8 j; + +for (j =0 ; j <4 ; j++) { + raw_swap |= (swap_val++) << (j *BITS_PER_BYTE ); + raw_in |=ICE_INSET_DFLT << (j *BITS_PER_BYTE ); + } + +/* write the FDIR swap register set */ +wr32 (hw,GLQF_FDSWAP (prof_id, i), raw_swap); + +ice_debug (hw,ICE_DBG_INIT ,"swap wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDSWAP (prof_id, i), raw_swap); + +/* write the FDIR inset register set */ +wr32 (hw,GLQF_FDINSET (prof_id, i), raw_in); + +ice_debug (hw,ICE_DBG_INIT ,"inset wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDINSET (prof_id, i), raw_in); + } +} +/** * ice_add_prof - add profile * @hw: pointer to the HW struct
@@ -4962,6 +4999,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,* @attr_cnt: number of elements in attrib array * @es: extraction sequence (length of array is determined by the block) * @masks: mask for extraction sequence +* @fd_swap: enable/disable FDIR paired src/dst fields swap option * * This function registers a profile, which matches a set of PTYPES with a * particular extraction sequence. While the hardware profile is allocated
@@ -4971,7 +5009,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks) +struct ice_fv_word *es,u16 *masks,bool fd_swap) {u32 bytes =DIVIDE_AND_ROUND_UP (ICE_FLOW_PTYPE_MAX ,BITS_PER_BYTE );ice_declare_bitmap (ptgs_used,ICE_XLT1_CNT );
@@ -4991,7 +5029,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_alloc_prof_id (hw, blk, &prof_id);if (status) goto err_ice_add_prof; -if (blk ==ICE_BLK_FD ) { +if (blk ==ICE_BLK_FD && fd_swap) {/* For Flow Director block, the extraction sequence may * need to be altered in the case where there are paired * fields that have no match. This is necessary because
@@ -5002,6 +5040,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_update_fd_swap (hw, prof_id, es);if (status) goto err_ice_add_prof; + }else if (blk ==ICE_BLK_FD ) { +ice_disable_fd_swap (hw, prof_id); } status =ice_update_prof_masking (hw, blk, prof_id, masks);if (status)
drivers/net/ice/base/ice_flex_pipe.h +2 -1
@@ -61,10 +61,11 @@ bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);/* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi (struct ice_hw *hw,enum ice_block blk,u16 vsi,u16 *vsig); +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id);enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks); +struct ice_fv_word *es,u16 *masks,bool fd_swap);void ice_init_all_prof_masks (struct ice_hw *hw);void ice_shutdown_all_prof_masks (struct ice_hw *hw); struct ice_prof_map *
drivers/net/ice/base/ice_flow.c +1 -1
@@ -2244,7 +2244,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,/* Add a HW profile for this flow profile */ status =ice_add_prof (hw, blk, prof_id, (u8 *)params->ptypes, params->attr, params->attr_cnt, params->es, - params->mask); + params->mask, true);if (status) {ice_debug (hw,ICE_DBG_FLOW ,"Error adding a HW flow profile\n" ); goto out;
Signature · 1 line
2.25.1
PATCH v5 2/4 net/ice/base: add function to set HW profile for raw flow
In reply to Junfeng GuoBased on the parser library, we can directly set HW profile and associate the main/ctrl vsi.
--- drivers/net/ice/base/ice_flex_pipe.c | 49 ++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 3 + drivers/net/ice/base/ice_flow.c | 87 ++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 4 ++ 4 files changed, 143 insertions(+)
drivers/net/ice/base/ice_flex_pipe.c +49 -0
@@ -6365,3 +6365,52 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)return status; } + +/** +* ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI flow entry +* @hw: pointer to the HW struct +* @blk: HW block +* @dest_vsi_handle: dest VSI handle +* @fdir_vsi_handle: fdir programming VSI handle +* @id: profile id (handle) +* +* Calling this function will update the hardware tables to enable the +* profile indicated by the ID parameter for the VSIs specified in the VSI +* array. Once successfully called, the flow will be enabled. +*/ +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id) +{ +enum ice_status status =ICE_SUCCESS ; +u16 vsi_num; + + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { +ice_debug (hw,ICE_DBG_FLOW ,"HW profile add failed for main VSI flow entry, %d\n" , + status); + goto err_add_prof; + } + +if (blk !=ICE_BLK_FD ) +return status; + + vsi_num =ice_get_hw_vsi_num (hw, fdir_vsi_handle); + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { +ice_debug (hw,ICE_DBG_FLOW ,"HW profile add failed for ctrl VSI flow entry, %d\n" , + status); + goto err_add_entry; + } + +return status; + +err_add_entry: + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); +ice_rem_prof_id_flow (hw, blk, vsi_num, id); +err_add_prof: +ice_flow_rem_prof (hw, blk, id); + +return status; +}
drivers/net/ice/base/ice_flex_pipe.h +3 -0
@@ -76,6 +76,9 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);enum ice_status ice_rem_prof_id_flow (struct ice_hw *hw,enum ice_block blk,u16 vsi,u64 hdl); +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id);enum ice_status ice_init_pkg (struct ice_hw *hw,u8 *buff,u32 len);enum ice_status ice_copy_and_init_pkg (struct ice_hw *hw,const u8 *buf,u32 len);
drivers/net/ice/base/ice_flow.c +87 -0
93 lines not on this page · raw message
drivers/net/ice/base/ice_flow.h +4 -0
@@ -548,6 +548,10 @@ enum ice_status ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, u16 vsig);enum ice_status +ice_flow_set_hw_prof (struct ice_hw *hw,u16 dest_vsi_handle, +u16 fdir_vsi_handle,struct ice_parser_profile *prof, +enum ice_block blk,bool fv_found); +enum ice_status ice_flow_get_hw_prof (struct ice_hw *hw,enum ice_block blk,u64 prof_id,u8 *hw_prof);
Signature · 1 line
2.25.1
PATCH v5 3/4 app/testpmd: update Max RAW pattern size to 512
In reply to Junfeng GuoUpdate max size for pattern in struct rte_flow_item_raw to enable protocol agnostic flow offloading.
--- app/test-pmd/cmdline_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
app/test-pmd/cmdline_flow.c +1 -1
@@ -495,7 +495,7 @@ enum index { };/** Maximum size for pattern in struct rte_flow_item_raw. */ -#define ITEM_RAW_PATTERN_SIZE 40 +#define ITEM_RAW_PATTERN_SIZE 512/** Maximum size for GENEVE option data pattern in bytes. */ #define ITEM_GENEVE_OPT_DATA_SIZE 124
Signature · 1 line
2.25.1
PATCH v5 4/4 net/ice: enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing rte_flow raw API.
Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
Note that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of 0x0800 (with 0xFFFF) in the mask byte string example. The prefix '0x' for the spec and mask byte (hex) strings are also omitted here.
--- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/ice_ethdev.h | 17 ++ drivers/net/ice/ice_fdir_filter.c | 249 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 5 files changed, 277 insertions(+)
doc/guides/rel_notes/release_21_11.rst +1 -0
@@ -155,6 +155,7 @@ New Features * **Updated Intel ice driver.** + * Added protocol agnostic flow offloading support in Flow Director. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow. * Added DEV_RX_OFFLOAD_TIMESTAMP support.
drivers/net/ice/ice_ethdev.h +17 -0
@@ -318,6 +318,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +const u8 *pkt_buf; +bool parser_ena; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)
@@ -487,6 +492,17 @@ struct ice_devargs {uint8_t pps_out_ena; }; +/** +* Structure to store fdir fv entry. +*/ +struct ice_fdir_prof_info { +struct LIST_ENTRY_TYPE l_entry; + +struct ice_parser_profile prof; +u16 ptype; +u64 fdir_actived_cnt; +}; +/** * Structure to store private data for each PF/VF instance. */
@@ -509,6 +525,7 @@ struct ice_adapter {struct rte_timecounter rx_tstamp_tc;struct rte_timecounter tx_tstamp_tc;bool ptp_ena; +struct LIST_HEAD_TYPE fdir_prof_list;#ifdef RTE_ARCH_X86 bool rx_use_avx2;bool rx_use_avx512;
drivers/net/ice/ice_fdir_filter.c +249 -0
316 lines not on this page · raw message
drivers/net/ice/ice_generic_flow.c +7 -0
@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = { RTE_FLOW_ITEM_TYPE_END, }; +/* raw */ +enum rte_flow_item_type pattern_raw[] = { +RTE_FLOW_ITEM_TYPE_RAW , +RTE_FLOW_ITEM_TYPE_END , +}; +/* L2 */ enum rte_flow_item_type pattern_ethertype[] = {RTE_FLOW_ITEM_TYPE_ETH ,
@@ -2081,6 +2087,7 @@ struct ice_ptype_match { };static struct ice_ptype_match ice_ptype_map[] = { + {pattern_raw,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4_udp,ICE_PTYPE_IPV4_UDP_PAY }, {pattern_eth_ipv4_tcp,ICE_PTYPE_IPV4_TCP_PAY },
drivers/net/ice/ice_generic_flow.h +3 -0
@@ -124,6 +124,9 @@/* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; +/* raw pattern */ +extern enum rte_flow_item_type pattern_raw[]; +/* L2 */ extern enum rte_flow_item_type pattern_ethertype[];extern enum rte_flow_item_type pattern_ethertype_vlan[];
Signature · 1 line
2.25.1
v6 cover enable protocol agnostic flow offloading in FDIR
Protocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing rte_flow raw API.
[PATCH v4 1/4] net/ice/base: add method to disable FDIR SWAP option. [PATCH v4 2/4] net/ice/base: add function to set HW profile for raw flow. [PATCH v4 3/4] app/testpmd: update Max RAW pattern size to 512. [PATCH v4 4/4] net/ice: enable protocol agnostic flow offloading in FDIR.
Junfeng Guo (4):
net/ice/base: add method to disable FDIR SWAP option net/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
* v6:
Removed redundant code.
* v5:
Optimized some code logic.
* v4:
Added list to check inputset conflict.
* v3:
Added necessary base code for raw flow in FDIR.
* v2:
Enabled vxlan port add for raw flow and updated commit message
app/test-pmd/cmdline_flow.c | 2 +- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/base/ice_flex_pipe.c | 93 ++++++++- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flow.c | 86 ++++++++- drivers/net/ice/base/ice_flow.h | 4 + drivers/net/ice/ice_ethdev.h | 17 ++ drivers/net/ice/ice_fdir_filter.c | 257 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 10 files changed, 471 insertions(+), 5 deletions(-)
Signature · 1 line
2.25.1
PATCH v6 1/4 net/ice/base: add method to disable FDIR SWAP option
The SWAP Flag in the FDIR Programming Descriptor doesn't work, thus add a method to disable the FDIR SWAP option by setting the swap and inset register set with certain values. The boolean fd_swap is used to enable/disable the SWAP option.
--- drivers/net/ice/base/ice_flex_pipe.c | 44 ++++++++++++++++++++++++++-- drivers/net/ice/base/ice_flex_pipe.h | 3 +- drivers/net/ice/base/ice_flow.c | 2 +- 3 files changed, 45 insertions(+), 4 deletions(-)
drivers/net/ice/base/ice_flex_pipe.c +42 -2
@@ -4952,6 +4952,43 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,return ICE_SUCCESS ; } +/** +* ice_disable_fd_swap - set register appropriately to disable FD swap +* @hw: pointer to the HW struct +* @prof_id: profile ID +*/ +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id) +{ +u8 swap_val =ICE_SWAP_VALID ; +u8 i; +/* Since the SWAP Flag in the Programming Desc doesn't work, +* here add method to disable the SWAP Option via setting +* certain SWAP and INSET register set. +*/ +for (i =0 ; i < hw->blk[ICE_BLK_FD ].es.fvw /4 ; i++) { +u32 raw_swap =0 ; +u32 raw_in =0 ; +u8 j; + +for (j =0 ; j <4 ; j++) { + raw_swap |= (swap_val++) << (j *BITS_PER_BYTE ); + raw_in |=ICE_INSET_DFLT << (j *BITS_PER_BYTE ); + } + +/* write the FDIR swap register set */ +wr32 (hw,GLQF_FDSWAP (prof_id, i), raw_swap); + +ice_debug (hw,ICE_DBG_INIT ,"swap wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDSWAP (prof_id, i), raw_swap); + +/* write the FDIR inset register set */ +wr32 (hw,GLQF_FDINSET (prof_id, i), raw_in); + +ice_debug (hw,ICE_DBG_INIT ,"inset wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDINSET (prof_id, i), raw_in); + } +} +/** * ice_add_prof - add profile * @hw: pointer to the HW struct
@@ -4962,6 +4999,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,* @attr_cnt: number of elements in attrib array * @es: extraction sequence (length of array is determined by the block) * @masks: mask for extraction sequence +* @fd_swap: enable/disable FDIR paired src/dst fields swap option * * This function registers a profile, which matches a set of PTYPES with a * particular extraction sequence. While the hardware profile is allocated
@@ -4971,7 +5009,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks) +struct ice_fv_word *es,u16 *masks,bool fd_swap) {u32 bytes =DIVIDE_AND_ROUND_UP (ICE_FLOW_PTYPE_MAX ,BITS_PER_BYTE );ice_declare_bitmap (ptgs_used,ICE_XLT1_CNT );
@@ -4991,7 +5029,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_alloc_prof_id (hw, blk, &prof_id);if (status) goto err_ice_add_prof; -if (blk ==ICE_BLK_FD ) { +if (blk ==ICE_BLK_FD && fd_swap) {/* For Flow Director block, the extraction sequence may * need to be altered in the case where there are paired * fields that have no match. This is necessary because
@@ -5002,6 +5040,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_update_fd_swap (hw, prof_id, es);if (status) goto err_ice_add_prof; + }else if (blk ==ICE_BLK_FD ) { +ice_disable_fd_swap (hw, prof_id); } status =ice_update_prof_masking (hw, blk, prof_id, masks);if (status)
drivers/net/ice/base/ice_flex_pipe.h +2 -1
@@ -61,10 +61,11 @@ bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);/* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi (struct ice_hw *hw,enum ice_block blk,u16 vsi,u16 *vsig); +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id);enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks); +struct ice_fv_word *es,u16 *masks,bool fd_swap);void ice_init_all_prof_masks (struct ice_hw *hw);void ice_shutdown_all_prof_masks (struct ice_hw *hw); struct ice_prof_map *
drivers/net/ice/base/ice_flow.c +1 -1
@@ -2244,7 +2244,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,/* Add a HW profile for this flow profile */ status =ice_add_prof (hw, blk, prof_id, (u8 *)params->ptypes, params->attr, params->attr_cnt, params->es, - params->mask); + params->mask, true);if (status) {ice_debug (hw,ICE_DBG_FLOW ,"Error adding a HW flow profile\n" ); goto out;
Signature · 1 line
2.25.1
PATCH v6 2/4 net/ice/base: add function to set HW profile for raw flow
In reply to Junfeng GuoBased on the parser library, we can directly set HW profile and associate the main/ctrl vsi.
--- drivers/net/ice/base/ice_flex_pipe.c | 49 ++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 3 + drivers/net/ice/base/ice_flow.c | 84 ++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 4 ++ 4 files changed, 140 insertions(+)
drivers/net/ice/base/ice_flex_pipe.c +49 -0
@@ -6365,3 +6365,52 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)return status; } + +/** +* ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI flow entry +* @hw: pointer to the HW struct +* @blk: HW block +* @dest_vsi_handle: dest VSI handle +* @fdir_vsi_handle: fdir programming VSI handle +* @id: profile id (handle) +* +* Calling this function will update the hardware tables to enable the +* profile indicated by the ID parameter for the VSIs specified in the VSI +* array. Once successfully called, the flow will be enabled. +*/ +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id) +{ +enum ice_status status =ICE_SUCCESS ; +u16 vsi_num; + + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { +ice_debug (hw,ICE_DBG_FLOW ,"HW profile add failed for main VSI flow entry, %d\n" , + status); + goto err_add_prof; + } + +if (blk !=ICE_BLK_FD ) +return status; + + vsi_num =ice_get_hw_vsi_num (hw, fdir_vsi_handle); + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { +ice_debug (hw,ICE_DBG_FLOW ,"HW profile add failed for ctrl VSI flow entry, %d\n" , + status); + goto err_add_entry; + } + +return status; + +err_add_entry: + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); +ice_rem_prof_id_flow (hw, blk, vsi_num, id); +err_add_prof: +ice_flow_rem_prof (hw, blk, id); + +return status; +}
drivers/net/ice/base/ice_flex_pipe.h +3 -0
@@ -76,6 +76,9 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);enum ice_status ice_rem_prof_id_flow (struct ice_hw *hw,enum ice_block blk,u16 vsi,u64 hdl); +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id);enum ice_status ice_init_pkg (struct ice_hw *hw,u8 *buff,u32 len);enum ice_status ice_copy_and_init_pkg (struct ice_hw *hw,const u8 *buf,u32 len);
drivers/net/ice/base/ice_flow.c +84 -0
90 lines not on this page · raw message
drivers/net/ice/base/ice_flow.h +4 -0
@@ -548,6 +548,10 @@ enum ice_status ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, u16 vsig);enum ice_status +ice_flow_set_hw_prof (struct ice_hw *hw,u16 dest_vsi_handle, +u16 fdir_vsi_handle,struct ice_parser_profile *prof, +enum ice_block blk); +enum ice_status ice_flow_get_hw_prof (struct ice_hw *hw,enum ice_block blk,u64 prof_id,u8 *hw_prof);
Signature · 1 line
2.25.1
PATCH v6 3/4 app/testpmd: update Max RAW pattern size to 512
In reply to Junfeng GuoUpdate max size for pattern in struct rte_flow_item_raw to enable protocol agnostic flow offloading.
--- app/test-pmd/cmdline_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
app/test-pmd/cmdline_flow.c +1 -1
@@ -495,7 +495,7 @@ enum index { };/** Maximum size for pattern in struct rte_flow_item_raw. */ -#define ITEM_RAW_PATTERN_SIZE 40 +#define ITEM_RAW_PATTERN_SIZE 512/** Maximum size for GENEVE option data pattern in bytes. */ #define ITEM_GENEVE_OPT_DATA_SIZE 124
Signature · 1 line
2.25.1
PATCH v6 4/4 net/ice: enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing rte_flow raw API.
Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
Note that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of 0x0800 (with 0xFFFF) in the mask byte string example. The prefix '0x' for the spec and mask byte (hex) strings are also omitted here.
--- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/ice_ethdev.h | 17 ++ drivers/net/ice/ice_fdir_filter.c | 257 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 5 files changed, 285 insertions(+)
doc/guides/rel_notes/release_21_11.rst +1 -0
@@ -167,6 +167,7 @@ New Features * **Updated Intel ice driver.** + * Added protocol agnostic flow offloading support in Flow Director. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow. * Added DEV_RX_OFFLOAD_TIMESTAMP support.
drivers/net/ice/ice_ethdev.h +17 -0
@@ -318,6 +318,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +const u8 *pkt_buf; +bool parser_ena; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)
@@ -487,6 +492,17 @@ struct ice_devargs {uint8_t pps_out_ena; }; +/** +* Structure to store fdir fv entry. +*/ +struct ice_fdir_prof_info { +struct LIST_ENTRY_TYPE l_entry; + +struct ice_parser_profile prof; +u16 ptg; +u64 fdir_actived_cnt; +}; +/** * Structure to store private data for each PF/VF instance. */
@@ -509,6 +525,7 @@ struct ice_adapter {struct rte_timecounter rx_tstamp_tc;struct rte_timecounter tx_tstamp_tc;bool ptp_ena; +struct LIST_HEAD_TYPE fdir_prof_list;#ifdef RTE_ARCH_X86 bool rx_use_avx2;bool rx_use_avx512;
drivers/net/ice/ice_fdir_filter.c +257 -0
324 lines not on this page · raw message
drivers/net/ice/ice_generic_flow.c +7 -0
@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = { RTE_FLOW_ITEM_TYPE_END, }; +/* raw */ +enum rte_flow_item_type pattern_raw[] = { +RTE_FLOW_ITEM_TYPE_RAW , +RTE_FLOW_ITEM_TYPE_END , +}; +/* L2 */ enum rte_flow_item_type pattern_ethertype[] = {RTE_FLOW_ITEM_TYPE_ETH ,
@@ -2081,6 +2087,7 @@ struct ice_ptype_match { };static struct ice_ptype_match ice_ptype_map[] = { + {pattern_raw,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4_udp,ICE_PTYPE_IPV4_UDP_PAY }, {pattern_eth_ipv4_tcp,ICE_PTYPE_IPV4_TCP_PAY },
drivers/net/ice/ice_generic_flow.h +3 -0
@@ -124,6 +124,9 @@/* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; +/* raw pattern */ +extern enum rte_flow_item_type pattern_raw[]; +/* L2 */ extern enum rte_flow_item_type pattern_ethertype[];extern enum rte_flow_item_type pattern_ethertype_vlan[];
Signature · 1 line
2.25.1
v7 cover enable protocol agnostic flow offloading in FDIR
Protocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing rte_flow raw API.
[PATCH v7 1/4] net/ice/base: add method to disable FDIR SWAP option. [PATCH v7 2/4] net/ice/base: add function to set HW profile for raw flow. [PATCH v7 3/4] app/testpmd: update Max RAW pattern size to 512. [PATCH v7 4/4] net/ice: enable protocol agnostic flow offloading in FDIR.
Junfeng Guo (4):
net/ice/base: add method to disable FDIR SWAP option net/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
* v7:
Fix LIST_FOR_EACH_ENTRY logic.
* v6:
Removed redundant code.
* v5:
Optimized some code logic.
* v4:
Added list to check inputset conflict.
* v3:
Added necessary base code for raw flow in FDIR.
* v2:
Enabled vxlan port add for raw flow and updated commit message
app/test-pmd/cmdline_flow.c | 2 +- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/base/ice_flex_pipe.c | 93 ++++++++- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flow.c | 86 +++++++- drivers/net/ice/base/ice_flow.h | 4 + drivers/net/ice/ice_ethdev.h | 17 ++ drivers/net/ice/ice_fdir_filter.c | 260 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 10 files changed, 474 insertions(+), 5 deletions(-)
Signature · 1 line
2.25.1
PATCH v7 1/4 net/ice/base: add method to disable FDIR SWAP option
The SWAP Flag in the FDIR Programming Descriptor doesn't work, thus add a method to disable the FDIR SWAP option by setting the swap and inset register set with certain values. The boolean fd_swap is used to enable/disable the SWAP option.
--- drivers/net/ice/base/ice_flex_pipe.c | 44 ++++++++++++++++++++++++++-- drivers/net/ice/base/ice_flex_pipe.h | 3 +- drivers/net/ice/base/ice_flow.c | 2 +- 3 files changed, 45 insertions(+), 4 deletions(-)
drivers/net/ice/base/ice_flex_pipe.c +42 -2
@@ -4952,6 +4952,43 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,return ICE_SUCCESS ; } +/** +* ice_disable_fd_swap - set register appropriately to disable FD swap +* @hw: pointer to the HW struct +* @prof_id: profile ID +*/ +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id) +{ +u8 swap_val =ICE_SWAP_VALID ; +u8 i; +/* Since the SWAP Flag in the Programming Desc doesn't work, +* here add method to disable the SWAP Option via setting +* certain SWAP and INSET register set. +*/ +for (i =0 ; i < hw->blk[ICE_BLK_FD ].es.fvw /4 ; i++) { +u32 raw_swap =0 ; +u32 raw_in =0 ; +u8 j; + +for (j =0 ; j <4 ; j++) { + raw_swap |= (swap_val++) << (j *BITS_PER_BYTE ); + raw_in |=ICE_INSET_DFLT << (j *BITS_PER_BYTE ); + } + +/* write the FDIR swap register set */ +wr32 (hw,GLQF_FDSWAP (prof_id, i), raw_swap); + +ice_debug (hw,ICE_DBG_INIT ,"swap wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDSWAP (prof_id, i), raw_swap); + +/* write the FDIR inset register set */ +wr32 (hw,GLQF_FDINSET (prof_id, i), raw_in); + +ice_debug (hw,ICE_DBG_INIT ,"inset wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDINSET (prof_id, i), raw_in); + } +} +/** * ice_add_prof - add profile * @hw: pointer to the HW struct
@@ -4962,6 +4999,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,* @attr_cnt: number of elements in attrib array * @es: extraction sequence (length of array is determined by the block) * @masks: mask for extraction sequence +* @fd_swap: enable/disable FDIR paired src/dst fields swap option * * This function registers a profile, which matches a set of PTYPES with a * particular extraction sequence. While the hardware profile is allocated
@@ -4971,7 +5009,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks) +struct ice_fv_word *es,u16 *masks,bool fd_swap) {u32 bytes =DIVIDE_AND_ROUND_UP (ICE_FLOW_PTYPE_MAX ,BITS_PER_BYTE );ice_declare_bitmap (ptgs_used,ICE_XLT1_CNT );
@@ -4991,7 +5029,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_alloc_prof_id (hw, blk, &prof_id);if (status) goto err_ice_add_prof; -if (blk ==ICE_BLK_FD ) { +if (blk ==ICE_BLK_FD && fd_swap) {/* For Flow Director block, the extraction sequence may * need to be altered in the case where there are paired * fields that have no match. This is necessary because
@@ -5002,6 +5040,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_update_fd_swap (hw, prof_id, es);if (status) goto err_ice_add_prof; + }else if (blk ==ICE_BLK_FD ) { +ice_disable_fd_swap (hw, prof_id); } status =ice_update_prof_masking (hw, blk, prof_id, masks);if (status)
drivers/net/ice/base/ice_flex_pipe.h +2 -1
@@ -61,10 +61,11 @@ bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);/* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi (struct ice_hw *hw,enum ice_block blk,u16 vsi,u16 *vsig); +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id);enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks); +struct ice_fv_word *es,u16 *masks,bool fd_swap);void ice_init_all_prof_masks (struct ice_hw *hw);void ice_shutdown_all_prof_masks (struct ice_hw *hw); struct ice_prof_map *
drivers/net/ice/base/ice_flow.c +1 -1
@@ -2244,7 +2244,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,/* Add a HW profile for this flow profile */ status =ice_add_prof (hw, blk, prof_id, (u8 *)params->ptypes, params->attr, params->attr_cnt, params->es, - params->mask); + params->mask, true);if (status) {ice_debug (hw,ICE_DBG_FLOW ,"Error adding a HW flow profile\n" ); goto out;
Signature · 1 line
2.25.1
Re: [dpdk-dev] [PATCH v7 1/4] net/ice/base: add method to disable FDIR SWAP option
Quoted 12 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Thursday, October 28, 2021 5:14 PM
To: Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Xu, Ting <[email protected]>; Guo, Junfeng <[email protected]>
Subject: [PATCH v7 1/4]net/ice/base: add method to disable FDIR SWAP option
Quoted 6 lines
The SWAP Flag in the FDIR Programming Descriptor doesn't work, thus add a method to disable the FDIR SWAP option by setting the swap and inset register set with certain values. The boolean
fd_swapis used to enable/disable the SWAP option.Signed-off-by Junfeng Guo <[email protected]>
Applied to dpdk-next-net-intel.
Thanks.
Qi
Re: [dpdk-dev] [PATCH v7 1/4] net/ice/base: add method to disable FDIR SWAP option
In reply to Junfeng GuoQuoted 3 lines · Junfeng Guo
The SWAP Flag in the FDIR Programming Descriptor doesn't work, thus add a method to disable the FDIR SWAP option by setting the swap and inset register set with certain values.
Can you please briefly describe why 'SWAP Flag in the FDIR Programming Descriptor' is not working?
Is it HW limitation, or specific FW version issue etc...
Quoted 2 lines
The boolean
fd_swapis used to enable/disable the SWAP option.
In the code, 'fd_swap' set as 'true', so I assume swap is not disabled by default, when the 'ice_disable_fd_swap()' is called?
Quoted 1 line
Signed-off-by Junfeng Guo<[email protected]>
PATCH v7 2/4 net/ice/base: add function to set HW profile for raw flow
In reply to Junfeng GuoBased on the parser library, we can directly set HW profile and associate the main/ctrl vsi.
--- drivers/net/ice/base/ice_flex_pipe.c | 49 ++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 3 + drivers/net/ice/base/ice_flow.c | 84 ++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 4 ++ 4 files changed, 140 insertions(+)
drivers/net/ice/base/ice_flex_pipe.c +49 -0
@@ -6365,3 +6365,52 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)return status; } + +/** +* ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI flow entry +* @hw: pointer to the HW struct +* @blk: HW block +* @dest_vsi_handle: dest VSI handle +* @fdir_vsi_handle: fdir programming VSI handle +* @id: profile id (handle) +* +* Calling this function will update the hardware tables to enable the +* profile indicated by the ID parameter for the VSIs specified in the VSI +* array. Once successfully called, the flow will be enabled. +*/ +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id) +{ +enum ice_status status =ICE_SUCCESS ; +u16 vsi_num; + + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { +ice_debug (hw,ICE_DBG_FLOW ,"HW profile add failed for main VSI flow entry, %d\n" , + status); + goto err_add_prof; + } + +if (blk !=ICE_BLK_FD ) +return status; + + vsi_num =ice_get_hw_vsi_num (hw, fdir_vsi_handle); + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { +ice_debug (hw,ICE_DBG_FLOW ,"HW profile add failed for ctrl VSI flow entry, %d\n" , + status); + goto err_add_entry; + } + +return status; + +err_add_entry: + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); +ice_rem_prof_id_flow (hw, blk, vsi_num, id); +err_add_prof: +ice_flow_rem_prof (hw, blk, id); + +return status; +}
drivers/net/ice/base/ice_flex_pipe.h +3 -0
@@ -76,6 +76,9 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);enum ice_status ice_rem_prof_id_flow (struct ice_hw *hw,enum ice_block blk,u16 vsi,u64 hdl); +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id);enum ice_status ice_init_pkg (struct ice_hw *hw,u8 *buff,u32 len);enum ice_status ice_copy_and_init_pkg (struct ice_hw *hw,const u8 *buf,u32 len);
drivers/net/ice/base/ice_flow.c +84 -0
90 lines not on this page · raw message
drivers/net/ice/base/ice_flow.h +4 -0
@@ -548,6 +548,10 @@ enum ice_status ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, u16 vsig);enum ice_status +ice_flow_set_hw_prof (struct ice_hw *hw,u16 dest_vsi_handle, +u16 fdir_vsi_handle,struct ice_parser_profile *prof, +enum ice_block blk); +enum ice_status ice_flow_get_hw_prof (struct ice_hw *hw,enum ice_block blk,u64 prof_id,u8 *hw_prof);
Signature · 1 line
2.25.1
Re: [dpdk-dev] [PATCH v7 2/4] net/ice/base: add function to set HW profile for raw flow
Quoted 12 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Thursday, October 28, 2021 5:14 PM
To: Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Xu, Ting <[email protected]>; Guo, Junfeng <[email protected]>
Subject: [PATCH v7 2/4]net/ice/base: add function to set HW profile for raw flow
Quoted 4 lines
Based on the parser library, we can directly set HW profile and associate the main/ctrl vsi.
Signed-off-by Junfeng Guo <[email protected]>
As this is the last base code patch for DPDK 21.11, update FreeBSD release version in driver/net/ice/base/README during merge.
Applied to dpdk-next-net-intel.
Thanks
Qi
Quoted 199 lines
--- drivers/net/ice/base/ice_flex_pipe.c | 49 ++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 3 + drivers/net/ice/base/ice_flow.c | 84 ++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 4 ++ 4 files changed, 140 insertions(+)drivers/net/ice/base/ice_flex_pipe.c +25
-0@@ -6365,3 +6365,52 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl) return status; } + +/** +* ice_flow_assoc_hw_prof - add profile id flow for main/ctrl VSI flow +entry +* @hw: pointer to the HW struct +* @blk: HW block +* @dest_vsi_handle: dest VSI handle +* @fdir_vsi_handle: fdir programming VSI handle +* @id: profile id (handle) +* +* Calling this function will update the hardware tables to enable the +* profile indicated by the ID parameter for the VSIs specified in the +VSI +* array. Once successfully called, the flow will be enabled. +*/ +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id) { +enum ice_status status =ICE_SUCCESS ; +u16 vsi_num; + + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { + ice_debug(hw, ICE_DBG_FLOW, "HW profile add failed for main VSIflow entry, %d\n",
drivers/net/ice/base/ice_flex_pipe.c +11
-0+ status); + goto err_add_prof; + } + +if (blk !=ICE_BLK_FD ) +return status; + + vsi_num =ice_get_hw_vsi_num (hw, fdir_vsi_handle); + status =ice_add_prof_id_flow (hw, blk, vsi_num, id); +if (status) { + ice_debug(hw, ICE_DBG_FLOW, "HW profile add failed for ctrl VSIflow entry, %d\n",
drivers/net/ice/base/ice_flex_pipe.c +14
-0+ status); + goto err_add_entry; + } + +return status; + +err_add_entry: + vsi_num =ice_get_hw_vsi_num (hw, dest_vsi_handle); +ice_rem_prof_id_flow (hw, blk, vsi_num, id); +err_add_prof: +ice_flow_rem_prof (hw, blk, id); + +return status; +}drivers/net/ice/base/ice_flex_pipe.h +0
-0@@ -76,6 +76,9 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64hdl); enum
ice_statusice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);drivers/net/ice/base/ice_flex_pipe.h +3
-0+enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id); enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len); enum
ice_statusice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len);drivers/net/ice/base/ice_flow.c +85
-0@@ -2524,6 +2524,90 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enumice_block blk, return status; } +#define FLAG_GTP_EH_PDU_LINK BIT_ULL(13) +#define FLAG_GTP_EH_PDU BIT_ULL(14) + +#define FLAG_GTPU_MSK \ + (FLAG_GTP_EH_PDU | FLAG_GTP_EH_PDU_LINK) +#define FLAG_GTPU_DW \ + (FLAG_GTP_EH_PDU | FLAG_GTP_EH_PDU_LINK) +#define FLAG_GTPU_UP \ + (FLAG_GTP_EH_PDU) +/** +* ice_flow_set_hw_prof - Set HW flow profile based on the parsed +profile info +* @hw: pointer to the HW struct +* @dest_vsi_handle: dest VSI handle +* @fdir_vsi_handle: fdir programming VSI handle +* @prof: stores parsed profile info from raw flow +* @blk: classification stage +*/ +enum ice_status +ice_flow_set_hw_prof (struct ice_hw *hw,u16 dest_vsi_handle, +u16 fdir_vsi_handle,struct ice_parser_profile *prof, +enum ice_block blk) +{ +int id =ice_find_first_bit (prof->ptypes,UINT16_MAX ); +struct ice_flow_prof_params *params; +u8 fv_words = hw->blk[blk].es.fvw; +enum ice_status status; +u16 vsi_num; +int i, idx; + + params = (struct ice_flow_prof_params *)ice_malloc (hw,sizeof (*params)); +if (!params) +return ICE_ERR_NO_MEMORY ; + +for (i =0 ; i <ICE_MAX_FV_WORDS ; i++) { + params->es[i].prot_id =ICE_PROT_INVALID ; + params->es[i].off =ICE_FV_OFFSET_INVAL ; + } + +for (i =0 ; i < prof->fv_num; i++) { +if (hw->blk[blk].es.reverse) + idx = fv_words - i -1 ; +else + idx = i; + params->es[idx].prot_id = prof->fv[i].proto_id; + params->es[idx].off = prof->fv[i].offset; + params->mask[idx] =CPU_TO_BE16 (prof->fv[i].msk); + } + +switch (prof->flags) { +case FLAG_GTPU_DW : + params->attr = ice_attr_gtpu_down; + params->attr_cnt =ARRAY_SIZE (ice_attr_gtpu_down); +break ; +case FLAG_GTPU_UP : + params->attr = ice_attr_gtpu_up; + params->attr_cnt =ARRAY_SIZE (ice_attr_gtpu_up); +break ; +default : +if (prof->flags_msk &FLAG_GTPU_MSK ) { + params->attr = ice_attr_gtpu_session; + params->attr_cnt =ARRAY_SIZE (ice_attr_gtpu_session); + } +break ; + } + + status =ice_add_prof (hw, blk, id, (u8 *)prof->ptypes, + params->attr, params->attr_cnt, + params->es, params->mask, false); +if (status) + goto free_params; + + status =ice_flow_assoc_hw_prof (hw, blk, dest_vsi_handle, + fdir_vsi_handle, id); +if (status) + goto free_params; + +return ICE_SUCCESS ; + +free_params: +ice_free (hw, params); + +return status; +} +/** * ice_flow_add_prof - Add a flow profile for packet segments and matched fields
* @hw: pointer to the HW structdrivers/net/ice/base/ice_flow.h +4
-1@@ -548,6 +548,10 @@ enum ice_status ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, u16 vsig);enum ice_status +ice_flow_set_hw_prof (struct ice_hw *hw,u16 dest_vsi_handle, +u16 fdir_vsi_handle,struct ice_parser_profile *prof, +enum ice_block blk); +enum ice_status ice_flow_get_hw_prof (struct ice_hw *hw,enum ice_block blk,u64 prof_id,u8 *hw_prof); --2.25.1
Re: [dpdk-dev] [PATCH v7 2/4] net/ice/base: add function to set HW profile for raw flow
In reply to Junfeng GuoQuoted 2 lines · Junfeng Guo
Based on the parser library, we can directly set HW profile and associate the main/ctrl vsi.
This shared code function is not used by driver, will it be enabled later or is it for shared code sync, can you please clarify in the commit log.
Quoted 8 lines
Signed-off-by Junfeng Guo <[email protected]>--- drivers/net/ice/base/ice_flex_pipe.c | 49 ++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 3 + drivers/net/ice/base/ice_flow.c | 84 ++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 4 ++ 4 files changed, 140 insertions(+)
The commit in the next-net-intel repo has README file too to update the version, I think better to have it in the next version of the set to keep record of the change.
Thanks,
ferruh
PATCH v7 3/4 app/testpmd: update Max RAW pattern size to 512
In reply to Junfeng GuoUpdate max size for pattern in struct rte_flow_item_raw to enable protocol agnostic flow offloading.
--- app/test-pmd/cmdline_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
app/test-pmd/cmdline_flow.c +1 -1
@@ -495,7 +495,7 @@ enum index { };/** Maximum size for pattern in struct rte_flow_item_raw. */ -#define ITEM_RAW_PATTERN_SIZE 40 +#define ITEM_RAW_PATTERN_SIZE 512/** Maximum size for GENEVE option data pattern in bytes. */ #define ITEM_GENEVE_OPT_DATA_SIZE 124
Signature · 1 line
2.25.1
Re: [dpdk-dev] [PATCH v7 3/4] app/testpmd: update Max RAW pattern size to 512
Quoted 11 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Thursday, October 28, 2021 5:14 PM
To: Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Xu, Ting <[email protected]>; Guo, Junfeng <[email protected]>
Subject: [PATCH v7 3/4] app/testpmd: update Max RAW pattern size to 512
Quoted 4 lines
Update max size for pattern in struct
rte_flow_item_rawto enable protocol agnostic flow offloading.Signed-off-by Junfeng Guo <[email protected]>
Quoted 19 lines
--- app/test-pmd/cmdline_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)app/test-pmd/cmdline_flow.c index renamed from app/test-pmd/cmdline_flow.c +0
-0
d8218771fb..ef24710bd8100644app/test-pmd/cmdline_flow.c +0
-0@@ -495,7 +495,7 @@ enum index { }; /** Maximum size for pattern in struct rte_flow_item_raw. */ -#define
ITEM_RAW_PATTERN_SIZE40
+#defineITEM_RAW_PATTERN_SIZE512/** Maximum size for GENEVE option data pattern in bytes. */ #define
ITEM_GENEVE_OPT_DATA_SIZE124
--
2.25.1
PATCH v7 4/4 net/ice: enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing rte_flow raw API.
Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
Note that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of 0x0800 (with 0xFFFF) in the mask byte string example. The prefix '0x' for the spec and mask byte (hex) strings are also omitted here.
--- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/ice_ethdev.h | 17 ++ drivers/net/ice/ice_fdir_filter.c | 260 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 5 files changed, 288 insertions(+)
doc/guides/rel_notes/release_21_11.rst +1 -0
@@ -167,6 +167,7 @@ New Features * **Updated Intel ice driver.** + * Added protocol agnostic flow offloading support in Flow Director. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow. * Added DEV_RX_OFFLOAD_TIMESTAMP support.
drivers/net/ice/ice_ethdev.h +17 -0
@@ -318,6 +318,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +const u8 *pkt_buf; +bool parser_ena; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)
@@ -487,6 +492,17 @@ struct ice_devargs {uint8_t pps_out_ena; }; +/** +* Structure to store fdir fv entry. +*/ +struct ice_fdir_prof_info { +struct LIST_ENTRY_TYPE l_entry; + +struct ice_parser_profile prof; +u16 ptg; +u64 fdir_actived_cnt; +}; +/** * Structure to store private data for each PF/VF instance. */
@@ -509,6 +525,7 @@ struct ice_adapter {struct rte_timecounter rx_tstamp_tc;struct rte_timecounter tx_tstamp_tc;bool ptp_ena; +struct LIST_HEAD_TYPE fdir_prof_list;#ifdef RTE_ARCH_X86 bool rx_use_avx2;bool rx_use_avx512;
drivers/net/ice/ice_fdir_filter.c +260 -0
327 lines not on this page · raw message
drivers/net/ice/ice_generic_flow.c +7 -0
@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = { RTE_FLOW_ITEM_TYPE_END, }; +/* raw */ +enum rte_flow_item_type pattern_raw[] = { +RTE_FLOW_ITEM_TYPE_RAW , +RTE_FLOW_ITEM_TYPE_END , +}; +/* L2 */ enum rte_flow_item_type pattern_ethertype[] = {RTE_FLOW_ITEM_TYPE_ETH ,
@@ -2081,6 +2087,7 @@ struct ice_ptype_match { };static struct ice_ptype_match ice_ptype_map[] = { + {pattern_raw,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4_udp,ICE_PTYPE_IPV4_UDP_PAY }, {pattern_eth_ipv4_tcp,ICE_PTYPE_IPV4_TCP_PAY },
drivers/net/ice/ice_generic_flow.h +3 -0
@@ -124,6 +124,9 @@/* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; +/* raw pattern */ +extern enum rte_flow_item_type pattern_raw[]; +/* L2 */ extern enum rte_flow_item_type pattern_ethertype[];extern enum rte_flow_item_type pattern_ethertype_vlan[];
Signature · 1 line
2.25.1
Re: [dpdk-dev] [PATCH v7 4/4] net/ice: enable protocol agnostic flow offloading in FDIR
Quoted 161 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Thursday, October 28, 2021 5:14 PM
To: Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Xu, Ting <[email protected]>; Guo, Junfeng <[email protected]>
Subject: [PATCH v7 4/4] net/ice: enable protocol agnostic flow offloading in FDIRProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing
rte_flowraw API.Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:flow create 0 ingress pattern raw \
pattern spec \
0000000000000000000000000800450000140000400040100000000000000 1020304 \ pattern mask \000000000000000000000000000000000000000000000000000000000000ffffffff \ / end actions queue index 3 / mark id 3 / endNote that mask of some key bits (e.g.,
0x0800to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of0x0800(with0xFFFF) in the mask byte string example. The prefix '0x' for the spec and mask byte (hex) strings are also omitted here.Signed-off-by Junfeng Guo <[email protected]>--- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/ice_ethdev.h | 17 ++ drivers/net/ice/ice_fdir_filter.c | 260 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 5 files changed, 288 insertions(+)doc/guides/rel_notes/release_21_11.rst +1
-0@@ -167,6 +167,7 @@ New Features * **Updated Intel ice driver.** + * Added protocol agnostic flow offloading support in Flow Director. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow. * Added DEV_RX_OFFLOAD_TIMESTAMP support.drivers/net/ice/ice_ethdev.h index renamed from drivers/net/ice/ice_ethdev.h +0
-0
599e0028f7..441242ee89100644drivers/net/ice/ice_ethdev.h +17
-0@@ -318,6 +318,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +const u8 *pkt_buf; +bool parser_ena; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)@@ -487,6 +492,17 @@ struct ice_devargs {uint8_t pps_out_ena; }; +/** +* Structure to store fdir fv entry. +*/ +struct ice_fdir_prof_info { +struct LIST_ENTRY_TYPE l_entry; + +struct ice_parser_profile prof; +u16 ptg; +u64 fdir_actived_cnt; +}; +/** * Structure to store private data for each PF/VF instance. */ @@ -509,6 +525,7 @@ struct ice_adapter {struct rte_timecounter rx_tstamp_tc;struct rte_timecounter tx_tstamp_tc;bool ptp_ena; +struct LIST_HEAD_TYPE fdir_prof_list;#ifdef RTE_ARCH_X86 bool rx_use_avx2;bool rx_use_avx512;drivers/net/ice/ice_fdir_filter.c +1
-0@@ -107,6 +107,7 @@ ICE_INSET_NAT_T_ESP_SPI) static struct ice_pattern_match_item ice_fdir_pattern_list[] = { + {pattern_raw,ICE_INSET_NONE ,ICE_INSET_NONE ,ICE_INSET_NONE }, {pattern_ethertype,ICE_FDIR_INSET_ETH ,ICE_INSET_NONE ,ICE_INSET_NONE },{
pattern_eth_ipv4,ICE_FDIR_INSET_ETH_IPV4,ICE_INSET_NONE, ICE_INSET_NONE}, {pattern_eth_ipv4_udp, ICE_FDIR_INSET_ETH_IPV4_UDP, ICE_INSET_NONE, ICE_INSET_NONE},drivers/net/ice/ice_fdir_filter.c +2
-0@@ -1158,6 +1159,8 @@ ice_fdir_init(struct ice_adapter *ad)if (ret)return ret; +INIT_LIST_HEAD (&ad->fdir_prof_list); + parser = &ice_fdir_parser; return ice_register_parser(parser, ad); @@ -1188,6 +1191,24 @@
ice_fdir_is_tunnel_profile(enum ice_fdir_tunnel_type tunnel_type)drivers/net/ice/ice_fdir_filter.c +17
-0return 0 ; } +static int +ice_fdir_add_del_raw (struct ice_pf *pf, +struct ice_fdir_filter_conf *filter, +bool add) +{ +struct ice_hw *hw =ICE_PF_TO_HW (pf); + +unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt; +rte_memcpy (pkt, filter->pkt_buf, filter->pkt_len); + +struct ice_fltr_desc desc; +memset (&desc,0 ,sizeof (desc)); + filter->input.comp_report =ICE_FXD_FLTR_QW0_COMP_REPORT_SW ; +ice_fdir_get_prgm_desc (hw, &filter->input, &desc, add); + +return ice_fdir_programming (pf, &desc); } + static int ice_fdir_add_del_filter(struct ice_pf *pf, struct ice_fdir_filter_conf *filter, @@ -1303,6 +1324,100 @@ice_fdir_create_filter(struct
ice_adapter*ad,drivers/net/ice/ice_fdir_filter.c +10
-0struct ice_fdir_fltr_pattern key;bool is_tun;int ret; +int i; + +if (filter->parser_ena) { +struct ice_hw *hw =ICE_PF_TO_HW (pf); + +int id =ice_find_first_bit (filter->prof->ptypes,UINT16_MAX ); +u16 ctrl_vsi = pf->fdir.fdir_vsi->idx; +u16 main_vsi = pf->main_vsi->idx; +bool fv_found = false; +u16 vsi_num;
drivers/net/ice/ice_fdir_filter.c ice_fdir_create_filter(struct ice_adapter *ad, · line 1346
Quoted 10 lines
drivers/net/ice/ice_fdir_filter.c +10
-0+ +struct ice_fdir_prof_info *pi; +LIST_FOR_EACH_ENTRY (pi, &ad->fdir_prof_list, + ice_fdir_prof_info, l_entry) { +if (pi->ptg != hw->blk[ICE_BLK_FD ].xlt1.t[id]) +continue ; +if (!pi->fdir_actived_cnt) { + vsi_num =ice_get_hw_vsi_num (hw, ctrl_vsi); + ret =ice_rem_prof_id_flow (hw,ICE_BLK_FD , + vsi_num, id);
Looks like you delay the "profile remove" until next call ice_fdir_add_del_filter, Why not just do this at the exact moment that "fdir_actived_cnt = 0"?
Quoted 93 lines
drivers/net/ice/ice_fdir_filter.c +74
-0+if (ret) +return -rte_errno; + + vsi_num =ice_get_hw_vsi_num (hw, main_vsi); + ret =ice_rem_prof_id_flow (hw,ICE_BLK_FD , + vsi_num, id); +if (ret) +return -rte_errno; + +LIST_DEL (&pi->l_entry); +continue ; + } +for (i =0 ; i <ICE_MAX_FV_WORDS ; i++) +if (pi->prof.fv[i].proto_id != + filter->prof->fv[i].proto_id || + pi->prof.fv[i].offset != + filter->prof->fv[i].offset) +break ; +if (i ==ICE_MAX_FV_WORDS ) { + fv_found = true; + pi->fdir_actived_cnt++; +break ; + } + } + +if (!fv_found) { + ret =ice_flow_set_hw_prof (hw, main_vsi, ctrl_vsi, + filter->prof,ICE_BLK_FD ); +if (ret) +return -rte_errno; + } + + ret =ice_fdir_add_del_raw (pf, filter, true); +if (ret) +return -rte_errno; + +if (!fv_found) { + pi = (struct ice_fdir_prof_info *) +ice_malloc (hw,sizeof (*pi)); +if (!pi) +return ICE_ERR_NO_MEMORY ; + +memset (&pi->prof,0 ,sizeof (pi->prof)); + +for (i =0 ; i < filter->prof->fv_num; i++) { + pi->prof.fv[i].proto_id = + filter->prof->fv[i].proto_id; + pi->prof.fv[i].offset = + filter->prof->fv[i].offset; + pi->prof.fv[i].spec = filter->prof->fv[i].spec; + pi->prof.fv[i].msk = filter->prof->fv[i].msk; + } + pi->ptg = hw->blk[ICE_BLK_FD ].xlt1.t[id]; + pi->fdir_actived_cnt =1 ; + +LIST_ADD (&pi->l_entry, &ad->fdir_prof_list); + } + +if (filter->mark_flag ==1 ) +ice_fdir_rx_parsing_enable (ad,1 ); + + entry =rte_zmalloc ("fdir_entry" ,sizeof (*entry),0 ); +if (!entry) +return -rte_errno; + +rte_memcpy (entry, filter,sizeof (*filter)); + + filter->prof =NULL ; + filter->pkt_buf =NULL ; + + flow->rule = entry; + +return 0 ; + }ice_fdir_extract_fltr_key (&key, filter); node = ice_fdir_entry_lookup(fdir_info, &key); @@ -1397,6 +1512,44@@ ice_fdir_destroy_filter(struct
ice_adapter*ad,drivers/net/ice/ice_fdir_filter.c +12
-0filter = (struct ice_fdir_filter_conf *)flow->rule; +if (filter->parser_ena) { +struct ice_hw *hw =ICE_PF_TO_HW (pf); + + ret =ice_fdir_add_del_raw (pf, filter, false); +if (ret) +return -rte_errno; + +int id =ice_find_first_bit (filter->prof->ptypes,UINT16_MAX ); +int i; +struct ice_fdir_prof_info *pi; +LIST_FOR_EACH_ENTRY (pi, &ad->fdir_prof_list, + ice_fdir_prof_info, l_entry) {
drivers/net/ice/ice_fdir_filter.c ice_fdir_destroy_filter(struct ice_adapter *ad, · line 1536
Quoted 10 lines
drivers/net/ice/ice_fdir_filter.c +10
-0+if (pi->ptg != hw->blk[ICE_BLK_FD ].xlt1.t[id]) +continue ; +for (i =0 ; i <ICE_MAX_FV_WORDS ; i++) +if (pi->prof.fv[i].proto_id != + filter->prof->fv[i].proto_id || + pi->prof.fv[i].offset != + filter->prof->fv[i].offset) +break ; +if (i ==ICE_MAX_FV_WORDS ) { + pi->fdir_actived_cnt--;
Here you can remove the profile.
drivers/net/ice/ice_fdir_filter.c ice_fdir_create_filter(struct ice_adapter *ad, · line 1370
Quoted 3 lines
drivers/net/ice/ice_fdir_filter.c +3
-0+break ; + } + }
can all above part be moved into ice_fdir_add_del_filter, this make the add /delete implementation symmetric .
Quoted 210 lines
drivers/net/ice/ice_fdir_filter.c +14
-0+ +if (filter->mark_flag ==1 ) +ice_fdir_rx_parsing_enable (ad,0 ); + + flow->rule =NULL ; + filter->prof =NULL ; + filter->pkt_buf =NULL ; + +rte_free (filter); + +return 0 ; + } + is_tun =ice_fdir_is_tunnel_profile (filter->tunnel_type);if (filter->counter) {@@ -1675,6 +1828,7 @@ ice_fdir_parse_pattern(__rte_unused structice_adapter *ad, enum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;enum rte_flow_item_type l4 =RTE_FLOW_ITEM_TYPE_END ;enum ice_fdir_tunnel_type tunnel_type =ICE_FDIR_TUNNEL_TYPE_NONE ; +const struct rte_flow_item_raw *raw_spec, *raw_mask;const struct rte_flow_item_eth *eth_spec, *eth_mask;drivers/net/ice/ice_fdir_filter.c +101
-0const struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_last, *ipv4_mask; const struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask; @@ -1702,6 +1856,9 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad, struct ice_fdir_extra *p_ext_data;struct ice_fdir_v4 *p_v4 =NULL ;struct ice_fdir_v6 *p_v6 =NULL ; +struct ice_parser_result rslt; +struct ice_parser *psr; +uint8_t item_num =0 ;for (item = pattern; item->type !=RTE_FLOW_ITEM_TYPE_END ; item++) { if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN) @@ -1713,6 +1870,7 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad, item->type == RTE_FLOW_ITEM_TYPE_GTP_PSC) { is_outer = false; } + item_num++; }/* This loop parse flow pattern and distinguish Non-tunnel and tunnel @@ -1733,6 +1891,101 @@ ice_fdir_parse_pattern(__rte_unused structice_adapter *ad, &input_set_i : &input_set_o;switch (item_type) { +case RTE_FLOW_ITEM_TYPE_RAW : + raw_spec = item->spec; + raw_mask = item->mask; + +if (item_num !=1 ) +break ; + +/* convert raw spec & mask from byte string to int */ +unsigned char *tmp_spec = + (uint8_t *)(uintptr_t )raw_spec->pattern; +unsigned char *tmp_mask = + (uint8_t *)(uintptr_t )raw_mask->pattern; +uint16_t udp_port =0 ; +uint16_t tmp_val =0 ; +uint8_t pkt_len =0 ; +uint8_t tmp =0 ; +int i, j; + + pkt_len =strlen ((char *)(uintptr_t )raw_spec->pattern); +if (strlen ((char *)(uintptr_t )raw_mask->pattern) != + pkt_len) +return -rte_errno; + +for (i =0 , j =0 ; i < pkt_len; i +=2 , j++) { + tmp = tmp_spec[i]; +if (tmp >='a' && tmp <='f' ) + tmp_val = tmp -'a' +10 ; +if (tmp >='A' && tmp <='F' ) + tmp_val = tmp -'A' +10 ; +if (tmp >='0' && tmp <='9' ) + tmp_val = tmp -'0' ; + + tmp_val *=16 ; + tmp = tmp_spec[i +1 ]; +if (tmp >='a' && tmp <='f' ) + tmp_spec[j] = tmp_val + tmp -'a' +10 ; +if (tmp >='A' && tmp <='F' ) + tmp_spec[j] = tmp_val + tmp -'A' +10 ; +if (tmp >='0' && tmp <='9' ) + tmp_spec[j] = tmp_val + tmp -'0' ; + + tmp = tmp_mask[i]; +if (tmp >='a' && tmp <='f' ) + tmp_val = tmp -'a' +10 ; +if (tmp >='A' && tmp <='F' ) + tmp_val = tmp -'A' +10 ; +if (tmp >='0' && tmp <='9' ) + tmp_val = tmp -'0' ; + + tmp_val *=16 ; + tmp = tmp_mask[i +1 ]; +if (tmp >='a' && tmp <='f' ) + tmp_mask[j] = tmp_val + tmp -'a' +10 ; +if (tmp >='A' && tmp <='F' ) + tmp_mask[j] = tmp_val + tmp -'A' +10 ; +if (tmp >='0' && tmp <='9' ) + tmp_mask[j] = tmp_val + tmp -'0' ; + } + + pkt_len /=2 ; + +if (ice_parser_create (&ad->hw, &psr)) +return -rte_errno; +if (ice_get_open_tunnel_port (&ad->hw,TNL_VXLAN , + &udp_port)) +ice_parser_vxlan_tunnel_set (psr, udp_port, + true); +if (ice_parser_run (psr, tmp_spec, pkt_len, &rslt)) +return -rte_errno; +ice_parser_destroy (psr); + +if (!tmp_mask) +return -rte_errno; + + filter->prof = (struct ice_parser_profile *) +ice_malloc (&ad->hw,sizeof (*filter->prof)); +if (!filter->prof) +return -ENOMEM ; + +if (ice_parser_profile_init (&rslt, tmp_spec, tmp_mask, + pkt_len,ICE_BLK_FD , true, filter->prof)) +return -rte_errno; + +u8 *pkt_buf = (u8 *)ice_malloc (&ad->hw, pkt_len +1 ); +if (!pkt_buf) +return -ENOMEM ; +rte_memcpy (pkt_buf, tmp_spec, pkt_len); + filter->pkt_buf = pkt_buf; + + filter->pkt_len = pkt_len; + + filter->parser_ena = true; + +break ; +case RTE_FLOW_ITEM_TYPE_ETH : flow_type =ICE_FLTR_PTYPE_NON_IP_L2 ;drivers/net/ice/ice_fdir_filter.c +7
-0eth_spec = item->spec;@@ -2198,6 +2451,7 @@ ice_fdir_parse(struct ice_adapter *ad,struct ice_fdir_filter_conf *filter = &pf->fdir.conf;struct ice_pattern_match_item *item =NULL ;uint64_t input_set; +bool raw = false;int ret;memset (filter,0 ,sizeof (*filter));@@ -2213,7 +2467,13 @@ ice_fdir_parse(struct ice_adapter *ad, ret =ice_fdir_parse_pattern (ad, pattern, error, filter);if (ret) goto error; + +if (item->pattern_list[0 ] ==RTE_FLOW_ITEM_TYPE_RAW ) + raw = true; + input_set = filter->input_set_o | filter->input_set_i; + input_set = raw ? ~input_set : input_set; +if (!input_set || filter->input_set_o & ~(item->input_set_mask_o |ICE_INSET_ETHERTYPE ) || filter->input_set_i & ~item->input_set_mask_i) { diff --git
a/drivers/net/ice/ice_generic_flow.cb/drivers/net/ice/ice_generic_flow.cindex02f854666a..d3391c86c0100644drivers/net/ice/ice_generic_flow.c +7
-0@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = { RTE_FLOW_ITEM_TYPE_END, }; +/* raw */ +enum rte_flow_item_type pattern_raw[] = { +RTE_FLOW_ITEM_TYPE_RAW , +RTE_FLOW_ITEM_TYPE_END , +}; +/* L2 */ enum rte_flow_item_type pattern_ethertype[] = {RTE_FLOW_ITEM_TYPE_ETH ,@@ -2081,6 +2087,7 @@ struct ice_ptype_match { };static struct ice_ptype_match ice_ptype_map[] = { + {pattern_raw,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4_udp,ICE_PTYPE_IPV4_UDP_PAY }, {pattern_eth_ipv4_tcp,ICE_PTYPE_IPV4_TCP_PAY },drivers/net/ice/ice_generic_flow.h +3
-1@@ -124,6 +124,9 @@/* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; +/* raw pattern */ +extern enum rte_flow_item_type pattern_raw[]; +/* L2 */ extern enum rte_flow_item_type pattern_ethertype[];extern enum rte_flow_item_type pattern_ethertype_vlan[]; --2.25.1
v8 cover enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing rte_flow raw API.
[PATCH v8 1/4] net/ice/base: add method to disable FDIR SWAP option. [PATCH v8 2/4] net/ice/base: add function to set HW profile for raw flow. [PATCH v8 3/4] app/testpmd: update Max RAW pattern size to 512. [PATCH v8 4/4] net/ice: enable protocol agnostic flow offloading in FDIR.
Junfeng Guo (4):
net/ice/base: add method to disable FDIR SWAP option net/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
* v8:
Replaced profile info list with a table.
* v7:
Fixed LIST_FOR_EACH_ENTRY logic.
* v6:
Removed redundant code.
* v5:
Optimized some code logic.
* v4:
Added list to check inputset conflict.
* v3:
Added necessary base code for raw flow in FDIR.
* v2:
Enabled vxlan port add for raw flow and updated commit message
app/test-pmd/cmdline_flow.c | 2 +- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/base/README | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 93 +++++++++- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flow.c | 86 ++++++++- drivers/net/ice/base/ice_flow.h | 4 + drivers/net/ice/ice_ethdev.h | 14 ++ drivers/net/ice/ice_fdir_filter.c | 235 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 11 files changed, 447 insertions(+), 6 deletions(-)
Signature · 1 line
2.25.1
PATCH v8 1/4 net/ice/base: add method to disable FDIR SWAP option
In this patch, we introduced a new parameter to enable/disable the FDIR SWAP option by setting the swap and inset register set with certain values.
--- drivers/net/ice/base/ice_flex_pipe.c | 44 ++++++++++++++++++++++++++-- drivers/net/ice/base/ice_flex_pipe.h | 3 +- drivers/net/ice/base/ice_flow.c | 2 +- 3 files changed, 45 insertions(+), 4 deletions(-)
drivers/net/ice/base/ice_flex_pipe.c +42 -2
@@ -4952,6 +4952,43 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,return ICE_SUCCESS ; } +/** +* ice_disable_fd_swap - set register appropriately to disable FD swap +* @hw: pointer to the HW struct +* @prof_id: profile ID +*/ +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id) +{ +u8 swap_val =ICE_SWAP_VALID ; +u8 i; +/* Since the SWAP Flag in the Programming Desc doesn't work, +* here add method to disable the SWAP Option via setting +* certain SWAP and INSET register set. +*/ +for (i =0 ; i < hw->blk[ICE_BLK_FD ].es.fvw /4 ; i++) { +u32 raw_swap =0 ; +u32 raw_in =0 ; +u8 j; + +for (j =0 ; j <4 ; j++) { + raw_swap |= (swap_val++) << (j *BITS_PER_BYTE ); + raw_in |=ICE_INSET_DFLT << (j *BITS_PER_BYTE ); + } + +/* write the FDIR swap register set */ +wr32 (hw,GLQF_FDSWAP (prof_id, i), raw_swap); + +ice_debug (hw,ICE_DBG_INIT ,"swap wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDSWAP (prof_id, i), raw_swap); + +/* write the FDIR inset register set */ +wr32 (hw,GLQF_FDINSET (prof_id, i), raw_in); + +ice_debug (hw,ICE_DBG_INIT ,"inset wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDINSET (prof_id, i), raw_in); + } +} +/** * ice_add_prof - add profile * @hw: pointer to the HW struct
@@ -4962,6 +4999,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,* @attr_cnt: number of elements in attrib array * @es: extraction sequence (length of array is determined by the block) * @masks: mask for extraction sequence +* @fd_swap: enable/disable FDIR paired src/dst fields swap option * * This function registers a profile, which matches a set of PTYPES with a * particular extraction sequence. While the hardware profile is allocated
@@ -4971,7 +5009,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks) +struct ice_fv_word *es,u16 *masks,bool fd_swap) {u32 bytes =DIVIDE_AND_ROUND_UP (ICE_FLOW_PTYPE_MAX ,BITS_PER_BYTE );ice_declare_bitmap (ptgs_used,ICE_XLT1_CNT );
@@ -4991,7 +5029,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_alloc_prof_id (hw, blk, &prof_id);if (status) goto err_ice_add_prof; -if (blk ==ICE_BLK_FD ) { +if (blk ==ICE_BLK_FD && fd_swap) {/* For Flow Director block, the extraction sequence may * need to be altered in the case where there are paired * fields that have no match. This is necessary because
@@ -5002,6 +5040,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_update_fd_swap (hw, prof_id, es);if (status) goto err_ice_add_prof; + }else if (blk ==ICE_BLK_FD ) { +ice_disable_fd_swap (hw, prof_id); } status =ice_update_prof_masking (hw, blk, prof_id, masks);if (status)
drivers/net/ice/base/ice_flex_pipe.h +2 -1
@@ -61,10 +61,11 @@ bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);/* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi (struct ice_hw *hw,enum ice_block blk,u16 vsi,u16 *vsig); +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id);enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks); +struct ice_fv_word *es,u16 *masks,bool fd_swap);void ice_init_all_prof_masks (struct ice_hw *hw);void ice_shutdown_all_prof_masks (struct ice_hw *hw); struct ice_prof_map *
drivers/net/ice/base/ice_flow.c +1 -1
@@ -2244,7 +2244,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,/* Add a HW profile for this flow profile */ status =ice_add_prof (hw, blk, prof_id, (u8 *)params->ptypes, params->attr, params->attr_cnt, params->es, - params->mask); + params->mask, true);if (status) {ice_debug (hw,ICE_DBG_FLOW ,"Error adding a HW flow profile\n" ); goto out;
Signature · 1 line
2.25.1
PATCH v8 2/4 net/ice/base: add function to set HW profile for raw flow
In reply to Junfeng GuoBased on the parser library, we can directly set HW profile and associate the main/ctrl vsi.
This patch set also updated the release date in README.
--- drivers/net/ice/base/README | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 49 ++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 3 + drivers/net/ice/base/ice_flow.c | 84 ++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 4 ++ 5 files changed, 141 insertions(+), 1 deletion(-)
drivers/net/ice/base/README +1 -1
@@ -6,7 +6,7 @@ Intel® ICE driver ================== This directory contains source code of FreeBSD ice driver of version -2021.04.29 released by the team which develops +2021.10.28 released by the team which develops basic drivers for any ice NIC. The directory of base/ contains the original source package. This driver is valid for the product(s) listed below
drivers/net/ice/base/ice_flex_pipe.c +49 -0
52 lines not on this page · raw message
drivers/net/ice/base/ice_flex_pipe.h +3 -0
@@ -76,6 +76,9 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);enum ice_status ice_rem_prof_id_flow (struct ice_hw *hw,enum ice_block blk,u16 vsi,u64 hdl); +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id);enum ice_status ice_init_pkg (struct ice_hw *hw,u8 *buff,u32 len);enum ice_status ice_copy_and_init_pkg (struct ice_hw *hw,const u8 *buf,u32 len);
drivers/net/ice/base/ice_flow.c +84 -0
90 lines not on this page · raw message
drivers/net/ice/base/ice_flow.h +4 -0
@@ -548,6 +548,10 @@ enum ice_status ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, u16 vsig);enum ice_status +ice_flow_set_hw_prof (struct ice_hw *hw,u16 dest_vsi_handle, +u16 fdir_vsi_handle,struct ice_parser_profile *prof, +enum ice_block blk); +enum ice_status ice_flow_get_hw_prof (struct ice_hw *hw,enum ice_block blk,u64 prof_id,u8 *hw_prof);
Signature · 1 line
2.25.1
PATCH v8 3/4 app/testpmd: update Max RAW pattern size to 512
In reply to Junfeng GuoUpdate max size for pattern in struct rte_flow_item_raw to enable protocol agnostic flow offloading.
--- app/test-pmd/cmdline_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
app/test-pmd/cmdline_flow.c +1 -1
@@ -495,7 +495,7 @@ enum index { };/** Maximum size for pattern in struct rte_flow_item_raw. */ -#define ITEM_RAW_PATTERN_SIZE 40 +#define ITEM_RAW_PATTERN_SIZE 512/** Maximum size for GENEVE option data pattern in bytes. */ #define ITEM_GENEVE_OPT_DATA_SIZE 124
Signature · 1 line
2.25.1
PATCH v8 4/4 net/ice: enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing rte_flow raw API.
Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
Note that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of 0x0800 (with 0xFFFF) in the mask byte string example. The prefix '0x' for the spec and mask byte (hex) strings are also omitted here.
--- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/ice_ethdev.h | 14 ++ drivers/net/ice/ice_fdir_filter.c | 235 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 5 files changed, 260 insertions(+)
doc/guides/rel_notes/release_21_11.rst +1 -0
@@ -167,6 +167,7 @@ New Features * **Updated Intel ice driver.** + * Added protocol agnostic flow offloading support in Flow Director. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow. * Added DEV_RX_OFFLOAD_TIMESTAMP support.
drivers/net/ice/ice_ethdev.h +14 -0
@@ -318,6 +318,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +const u8 *pkt_buf; +bool parser_ena; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)
@@ -487,6 +492,14 @@ struct ice_devargs {uint8_t pps_out_ena; }; +/** +* Structure to store fdir fv entry. +*/ +struct ice_fdir_prof_info { +struct ice_parser_profile prof; +u64 fdir_actived_cnt; +}; +/** * Structure to store private data for each PF/VF instance. */
@@ -510,6 +523,7 @@ struct ice_adapter {struct rte_timecounter tx_tstamp_tc;bool ptp_ena;uint64_t time_hw; +struct ice_fdir_prof_info fdir_prof_info[ICE_MAX_PTGS ];#ifdef RTE_ARCH_X86 bool rx_use_avx2;bool rx_use_avx512;
drivers/net/ice/ice_fdir_filter.c +235 -0
296 lines not on this page · raw message
drivers/net/ice/ice_generic_flow.c +7 -0
@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = { RTE_FLOW_ITEM_TYPE_END, }; +/* raw */ +enum rte_flow_item_type pattern_raw[] = { +RTE_FLOW_ITEM_TYPE_RAW , +RTE_FLOW_ITEM_TYPE_END , +}; +/* L2 */ enum rte_flow_item_type pattern_ethertype[] = {RTE_FLOW_ITEM_TYPE_ETH ,
@@ -2081,6 +2087,7 @@ struct ice_ptype_match { };static struct ice_ptype_match ice_ptype_map[] = { + {pattern_raw,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4_udp,ICE_PTYPE_IPV4_UDP_PAY }, {pattern_eth_ipv4_tcp,ICE_PTYPE_IPV4_TCP_PAY },
drivers/net/ice/ice_generic_flow.h +3 -0
@@ -124,6 +124,9 @@/* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; +/* raw pattern */ +extern enum rte_flow_item_type pattern_raw[]; +/* L2 */ extern enum rte_flow_item_type pattern_ethertype[];extern enum rte_flow_item_type pattern_ethertype_vlan[];
Signature · 1 line
2.25.1
Re: [dpdk-dev] [PATCH v8 4/4] net/ice: enable protocol agnostic flow offloading in FDIR
Quoted 191 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Monday, November 1, 2021 4:36 PM
To: Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Xu, Ting <[email protected]>; Guo, Junfeng <[email protected]>
Subject: [PATCH v8 4/4] net/ice: enable protocol agnostic flow offloading in FDIRProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing
rte_flowraw API.Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:flow create 0 ingress pattern raw \
pattern spec \
0000000000000000000000000800450000140000400040100000000000000 1020304 \ pattern mask \000000000000000000000000000000000000000000000000000000000000ffffffff \ / end actions queue index 3 / mark id 3 / endNote that mask of some key bits (e.g.,
0x0800to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of0x0800(with0xFFFF) in the mask byte string example. The prefix '0x' for the spec and mask byte (hex) strings are also omitted here.Signed-off-by Junfeng Guo <[email protected]>--- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/ice_ethdev.h | 14 ++ drivers/net/ice/ice_fdir_filter.c | 235 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 5 files changed, 260 insertions(+)doc/guides/rel_notes/release_21_11.rst +1
-0@@ -167,6 +167,7 @@ New Features * **Updated Intel ice driver.** + * Added protocol agnostic flow offloading support in Flow Director. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow. * Added DEV_RX_OFFLOAD_TIMESTAMP support.drivers/net/ice/ice_ethdev.h index renamed from drivers/net/ice/ice_ethdev.h +0
-0
0e42c4c063..bbfeb0cc23100644drivers/net/ice/ice_ethdev.h +14
-0@@ -318,6 +318,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +const u8 *pkt_buf; +bool parser_ena; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)@@ -487,6 +492,14 @@ struct ice_devargs {uint8_t pps_out_ena; }; +/** +* Structure to store fdir fv entry. +*/ +struct ice_fdir_prof_info { +struct ice_parser_profile prof; +u64 fdir_actived_cnt; +}; +/** * Structure to store private data for each PF/VF instance. */ @@ -510,6 +523,7 @@ struct ice_adapter {struct rte_timecounter tx_tstamp_tc;bool ptp_ena;uint64_t time_hw; +struct ice_fdir_prof_info fdir_prof_info[ICE_MAX_PTGS ];#ifdef RTE_ARCH_X86 bool rx_use_avx2;bool rx_use_avx512;drivers/net/ice/ice_fdir_filter.c +1
-0@@ -107,6 +107,7 @@ ICE_INSET_NAT_T_ESP_SPI) static struct ice_pattern_match_item ice_fdir_pattern_list[] = { + {pattern_raw,ICE_INSET_NONE ,ICE_INSET_NONE ,ICE_INSET_NONE }, {pattern_ethertype,ICE_FDIR_INSET_ETH ,ICE_INSET_NONE ,ICE_INSET_NONE },{
pattern_eth_ipv4,ICE_FDIR_INSET_ETH_IPV4,ICE_INSET_NONE, ICE_INSET_NONE}, {pattern_eth_ipv4_udp, ICE_FDIR_INSET_ETH_IPV4_UDP, ICE_INSET_NONE, ICE_INSET_NONE},drivers/net/ice/ice_fdir_filter.c +17
-0@@ -1188,6 +1189,24 @@ ice_fdir_is_tunnel_profile(enum ice_fdir_tunnel_type tunnel_type)return 0 ; } +static int +ice_fdir_add_del_raw (struct ice_pf *pf, +struct ice_fdir_filter_conf *filter, +bool add) +{ +struct ice_hw *hw =ICE_PF_TO_HW (pf); + +unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt; +rte_memcpy (pkt, filter->pkt_buf, filter->pkt_len); + +struct ice_fltr_desc desc; +memset (&desc,0 ,sizeof (desc)); + filter->input.comp_report =ICE_FXD_FLTR_QW0_COMP_REPORT_SW ; +ice_fdir_get_prgm_desc (hw, &filter->input, &desc, add); + +return ice_fdir_programming (pf, &desc); } + static int ice_fdir_add_del_filter(struct ice_pf *pf, struct ice_fdir_filter_conf *filter, @@ -1303,6 +1322,72 @@ice_fdir_create_filter(struct
ice_adapter*ad,drivers/net/ice/ice_fdir_filter.c +51
-0struct ice_fdir_fltr_pattern key;bool is_tun;int ret; +int i; + +if (filter->parser_ena) { +struct ice_hw *hw =ICE_PF_TO_HW (pf); + +int id =ice_find_first_bit (filter->prof->ptypes,UINT16_MAX ); +int ptg = hw->blk[ICE_BLK_FD ].xlt1.t[id]; +u16 ctrl_vsi = pf->fdir.fdir_vsi->idx; +u16 main_vsi = pf->main_vsi->idx; +bool fv_found = false; + +struct ice_fdir_prof_info *pi = &ad->fdir_prof_info[ptg]; +if (pi->fdir_actived_cnt !=0 ) { +for (i =0 ; i <ICE_MAX_FV_WORDS ; i++) +if (pi->prof.fv[i].proto_id != + filter->prof->fv[i].proto_id || + pi->prof.fv[i].offset != + filter->prof->fv[i].offset || + pi->prof.fv[i].msk != + filter->prof->fv[i].msk) +break ; +if (i ==ICE_MAX_FV_WORDS ) { + fv_found = true; + pi->fdir_actived_cnt++; + } + } + +if (!fv_found) { + ret =ice_flow_set_hw_prof (hw, main_vsi, ctrl_vsi, + filter->prof,ICE_BLK_FD ); +if (ret) +return -rte_errno; + } + + ret =ice_fdir_add_del_raw (pf, filter, true); +if (ret) +return -rte_errno; + +if (!fv_found) { +for (i =0 ; i < filter->prof->fv_num; i++) { + pi->prof.fv[i].proto_id = + filter->prof->fv[i].proto_id; + pi->prof.fv[i].offset = + filter->prof->fv[i].offset; + pi->prof.fv[i].spec = filter->prof->fv[i].spec; + pi->prof.fv[i].msk = filter->prof->fv[i].msk; + } + pi->fdir_actived_cnt =1 ; + } + +if (filter->mark_flag ==1 )
drivers/net/ice/ice_fdir_filter.c ice_fdir_create_filter(struct ice_adapter *ad, · line 1385
Quoted 10 lines
drivers/net/ice/ice_fdir_filter.c +10
-0+ice_fdir_rx_parsing_enable (ad,1 ); + + entry =rte_zmalloc ("fdir_entry" ,sizeof (*entry),0 ); +if (!entry) +return -rte_errno; + +rte_memcpy (entry, filter,sizeof (*filter)); + + filter->prof =NULL ; + filter->pkt_buf =NULL ;
Should we free filter here? as a copy of it already be assigned to flow->rule.
Actually the filter is assigned by meta, and it is created during parse_pattern_action, and assume to be freed in create_filter.
Or we can assign meta to flow->rule directly, then we only need to free it during destroy.
Quoted 39 lines
drivers/net/ice/ice_fdir_filter.c +5
-0+ + flow->rule = entry; + +return 0 ; + }ice_fdir_extract_fltr_key (&key, filter); node = ice_fdir_entry_lookup(fdir_info, &key); @@ -1397,6 +1482,49@@ ice_fdir_destroy_filter(struct
ice_adapter*ad,drivers/net/ice/ice_fdir_filter.c +27
-0filter = (struct ice_fdir_filter_conf *)flow->rule; +if (filter->parser_ena) { +struct ice_hw *hw =ICE_PF_TO_HW (pf); + +int id =ice_find_first_bit (filter->prof->ptypes,UINT16_MAX ); +int ptg = hw->blk[ICE_BLK_FD ].xlt1.t[id]; +u16 ctrl_vsi = pf->fdir.fdir_vsi->idx; +u16 main_vsi = pf->main_vsi->idx; +u16 vsi_num; + + ret =ice_fdir_add_del_raw (pf, filter, false); +if (ret) +return -rte_errno; + +struct ice_fdir_prof_info *pi = &ad->fdir_prof_info[ptg]; +if (pi->fdir_actived_cnt !=0 ) { + pi->fdir_actived_cnt--; +if (!pi->fdir_actived_cnt) { + vsi_num =ice_get_hw_vsi_num (hw, ctrl_vsi); + ret =ice_rem_prof_id_flow (hw,ICE_BLK_FD , + vsi_num, id); +if (ret) +return -rte_errno; + + vsi_num =ice_get_hw_vsi_num (hw, main_vsi); + ret =ice_rem_prof_id_flow (hw,ICE_BLK_FD , + vsi_num, id); +if (ret)
drivers/net/ice/ice_fdir_filter.c ice_fdir_destroy_filter(struct ice_adapter *ad, · line 1521
Quoted 10 lines
drivers/net/ice/ice_fdir_filter.c +10
-0+return -rte_errno; + } + } + +if (filter->mark_flag ==1 ) +ice_fdir_rx_parsing_enable (ad,0 ); + + flow->rule =NULL ; + filter->prof =NULL ; + filter->pkt_buf =NULL ;
Should we free the pkt_buf and prof before assign them to NULL. They are created during parse_pattern but never be freed before.
Quoted 6 lines
drivers/net/ice/ice_fdir_filter.c +6
-0+ +rte_free (filter); + +return 0 ; + } +
Re: [dpdk-dev] [PATCH v8 4/4] net/ice: enable protocol agnostic flow offloading in FDIR
Quoted 219 lines
-----Original Message-----
From: Zhang, Qi Z <[email protected]>
Sent: Tuesday, November 2, 2021 07:56
To: Guo, Junfeng <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Xu, Ting <[email protected]>
Subject: RE: [PATCH v8 4/4] net/ice: enable protocol agnostic flow offloading in FDIRQuoted 4 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Monday, November 1, 2021 4:36 PM
To: Zhang, Qi Z <[email protected]>; Wu, JingjingQuoted 4 lines
Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Xu, Ting <[email protected]>; Guo, Junfeng <[email protected]>
Subject: [PATCH v8 4/4] net/ice: enable protocol agnostic flowoffloading in
Quoted 3 lines
FDIR
Protocol agnostic flow offloading in Flow Director is enabled by this
patch
Quoted 6 lines
based on the Parser Library, using existing
rte_flowraw API.Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.Quoted 6 lines
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:flow create 0 ingress pattern raw \
pattern spec \000000000000000000000000080045000014000040004010000000000000 0
Quoted 2 lines
1020304 \ pattern mask \
000000000000000000000000000000000000000000000000000000000000 ff
Quoted 4 lines
ffffff \ / end actions queue index 3 / mark id 3 / end
Note that mask of some key bits (e.g.,
0x0800to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of
0x0800Quoted 1 line
(with
0xFFFF) in the mask byte string example. The prefix '0x' for thespec and
Quoted 17 lines
mask byte (hex) strings are also omitted here.
Signed-off-by Junfeng Guo <[email protected]>--- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/ice_ethdev.h | 14 ++ drivers/net/ice/ice_fdir_filter.c | 235 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 5 files changed, 260 insertions(+)doc/guides/rel_notes/release_21_11.rst +0
-0doc/guides/rel_notes/release_21_11.rst New Features · line 172
Quoted 6 lines
doc/guides/rel_notes/release_21_11.rst +1
-0@@ -167,6 +167,7 @@ New Features * **Updated Intel ice driver.** + * Added protocol agnostic flow offloading support in Flow Director. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSSflow.
drivers/net/ice/ice_ethdev.h
Quoted 2 lines
doc/guides/rel_notes/release_21_11.rst +0
-0* Added DEV_RX_OFFLOAD_TIMESTAMP support.drivers/net/ice/ice_ethdev.h +0
-0index
Review
Quoted 39 lines
0e42c4c063..bbfeb0cc23100644drivers/net/ice/ice_ethdev.h +14
-0@@ -318,6 +318,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +const u8 *pkt_buf; +bool parser_ena; +u8 pkt_len; }; #define ICE_MAX_FDIR_FILTER_NUM(1024 * 16)@@ -487,6 +492,14 @@ struct ice_devargs {uint8_t pps_out_ena; }; +/** +* Structure to store fdir fv entry. +*/ +struct ice_fdir_prof_info { +struct ice_parser_profile prof; +u64 fdir_actived_cnt; +}; +/** * Structure to store private data for each PF/VF instance. */ @@ -510,6 +523,7 @@ struct ice_adapter {struct rte_timecounter tx_tstamp_tc;bool ptp_ena;uint64_t time_hw; +struct ice_fdir_prof_info fdir_prof_info[ICE_MAX_PTGS ];#ifdef RTE_ARCH_X86 bool rx_use_avx2;bool rx_use_avx512;(quoted diff) +0
-0
b/drivers/net/ice/ice_fdir_filter.cQuoted 99 lines
index
bd627e3aa8..888f0dea6d100644drivers/net/ice/ice_fdir_filter.c +1
-0@@ -107,6 +107,7 @@ ICE_INSET_NAT_T_ESP_SPI) static struct ice_pattern_match_item ice_fdir_pattern_list[] = { +{pattern_raw,ICE_INSET_NONE ,ICE_INSET_NONE ,ICE_INSET_NONE }, {pattern_ethertype,ICE_FDIR_INSET_ETH ,ICE_INSET_NONE ,ICE_INSET_NONE },{pattern_eth_ipv4,ICE_FDIR_INSET_ETH_IPV4,
ICE_INSET_NONE,ICE_INSET_NONE},
{pattern_eth_ipv4_udp,ICE_FDIR_INSET_ETH_IPV4_UDP,
ICE_INSET_NONE,ICE_INSET_NONE},drivers/net/ice/ice_fdir_filter.c +17
-0@@ -1188,6 +1189,24 @@ ice_fdir_is_tunnel_profile(enum ice_fdir_tunnel_type tunnel_type)return 0 ; } +static int +ice_fdir_add_del_raw (struct ice_pf *pf, +struct ice_fdir_filter_conf *filter, +bool add) +{ +struct ice_hw *hw =ICE_PF_TO_HW (pf); + +unsigned char *pkt = (unsigned char *)pf->fdir.prg_pkt; +rte_memcpy (pkt, filter->pkt_buf, filter->pkt_len); + +struct ice_fltr_desc desc; +memset (&desc,0 ,sizeof (desc)); +filter->input.comp_report =ICE_FXD_FLTR_QW0_COMP_REPORT_SW ; +ice_fdir_get_prgm_desc (hw, &filter->input, &desc, add); + +return ice_fdir_programming (pf, &desc); } + static int ice_fdir_add_del_filter(struct ice_pf *pf, struct ice_fdir_filter_conf *filter, @@ -1303,6 +1322,72 @@ice_fdir_create_filter(struct
ice_adapter*ad,
structice_fdir_fltr_patternkey;
boolis_tun;
int ret;drivers/net/ice/ice_fdir_filter.c +55
-0+int i; + +if (filter->parser_ena) { +struct ice_hw *hw =ICE_PF_TO_HW (pf); + +int id =ice_find_first_bit (filter->prof->ptypes,UINT16_MAX ); +int ptg = hw->blk[ICE_BLK_FD ].xlt1.t[id]; +u16 ctrl_vsi = pf->fdir.fdir_vsi->idx; +u16 main_vsi = pf->main_vsi->idx; +bool fv_found = false; + +struct ice_fdir_prof_info *pi = &ad->fdir_prof_info[ptg]; +if (pi->fdir_actived_cnt !=0 ) { +for (i =0 ; i <ICE_MAX_FV_WORDS ; i++) +if (pi->prof.fv[i].proto_id != + filter->prof->fv[i].proto_id || + pi->prof.fv[i].offset != + filter->prof->fv[i].offset || + pi->prof.fv[i].msk != + filter->prof->fv[i].msk) +break ; +if (i ==ICE_MAX_FV_WORDS ) { +fv_found = true; +pi->fdir_actived_cnt++; +} +} + +if (!fv_found) { +ret =ice_flow_set_hw_prof (hw, main_vsi, ctrl_vsi, + filter->prof,ICE_BLK_FD ); +if (ret) +return -rte_errno; +} + +ret =ice_fdir_add_del_raw (pf, filter, true); +if (ret) +return -rte_errno; + +if (!fv_found) { +for (i =0 ; i < filter->prof->fv_num; i++) { +pi->prof.fv[i].proto_id = +filter->prof->fv[i].proto_id; +pi->prof.fv[i].offset = +filter->prof->fv[i].offset; +pi->prof.fv[i].spec = filter->prof->fv[i].spec; +pi->prof.fv[i].msk = filter->prof->fv[i].msk; +} +pi->fdir_actived_cnt =1 ; +} + +if (filter->mark_flag ==1 ) +ice_fdir_rx_parsing_enable (ad,1 ); + +entry =rte_zmalloc ("fdir_entry" ,sizeof (*entry),0 ); +if (!entry)
Quoted 9 lines
drivers/net/ice/ice_fdir_filter.c ice_fdir_create_filter(struct ice_adapter *ad, · line 1385
Quoted 6 lines
drivers/net/ice/ice_fdir_filter.c +6
-0+return -rte_errno; + +rte_memcpy (entry, filter,sizeof (*filter)); + +filter->prof =NULL ; +filter->pkt_buf =NULL ;Should we free filter here? as a copy of it already be assigned to flow-
Quoted 1 line
rule.
Here we just free the two filter members of "filter", which are allocated by us in func ice_fdir_parse_pattern. Once the copy of "filter" to "entry" is ready, these two fields of "filter" will belong to "entry". We set them to NULL to ensure that later free of meta ("filter") will not have impact on "entry".
Quoted 6 lines
Actually the filter is assigned by meta, and it is created during
parse_pattern_action, and assume to be freed increate_filter.Or we can assign meta to
flow->ruledirectly, then we only need to free it during destroy.
The "filter" is assigned with a global variable in ice_fdir_parse with "*filter = &pf->fdir.conf". So we cannot just assign meta to flow->rule directly.
The copy of "filter" will be added into the list of flow and used later for other purpose like destroy.
Quoted 45 lines
Quoted 45 lines
drivers/net/ice/ice_fdir_filter.c +5
-0+ +flow->rule = entry; + +return 0 ; +}ice_fdir_extract_fltr_key (&key, filter); node = ice_fdir_entry_lookup(fdir_info, &key); @@ -1397,6 +1482,49@@ ice_fdir_destroy_filter(struct
ice_adapter*ad,filter = (struct
ice_fdir_filter_conf*)flow->rule;drivers/net/ice/ice_fdir_filter.c +32
-0+if (filter->parser_ena) { +struct ice_hw *hw =ICE_PF_TO_HW (pf); + +int id =ice_find_first_bit (filter->prof->ptypes,UINT16_MAX ); +int ptg = hw->blk[ICE_BLK_FD ].xlt1.t[id]; +u16 ctrl_vsi = pf->fdir.fdir_vsi->idx; +u16 main_vsi = pf->main_vsi->idx; +u16 vsi_num; + +ret =ice_fdir_add_del_raw (pf, filter, false); +if (ret) +return -rte_errno; + +struct ice_fdir_prof_info *pi = &ad->fdir_prof_info[ptg]; +if (pi->fdir_actived_cnt !=0 ) { +pi->fdir_actived_cnt--; +if (!pi->fdir_actived_cnt) { +vsi_num =ice_get_hw_vsi_num (hw, ctrl_vsi); +ret =ice_rem_prof_id_flow (hw,ICE_BLK_FD , + vsi_num, id); +if (ret) +return -rte_errno; + +vsi_num =ice_get_hw_vsi_num (hw, main_vsi); +ret =ice_rem_prof_id_flow (hw,ICE_BLK_FD , + vsi_num, id); +if (ret) +return -rte_errno; +} +} + +if (filter->mark_flag ==1 )
Quoted 8 lines
drivers/net/ice/ice_fdir_filter.c ice_fdir_destroy_filter(struct ice_adapter *ad, · line 1521
Quoted 5 lines
drivers/net/ice/ice_fdir_filter.c +5
-0+ice_fdir_rx_parsing_enable (ad,0 ); + +flow->rule =NULL ; +filter->prof =NULL ; +filter->pkt_buf =NULL ;Should we free the
pkt_bufand prof before assign them to NULL. They are created duringparse_patternbut never be freed before.
Since prof and pkt_buf is allocated by us, these two fields should also be freed by us before freeing "filter".
Quoted 8 lines
Quoted 7 lines
drivers/net/ice/ice_fdir_filter.c +6
-0+ +rte_free (filter); + +return 0 ; +} +
v9 cover enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing rte_flow raw API.
[PATCH v9 1/4] net/ice/base: add method to disable FDIR SWAP option. [PATCH v9 2/4] net/ice/base: add function to set HW profile for raw flow. [PATCH v9 3/4] app/testpmd: update Max RAW pattern size to 512. [PATCH v9 4/4] net/ice: enable protocol agnostic flow offloading in FDIR.
Junfeng Guo (4):
net/ice/base: add method to disable FDIR SWAP option net/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
* v8:
Added memory free logic.
* v8:
Replaced profile info list with a table.
* v7:
Fixed LIST_FOR_EACH_ENTRY logic.
* v6:
Removed redundant code.
* v5:
Optimized some code logic.
* v4:
Added list to check inputset conflict.
* v3:
Added necessary base code for raw flow in FDIR.
* v2:
Enabled vxlan port add for raw flow and updated commit message
app/test-pmd/cmdline_flow.c | 2 +- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/base/README | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 93 +++++++++- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flow.c | 86 ++++++++- drivers/net/ice/base/ice_flow.h | 4 + drivers/net/ice/ice_ethdev.h | 14 ++ drivers/net/ice/ice_fdir_filter.c | 231 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 11 files changed, 443 insertions(+), 6 deletions(-)
Signature · 1 line
2.25.1
PATCH v9 1/4 net/ice/base: add method to disable FDIR SWAP option
In this patch, we introduced a new parameter to enable/disable the FDIR SWAP option by setting the swap and inset register set with certain values.
--- drivers/net/ice/base/ice_flex_pipe.c | 44 ++++++++++++++++++++++++++-- drivers/net/ice/base/ice_flex_pipe.h | 3 +- drivers/net/ice/base/ice_flow.c | 2 +- 3 files changed, 45 insertions(+), 4 deletions(-)
drivers/net/ice/base/ice_flex_pipe.c +42 -2
@@ -4952,6 +4952,43 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,return ICE_SUCCESS ; } +/** +* ice_disable_fd_swap - set register appropriately to disable FD swap +* @hw: pointer to the HW struct +* @prof_id: profile ID +*/ +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id) +{ +u8 swap_val =ICE_SWAP_VALID ; +u8 i; +/* Since the SWAP Flag in the Programming Desc doesn't work, +* here add method to disable the SWAP Option via setting +* certain SWAP and INSET register set. +*/ +for (i =0 ; i < hw->blk[ICE_BLK_FD ].es.fvw /4 ; i++) { +u32 raw_swap =0 ; +u32 raw_in =0 ; +u8 j; + +for (j =0 ; j <4 ; j++) { + raw_swap |= (swap_val++) << (j *BITS_PER_BYTE ); + raw_in |=ICE_INSET_DFLT << (j *BITS_PER_BYTE ); + } + +/* write the FDIR swap register set */ +wr32 (hw,GLQF_FDSWAP (prof_id, i), raw_swap); + +ice_debug (hw,ICE_DBG_INIT ,"swap wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDSWAP (prof_id, i), raw_swap); + +/* write the FDIR inset register set */ +wr32 (hw,GLQF_FDINSET (prof_id, i), raw_in); + +ice_debug (hw,ICE_DBG_INIT ,"inset wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDINSET (prof_id, i), raw_in); + } +} +/** * ice_add_prof - add profile * @hw: pointer to the HW struct
@@ -4962,6 +4999,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,* @attr_cnt: number of elements in attrib array * @es: extraction sequence (length of array is determined by the block) * @masks: mask for extraction sequence +* @fd_swap: enable/disable FDIR paired src/dst fields swap option * * This function registers a profile, which matches a set of PTYPES with a * particular extraction sequence. While the hardware profile is allocated
@@ -4971,7 +5009,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks) +struct ice_fv_word *es,u16 *masks,bool fd_swap) {u32 bytes =DIVIDE_AND_ROUND_UP (ICE_FLOW_PTYPE_MAX ,BITS_PER_BYTE );ice_declare_bitmap (ptgs_used,ICE_XLT1_CNT );
@@ -4991,7 +5029,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_alloc_prof_id (hw, blk, &prof_id);if (status) goto err_ice_add_prof; -if (blk ==ICE_BLK_FD ) { +if (blk ==ICE_BLK_FD && fd_swap) {/* For Flow Director block, the extraction sequence may * need to be altered in the case where there are paired * fields that have no match. This is necessary because
@@ -5002,6 +5040,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_update_fd_swap (hw, prof_id, es);if (status) goto err_ice_add_prof; + }else if (blk ==ICE_BLK_FD ) { +ice_disable_fd_swap (hw, prof_id); } status =ice_update_prof_masking (hw, blk, prof_id, masks);if (status)
drivers/net/ice/base/ice_flex_pipe.h +2 -1
@@ -61,10 +61,11 @@ bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);/* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi (struct ice_hw *hw,enum ice_block blk,u16 vsi,u16 *vsig); +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id);enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks); +struct ice_fv_word *es,u16 *masks,bool fd_swap);void ice_init_all_prof_masks (struct ice_hw *hw);void ice_shutdown_all_prof_masks (struct ice_hw *hw); struct ice_prof_map *
drivers/net/ice/base/ice_flow.c +1 -1
@@ -2244,7 +2244,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,/* Add a HW profile for this flow profile */ status =ice_add_prof (hw, blk, prof_id, (u8 *)params->ptypes, params->attr, params->attr_cnt, params->es, - params->mask); + params->mask, true);if (status) {ice_debug (hw,ICE_DBG_FLOW ,"Error adding a HW flow profile\n" ); goto out;
Signature · 1 line
2.25.1
PATCH v9 2/4 net/ice/base: add function to set HW profile for raw flow
In reply to Junfeng GuoBased on the parser library, we can directly set HW profile and associate the main/ctrl vsi.
This patch set also updated the release date in README.
--- drivers/net/ice/base/README | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 49 ++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 3 + drivers/net/ice/base/ice_flow.c | 84 ++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 4 ++ 5 files changed, 141 insertions(+), 1 deletion(-)
drivers/net/ice/base/README +1 -1
@@ -6,7 +6,7 @@ Intel® ICE driver ================== This directory contains source code of FreeBSD ice driver of version -2021.04.29 released by the team which develops +2021.10.28 released by the team which develops basic drivers for any ice NIC. The directory of base/ contains the original source package. This driver is valid for the product(s) listed below
drivers/net/ice/base/ice_flex_pipe.c +49 -0
52 lines not on this page · raw message
drivers/net/ice/base/ice_flex_pipe.h +3 -0
@@ -76,6 +76,9 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);enum ice_status ice_rem_prof_id_flow (struct ice_hw *hw,enum ice_block blk,u16 vsi,u64 hdl); +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id);enum ice_status ice_init_pkg (struct ice_hw *hw,u8 *buff,u32 len);enum ice_status ice_copy_and_init_pkg (struct ice_hw *hw,const u8 *buf,u32 len);
drivers/net/ice/base/ice_flow.c +84 -0
90 lines not on this page · raw message
drivers/net/ice/base/ice_flow.h +4 -0
@@ -548,6 +548,10 @@ enum ice_status ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, u16 vsig);enum ice_status +ice_flow_set_hw_prof (struct ice_hw *hw,u16 dest_vsi_handle, +u16 fdir_vsi_handle,struct ice_parser_profile *prof, +enum ice_block blk); +enum ice_status ice_flow_get_hw_prof (struct ice_hw *hw,enum ice_block blk,u64 prof_id,u8 *hw_prof);
Signature · 1 line
2.25.1
PATCH v9 3/4 app/testpmd: update Max RAW pattern size to 512
In reply to Junfeng GuoUpdate max size for pattern in struct rte_flow_item_raw to enable protocol agnostic flow offloading.
--- app/test-pmd/cmdline_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
app/test-pmd/cmdline_flow.c +1 -1
@@ -495,7 +495,7 @@ enum index { };/** Maximum size for pattern in struct rte_flow_item_raw. */ -#define ITEM_RAW_PATTERN_SIZE 40 +#define ITEM_RAW_PATTERN_SIZE 512/** Maximum size for GENEVE option data pattern in bytes. */ #define ITEM_GENEVE_OPT_DATA_SIZE 124
Signature · 1 line
2.25.1
PATCH v9 4/4 net/ice: enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing rte_flow raw API.
Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
Note that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of 0x0800 (with 0xFFFF) in the mask byte string example. The prefix '0x' for the spec and mask byte (hex) strings are also omitted here.
--- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/ice_ethdev.h | 14 ++ drivers/net/ice/ice_fdir_filter.c | 231 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 5 files changed, 256 insertions(+)
doc/guides/rel_notes/release_21_11.rst +1 -0
@@ -167,6 +167,7 @@ New Features * **Updated Intel ice driver.** + * Added protocol agnostic flow offloading support in Flow Director. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow. * Added DEV_RX_OFFLOAD_TIMESTAMP support.
drivers/net/ice/ice_ethdev.h +14 -0
@@ -318,6 +318,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +bool parser_ena; +u8 *pkt_buf; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)
@@ -487,6 +492,14 @@ struct ice_devargs {uint8_t pps_out_ena; }; +/** +* Structure to store fdir fv entry. +*/ +struct ice_fdir_prof_info { +struct ice_parser_profile prof; +u64 fdir_actived_cnt; +}; +/** * Structure to store private data for each PF/VF instance. */
@@ -510,6 +523,7 @@ struct ice_adapter {struct rte_timecounter tx_tstamp_tc;bool ptp_ena;uint64_t time_hw; +struct ice_fdir_prof_info fdir_prof_info[ICE_MAX_PTGS ];#ifdef RTE_ARCH_X86 bool rx_use_avx2;bool rx_use_avx512;
drivers/net/ice/ice_fdir_filter.c +231 -0
298 lines not on this page · raw message
drivers/net/ice/ice_generic_flow.c +7 -0
@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = { RTE_FLOW_ITEM_TYPE_END, }; +/* raw */ +enum rte_flow_item_type pattern_raw[] = { +RTE_FLOW_ITEM_TYPE_RAW , +RTE_FLOW_ITEM_TYPE_END , +}; +/* L2 */ enum rte_flow_item_type pattern_ethertype[] = {RTE_FLOW_ITEM_TYPE_ETH ,
@@ -2081,6 +2087,7 @@ struct ice_ptype_match { };static struct ice_ptype_match ice_ptype_map[] = { + {pattern_raw,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4_udp,ICE_PTYPE_IPV4_UDP_PAY }, {pattern_eth_ipv4_tcp,ICE_PTYPE_IPV4_TCP_PAY },
drivers/net/ice/ice_generic_flow.h +3 -0
@@ -124,6 +124,9 @@/* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; +/* raw pattern */ +extern enum rte_flow_item_type pattern_raw[]; +/* L2 */ extern enum rte_flow_item_type pattern_ethertype[];extern enum rte_flow_item_type pattern_ethertype_vlan[];
Signature · 1 line
2.25.1
Re: [dpdk-dev] [PATCH v9 4/4] net/ice: enable protocol agnostic flow offloading in FDIR
Quoted 11 lines · Junfeng Guo
drivers/net/ice/ice_fdir_filter.c +7
-0@@ -1733,6 +1862,101 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad, &input_set_i : &input_set_o;switch (item_type) { +case RTE_FLOW_ITEM_TYPE_RAW : + raw_spec = item->spec; + raw_mask = item->mask; + +if (item_num !=1 ) +break ; +
drivers/net/ice/ice_fdir_filter.c ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad, · line 1881
Quoted 10 lines
drivers/net/ice/ice_fdir_filter.c +10
-0+/* convert raw spec & mask from byte string to int */ +unsigned char *tmp_spec = + (uint8_t *)(uintptr_t )raw_spec->pattern; +unsigned char *tmp_mask = + (uint8_t *)(uintptr_t )raw_mask->pattern; +uint16_t udp_port =0 ; +uint16_t tmp_val =0 ; +uint8_t pkt_len =0 ; +uint8_t tmp =0 ; +int i, j;
Hi Junfeng, Qi, Jingjing, Beilei,
This is causing build error with icc.
Mainly the problem is switch case doesn't provide a scope, in C they are just like labels. So these variables are valid for all switch statement and compiler complains that some cases are not initializing these variables.
Can you please either:
1- move these variables above switch
2- Create a scope after 'case' with '{}'
2 can be done as:
case RTE_FLOW_ITEM_TYPE_RAW: {
<...>
break;
}Re: [dpdk-dev] [PATCH v9 4/4] net/ice: enable protocol agnostic flow offloading in FDIR
Quoted 51 lines
-----Original Message-----
From: Yigit, Ferruh <[email protected]>
Sent: Wednesday, November 3, 2021 00:23
To: Guo, Junfeng <[email protected]>; Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Xu, Ting <[email protected]>
Subject: Re: [PATCH v9 4/4] net/ice: enable protocol agnostic flow offloading in FDIRReview ice_fdir_parse_pattern(__rte_unused
Quoted 1 line · Junfeng Guo
(quoted diff) +0
-0@@ -1733,6 +1862,101 @@ ice_fdir_parse_pattern(__rte_unusedstruct
ice_adapter*ad,drivers/net/ice/ice_fdir_filter.c ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
Quoted 11 lines
drivers/net/ice/ice_fdir_filter.c +8
-0&input_set_i : &input_set_o;switch (item_type) { +case RTE_FLOW_ITEM_TYPE_RAW : + raw_spec = item->spec; + raw_mask = item->mask; + +if (item_num !=1 ) +break ; + +/* convert raw spec & mask from byte string to int */
drivers/net/ice/ice_fdir_filter.c ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad, · line 1881
Quoted 9 lines
drivers/net/ice/ice_fdir_filter.c +9
-0+unsigned char *tmp_spec = + (uint8_t *)(uintptr_t )raw_spec->pattern; +unsigned char *tmp_mask = + (uint8_t *)(uintptr_t )raw_mask->pattern; +uint16_t udp_port =0 ; +uint16_t tmp_val =0 ; +uint8_t pkt_len =0 ; +uint8_t tmp =0 ; +int i, j;Hi Junfeng, Qi, Jingjing, Beilei,
This is causing build error with icc.
Mainly the problem is switch case doesn't provide a scope, in C they are just like labels. So these variables are valid for all switch statement and compiler complains that some cases are not initializing these variables.
Can you please either:
1- move these variables above switch
2- Create a scope after 'case' with '{}'
Quoted 5 lines
2 can be done as:
case RTE_FLOW_ITEM_TYPE_RAW: { <...> break; }
Sure, will enclose these code with curly brackets. Thanks for the solution!
Regards,
Junfeng Guo
v10 cover enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing rte_flow raw API.
[PATCH v10 1/4] net/ice/base: add method to disable FDIR SWAP option. [PATCH v10 2/4] net/ice/base: add function to set HW profile for raw flow. [PATCH v10 3/4] app/testpmd: update Max RAW pattern size to 512. [PATCH v10 4/4] net/ice: enable protocol agnostic flow offloading in FDIR.
Junfeng Guo (4):
net/ice/base: add method to disable FDIR SWAP option net/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
* v10:
Fixed ICC build issue.
* v9:
Added memory free logic.
* v8:
Replaced profile info list with a table.
* v7:
Fixed LIST_FOR_EACH_ENTRY logic.
* v6:
Removed redundant code.
* v5:
Optimized some code logic.
* v4:
Added list to check inputset conflict.
* v3:
Added necessary base code for raw flow in FDIR.
* v2:
Enabled vxlan port add for raw flow and updated commit message
app/test-pmd/cmdline_flow.c | 2 +- doc/guides/nics/features/ice.ini | 1 + doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/base/README | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 93 +++++++++- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flow.c | 86 ++++++++- drivers/net/ice/base/ice_flow.h | 4 + drivers/net/ice/ice_ethdev.h | 14 ++ drivers/net/ice/ice_fdir_filter.c | 237 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 12 files changed, 450 insertions(+), 6 deletions(-)
Signature · 1 line
2.25.1
PATCH v10 1/4 net/ice/base: add method to disable FDIR SWAP option
In this patch, we introduced a new parameter to enable/disable the FDIR SWAP option by setting the swap and inset register set with certain values.
--- drivers/net/ice/base/ice_flex_pipe.c | 44 ++++++++++++++++++++++++++-- drivers/net/ice/base/ice_flex_pipe.h | 3 +- drivers/net/ice/base/ice_flow.c | 2 +- 3 files changed, 45 insertions(+), 4 deletions(-)
drivers/net/ice/base/ice_flex_pipe.c +42 -2
@@ -4952,6 +4952,43 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,return ICE_SUCCESS ; } +/** +* ice_disable_fd_swap - set register appropriately to disable FD swap +* @hw: pointer to the HW struct +* @prof_id: profile ID +*/ +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id) +{ +u8 swap_val =ICE_SWAP_VALID ; +u8 i; +/* Since the SWAP Flag in the Programming Desc doesn't work, +* here add method to disable the SWAP Option via setting +* certain SWAP and INSET register set. +*/ +for (i =0 ; i < hw->blk[ICE_BLK_FD ].es.fvw /4 ; i++) { +u32 raw_swap =0 ; +u32 raw_in =0 ; +u8 j; + +for (j =0 ; j <4 ; j++) { + raw_swap |= (swap_val++) << (j *BITS_PER_BYTE ); + raw_in |=ICE_INSET_DFLT << (j *BITS_PER_BYTE ); + } + +/* write the FDIR swap register set */ +wr32 (hw,GLQF_FDSWAP (prof_id, i), raw_swap); + +ice_debug (hw,ICE_DBG_INIT ,"swap wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDSWAP (prof_id, i), raw_swap); + +/* write the FDIR inset register set */ +wr32 (hw,GLQF_FDINSET (prof_id, i), raw_in); + +ice_debug (hw,ICE_DBG_INIT ,"inset wr(%d, %d): %x = %08x\n" , + prof_id, i,GLQF_FDINSET (prof_id, i), raw_in); + } +} +/** * ice_add_prof - add profile * @hw: pointer to the HW struct
@@ -4962,6 +4999,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,* @attr_cnt: number of elements in attrib array * @es: extraction sequence (length of array is determined by the block) * @masks: mask for extraction sequence +* @fd_swap: enable/disable FDIR paired src/dst fields swap option * * This function registers a profile, which matches a set of PTYPES with a * particular extraction sequence. While the hardware profile is allocated
@@ -4971,7 +5009,7 @@ ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype,enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks) +struct ice_fv_word *es,u16 *masks,bool fd_swap) {u32 bytes =DIVIDE_AND_ROUND_UP (ICE_FLOW_PTYPE_MAX ,BITS_PER_BYTE );ice_declare_bitmap (ptgs_used,ICE_XLT1_CNT );
@@ -4991,7 +5029,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_alloc_prof_id (hw, blk, &prof_id);if (status) goto err_ice_add_prof; -if (blk ==ICE_BLK_FD ) { +if (blk ==ICE_BLK_FD && fd_swap) {/* For Flow Director block, the extraction sequence may * need to be altered in the case where there are paired * fields that have no match. This is necessary because
@@ -5002,6 +5040,8 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], status =ice_update_fd_swap (hw, prof_id, es);if (status) goto err_ice_add_prof; + }else if (blk ==ICE_BLK_FD ) { +ice_disable_fd_swap (hw, prof_id); } status =ice_update_prof_masking (hw, blk, prof_id, masks);if (status)
drivers/net/ice/base/ice_flex_pipe.h +2 -1
@@ -61,10 +61,11 @@ bool ice_hw_ptype_ena(struct ice_hw *hw, u16 ptype);/* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi (struct ice_hw *hw,enum ice_block blk,u16 vsi,u16 *vsig); +void ice_disable_fd_swap (struct ice_hw *hw,u16 prof_id);enum ice_status ice_add_prof (struct ice_hw *hw,enum ice_block blk,u64 id,u8 ptypes[],const struct ice_ptype_attributes *attr,u16 attr_cnt, -struct ice_fv_word *es,u16 *masks); +struct ice_fv_word *es,u16 *masks,bool fd_swap);void ice_init_all_prof_masks (struct ice_hw *hw);void ice_shutdown_all_prof_masks (struct ice_hw *hw); struct ice_prof_map *
drivers/net/ice/base/ice_flow.c +1 -1
@@ -2244,7 +2244,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,/* Add a HW profile for this flow profile */ status =ice_add_prof (hw, blk, prof_id, (u8 *)params->ptypes, params->attr, params->attr_cnt, params->es, - params->mask); + params->mask, true);if (status) {ice_debug (hw,ICE_DBG_FLOW ,"Error adding a HW flow profile\n" ); goto out;
Signature · 1 line
2.25.1
PATCH v10 2/4 net/ice/base: add function to set HW profile for raw flow
In reply to Junfeng GuoBased on the parser library, we can directly set HW profile and associate the main/ctrl vsi.
This patch set also updated the base code BSD release version.
--- drivers/net/ice/base/README | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 49 ++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 3 + drivers/net/ice/base/ice_flow.c | 84 ++++++++++++++++++++++++++++ drivers/net/ice/base/ice_flow.h | 4 ++ 5 files changed, 141 insertions(+), 1 deletion(-)
drivers/net/ice/base/README +1 -1
@@ -6,7 +6,7 @@ Intel® ICE driver ================== This directory contains source code of FreeBSD ice driver of version -2021.04.29 released by the team which develops +2021.11.02 released by the team which develops basic drivers for any ice NIC. The directory of base/ contains the original source package. This driver is valid for the product(s) listed below
drivers/net/ice/base/ice_flex_pipe.c +49 -0
52 lines not on this page · raw message
drivers/net/ice/base/ice_flex_pipe.h +3 -0
@@ -76,6 +76,9 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl);enum ice_status ice_rem_prof_id_flow (struct ice_hw *hw,enum ice_block blk,u16 vsi,u64 hdl); +enum ice_status +ice_flow_assoc_hw_prof (struct ice_hw *hw,enum ice_block blk, +u16 dest_vsi_handle,u16 fdir_vsi_handle,int id);enum ice_status ice_init_pkg (struct ice_hw *hw,u8 *buff,u32 len);enum ice_status ice_copy_and_init_pkg (struct ice_hw *hw,const u8 *buf,u32 len);
drivers/net/ice/base/ice_flow.c +84 -0
90 lines not on this page · raw message
drivers/net/ice/base/ice_flow.h +4 -0
@@ -548,6 +548,10 @@ enum ice_status ice_flow_assoc_vsig_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi_handle, u16 vsig);enum ice_status +ice_flow_set_hw_prof (struct ice_hw *hw,u16 dest_vsi_handle, +u16 fdir_vsi_handle,struct ice_parser_profile *prof, +enum ice_block blk); +enum ice_status ice_flow_get_hw_prof (struct ice_hw *hw,enum ice_block blk,u64 prof_id,u8 *hw_prof);
Signature · 1 line
2.25.1
PATCH v10 3/4 app/testpmd: update Max RAW pattern size to 512
In reply to Junfeng GuoUpdate max size for pattern in struct rte_flow_item_raw to enable protocol agnostic flow offloading.
--- app/test-pmd/cmdline_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
app/test-pmd/cmdline_flow.c +1 -1
@@ -495,7 +495,7 @@ enum index { };/** Maximum size for pattern in struct rte_flow_item_raw. */ -#define ITEM_RAW_PATTERN_SIZE 40 +#define ITEM_RAW_PATTERN_SIZE 512/** Maximum size for GENEVE option data pattern in bytes. */ #define ITEM_GENEVE_OPT_DATA_SIZE 124
Signature · 1 line
2.25.1
PATCH v10 4/4 net/ice: enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing rte_flow raw API.
Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
Note that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of 0x0800 (with 0xFFFF) in the mask byte string example. The prefix '0x' for the spec and mask byte (hex) strings are also omitted here.
Also update the ice feature list with rte_flow item raw.
--- doc/guides/nics/features/ice.ini | 1 + doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/ice_ethdev.h | 14 ++ drivers/net/ice/ice_fdir_filter.c | 237 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 6 files changed, 263 insertions(+)
doc/guides/nics/features/ice.ini +1 -0
@@ -63,6 +63,7 @@ pfcp = Y pppoed = Y pppoes = Y pppoe_proto_id = Y +raw = Y sctp = Y tcp = Y udp = Y
doc/guides/rel_notes/release_21_11.rst +1 -0
@@ -167,6 +167,7 @@ New Features * **Updated Intel ice driver.** + * Added protocol agnostic flow offloading support in Flow Director. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow. * Added DEV_RX_OFFLOAD_TIMESTAMP support.
drivers/net/ice/ice_ethdev.h +14 -0
@@ -318,6 +318,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +bool parser_ena; +u8 *pkt_buf; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)
@@ -487,6 +492,14 @@ struct ice_devargs {uint8_t pps_out_ena; }; +/** +* Structure to store fdir fv entry. +*/ +struct ice_fdir_prof_info { +struct ice_parser_profile prof; +u64 fdir_actived_cnt; +}; +/** * Structure to store private data for each PF/VF instance. */
@@ -510,6 +523,7 @@ struct ice_adapter {struct rte_timecounter tx_tstamp_tc;bool ptp_ena;uint64_t time_hw; +struct ice_fdir_prof_info fdir_prof_info[ICE_MAX_PTGS ];#ifdef RTE_ARCH_X86 bool rx_use_avx2;bool rx_use_avx512;
drivers/net/ice/ice_fdir_filter.c +237 -0
311 lines not on this page · raw message
drivers/net/ice/ice_generic_flow.c +7 -0
@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = { RTE_FLOW_ITEM_TYPE_END, }; +/* raw */ +enum rte_flow_item_type pattern_raw[] = { +RTE_FLOW_ITEM_TYPE_RAW , +RTE_FLOW_ITEM_TYPE_END , +}; +/* L2 */ enum rte_flow_item_type pattern_ethertype[] = {RTE_FLOW_ITEM_TYPE_ETH ,
@@ -2081,6 +2087,7 @@ struct ice_ptype_match { };static struct ice_ptype_match ice_ptype_map[] = { + {pattern_raw,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4_udp,ICE_PTYPE_IPV4_UDP_PAY }, {pattern_eth_ipv4_tcp,ICE_PTYPE_IPV4_TCP_PAY },
drivers/net/ice/ice_generic_flow.h +3 -0
@@ -124,6 +124,9 @@/* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; +/* raw pattern */ +extern enum rte_flow_item_type pattern_raw[]; +/* L2 */ extern enum rte_flow_item_type pattern_ethertype[];extern enum rte_flow_item_type pattern_ethertype_vlan[];
Signature · 1 line
2.25.1
Zhang, Qi Z
AppliedQuoted 66 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Wednesday, November 3, 2021 12:40 PM
To: Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Xu, Ting <[email protected]>; Guo, Junfeng <[email protected]>
Subject: [PATCH v10 0/4] enable protocol agnostic flow offloading in FDIRProtocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing
rte_flowraw API.[PATCH v10 1/4]
net/ice/base: add method to disable FDIR SWAP option. [PATCH v10 2/4]net/ice/base: add function to set HW profile for raw flow. [PATCH v10 3/4] app/testpmd: update Max RAW pattern size to 512. [PATCH v10 4/4] net/ice: enable protocol agnostic flow offloading in FDIR.Junfeng Guo (4):
net/ice/base: add method to disable FDIR SWAP optionnet/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR* v10:
Fixed ICC build issue.* v9:
Added memory free logic.* v8:
Replaced profile info list with a table.* v7:
FixedLIST_FOR_EACH_ENTRYlogic.* v6:
Removed redundant code.* v5:
Optimized some code logic.* v4:
Added list to check inputset conflict.* v3:
Added necessary base code for raw flow in FDIR.* v2:
Enabled vxlan port add for raw flow and updated commit messageapp/test-pmd/cmdline_flow.c | 2 +- doc/guides/nics/features/ice.ini | 1 + doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/base/README | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 93 +++++++++- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flow.c | 86 ++++++++- drivers/net/ice/base/ice_flow.h | 4 + drivers/net/ice/ice_ethdev.h | 14 ++ drivers/net/ice/ice_fdir_filter.c | 237 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 12 files changed, 450 insertions(+), 6 deletions(-)
Quoted 2 lines
--
2.25.1
Applied to dpdk-next-net-intel.
Thanks
Qi
Quoted 62 lines
-----Original Message-----
From: Guo, Junfeng <[email protected]>
Sent: Tuesday, November 2, 2021 1:39 PM
To: Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Yigit, Ferruh <[email protected]>; Xu, Ting <[email protected]>; Guo, Junfeng <[email protected]>
Subject: [PATCH v9 0/4] enable protocol agnostic flow offloading in FDIRProtocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing
rte_flowraw API.[PATCH v9 1/4]
net/ice/base: add method to disable FDIR SWAP option. [PATCH v9 2/4]net/ice/base: add function to set HW profile for raw flow. [PATCH v9 3/4] app/testpmd: update Max RAW pattern size to 512. [PATCH v9 4/4] net/ice: enable protocol agnostic flow offloading in FDIR.Junfeng Guo (4):
net/ice/base: add method to disable FDIR SWAP optionnet/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR* v8:
Added memory free logic.* v8:
Replaced profile info list with a table.* v7:
FixedLIST_FOR_EACH_ENTRYlogic.* v6:
Removed redundant code.* v5:
Optimized some code logic.* v4:
Added list to check inputset conflict.* v3:
Added necessary base code for raw flow in FDIR.* v2:
Enabled vxlan port add for raw flow and updated commit messageapp/test-pmd/cmdline_flow.c | 2 +- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/base/README | 2 +- drivers/net/ice/base/ice_flex_pipe.c | 93 +++++++++- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flow.c | 86 ++++++++- drivers/net/ice/base/ice_flow.h | 4 + drivers/net/ice/ice_ethdev.h | 14 ++ drivers/net/ice/ice_fdir_filter.c | 231 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 11 files changed, 443 insertions(+), 6 deletions(-)
Quoted 2 lines
--
2.25.1
Applied to dpdk-next-net-intel.
Thanks
Qi
Quoted 8 lines · Junfeng Guo
Protocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing
rte_flowraw API.[PATCH v9 1/4]
net/ice/base: add method to disable FDIR SWAP option. [PATCH v9 2/4]net/ice/base: add function to set HW profile for raw flow. [PATCH v9 3/4] app/testpmd: update Max RAW pattern size to 512. [PATCH v9 4/4] net/ice: enable protocol agnostic flow offloading in FDIR.
Quoted 5 lines
Junfeng Guo (4):
net/ice/base: add method to disable FDIR SWAP optionnet/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
Hi Junfeng,
Since there will be a new version, can you please fix following too?
$ ./devtools/check-doc-vs-code.sh
rte_flow doc out of sync for ice
item rawQuoted 29 lines
-----Original Message-----
From: Yigit, Ferruh <[email protected]>
Sent: Wednesday, November 3, 2021 00:29
To: Guo, Junfeng <[email protected]>; Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Xu, Ting <[email protected]>
Subject: Re: [PATCH v9 0/4] enable protocol agnostic flow offloading in FDIRQuoted 5 lines · Junfeng Guo
Protocol agnostic flow offloading in Flow Director is enabled by this patch set based on the Parser Library using existing
rte_flowraw API.[PATCH v9 1/4]
net/ice/base: add method to disable FDIR SWAP option. [PATCH v9 2/4]net/ice/base: add function to set HW profile for rawflow.
Quoted 2 lines
[PATCH v9 3/4] app/testpmd: update Max RAW pattern size to 512. [PATCH v9 4/4] net/ice: enable protocol agnostic flow offloading in
FDIR.
Quoted 6 lines
Junfeng Guo (4):
net/ice/base: add method to disable FDIR SWAP optionnet/ice/base: add function to set HW profile for raw flow app/testpmd: update Max RAW pattern size to 512 net/ice: enable protocol agnostic flow offloading in FDIR
Quoted 7 lines
Hi Junfeng,
Since there will be a new version, can you please fix following too?
$ ./devtools/check-doc-vs-code.sh rte_flow doc out of sync for ice item raw
Fixed in the coming patch set, thanks for your careful review!
Regards,
Junfeng Guo
PATCH v4 4/4 net/ice: enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing rte_flow raw API.
Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
Note that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto) is optional in our cases. To avoid redundancy, we just omit the mask of 0x0800 (with 0xFFFF) in the mask byte string example. The prefix '0x' for the spec and mask byte (hex) strings are also omitted here.
--- doc/guides/rel_notes/release_21_11.rst | 1 + drivers/net/ice/ice_ethdev.h | 17 ++ drivers/net/ice/ice_fdir_filter.c | 249 +++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 + drivers/net/ice/ice_generic_flow.h | 3 + 5 files changed, 277 insertions(+)
doc/guides/rel_notes/release_21_11.rst +1 -0
@@ -155,6 +155,7 @@ New Features * **Updated Intel ice driver.** + * Added protocol agnostic flow offloading support in Flow Director. * Added 1PPS out support by a devargs. * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS flow. * Added DEV_RX_OFFLOAD_TIMESTAMP support.
drivers/net/ice/ice_ethdev.h +17 -0
@@ -318,6 +318,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +const u8 *pkt_buf; +bool parser_ena; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)
@@ -487,6 +492,17 @@ struct ice_devargs {uint8_t pps_out_ena; }; +/** +* Structure to store fdir fv entry. +*/ +struct ice_fdir_prof_info { +struct LIST_ENTRY_TYPE l_entry; + +struct ice_parser_profile prof; +u16 ptype; +u64 fdir_actived_cnt; +}; +/** * Structure to store private data for each PF/VF instance. */
@@ -509,6 +525,7 @@ struct ice_adapter {struct rte_timecounter rx_tstamp_tc;struct rte_timecounter tx_tstamp_tc;bool ptp_ena; +struct LIST_HEAD_TYPE fdir_prof_list;#ifdef RTE_ARCH_X86 bool rx_use_avx2;bool rx_use_avx512;
drivers/net/ice/ice_fdir_filter.c +249 -0
316 lines not on this page · raw message
drivers/net/ice/ice_generic_flow.c +7 -0
@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = { RTE_FLOW_ITEM_TYPE_END, }; +/* raw */ +enum rte_flow_item_type pattern_raw[] = { +RTE_FLOW_ITEM_TYPE_RAW , +RTE_FLOW_ITEM_TYPE_END , +}; +/* L2 */ enum rte_flow_item_type pattern_ethertype[] = {RTE_FLOW_ITEM_TYPE_ETH ,
@@ -2081,6 +2087,7 @@ struct ice_ptype_match { };static struct ice_ptype_match ice_ptype_map[] = { + {pattern_raw,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4_udp,ICE_PTYPE_IPV4_UDP_PAY }, {pattern_eth_ipv4_tcp,ICE_PTYPE_IPV4_TCP_PAY },
drivers/net/ice/ice_generic_flow.h +3 -0
@@ -124,6 +124,9 @@/* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; +/* raw pattern */ +extern enum rte_flow_item_type pattern_raw[]; +/* L2 */ extern enum rte_flow_item_type pattern_ethertype[];extern enum rte_flow_item_type pattern_ethertype_vlan[];
Signature · 1 line
2.25.1
PATCH 2/3 net/ice: enable protocol agnostic flow offloading in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing rte_flow raw API, without public API change.
Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.
Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
--- drivers/net/ice/ice_ethdev.h | 5 + drivers/net/ice/ice_fdir_filter.c | 167 +++++++++++++++++++++++++++++ drivers/net/ice/ice_generic_flow.c | 7 ++ drivers/net/ice/ice_generic_flow.h | 3 + 4 files changed, 182 insertions(+)
drivers/net/ice/ice_ethdev.h +5 -0
@@ -304,6 +304,11 @@ struct ice_fdir_filter_conf {uint64_t input_set_o;/* used for non-tunnel or tunnel outer fields */ uint64_t input_set_i;/* only for tunnel inner fields */ uint32_t mark_flag; + +struct ice_parser_profile *prof; +const u8 *pkt_buf; +bool parser_ena; +u8 pkt_len; };#define ICE_MAX_FDIR_FILTER_NUM (1024 * 16)
drivers/net/ice/ice_fdir_filter.c +167 -0
228 lines not on this page · raw message
drivers/net/ice/ice_generic_flow.c +7 -0
@@ -65,6 +65,12 @@ enum rte_flow_item_type pattern_empty[] = { RTE_FLOW_ITEM_TYPE_END, }; +/* raw */ +enum rte_flow_item_type pattern_raw[] = { +RTE_FLOW_ITEM_TYPE_RAW , +RTE_FLOW_ITEM_TYPE_END , +}; +/* L2 */ enum rte_flow_item_type pattern_ethertype[] = {RTE_FLOW_ITEM_TYPE_ETH ,
@@ -2081,6 +2087,7 @@ struct ice_ptype_match { };static struct ice_ptype_match ice_ptype_map[] = { + {pattern_raw,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4,ICE_PTYPE_IPV4_PAY }, {pattern_eth_ipv4_udp,ICE_PTYPE_IPV4_UDP_PAY }, {pattern_eth_ipv4_tcp,ICE_PTYPE_IPV4_TCP_PAY },
drivers/net/ice/ice_generic_flow.h +3 -0
@@ -124,6 +124,9 @@/* empty pattern */ extern enum rte_flow_item_type pattern_empty[]; +/* raw pattern */ +extern enum rte_flow_item_type pattern_raw[]; +/* L2 */ extern enum rte_flow_item_type pattern_ethertype[];extern enum rte_flow_item_type pattern_ethertype_vlan[];
Signature · 1 line
2.25.1
Re: [dpdk-dev] [PATCH 2/3] net/ice: enable protocol agnostic flow offloading in FDIR
Quoted 20 lines
-----Original Message-----
From: dev <[email protected]> On Behalf Of Junfeng Guo
Sent: Friday, September 24, 2021 5:22 PM
To: Zhang, Qi Z <[email protected]>; Wu, Jingjing <[email protected]>; Xing, Beilei <[email protected]>
Cc: [email protected]; Guo, Junfeng <[email protected]>
Subject: [dpdk-dev] [PATCH 2/3] net/ice: enable protocol agnostic flow offloading in FDIRProtocol agnostic flow offloading in Flow Director is enabled by this patch based on the Parser Library, using existing
rte_flowraw API, without public API change.Note that the raw flow requires:
1. byte string of raw target packet bits.
2. byte string of mask of target packet.Here is an example:
FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3:
Quoted 6 lines
flow create 0 ingress pattern raw \
pattern spec \
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
000000000000000000000000000000000000000000000000000000000000ffffffff \
/ end actions queue index 3 / mark id 3 / end
To improve the documentation in the commit message, should the "00000800" (0x0800) EtherType not be masked with 0xFFFF too? Non IPv4 packets which happen to have the masked data "01020304" in that position would incorrectly match. By adding 0xFFFF in the mask to check ethertype == 0x8000, this issue is resolved.
Quoted 3 lines
00000000000000000000000008004500001400004000401000000000000001020304 \
pattern mask \
00000000000000000000FFFFFFFF00000000000000000000000000000000ffffffff \
Difficult to see if I changed correct characters in the string from 0 to F, but I hope the point is clear.
Regards, -Harry
PATCH 3/3 doc: enable protocol agnostic flow in FDIR
In reply to Junfeng GuoProtocol agnostic flow offloading in Flow Director is enabled based on the Parser Library, using existing rte_flow raw API, using existing rte_flow raw API, without public API change.
--- doc/guides/rel_notes/release_21_11.rst | 5 +++++ 1 file changed, 5 insertions(+)
doc/guides/rel_notes/release_21_11.rst +5 -0
@@ -62,6 +62,11 @@ New Features * Added bus-level parsing of the devargs syntax. * Kept compatibility with the legacy syntax as parsing fallback. +* **Updated Intel ice driver.** + + * Enabled protocol agnostic flow offloading in Flow Director based on the + parser library, using existing rte_flow raw API, without public API change. + * **Add new RSS offload types for IPv4/L4 checksum in RSS flow.** Add macros ETH_RSS_IPV4_CHKSUM and ETH_RSS_L4_CHKSUM, now IPv4 and
Signature · 1 line
2.25.1