arm: dts: vexpress: Fix motherboard bus 'interrupt-map'
Subsystems (2)
Rob Herring
maintainerPATCH 1/1 arm: dts: vexpress: Fix motherboard bus 'interrupt-map'
Commit 078fb7aa6a83 ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes") broke booting on a couple of 32-bit VExpress boards. The problem is #address-cells size changed, but interrupt-map was not updated. This results in the timer interrupt (and all the other motherboard interrupts) not getting mapped.
As the 'interrupt-map' properties are all just duplicates across boards, just move them into vexpress-v2m.dtsi and vexpress-v2m-rs1.dtsi. Strictly speaking, 'interrupt-map' is dependent on the parent interrupt controller, but it's not likely we'll ever have a different parent than GICv2 on these old platforms. If there was one, 'interrupt-map' can still be overridden.
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I tested this on QEMU VExpress CA9. I also added a check to dtc for 'interrupt-map' to catch this kind of error. I need to run it on the rest of the tree and upstream it before enabling in the kernel.
Rob
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 47 ++++++++++++++++++ arch/arm/boot/dts/vexpress-v2m.dtsi | 47 ++++++++++++++++++ arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 46 ------------------ arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 46 ------------------ arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 46 ------------------ arch/arm/boot/dts/vexpress-v2p-ca9.dts | 48 ------------------- .../boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts | 45 ----------------- 7 files changed, 94 insertions(+), 231 deletions(-)
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi +47 -0
@@ -17,6 +17,7 @@ * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT * CHANGES TO vexpress-v2m.dtsi! */ +#include <dt-bindings/interrupt-controller/arm-gic.h> / { v2m_fixed_3v3: fixed-regulator-0 {
@@ -105,6 +106,52 @@ bus@8000000 { #address-cells = <1>; #size-cells = <1>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 63>; + interrupt-map = <0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>, + <0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, + <0 6 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, + <0 7 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <0 8 &gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <0 9 &gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, + <0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, + <0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, + <0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, + <0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, + <0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, + <0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, + <0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, + <0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, + <0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, + <0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, + <0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, + <0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, + <0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>, + <0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>, + <0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>, + <0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>, + <0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>, + <0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, + <0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>, + <0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>, + <0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>, + <0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, + <0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, + <0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, + <0 39 &gic GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <0 40 &gic GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, + <0 41 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, + <0 42 &gic GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + motherboard-bus@8000000 { arm,hbi = <0x190>; arm,vexpress,site = <0>;
arch/arm/boot/dts/vexpress-v2m.dtsi +47 -0
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arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts +0 -46
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arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +0 -46
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arch/arm/boot/dts/vexpress-v2p-ca5s.dts +0 -46
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arch/arm/boot/dts/vexpress-v2p-ca9.dts +0 -48
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arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts +0 -45
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Signature · 1 line
2.30.2
Sudeep Holla
AppliedQuoted 6 lines · Rob Herring
Commit
078fb7aa6a83("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes") broke booting on a couple of 32-bit VExpress boards. The problem is #address-cells size changed, but interrupt-map was not updated. This results in the timer interrupt (and all the other motherboard interrupts) not getting mapped.
Quoted 8 lines
As the 'interrupt-map' properties are all just duplicates across boards, just move them into
vexpress-v2m.dtsiandvexpress-v2m-rs1.dtsi. Strictly speaking, 'interrupt-map' is dependent on the parent interrupt controller, but it's not likely we'll ever have a different parent than GICv2 on these old platforms. If there was one, 'interrupt-map' can still be overridden.[...]
Applied to sudeep.holla/linux (for-next/juno), thanks!
[1/1] arm: dts: vexpress: Fix motherboard bus 'interrupt-map'
https://git.kernel.org/sudeep.holla/c/319aeaf69c
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Regards,
Sudeep
Quoted 21 lines · Rob Herring
Commit
078fb7aa6a83("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes") broke booting on a couple of 32-bit VExpress boards. The problem is #address-cells size changed, but interrupt-map was not updated. This results in the timer interrupt (and all the other motherboard interrupts) not getting mapped.As the 'interrupt-map' properties are all just duplicates across boards, just move them into
vexpress-v2m.dtsiandvexpress-v2m-rs1.dtsi. Strictly speaking, 'interrupt-map' is dependent on the parent interrupt controller, but it's not likely we'll ever have a different parent than GICv2 on these old platforms. If there was one, 'interrupt-map' can still be overridden.Fixes 078fb7aa6a83 ("arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes")Cc Guillaume Tucker <[email protected]>Cc Liviu Dudau <[email protected]>Cc Sudeep Holla <[email protected]>Cc Lorenzo Pieralisi <[email protected]>Signed-off-by Rob Herring <[email protected]>
Quoted 5 lines
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I tested this on QEMU VExpress CA9. I also added a check to dtc for 'interrupt-map' to catch this kind of error. I need to run it on the rest of the tree and upstream it before enabling in the kernel.
Thanks for fixing this quickly. This time I tested on both Juno and TC2. Sorry I missed to test it on TC2 earlier as the board was not accessible.
Signature · 2 lines
Regards, Sudeep