Skip to contentSkip to conversation

arm64: dts: qcom: Fix 'interrupt-map' parent address cells

PATCH In review Rob Herring 1 participant 2 messages Sep 28, 2021 – Oct 21, 2021

Subsystems (3)
Device tree bindings Arm Qualcomm mailing list Arm Qualcomm support
lore
Share & tools
lore

Rob Herring

author maintainer
#0 lore raw

PATCH 1/1 arm64: dts: qcom: Fix 'interrupt-map' parent address cells

The 'interrupt-map' in several QCom SoCs is malformed. The '#address-cells' size of the parent interrupt controller (the GIC) is not accounted for.

Cc Andy Gross <[email protected]>
Cc Bjorn Andersson <[email protected]>
Cc [email protected]
Signed-off-by Rob Herring <[email protected]>
---
 arch/arm64/boot/dts/qcom/msm8998.dtsi |  8 ++++----
 arch/arm64/boot/dts/qcom/sdm845.dtsi  | 16 ++++++++--------
 2 files changed, 12 insertions(+), 12 deletions(-)
arch/arm64/boot/dts/qcom/msm8998.dtsi +4 -4
index 34039b5c8017..5a04a0427d08 100644
@@ -954,10 +954,10 @@ pcie0: pci@1c00000 {
 			interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-names = "msi";
 			interrupt-map-mask = <0 0 0 0x7>;
-			interrupt-map =	<0 0 0 1 &intc 0 135 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 2 &intc 0 136 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 3 &intc 0 138 IRQ_TYPE_LEVEL_HIGH>,
-					<0 0 0 4 &intc 0 139 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-map =	<0 0 0 1 &intc 0 0 135 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 2 &intc 0 0 136 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 3 &intc 0 0 138 IRQ_TYPE_LEVEL_HIGH>,
+					<0 0 0 4 &intc 0 0 139 IRQ_TYPE_LEVEL_HIGH>;
 
 			clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
 				 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
arch/arm64/boot/dts/qcom/sdm845.dtsi +8 -8
index 6d7172e6f4c3..287c12666a3a 100644
@@ -1990,10 +1990,10 @@ pcie0: pci@1c00000 {
 			interrupt-names = "msi";
 			#interrupt-cells = <1>;
 			interrupt-map-mask = <0 0 0 0x7>;
-			interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
-					<0 0 0 2 &intc 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
-					<0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
-					<0 0 0 4 &intc 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+			interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+					<0 0 0 2 &intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+					<0 0 0 3 &intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+					<0 0 0 4 &intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
 
 			clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
 				 <&gcc GCC_PCIE_0_AUX_CLK>,

@@ -2095,10 +2095,10 @@ pcie1: pci@1c08000 {
 			interrupt-names = "msi";
 			#interrupt-cells = <1>;
 			interrupt-map-mask = <0 0 0 0x7>;
-			interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
-					<0 0 0 2 &intc 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
-					<0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
-					<0 0 0 4 &intc 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+			interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+					<0 0 0 2 &intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+					<0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+					<0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
 
 			clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
 				 <&gcc GCC_PCIE_1_AUX_CLK>,
Signature · 1 line
2.30.2
author maintainer
#1 lore raw
Quoted 4 lines · Rob Herring

The 'interrupt-map' in several QCom SoCs is malformed. The '#address-cells' size of the parent interrupt controller (the GIC) is not accounted for.

Quoted 8 lines
Cc Andy Gross <[email protected]>
Cc Bjorn Andersson <[email protected]>
Cc [email protected]
Signed-off-by Rob Herring <[email protected]>
---
 arch/arm64/boot/dts/qcom/msm8998.dtsi |  8 ++++----
 arch/arm64/boot/dts/qcom/sdm845.dtsi  | 16 ++++++++--------
 2 files changed, 12 insertions(+), 12 deletions(-)

Ping!

Quoted 57 lines
arch/arm64/boot/dts/qcom/msm8998.dtsi +4 -4
index 34039b5c8017..5a04a0427d08 100644
@@ -954,10 +954,10 @@ pcie0: pci@1c00000 {
                        interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "msi";
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc 0 135 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 2 &intc 0 136 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 3 &intc 0 138 IRQ_TYPE_LEVEL_HIGH>,
-                                       <0 0 0 4 &intc 0 139 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 1 &intc 0 0 135 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 2 &intc 0 0 136 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 3 &intc 0 0 138 IRQ_TYPE_LEVEL_HIGH>,
+                                       <0 0 0 4 &intc 0 0 139 IRQ_TYPE_LEVEL_HIGH>;
 
                        clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
                                 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>,
arch/arm64/boot/dts/qcom/sdm845.dtsi +8 -9
index 6d7172e6f4c3..287c12666a3a 100644
@@ -1990,10 +1990,10 @@ pcie0: pci@1c00000 {
                        interrupt-names = "msi";
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
-                                       <0 0 0 2 &intc 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
-                                       <0 0 0 3 &intc 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
-                                       <0 0 0 4 &intc 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+                       interrupt-map = <0 0 0 1 &intc 0 0 0 149 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+                                       <0 0 0 2 &intc 0 0 0 150 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+                                       <0 0 0 3 &intc 0 0 0 151 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+                                       <0 0 0 4 &intc 0 0 0 152 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
 
                        clocks = <&gcc GCC_PCIE_0_PIPE_CLK>,
                                 <&gcc GCC_PCIE_0_AUX_CLK>,

@@ -2095,10 +2095,10 @@ pcie1: pci@1c08000 {
                        interrupt-names = "msi";
                        #interrupt-cells = <1>;
                        interrupt-map-mask = <0 0 0 0x7>;
-                       interrupt-map = <0 0 0 1 &intc 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
-                                       <0 0 0 2 &intc 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
-                                       <0 0 0 3 &intc 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
-                                       <0 0 0 4 &intc 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
+                       interrupt-map = <0 0 0 1 &intc 0 0 0 434 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
+                                       <0 0 0 2 &intc 0 0 0 435 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
+                                       <0 0 0 3 &intc 0 0 0 438 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
+                                       <0 0 0 4 &intc 0 0 0 439 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
 
                        clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
                                 <&gcc GCC_PCIE_1_AUX_CLK>,
--

2.30.2