Modular Broadcom irqchip drivers
Subsystems (9)
v6 cover Modular Broadcom irqchip drivers
Hi Thomas, Marc,
This patch series aims at allowing the 3 interrupt controller drivers used on Broadcom STB platforms to be built as modules in order for those to be shipped in a GKI enabled system (Android).
The irq-bcm7038-l1 requires us to export a number of symbols, which is not great, but there are not obvious solutions other than adding accessor functions to get the same information.
Assuming you are happy with the changes though, please do take the last two changes as well through your tree.
Thanks!
Changes in v6:
- dropped changing the prototype of of_init_irq_cb and instead resolved the platform_device from irq-bcm7120-l2 since this is the only driver that needs this to call platform_irq_count()
Changes in v5:
- put patch #9 as the first one
- add missing platform_device argument to the irq-bcm7038-l1 and irq-brcmstb-l2 drivers (Marc)
Changes in v4:
- added Thomas' Acked-by for patch #1
- added Rob's Reviewed-by for patch 9 and updated qcom-pdc.c as suggested
- s/argument/parameter/ in patch #14 as suggested by Sergey
Changes in v3:
- avoid the use of the cpu_logical_map array for platforms other than MIPS
- removed the bogus irq_set_affinity callback for platforms other than MIPS
- bring-back the export of irq_gc_noop() lost in the v2
Changes in v2:
- avoid using irq_to_desc() and use irq_get_irq_data() instead
- re-order patches to avoid linking failure for irq-brcmstb-l2
- removed the use of .irq_cpu_offline() and converted BMIPS to use irq_migrate_all_off_this_cpu()
- avoid exporting of_irq_count() and use a platform device passed down from the irqchip platform driver registration code instead
- added kernel-doc fix
Florian Fainelli (13):
MIPS: BMIPS: Remove use of irq_cpu_offline irqchip/irq-bcm7038-l1: Remove .irq_cpu_offline() irqchip/irq-bcm7038-l1: Use irq_get_irq_data() irqchip/irq-bcm7038-l1: Gate use of CPU logical map to MIPS irqchip/irq-bcm7038-l1: Restrict affinity setting to MIPS irqchip/irq-bcm7038-l1: Switch to IRQCHIP_PLATFORM_DRIVER
genirq: Export irq_gc_{unmask_enable,mask_disable}_reg irqchip/irq-brcmstb-l2: Switch to IRQCHIP_PLATFORM_DRIVER
genirq: Export irq_gc_noop()
irqchip/irq-bcm7120-l2: Switch to IRQCHIP_PLATFORM_DRIVER
arm64: broadcom: Removed forced select of interrupt controllers
ARM: bcm: Removed forced select of interrupt controllers
irqchip: Fix kernel-doc parameter typo for IRQCHIP_DECLARE
arch/arm/mach-bcm/Kconfig | 4 --- arch/arm64/Kconfig.platforms | 3 -- arch/mips/Kconfig | 1 + arch/mips/kernel/smp-bmips.c | 3 +- drivers/irqchip/Kconfig | 12 ++++++-- drivers/irqchip/irq-bcm7038-l1.c | 47 ++++++++------------------------ drivers/irqchip/irq-bcm7120-l2.c | 21 ++++++++++---- drivers/irqchip/irq-brcmstb-l2.c | 16 ++++++----- include/linux/irqchip.h | 2 +- kernel/irq/generic-chip.c | 3 ++ 10 files changed, 51 insertions(+), 61 deletions(-)
Signature · 1 line
2.25.1
PATCH v6 1/13 MIPS: BMIPS: Remove use of irq_cpu_offline
irq_cpu_offline() is only used by MIPS and we should instead use irq_migrate_all_off_this_cpu(). This will be helpful in order to remove drivers/irqchip/irq-bcm7038-l1.c irq_cpu_offline callback which would have got in the way of making this driver modular.
--- arch/mips/Kconfig | 1 + arch/mips/kernel/smp-bmips.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-)
arch/mips/Kconfig +1 -0
@@ -1782,6 +1782,7 @@ config CPU_BMIPS select CPU_HAS_PREFETCH select CPU_SUPPORTS_CPUFREQ select MIPS_EXTERNAL_TIMER + select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU help Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
arch/mips/kernel/smp-bmips.c +2 -1
@@ -26,6 +26,7 @@#include <linux/bug.h> #include <linux/kernel.h> #include <linux/kexec.h> +#include <linux/irq.h> #include <asm/time.h> #include <asm/processor.h>
@@ -373,7 +374,7 @@ static int bmips_cpu_disable(void)set_cpu_online (cpu, false);calculate_cpu_foreign_map (); -irq_cpu_offline (); +irq_migrate_all_off_this_cpu ();clear_c0_status (IE_IRQ5 );local_flush_tlb_all ();
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] MIPS: BMIPS: Remove use of irq_cpu_offline
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: bf8bde41d296849fd5f9db8becd71ad4e84bc521 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/bf8bde41d296849fd5f9db8becd71ad4e84bc521 Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:47 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:32 +01:00
MIPS: BMIPS: Remove use of irq_cpu_offline
irq_cpu_offline() is only used by MIPS and we should instead use irq_migrate_all_off_this_cpu(). This will be helpful in order to remove drivers/irqchip/irq-bcm7038-l1.c irq_cpu_offline callback which would have got in the way of making this driver modular.
--- arch/mips/Kconfig | 1 + arch/mips/kernel/smp-bmips.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-)
arch/mips/Kconfig +1 -0
@@ -1782,6 +1782,7 @@ config CPU_BMIPS select CPU_HAS_PREFETCH select CPU_SUPPORTS_CPUFREQ select MIPS_EXTERNAL_TIMER + select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU help Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
arch/mips/kernel/smp-bmips.c +2 -1
@@ -26,6 +26,7 @@#include <linux/bug.h> #include <linux/kernel.h> #include <linux/kexec.h> +#include <linux/irq.h> #include <asm/time.h> #include <asm/processor.h>
@@ -373,7 +374,7 @@ static int bmips_cpu_disable(void)set_cpu_online (cpu, false);calculate_cpu_foreign_map (); -irq_cpu_offline (); +irq_migrate_all_off_this_cpu ();clear_c0_status (IE_IRQ5 );local_flush_tlb_all ();
PATCH v6 2/13 irqchip/irq-bcm7038-l1: Remove .irq_cpu_offline()
In reply to Florian FainelliWith arch/mips/kernel/smp-bmips.c having been migrated away from irq_cpu_offline() and use irq_migrate_all_off_this_cpu() instead, we no longer need to implement an .irq_cpu_offline() callback. This is a necessary change to facilitate the building of this driver as a module.
--- drivers/irqchip/irq-bcm7038-l1.c | 30 ------------------------------ 1 file changed, 30 deletions(-)
drivers/irqchip/irq-bcm7038-l1.c +0 -30
@@ -221,33 +221,6 @@ static int bcm7038_l1_set_affinity(struct irq_data *d,return 0 ; } -#ifdef CONFIG_SMP -static void bcm7038_l1_cpu_offline (struct irq_data *d) -{ -struct cpumask *mask =irq_data_get_affinity_mask (d); -int cpu =smp_processor_id (); -cpumask_t new_affinity; - -/* This CPU was not on the affinity mask */ -if (!cpumask_test_cpu (cpu, mask)) -return ; - -if (cpumask_weight (mask) >1 ) { -/* -* Multiple CPU affinity, remove this CPU from the affinity -* mask -*/ -cpumask_copy (&new_affinity, mask); -cpumask_clear_cpu (cpu, &new_affinity); - }else { -/* Only CPU, put on the lowest online CPU */ -cpumask_clear (&new_affinity); -cpumask_set_cpu (cpumask_first (cpu_online_mask), &new_affinity); - } -irq_set_affinity_locked (d, &new_affinity, false); -} -#endif -static int __init bcm7038_l1_init_one (struct device_node *dn,unsigned int idx,struct bcm7038_l1_chip *intc)
@@ -396,9 +369,6 @@ static struct irq_chip bcm7038_l1_irq_chip = { .irq_mask = bcm7038_l1_mask, .irq_unmask = bcm7038_l1_unmask, .irq_set_affinity = bcm7038_l1_set_affinity, -#ifdef CONFIG_SMP - .irq_cpu_offline = bcm7038_l1_cpu_offline, -#endif #ifdef CONFIG_PM_SLEEP .irq_set_wake = bcm7038_l1_set_wake,#endif
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] irqchip/irq-bcm7038-l1: Remove .irq_cpu_offline()
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 57de689ce7829219db007dca5c88ae023a8be2d3 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/57de689ce7829219db007dca5c88ae023a8be2d3 Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:48 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:32 +01:00
irqchip/irq-bcm7038-l1: Remove .irq_cpu_offline()
With arch/mips/kernel/smp-bmips.c having been migrated away from irq_cpu_offline() and use irq_migrate_all_off_this_cpu() instead, we no longer need to implement an .irq_cpu_offline() callback. This is a necessary change to facilitate the building of this driver as a module.
--- drivers/irqchip/irq-bcm7038-l1.c | 30 ------------------------------ 1 file changed, 30 deletions(-)
drivers/irqchip/irq-bcm7038-l1.c +0 -30
@@ -221,33 +221,6 @@ static int bcm7038_l1_set_affinity(struct irq_data *d,return 0 ; } -#ifdef CONFIG_SMP -static void bcm7038_l1_cpu_offline (struct irq_data *d) -{ -struct cpumask *mask =irq_data_get_affinity_mask (d); -int cpu =smp_processor_id (); -cpumask_t new_affinity; - -/* This CPU was not on the affinity mask */ -if (!cpumask_test_cpu (cpu, mask)) -return ; - -if (cpumask_weight (mask) >1 ) { -/* -* Multiple CPU affinity, remove this CPU from the affinity -* mask -*/ -cpumask_copy (&new_affinity, mask); -cpumask_clear_cpu (cpu, &new_affinity); - }else { -/* Only CPU, put on the lowest online CPU */ -cpumask_clear (&new_affinity); -cpumask_set_cpu (cpumask_first (cpu_online_mask), &new_affinity); - } -irq_set_affinity_locked (d, &new_affinity, false); -} -#endif -static int __init bcm7038_l1_init_one (struct device_node *dn,unsigned int idx,struct bcm7038_l1_chip *intc)
@@ -396,9 +369,6 @@ static struct irq_chip bcm7038_l1_irq_chip = { .irq_mask = bcm7038_l1_mask, .irq_unmask = bcm7038_l1_unmask, .irq_set_affinity = bcm7038_l1_set_affinity, -#ifdef CONFIG_SMP - .irq_cpu_offline = bcm7038_l1_cpu_offline, -#endif #ifdef CONFIG_PM_SLEEP .irq_set_wake = bcm7038_l1_set_wake,#endif
PATCH v6 3/13 irqchip/irq-bcm7038-l1: Use irq_get_irq_data()
In reply to Florian FainelliUsing irq_desc_get_irq_data(irq_to_desc()) to retrieve the irq_data structure from a virtual interrupt number is going to be problematic to make irq-bcm7038-l1 a module because irq_to_desc() is not exported, and there is no intent to export it to modules, see 64a1b95bb9fe ("genirq:
Restrict export of irq_to_desc()").
--- drivers/irqchip/irq-bcm7038-l1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/irqchip/irq-bcm7038-l1.c +1 -1
@@ -386,7 +386,7 @@ static int bcm7038_l1_map(struct irq_domain *d, unsigned int virq,irq_set_chip_and_handler (virq, &bcm7038_l1_irq_chip, handle_level_irq);irq_set_chip_data (virq, d->host_data); -irqd_set_single_target (irq_desc_get_irq_data (irq_to_desc (virq))); +irqd_set_single_target (irq_get_irq_data (virq));return 0 ; }
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] irqchip/irq-bcm7038-l1: Use irq_get_irq_data()
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 4b55192009fc62d2817efa2346ec1c0da4be1033 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/4b55192009fc62d2817efa2346ec1c0da4be1033 Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:49 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:32 +01:00
irqchip/irq-bcm7038-l1: Use irq_get_irq_data()
Using irq_desc_get_irq_data(irq_to_desc()) to retrieve the irq_data structure from a virtual interrupt number is going to be problematic to make irq-bcm7038-l1 a module because irq_to_desc() is not exported, and there is no intent to export it to modules, see 64a1b95bb9fe ("genirq:
Restrict export of irq_to_desc()").
--- drivers/irqchip/irq-bcm7038-l1.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/irqchip/irq-bcm7038-l1.c +1 -1
@@ -386,7 +386,7 @@ static int bcm7038_l1_map(struct irq_domain *d, unsigned int virq,irq_set_chip_and_handler (virq, &bcm7038_l1_irq_chip, handle_level_irq);irq_set_chip_data (virq, d->host_data); -irqd_set_single_target (irq_desc_get_irq_data (irq_to_desc (virq))); +irqd_set_single_target (irq_get_irq_data (virq));return 0 ; }
PATCH v6 4/13 irqchip/irq-bcm7038-l1: Gate use of CPU logical map to MIPS
In reply to Florian FainelliThe use of the cpu_logical_map[] array is only relevant for MIPS based platform where this driver is used as a first level interrupt controller and contains multiple register groups to map with an associated CPU.
On ARM/ARM64 based systems this interrupt controller is present and used as a second level interrupt controller hanging off the ARM GIC. That copy of the interrupt controller contains a single group, resulting in the intc->cpus[] array to be of size 1.
Things happened to work in that case because we install that interrupt controller as a chained handler which does not allow it to be affine to any CPU but the boot CPU which happens to be 0, therefore we never de-reference past intc->cpus[] but with the current code in place, we do leave a chance of de-referencing the array past its bounds.
--- drivers/irqchip/irq-bcm7038-l1.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-)
drivers/irqchip/irq-bcm7038-l1.c +3 -6
@@ -28,9 +28,6 @@#include <linux/irqchip.h> #include <linux/irqchip/chained_irq.h> #include <linux/syscore_ops.h> -#ifdef CONFIG_ARM -#include <asm/smp_plat.h> -#endif #define IRQS_PER_WORD 32#define REG_BYTES_PER_IRQ_WORD (sizeof(u32) * 4)
@@ -127,7 +124,7 @@ static void bcm7038_l1_irq_handle(struct irq_desc *desc)struct irq_chip *chip =irq_desc_get_chip (desc);unsigned int idx; -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP ) && defined(CONFIG_MIPS ) cpu = intc->cpus[cpu_logical_map (smp_processor_id ())];#else cpu = intc->cpus[0 ];
@@ -301,7 +298,7 @@ static int bcm7038_l1_suspend(void)u32 val;/* Wakeup interrupt should only come from the boot cpu */ -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP ) && defined(CONFIG_MIPS ) boot_cpu =cpu_logical_map (0 );#else boot_cpu =0 ;
@@ -325,7 +322,7 @@ static void bcm7038_l1_resume(void)struct bcm7038_l1_chip *intc;int boot_cpu, word; -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP ) && defined(CONFIG_MIPS ) boot_cpu =cpu_logical_map (0 );#else boot_cpu =0 ;
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] irqchip/irq-bcm7038-l1: Gate use of CPU logical map to MIPS
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 35eb2ef5df42d3c3d2186ae6dab5622a31e6ceee Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/35eb2ef5df42d3c3d2186ae6dab5622a31e6ceee Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:50 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:33 +01:00
irqchip/irq-bcm7038-l1: Gate use of CPU logical map to MIPS
The use of the cpu_logical_map[] array is only relevant for MIPS based platform where this driver is used as a first level interrupt controller and contains multiple register groups to map with an associated CPU.
On ARM/ARM64 based systems this interrupt controller is present and used as a second level interrupt controller hanging off the ARM GIC. That copy of the interrupt controller contains a single group, resulting in the intc->cpus[] array to be of size 1.
Things happened to work in that case because we install that interrupt controller as a chained handler which does not allow it to be affine to any CPU but the boot CPU which happens to be 0, therefore we never de-reference past intc->cpus[] but with the current code in place, we do leave a chance of de-referencing the array past its bounds.
--- drivers/irqchip/irq-bcm7038-l1.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-)
drivers/irqchip/irq-bcm7038-l1.c +3 -6
@@ -28,9 +28,6 @@#include <linux/irqchip.h> #include <linux/irqchip/chained_irq.h> #include <linux/syscore_ops.h> -#ifdef CONFIG_ARM -#include <asm/smp_plat.h> -#endif #define IRQS_PER_WORD 32#define REG_BYTES_PER_IRQ_WORD (sizeof(u32) * 4)
@@ -127,7 +124,7 @@ static void bcm7038_l1_irq_handle(struct irq_desc *desc)struct irq_chip *chip =irq_desc_get_chip (desc);unsigned int idx; -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP ) && defined(CONFIG_MIPS ) cpu = intc->cpus[cpu_logical_map (smp_processor_id ())];#else cpu = intc->cpus[0 ];
@@ -301,7 +298,7 @@ static int bcm7038_l1_suspend(void)u32 val;/* Wakeup interrupt should only come from the boot cpu */ -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP ) && defined(CONFIG_MIPS ) boot_cpu =cpu_logical_map (0 );#else boot_cpu =0 ;
@@ -325,7 +322,7 @@ static void bcm7038_l1_resume(void)struct bcm7038_l1_chip *intc;int boot_cpu, word; -#ifdef CONFIG_SMP +#if defined(CONFIG_SMP ) && defined(CONFIG_MIPS ) boot_cpu =cpu_logical_map (0 );#else boot_cpu =0 ;
PATCH v6 5/13 irqchip/irq-bcm7038-l1: Restrict affinity setting to MIPS
In reply to Florian FainelliOnly MIPS based platforms using this interrupt controller as first level interrupt controller can actually change the affinity of interrupts by re-programming the affinity mask of the interrupt controller and use another word group to have another CPU process the interrupt.
When this interrupt is used as a second level interrupt controller on ARM/ARM64 there is no way to change the interrupt affinity. This fixes a NULL pointer de-reference while trying to change the affinity since there is only a single word group in that case, and we would have been overruning the intc->cpus[] array.
--- drivers/irqchip/irq-bcm7038-l1.c | 4 ++++ 1 file changed, 4 insertions(+)
drivers/irqchip/irq-bcm7038-l1.c +4 -0
@@ -191,6 +191,7 @@ static void bcm7038_l1_mask(struct irq_data *d)raw_spin_unlock_irqrestore (&intc->lock, flags); } +#if defined(CONFIG_MIPS ) && defined(CONFIG_SMP )static int bcm7038_l1_set_affinity (struct irq_data *d,const struct cpumask *dest,bool force)
@@ -217,6 +218,7 @@ static int bcm7038_l1_set_affinity(struct irq_data *d,return 0 ; } +#endif static int __init bcm7038_l1_init_one(struct device_node *dn, unsigned int idx,
@@ -365,7 +367,9 @@ static struct irq_chip bcm7038_l1_irq_chip = { .name = "bcm7038-l1", .irq_mask = bcm7038_l1_mask, .irq_unmask = bcm7038_l1_unmask, +#if defined(CONFIG_SMP ) && defined(CONFIG_MIPS ) .irq_set_affinity = bcm7038_l1_set_affinity, +#endif #ifdef CONFIG_PM_SLEEP .irq_set_wake = bcm7038_l1_set_wake,#endif
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] irqchip/irq-bcm7038-l1: Restrict affinity setting to MIPS
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 3578fd47137c405b6fb9f90e2e6d1654c71f5e1e Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/3578fd47137c405b6fb9f90e2e6d1654c71f5e1e Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:51 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:33 +01:00
irqchip/irq-bcm7038-l1: Restrict affinity setting to MIPS
Only MIPS based platforms using this interrupt controller as first level interrupt controller can actually change the affinity of interrupts by re-programming the affinity mask of the interrupt controller and use another word group to have another CPU process the interrupt.
When this interrupt is used as a second level interrupt controller on ARM/ARM64 there is no way to change the interrupt affinity. This fixes a NULL pointer de-reference while trying to change the affinity since there is only a single word group in that case, and we would have been overruning the intc->cpus[] array.
--- drivers/irqchip/irq-bcm7038-l1.c | 4 ++++ 1 file changed, 4 insertions(+)
drivers/irqchip/irq-bcm7038-l1.c +4 -0
@@ -191,6 +191,7 @@ static void bcm7038_l1_mask(struct irq_data *d)raw_spin_unlock_irqrestore (&intc->lock, flags); } +#if defined(CONFIG_MIPS ) && defined(CONFIG_SMP )static int bcm7038_l1_set_affinity (struct irq_data *d,const struct cpumask *dest,bool force)
@@ -217,6 +218,7 @@ static int bcm7038_l1_set_affinity(struct irq_data *d,return 0 ; } +#endif static int __init bcm7038_l1_init_one(struct device_node *dn, unsigned int idx,
@@ -365,7 +367,9 @@ static struct irq_chip bcm7038_l1_irq_chip = { .name = "bcm7038-l1", .irq_mask = bcm7038_l1_mask, .irq_unmask = bcm7038_l1_unmask, +#if defined(CONFIG_SMP ) && defined(CONFIG_MIPS ) .irq_set_affinity = bcm7038_l1_set_affinity, +#endif #ifdef CONFIG_PM_SLEEP .irq_set_wake = bcm7038_l1_set_wake,#endif
PATCH v6 6/13 irqchip/irq-bcm7038-l1: Switch to IRQCHIP_PLATFORM_DRIVER
In reply to Florian FainelliAllow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot.
--- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-bcm7038-l1.c | 6 +++++- 2 files changed, 8 insertions(+), 2 deletions(-)
drivers/irqchip/Kconfig +3 -1
@@ -115,7 +115,9 @@ config BCM6345_L1_IRQ select GENERIC_IRQ_EFFECTIVE_AFF_MASK config BCM7038_L1_IRQ - bool + tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" + depends on ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN select GENERIC_IRQ_EFFECTIVE_AFF_MASK
drivers/irqchip/irq-bcm7038-l1.c +5 -1
@@ -455,4 +455,8 @@ static int __init bcm7038_l1_of_init(struct device_node *dn,return ret; } -IRQCHIP_DECLARE (bcm7038_l1,"brcm,bcm7038-l1-intc" , bcm7038_l1_of_init); +IRQCHIP_PLATFORM_DRIVER_BEGIN(bcm7038_l1) +IRQCHIP_MATCH("brcm,bcm7038-l1-intc", bcm7038_l1_of_init) +IRQCHIP_PLATFORM_DRIVER_END(bcm7038_l1) +MODULE_DESCRIPTION("Broadcom STB 7038-style L1/L2 interrupt controller"); +MODULE_LICENSE ("GPL v2" );
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] irqchip/irq-bcm7038-l1: Switch to IRQCHIP_PLATFORM_DRIVER
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: c057c799e379f940b0e14dc83f96540a4c27730a Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/c057c799e379f940b0e14dc83f96540a4c27730a Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:52 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:33 +01:00
irqchip/irq-bcm7038-l1: Switch to IRQCHIP_PLATFORM_DRIVER
Allow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot.
--- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-bcm7038-l1.c | 6 +++++- 2 files changed, 8 insertions(+), 2 deletions(-)
drivers/irqchip/Kconfig +3 -1
@@ -115,7 +115,9 @@ config BCM6345_L1_IRQ select GENERIC_IRQ_EFFECTIVE_AFF_MASK config BCM7038_L1_IRQ - bool + tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver" + depends on ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN select GENERIC_IRQ_EFFECTIVE_AFF_MASK
drivers/irqchip/irq-bcm7038-l1.c +5 -1
@@ -455,4 +455,8 @@ out_free:return ret; } -IRQCHIP_DECLARE (bcm7038_l1,"brcm,bcm7038-l1-intc" , bcm7038_l1_of_init); +IRQCHIP_PLATFORM_DRIVER_BEGIN(bcm7038_l1) +IRQCHIP_MATCH("brcm,bcm7038-l1-intc", bcm7038_l1_of_init) +IRQCHIP_PLATFORM_DRIVER_END(bcm7038_l1) +MODULE_DESCRIPTION("Broadcom STB 7038-style L1/L2 interrupt controller"); +MODULE_LICENSE ("GPL v2" );
PATCH v6 7/13 genirq: Export irq_gc_{unmask_enable,mask_disable}_reg
In reply to Florian FainelliIn order to allow drivers/irqchip/irq-brcmstb-l2.c to be built as a module we need to export: irq_gc_unmask_enable_reg() and irq_gc_mask_disable_reg().
--- kernel/irq/generic-chip.c | 2 ++ 1 file changed, 2 insertions(+)
kernel/irq/generic-chip.c +2 -0
@@ -44,6 +44,7 @@ void irq_gc_mask_disable_reg(struct irq_data *d) *ct->mask_cache &= ~mask;irq_gc_unlock (gc); } +EXPORT_SYMBOL_GPL (irq_gc_mask_disable_reg);/** * irq_gc_mask_set_bit - Mask chip via setting bit in mask register
@@ -103,6 +104,7 @@ void irq_gc_unmask_enable_reg(struct irq_data *d) *ct->mask_cache |= mask;irq_gc_unlock (gc); } +EXPORT_SYMBOL_GPL (irq_gc_unmask_enable_reg);/** * irq_gc_ack_set_bit - Ack pending interrupt via setting bit
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] genirq: Export irq_gc_{unmask_enable,mask_disable}_reg
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: fcd0f63dec4abc281988ac08b83ca3ae6946c13b Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/fcd0f63dec4abc281988ac08b83ca3ae6946c13b Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:53 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:33 +01:00
genirq: Export irq_gc_{unmask_enable,mask_disable}_reg
In order to allow drivers/irqchip/irq-brcmstb-l2.c to be built as a module we need to export: irq_gc_unmask_enable_reg() and irq_gc_mask_disable_reg().
--- kernel/irq/generic-chip.c | 2 ++ 1 file changed, 2 insertions(+)
kernel/irq/generic-chip.c +2 -0
@@ -44,6 +44,7 @@ void irq_gc_mask_disable_reg(struct irq_data *d) *ct->mask_cache &= ~mask;irq_gc_unlock (gc); } +EXPORT_SYMBOL_GPL (irq_gc_mask_disable_reg);/** * irq_gc_mask_set_bit - Mask chip via setting bit in mask register
@@ -103,6 +104,7 @@ void irq_gc_unmask_enable_reg(struct irq_data *d) *ct->mask_cache |= mask;irq_gc_unlock (gc); } +EXPORT_SYMBOL_GPL (irq_gc_unmask_enable_reg);/** * irq_gc_ack_set_bit - Ack pending interrupt via setting bit
PATCH v6 8/13 irqchip/irq-brcmstb-l2: Switch to IRQCHIP_PLATFORM_DRIVER
In reply to Florian FainelliAllow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot.
--- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-brcmstb-l2.c | 16 +++++++++------- 2 files changed, 12 insertions(+), 8 deletions(-)
drivers/irqchip/Kconfig +3 -1
@@ -128,7 +128,9 @@ config BCM7120_L2_IRQ select IRQ_DOMAIN config BRCMSTB_L2_IRQ - bool + tristate "Broadcom STB generic L2 interrupt controller driver" + depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN
drivers/irqchip/irq-brcmstb-l2.c +9 -7
@@ -275,16 +275,18 @@ static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np, {return brcmstb_l2_intc_of_init (np, parent, &l2_edge_intc_init); } -IRQCHIP_DECLARE (brcmstb_l2_intc,"brcm,l2-intc" , brcmstb_l2_edge_intc_of_init); -IRQCHIP_DECLARE (brcmstb_hif_spi_l2_intc,"brcm,hif-spi-l2-intc" , - brcmstb_l2_edge_intc_of_init); -IRQCHIP_DECLARE (brcmstb_upg_aux_aon_l2_intc,"brcm,upg-aux-aon-l2-intc" , - brcmstb_l2_edge_intc_of_init);static int __init brcmstb_l2_lvl_intc_of_init (struct device_node *np,struct device_node *parent) {return brcmstb_l2_intc_of_init (np, parent, &l2_lvl_intc_init); } -IRQCHIP_DECLARE (bcm7271_l2_intc,"brcm,bcm7271-l2-intc" , - brcmstb_l2_lvl_intc_of_init); + +IRQCHIP_PLATFORM_DRIVER_BEGIN(brcmstb_l2) +IRQCHIP_MATCH("brcm,l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,hif-spi-l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,upg-aux-aon-l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,bcm7271-l2-intc", brcmstb_l2_lvl_intc_of_init) +IRQCHIP_PLATFORM_DRIVER_END(brcmstb_l2) +MODULE_DESCRIPTION("Broadcom STB generic L2 interrupt controller"); +MODULE_LICENSE ("GPL v2" );
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] irqchip/irq-brcmstb-l2: Switch to IRQCHIP_PLATFORM_DRIVER
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 51d9db5c8fbbed160081d4cb5c193abdf67ded05 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/51d9db5c8fbbed160081d4cb5c193abdf67ded05 Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:54 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:33 +01:00
irqchip/irq-brcmstb-l2: Switch to IRQCHIP_PLATFORM_DRIVER
Allow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot.
--- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-brcmstb-l2.c | 16 +++++++++------- 2 files changed, 12 insertions(+), 8 deletions(-)
drivers/irqchip/Kconfig +3 -1
@@ -128,7 +128,9 @@ config BCM7120_L2_IRQ select IRQ_DOMAIN config BRCMSTB_L2_IRQ - bool + tristate "Broadcom STB generic L2 interrupt controller driver" + depends on ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BCM2835 || ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN
drivers/irqchip/irq-brcmstb-l2.c +9 -7
@@ -275,16 +275,18 @@ static int __init brcmstb_l2_edge_intc_of_init(struct device_node *np, {return brcmstb_l2_intc_of_init (np, parent, &l2_edge_intc_init); } -IRQCHIP_DECLARE (brcmstb_l2_intc,"brcm,l2-intc" , brcmstb_l2_edge_intc_of_init); -IRQCHIP_DECLARE (brcmstb_hif_spi_l2_intc,"brcm,hif-spi-l2-intc" , - brcmstb_l2_edge_intc_of_init); -IRQCHIP_DECLARE (brcmstb_upg_aux_aon_l2_intc,"brcm,upg-aux-aon-l2-intc" , - brcmstb_l2_edge_intc_of_init);static int __init brcmstb_l2_lvl_intc_of_init (struct device_node *np,struct device_node *parent) {return brcmstb_l2_intc_of_init (np, parent, &l2_lvl_intc_init); } -IRQCHIP_DECLARE (bcm7271_l2_intc,"brcm,bcm7271-l2-intc" , - brcmstb_l2_lvl_intc_of_init); + +IRQCHIP_PLATFORM_DRIVER_BEGIN(brcmstb_l2) +IRQCHIP_MATCH("brcm,l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,hif-spi-l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,upg-aux-aon-l2-intc", brcmstb_l2_edge_intc_of_init) +IRQCHIP_MATCH("brcm,bcm7271-l2-intc", brcmstb_l2_lvl_intc_of_init) +IRQCHIP_PLATFORM_DRIVER_END(brcmstb_l2) +MODULE_DESCRIPTION("Broadcom STB generic L2 interrupt controller"); +MODULE_LICENSE ("GPL v2" );
PATCH v6 9/13 genirq: Export irq_gc_noop()
In reply to Florian FainelliIn order to build drivers/irqchip/irq-bcm7120-l2.c as a module which references irq_gc_noop(), we need to export it towards modules.
--- kernel/irq/generic-chip.c | 1 + 1 file changed, 1 insertion(+)
kernel/irq/generic-chip.c +1 -0
@@ -25,6 +25,7 @@ static DEFINE_RAW_SPINLOCK(gc_lock);void irq_gc_noop (struct irq_data *d) { } +EXPORT_SYMBOL_GPL (irq_gc_noop);/** * irq_gc_mask_disable_reg - Mask chip via disable register
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] genirq: Export irq_gc_noop()
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 945486bf1ee3362068d95b5e1b5d4a7779ea0aaf Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/945486bf1ee3362068d95b5e1b5d4a7779ea0aaf Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:55 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:33 +01:00
genirq: Export irq_gc_noop()
In order to build drivers/irqchip/irq-bcm7120-l2.c as a module which references irq_gc_noop(), we need to export it towards modules.
--- kernel/irq/generic-chip.c | 1 + 1 file changed, 1 insertion(+)
kernel/irq/generic-chip.c +1 -0
@@ -25,6 +25,7 @@ static DEFINE_RAW_SPINLOCK(gc_lock);void irq_gc_noop (struct irq_data *d) { } +EXPORT_SYMBOL_GPL (irq_gc_noop);/** * irq_gc_mask_disable_reg - Mask chip via disable register
PATCH v6 10/13 irqchip/irq-bcm7120-l2: Switch to IRQCHIP_PLATFORM_DRIVER
In reply to Florian FainelliAllow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot.
To avoid using of_irq_count() which is not exported towards module, switch the driver to use the platform_device provided by the irqchip platform driver code and resolve the number of interrupts using platform_irq_count().
--- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-bcm7120-l2.c | 21 +++++++++++++++------ 2 files changed, 18 insertions(+), 7 deletions(-)
drivers/irqchip/Kconfig +3 -1
@@ -123,7 +123,9 @@ config BCM7038_L1_IRQ select GENERIC_IRQ_EFFECTIVE_AFF_MASK config BCM7120_L2_IRQ - bool + tristate "Broadcom STB 7120-style L2 interrupt controller driver" + depends on ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN
drivers/irqchip/irq-bcm7120-l2.c +15 -6
@@ -220,6 +220,7 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn, {unsigned int clr =IRQ_NOREQUEST |IRQ_NOPROBE |IRQ_NOAUTOEN ;struct bcm7120_l2_intc_data *data; +struct platform_device *pdev;struct irq_chip_generic *gc;struct irq_chip_type *ct;int ret =0 ;
@@ -230,7 +231,13 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn,if (!data)return -ENOMEM ; - data->num_parent_irqs =of_irq_count (dn); + pdev =of_find_device_by_node (dn); +if (!pdev) { + ret = -ENODEV ; + goto out_free_data; + } + + data->num_parent_irqs =platform_irq_count (pdev);if (data->num_parent_irqs <=0 ) {pr_err ("invalid number of parent interrupts\n" ); ret = -ENOMEM ;
@@ -329,6 +336,7 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn,if (data->map_base[idx])iounmap (data->map_base[idx]); } +out_free_data:kfree (data);return ret; }
@@ -347,8 +355,9 @@ static int __init bcm7120_l2_intc_probe_3380(struct device_node *dn, "BCM3380 L2"); } -IRQCHIP_DECLARE (bcm7120_l2_intc,"brcm,bcm7120-l2-intc" , - bcm7120_l2_intc_probe_7120); - -IRQCHIP_DECLARE (bcm3380_l2_intc,"brcm,bcm3380-l2-intc" , - bcm7120_l2_intc_probe_3380); +IRQCHIP_PLATFORM_DRIVER_BEGIN(bcm7120_l2) +IRQCHIP_MATCH("brcm,bcm7120-l2-intc", bcm7120_l2_intc_probe_7120) +IRQCHIP_MATCH("brcm,bcm3380-l2-intc", bcm7120_l2_intc_probe_3380) +IRQCHIP_PLATFORM_DRIVER_END(bcm7120_l2) +MODULE_DESCRIPTION("Broadcom STB 7120-style L2 interrupt controller driver"); +MODULE_LICENSE ("GPL v2" );
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] irqchip/irq-bcm7120-l2: Switch to IRQCHIP_PLATFORM_DRIVER
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 3ac268d5ed2233d4a2db541d8fd744ccc13f46b0 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/3ac268d5ed2233d4a2db541d8fd744ccc13f46b0 Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:56 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:34 +01:00
irqchip/irq-bcm7120-l2: Switch to IRQCHIP_PLATFORM_DRIVER
Allow the user selection and building of this interrupt controller driver as a module since it is used on ARM/ARM64 based systems as a second level interrupt controller hanging off the ARM GIC and is therefore loadable during boot.
To avoid using of_irq_count() which is not exported towards module, switch the driver to use the platform_device provided by the irqchip platform driver code and resolve the number of interrupts using platform_irq_count().
--- drivers/irqchip/Kconfig | 4 +++- drivers/irqchip/irq-bcm7120-l2.c | 21 +++++++++++++++------ 2 files changed, 18 insertions(+), 7 deletions(-)
drivers/irqchip/Kconfig +3 -1
@@ -123,7 +123,9 @@ config BCM7038_L1_IRQ select GENERIC_IRQ_EFFECTIVE_AFF_MASK config BCM7120_L2_IRQ - bool + tristate "Broadcom STB 7120-style L2 interrupt controller driver" + depends on ARCH_BRCMSTB || BMIPS_GENERIC + default ARCH_BRCMSTB || BMIPS_GENERIC select GENERIC_IRQ_CHIP select IRQ_DOMAIN
drivers/irqchip/irq-bcm7120-l2.c +15 -6
@@ -220,6 +220,7 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn, {unsigned int clr =IRQ_NOREQUEST |IRQ_NOPROBE |IRQ_NOAUTOEN ;struct bcm7120_l2_intc_data *data; +struct platform_device *pdev;struct irq_chip_generic *gc;struct irq_chip_type *ct;int ret =0 ;
@@ -230,7 +231,13 @@ static int __init bcm7120_l2_intc_probe(struct device_node *dn,if (!data)return -ENOMEM ; - data->num_parent_irqs =of_irq_count (dn); + pdev =of_find_device_by_node (dn); +if (!pdev) { + ret = -ENODEV ; + goto out_free_data; + } + + data->num_parent_irqs =platform_irq_count (pdev);if (data->num_parent_irqs <=0 ) {pr_err ("invalid number of parent interrupts\n" ); ret = -ENOMEM ;
@@ -329,6 +336,7 @@ out_unmap:if (data->map_base[idx])iounmap (data->map_base[idx]); } +out_free_data:kfree (data);return ret; }
@@ -347,8 +355,9 @@ static int __init bcm7120_l2_intc_probe_3380(struct device_node *dn, "BCM3380 L2"); } -IRQCHIP_DECLARE (bcm7120_l2_intc,"brcm,bcm7120-l2-intc" , - bcm7120_l2_intc_probe_7120); - -IRQCHIP_DECLARE (bcm3380_l2_intc,"brcm,bcm3380-l2-intc" , - bcm7120_l2_intc_probe_3380); +IRQCHIP_PLATFORM_DRIVER_BEGIN(bcm7120_l2) +IRQCHIP_MATCH("brcm,bcm7120-l2-intc", bcm7120_l2_intc_probe_7120) +IRQCHIP_MATCH("brcm,bcm3380-l2-intc", bcm7120_l2_intc_probe_3380) +IRQCHIP_PLATFORM_DRIVER_END(bcm7120_l2) +MODULE_DESCRIPTION("Broadcom STB 7120-style L2 interrupt controller driver"); +MODULE_LICENSE ("GPL v2" );
PATCH v6 11/13 arm64: broadcom: Removed forced select of interrupt controllers
In reply to Florian FainelliNow that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules.
--- arch/arm64/Kconfig.platforms | 3 --- 1 file changed, 3 deletions(-)
arch/arm64/Kconfig.platforms +0 -3
@@ -44,7 +44,6 @@ config ARCH_BCM2835 select ARM_AMBA select ARM_GIC select ARM_TIMER_SP804 - select BRCMSTB_L2_IRQ help This enables support for the Broadcom BCM2837 and BCM2711 SoC. These SoCs are used in the Raspberry Pi 3 and 4 devices.
@@ -82,8 +81,6 @@ config ARCH_BITMAIN config ARCH_BRCMSTB bool "Broadcom Set-Top-Box SoCs" select ARCH_HAS_RESET_CONTROLLER - select BCM7038_L1_IRQ - select BRCMSTB_L2_IRQ select GENERIC_IRQ_CHIP select PINCTRL help
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] arm64: broadcom: Removed forced select of interrupt controllers
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 9db71e8966bf7c80ab89d8d5b113d8daa3b237ea Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/9db71e8966bf7c80ab89d8d5b113d8daa3b237ea Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:57 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:34 +01:00
arm64: broadcom: Removed forced select of interrupt controllers
Now that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules.
--- arch/arm64/Kconfig.platforms | 3 --- 1 file changed, 3 deletions(-)
arch/arm64/Kconfig.platforms +0 -3
@@ -44,7 +44,6 @@ config ARCH_BCM2835 select ARM_AMBA select ARM_GIC select ARM_TIMER_SP804 - select BRCMSTB_L2_IRQ help This enables support for the Broadcom BCM2837 and BCM2711 SoC. These SoCs are used in the Raspberry Pi 3 and 4 devices.
@@ -82,8 +81,6 @@ config ARCH_BITMAIN config ARCH_BRCMSTB bool "Broadcom Set-Top-Box SoCs" select ARCH_HAS_RESET_CONTROLLER - select BCM7038_L1_IRQ - select BRCMSTB_L2_IRQ select GENERIC_IRQ_CHIP select PINCTRL help
PATCH v6 12/13 ARM: bcm: Removed forced select of interrupt controllers
In reply to Florian FainelliNow that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules.
--- arch/arm/mach-bcm/Kconfig | 4 ---- 1 file changed, 4 deletions(-)
arch/arm/mach-bcm/Kconfig +0 -4
@@ -161,7 +161,6 @@ config ARCH_BCM2835 select ARM_TIMER_SP804 select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7 select BCM2835_TIMER - select BRCMSTB_L2_IRQ select PINCTRL select PINCTRL_BCM2835 select MFD_CORE
@@ -209,9 +208,6 @@ config ARCH_BRCMSTB select ARM_GIC select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER - select BCM7038_L1_IRQ - select BRCMSTB_L2_IRQ - select BCM7120_L2_IRQ select ZONE_DMA if ARM_LPAE select SOC_BRCMSTB select SOC_BUS
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] ARM: bcm: Removed forced select of interrupt controllers
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: c40ef4c57599c30efc0c1e8ad6bec4f842295521 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/c40ef4c57599c30efc0c1e8ad6bec4f842295521 Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:58 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:06:34 +01:00
ARM: bcm: Removed forced select of interrupt controllers
Now that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules.
--- arch/arm/mach-bcm/Kconfig | 4 ---- 1 file changed, 4 deletions(-)
arch/arm/mach-bcm/Kconfig +0 -4
@@ -161,7 +161,6 @@ config ARCH_BCM2835 select ARM_TIMER_SP804 select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7 select BCM2835_TIMER - select BRCMSTB_L2_IRQ select PINCTRL select PINCTRL_BCM2835 select MFD_CORE
@@ -209,9 +208,6 @@ config ARCH_BRCMSTB select ARM_GIC select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER - select BCM7038_L1_IRQ - select BRCMSTB_L2_IRQ - select BCM7120_L2_IRQ select ZONE_DMA if ARM_LPAE select SOC_BRCMSTB select SOC_BUS
PATCH v6 13/13 irqchip: Fix kernel-doc parameter typo for IRQCHIP_DECLARE
In reply to Florian FainelliThe documentation refers to "compstr" when we have the parameter named "compat", fix the typo.
--- include/linux/irqchip.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
include/linux/irqchip.h +1 -1
@@ -23,7 +23,7 @@* * @name: name that must be unique across all IRQCHIP_DECLARE of the * same file. -* @compstr: compatible string of the irqchip driver +* @compat: compatible string of the irqchip driver * @fn: initialization function */ #define IRQCHIP_DECLARE (name, compat, fn) OF_DECLARE_2(irqchip, name, compat, fn)
Signature · 1 line
2.25.1
[irqchip: irq/irqchip-next] irqchip: Fix kernel-doc parameter typo for IRQCHIP_DECLARE
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: b8419e7be6c6029eee3448fda45f4f9ad340c4ca Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/b8419e7be6c6029eee3448fda45f4f9ad340c4ca Author: Florian Fainelli <[email protected]> AuthorDate: Wed, 20 Oct 2021 11:48:59 -07:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Wed, 20 Oct 2021 20:07:15 +01:00
irqchip: Fix kernel-doc parameter typo for IRQCHIP_DECLARE
The documentation refers to "compstr" when we have the parameter named "compat", fix the typo.
--- include/linux/irqchip.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
include/linux/irqchip.h +1 -1
@@ -30,7 +30,7 @@ extern of_irq_init_cb_t typecheck_irq_init_cb;* * @name: name that must be unique across all IRQCHIP_DECLARE of the * same file. -* @compstr: compatible string of the irqchip driver +* @compat: compatible string of the irqchip driver * @fn: initialization function */ #define IRQCHIP_DECLARE (name, compat, fn) \
Marc Zyngier
AppliedQuoted 9 lines · Florian Fainelli
This patch series aims at allowing the 3 interrupt controller drivers used on Broadcom STB platforms to be built as modules in order for those to be shipped in a GKI enabled system (Android).
The irq-bcm7038-l1 requires us to export a number of symbols, which is not great, but there are not obvious solutions other than adding accessor functions to get the same information.
[...]
Applied to irq/irqchip-next, thanks!
[01/13] MIPS: BMIPS: Remove use of irq_cpu_offline
commit: bf8bde41d296849fd5f9db8becd71ad4e84bc521
[02/13] irqchip/irq-bcm7038-l1: Remove .irq_cpu_offline()
commit: 57de689ce7829219db007dca5c88ae023a8be2d3
[03/13] irqchip/irq-bcm7038-l1: Use irq_get_irq_data()
commit: 4b55192009fc62d2817efa2346ec1c0da4be1033
[04/13] irqchip/irq-bcm7038-l1: Gate use of CPU logical map to MIPS
commit: 35eb2ef5df42d3c3d2186ae6dab5622a31e6ceee
[05/13] irqchip/irq-bcm7038-l1: Restrict affinity setting to MIPS
commit: 3578fd47137c405b6fb9f90e2e6d1654c71f5e1e
[06/13] irqchip/irq-bcm7038-l1: Switch to IRQCHIP_PLATFORM_DRIVER
commit: c057c799e379f940b0e14dc83f96540a4c27730a
[07/13] genirq: Export irq_gc_{unmask_enable,mask_disable}_reg
commit: fcd0f63dec4abc281988ac08b83ca3ae6946c13b
[08/13] irqchip/irq-brcmstb-l2: Switch to IRQCHIP_PLATFORM_DRIVER
commit: 51d9db5c8fbbed160081d4cb5c193abdf67ded05
[09/13] genirq: Export irq_gc_noop()
commit: 945486bf1ee3362068d95b5e1b5d4a7779ea0aaf
[10/13] irqchip/irq-bcm7120-l2: Switch to IRQCHIP_PLATFORM_DRIVER
commit: 3ac268d5ed2233d4a2db541d8fd744ccc13f46b0
[11/13] arm64: broadcom: Removed forced select of interrupt controllers
commit: 9db71e8966bf7c80ab89d8d5b113d8daa3b237ea
[12/13] ARM: bcm: Removed forced select of interrupt controllers
commit: c40ef4c57599c30efc0c1e8ad6bec4f842295521
[13/13] irqchip: Fix kernel-doc parameter typo for IRQCHIP_DECLARE
commit: b8419e7be6c6029eee3448fda45f4f9ad340c4caCheers,
M.
Signature · 1 line
Without deviation from the norm, progress is not possible.