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arm64: random: implement arch_get_random_int/_long based on RNDR

PATCH Applied Ard Biesheuvel 5 participants 8 messages Jan 13, 2022 – Feb 15, 2022 arm64

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PATCH 1/1 arm64: random: implement arch_get_random_int/_long based on RNDR

When support for RNDR/RNDRRS was introduced, we elected to only implement arch_get_random_seed_int/_long(), and back them by RNDR instead of RNDRRS. This was needed to prevent potential performance and/or starvation issues resulting from the fact that the /dev/random driver used to invoke these routines on various hot paths.

These issues have all been addressed now [0] [1], and so we can wire up this API more straight-forwardly:

- map arch_get_random_int/_long() onto RNDR, which returns the output of a DRBG that is reseeded at an implemented defined rate;
- map arch_get_random_seed_int/_long() onto the TRNG firmware service, which returns true, conditioned entropy, or onto RNDRRS if the TRNG service is unavailable, which returns the output of a DRBG that is reseeded every time it is used.

[0] 390596c9959c random: avoid arch_get_random_seed_long() when collecting IRQ randomness
[1] 2ee25b6968b1 random: avoid superfluous call to RDRAND in CRNG extraction

Cc Andre Przywara <[email protected]>
Cc Mark Brown <[email protected]>
---
 arch/arm64/include/asm/archrandom.h | 45 +++++++++++++++++---
 1 file changed, 39 insertions(+), 6 deletions(-)
arch/arm64/include/asm/archrandom.h +39 -6
index 09e43272ccb0..d1bb5e71df25 100644
@@ -42,13 +42,47 @@ static inline bool __arm64_rndr(unsigned long *v)
 	return ok;
 }
 
+static inline bool __arm64_rndrrs(unsigned long *v)
+{
+	bool ok;
+
+	/*
+	 * Reads of RNDRRS set PSTATE.NZCV to 0b0000 on success,
+	 * and set PSTATE.NZCV to 0b0100 otherwise.
+	 */
+	asm volatile(
+		__mrs_s("%0", SYS_RNDRRS_EL0) "\n"
+	"	cset %w1, ne\n"
+	: "=r" (*v), "=r" (ok)
+	:
+	: "cc");
+
+	return ok;
+}
+
 static inline bool __must_check arch_get_random_long(unsigned long *v)
 {
+	/*
+	 * Only support the generic interface after we have detected
+	 * the system wide capability, avoiding complexity with the
+	 * cpufeature code and with potential scheduling between CPUs
+	 * with and without the feature.
+	 */
+	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v))
+		return true;
 	return false;
 }
 
 static inline bool __must_check arch_get_random_int(unsigned int *v)
 {
+	if (cpus_have_const_cap(ARM64_HAS_RNG)) {
+		unsigned long val;
+
+		if (__arm64_rndr(&val)) {
+			*v = val;
+			return true;
+		}
+	}
 	return false;
 }
 
@@ -71,12 +105,11 @@ static inline bool __must_check arch_get_random_seed_long(unsigned long *v)
 	}
 
 	/*
-	 * Only support the generic interface after we have detected
-	 * the system wide capability, avoiding complexity with the
-	 * cpufeature code and with potential scheduling between CPUs
-	 * with and without the feature.
+	 * RNDRRS is not backed by an entropy source but by a DRBG that is
+	 * reseeded after each invocation. This is not a 100% fit but good
+	 * enough to implement this API if no other entropy source exists.
 	 */
-	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v))
+	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndrrs(v))
 		return true;
 
 	return false;
@@ -96,7 +129,7 @@ static inline bool __must_check arch_get_random_seed_int(unsigned int *v)
 	}
 
 	if (cpus_have_const_cap(ARM64_HAS_RNG)) {
-		if (__arm64_rndr(&val)) {
+		if (__arm64_rndrrs(&val)) {
 			*v = val;
 			return true;
 		}
Signature · 7 lines
2.30.2


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Reviewed-by on v1 1/1
#1 lore raw
Quoted 5 lines · Ard Biesheuvel

When support for RNDR/RNDRRS was introduced, we elected to only implement arch_get_random_seed_int/_long(), and back them by RNDR instead of RNDRRS. This was needed to prevent potential performance and/or starvation issues resulting from the fact that the /dev/random driver used to invoke these routines on various hot paths.

_______________________________________________
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[email protected]
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Acked-by on v1 1/1
#2 lore raw
In reply to Ard Biesheuvel

Hi Ard,

Wow, didn't expect for this to come so fast. Excellent.

Quoted 2 lines · Ard Biesheuvel

- map arch_get_random_int/_long() onto RNDR, which returns the output of a DRBG that is reseeded at an implemented defined rate;

implemented -> implementation?

arch/arm64/include/asm/archrandom.h static inline bool __arm64_rndr(unsigned long *v) · line 74

Quoted 12 lines

static inline bool __must_check arch_get_random_long(unsigned long *v) {

arch/arm64/include/asm/archrandom.h +8 -0
+	/*
+	 * Only support the generic interface after we have detected
+	 * the system wide capability, avoiding complexity with the
+	 * cpufeature code and with potential scheduling between CPUs
+	 * with and without the feature.
+	 */
+	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v))
+		return true;
 	return false;
 }

Can't this just become:

  return cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v);

arch/arm64/include/asm/archrandom.h static inline bool __arm64_rndr(unsigned long *v) · line 87

Quoted 13 lines

static inline bool __must_check arch_get_random_int(unsigned int *v) {

arch/arm64/include/asm/archrandom.h +8 -0
+	if (cpus_have_const_cap(ARM64_HAS_RNG)) {
+		unsigned long val;
+
+		if (__arm64_rndr(&val)) {
+			*v = val;
+			return true;
+		}
+	}
 	return false;
 }

Why not implement arch_get_random_int with the same type of flow as arch_get_random_long?

static inline bool __must_check arch_get_random_int(unsigned int *v)

{
	unsigned long val;
	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(&val))) {
		*v = val;
		return true;
	}
	return false;
}

Or, even better, just define arch_get_random_int in terms of arch_get_random_long:

static inline bool __must_check arch_get_random_int(unsigned int *v)

{
	unsigned long val;
	if (arch_get_random_long(&val)) {
		*v = val;
		return true;
	}
	return false;
}

arch/arm64/include/asm/archrandom.h static inline bool __must_check arch_get_random_seed_long(unsigned long *v) · line 110

Quoted 11 lines
arch/arm64/include/asm/archrandom.h +3 -4
@@ -71,12 +105,11 @@ static inline bool __must_check arch_get_random_seed_long(unsigned long *v)
 	}
 
 	/*
-	 * Only support the generic interface after we have detected
-	 * the system wide capability, avoiding complexity with the
-	 * cpufeature code and with potential scheduling between CPUs
-	 * with and without the feature.
+	 * RNDRRS is not backed by an entropy source but by a DRBG that is
+	 * reseeded after each invocation. This is not a 100% fit but good
+	 * enough to implement this API if no other entropy source exists.

The docs are actually a bit more optimistic than that:

https://developer.arm.com/documentation/ddi0595/2021-03/AArch64-Registers/RNDRRS--Reseeded-Random-Number

~ Reseeded Random Number. Returns a 64-bit random number which is reseeded ~ from the True Random Number source immediately before the read of the ~ random number.

If I'm reading that correctly, it looks like the reseeding happens *before* the read, and it looks like it comes from a TRNG. In other words, it sounds to me like it's just doing something like HASH(READ_TRNG()). That would be pretty darn good.

Quoted 7 lines
arch/arm64/include/asm/archrandom.h +1 -1
 	 */
-	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v))
+	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndrrs(v))
 		return true;
 
 	return false;

arch/arm64/include/asm/archrandom.h static inline bool __must_check arch_get_random_seed_int(unsigned int *v) · line 135

Quoted 8 lines
arch/arm64/include/asm/archrandom.h +1 -1
@@ -96,7 +129,7 @@ static inline bool __must_check arch_get_random_seed_int(unsigned int *v)
 	}
 
 	if (cpus_have_const_cap(ARM64_HAS_RNG)) {
-		if (__arm64_rndr(&val)) {
+		if (__arm64_rndrrs(&val)) {
 			*v = val;
 			return true;
 		}

I suppose the same control flow simplification stuff mentioned above could be done here too, if you feel like what I mentioned earlier is worthwhile.

From a randomness perspective:

Thanks,
Jason

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#3 lore raw
Quoted 11 lines · Jason A. Donenfeld

Hi Ard,

Wow, didn't expect for this to come so fast. Excellent.

Quoted 2 lines · Ard Biesheuvel

- map arch_get_random_int/_long() onto RNDR, which returns the output of a DRBG that is reseeded at an implemented defined rate;

implemented -> implementation?

Ack

Quoted 13 lines

arch/arm64/include/asm/archrandom.h static inline bool __arm64_rndr(unsigned long *v) · line 74

Quoted 12 lines

static inline bool __must_check arch_get_random_long(unsigned long *v) {

arch/arm64/include/asm/archrandom.h +8 -0
+     /*
+      * Only support the generic interface after we have detected
+      * the system wide capability, avoiding complexity with the
+      * cpufeature code and with potential scheduling between CPUs
+      * with and without the feature.
+      */
+     if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v))
+             return true;
      return false;
 }
Quoted 4 lines

Can't this just become:

  return cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v);

Sure, but I just retained the original style.

Quoted 31 lines

arch/arm64/include/asm/archrandom.h static inline bool __arm64_rndr(unsigned long *v) · line 87

Quoted 13 lines

static inline bool __must_check arch_get_random_int(unsigned int *v) {

arch/arm64/include/asm/archrandom.h +8 -0
+     if (cpus_have_const_cap(ARM64_HAS_RNG)) {
+             unsigned long val;
+
+             if (__arm64_rndr(&val)) {
+                     *v = val;
+                     return true;
+             }
+     }
      return false;
 }

Why not implement arch_get_random_int with the same type of flow as arch_get_random_long?

static inline bool __must_check arch_get_random_int(unsigned int *v)

{
        unsigned long val;
        if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(&val))) {
                *v = val;
                return true;
        }
        return false;
}

Or, even better, just define arch_get_random_int in terms of arch_get_random_long:

static inline bool __must_check arch_get_random_int(unsigned int *v)

Quoted 10 lines
{
        unsigned long val;
        if (arch_get_random_long(&val)) {
                *v = val;
                return true;
        }
        return false;
}

If I was interested in rewriting this header file, I might consider all these options. For now, I am just trying to focus the change on the parts that actually matter.

Quoted 16 lines

arch/arm64/include/asm/archrandom.h static inline bool __must_check arch_get_random_seed_long(unsigned long *v) · line 110

Quoted 11 lines
arch/arm64/include/asm/archrandom.h +3 -4
@@ -71,12 +105,11 @@ static inline bool __must_check arch_get_random_seed_long(unsigned long *v)
      }
 
      /*
-      * Only support the generic interface after we have detected
-      * the system wide capability, avoiding complexity with the
-      * cpufeature code and with potential scheduling between CPUs
-      * with and without the feature.
+      * RNDRRS is not backed by an entropy source but by a DRBG that is
+      * reseeded after each invocation. This is not a 100% fit but good
+      * enough to implement this API if no other entropy source exists.

The docs are actually a bit more optimistic than that:

https://developer.arm.com/documentation/ddi0595/2021-03/AArch64-Registers/RNDRRS--Reseeded-Random-Number

Quoted 9 lines

~ Reseeded Random Number. Returns a 64-bit random number which is reseeded ~ from the True Random Number source immediately before the read of the ~ random number.

If I'm reading that correctly, it looks like the reseeding happens *before* the read, and it looks like it comes from a TRNG. In other words, it sounds to me like it's just doing something like HASH(READ_TRNG()). That would be pretty darn good.

No it does not. RNDR and RNDRRS both return the output of a DRBG, the only difference is the reseed interval.

Specifically, this means that, even though the ARM ARM references NIST SP800-90B directly, the RNDRRS construction is a black box containing a entropy source + DRBG, and so we shouldn't pretend that RNDRRS itself can be treated as a source of true entropy. This is especially relevant when it comes to seeding a DRBG of a certain security strength N >= the security strength of the hidden DRBG, as concatenating multiple RNDRRS results does not satisfy the requirements for seeding a DRBG of security strength N.

Quoted 20 lines
Quoted 7 lines
arch/arm64/include/asm/archrandom.h +1 -1
       */
-     if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v))
+     if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndrrs(v))
              return true;
 
      return false;

arch/arm64/include/asm/archrandom.h static inline bool __must_check arch_get_random_seed_int(unsigned int *v) · line 135

Quoted 8 lines
arch/arm64/include/asm/archrandom.h +1 -1
@@ -96,7 +129,7 @@ static inline bool __must_check arch_get_random_seed_int(unsigned int *v)
      }
 
      if (cpus_have_const_cap(ARM64_HAS_RNG)) {
-             if (__arm64_rndr(&val)) {
+             if (__arm64_rndrrs(&val)) {
                      *v = val;
                      return true;
              }

I suppose the same control flow simplification stuff mentioned above could be done here too, if you feel like what I mentioned earlier is worthwhile.

Quoted 4 lines

From a randomness perspective:

Thanks,

_______________________________________________
linux-arm-kernel mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

#4 lore raw
Quoted 4 lines · Ard Biesheuvel

Sure, but I just retained the original style.
If I was interested in rewriting this header file, I might consider all these options. For now, I am just trying to focus the change on the parts that actually matter.

Okay, no problem.

Quoted 11 lines

No it does not. RNDR and RNDRRS both return the output of a DRBG, the only difference is the reseed interval.

Specifically, this means that, even though the ARM ARM references NIST SP800-90B directly, the RNDRRS construction is a black box containing a entropy source + DRBG, and so we shouldn't pretend that RNDRRS itself can be treated as a source of true entropy. This is especially relevant when it comes to seeding a DRBG of a certain security strength N >= the security strength of the hidden DRBG, as concatenating multiple RNDRRS results does not satisfy the requirements for seeding a DRBG of security strength N.

Huh, interesting. I wonder why that arm.com documentation page is wrong.

Jason

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#5 lore raw
In reply to Jason A. Donenfeld

On Thu, 13 Jan 2022 14:41:16 +0100
"Jason A. Donenfeld" <[email protected]> wrote:

Hi Jason,

Quoted 23 lines

Wow, didn't expect for this to come so fast. Excellent.

Quoted 2 lines · Ard Biesheuvel

- map arch_get_random_int/_long() onto RNDR, which returns the output of a DRBG that is reseeded at an implemented defined rate;

implemented -> implementation?

arch/arm64/include/asm/archrandom.h static inline bool __arm64_rndr(unsigned long *v) · line 74

Quoted 12 lines

static inline bool __must_check arch_get_random_long(unsigned long *v) {

arch/arm64/include/asm/archrandom.h +8 -0
+	/*
+	 * Only support the generic interface after we have detected
+	 * the system wide capability, avoiding complexity with the
+	 * cpufeature code and with potential scheduling between CPUs
+	 * with and without the feature.
+	 */
+	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v))
+		return true;
 	return false;
 }  

Can't this just become:

Quoted 1 line
  return cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v);

It could, but this pattern is used in the other functions to simplify having extensions later.

Quoted 27 lines

arch/arm64/include/asm/archrandom.h static inline bool __arm64_rndr(unsigned long *v) · line 87

Quoted 13 lines

static inline bool __must_check arch_get_random_int(unsigned int *v) {

arch/arm64/include/asm/archrandom.h +8 -0
+	if (cpus_have_const_cap(ARM64_HAS_RNG)) {
+		unsigned long val;
+
+		if (__arm64_rndr(&val)) {
+			*v = val;
+			return true;
+		}
+	}
 	return false;
 }  

Why not implement arch_get_random_int with the same type of flow as arch_get_random_long?

static inline bool __must_check arch_get_random_int(unsigned int *v)

{
	unsigned long val;
	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(&val))) {
		*v = val;
		return true;
	}
	return false;
}
Quoted 2 lines

Or, even better, just define arch_get_random_int in terms of arch_get_random_long:

arch_get_random_long() might drain more entropy than needed, at least this is a problem for the TRNG version. For the RNDR* instructions this doesn't really matter, since they are always using 64-bit system registers, but for the SMC interface there is a difference between asking for 32 or 64 bits.
So this is admittedly not a problem in *this particular case*, but I'd consider this an implementation detail of the sources used in the current code, and for the sake of expandability it seems more robust to use this approach.

Cheers,
Andre

Quoted 57 lines

static inline bool __must_check arch_get_random_int(unsigned int *v)

{
	unsigned long val;
	if (arch_get_random_long(&val)) {
		*v = val;
		return true;
	}
	return false;
}

arch/arm64/include/asm/archrandom.h static inline bool __must_check arch_get_random_seed_long(unsigned long *v) · line 110

Quoted 11 lines
arch/arm64/include/asm/archrandom.h +3 -4
@@ -71,12 +105,11 @@ static inline bool __must_check arch_get_random_seed_long(unsigned long *v)
 	}
 
 	/*
-	 * Only support the generic interface after we have detected
-	 * the system wide capability, avoiding complexity with the
-	 * cpufeature code and with potential scheduling between CPUs
-	 * with and without the feature.
+	 * RNDRRS is not backed by an entropy source but by a DRBG that is
+	 * reseeded after each invocation. This is not a 100% fit but good
+	 * enough to implement this API if no other entropy source exists.  

The docs are actually a bit more optimistic than that:

https://developer.arm.com/documentation/ddi0595/2021-03/AArch64-Registers/RNDRRS--Reseeded-Random-Number

~ Reseeded Random Number. Returns a 64-bit random number which is reseeded ~ from the True Random Number source immediately before the read of the ~ random number.

If I'm reading that correctly, it looks like the reseeding happens *before* the read, and it looks like it comes from a TRNG. In other words, it sounds to me like it's just doing something like HASH(READ_TRNG()). That would be pretty darn good.

Quoted 7 lines
arch/arm64/include/asm/archrandom.h +1 -1
 	 */
-	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v))
+	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndrrs(v))
 		return true;
 
 	return false;

arch/arm64/include/asm/archrandom.h static inline bool __must_check arch_get_random_seed_int(unsigned int *v) · line 135

Quoted 8 lines
arch/arm64/include/asm/archrandom.h +1 -1
@@ -96,7 +129,7 @@ static inline bool __must_check arch_get_random_seed_int(unsigned int *v)
 	}
 
 	if (cpus_have_const_cap(ARM64_HAS_RNG)) {
-		if (__arm64_rndr(&val)) {
+		if (__arm64_rndrrs(&val)) {
 			*v = val;
 			return true;
 		}  

I suppose the same control flow simplification stuff mentioned above could be done here too, if you feel like what I mentioned earlier is worthwhile.

Quoted 6 lines

From a randomness perspective:

Thanks,
Jason

_______________________________________________
linux-arm-kernel mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

Reviewed-by on v1 1/1
#6 lore raw
In reply to Ard Biesheuvel

On Thu, 13 Jan 2022 14:12:39 +0100
Ard Biesheuvel <[email protected]> wrote:

Hi,

Quoted 16 lines

When support for RNDR/RNDRRS was introduced, we elected to only implement arch_get_random_seed_int/_long(), and back them by RNDR instead of RNDRRS. This was needed to prevent potential performance and/or starvation issues resulting from the fact that the /dev/random driver used to invoke these routines on various hot paths.

These issues have all been addressed now [0] [1], and so we can wire up this API more straight-forwardly:

- map arch_get_random_int/_long() onto RNDR, which returns the output of a DRBG that is reseeded at an implemented defined rate;
- map arch_get_random_seed_int/_long() onto the TRNG firmware service, which returns true, conditioned entropy, or onto RNDRRS if the TRNG service is unavailable, which returns the output of a DRBG that is reseeded every time it is used.

Quoted 6 lines

[0] 390596c9959c random: avoid arch_get_random_seed_long() when collecting IRQ randomness
[1] 2ee25b6968b1 random: avoid superfluous call to RDRAND in CRNG extraction

Cc Andre Przywara <[email protected]>
Cc Mark Brown <[email protected]>

Looks alright to me, at least from the code point of view: I am not a "crypto guy".

Cheers,
Andre

Quoted 74 lines
---
 arch/arm64/include/asm/archrandom.h | 45 +++++++++++++++++---
 1 file changed, 39 insertions(+), 6 deletions(-)
arch/arm64/include/asm/archrandom.h +38 -5
index 09e43272ccb0..d1bb5e71df25 100644
@@ -42,13 +42,47 @@ static inline bool __arm64_rndr(unsigned long *v)
 	return ok;
 }
 
+static inline bool __arm64_rndrrs(unsigned long *v)
+{
+	bool ok;
+
+	/*
+	 * Reads of RNDRRS set PSTATE.NZCV to 0b0000 on success,
+	 * and set PSTATE.NZCV to 0b0100 otherwise.
+	 */
+	asm volatile(
+		__mrs_s("%0", SYS_RNDRRS_EL0) "\n"
+	"	cset %w1, ne\n"
+	: "=r" (*v), "=r" (ok)
+	:
+	: "cc");
+
+	return ok;
+}
+
 static inline bool __must_check arch_get_random_long(unsigned long *v)
 {
+	/*
+	 * Only support the generic interface after we have detected
+	 * the system wide capability, avoiding complexity with the
+	 * cpufeature code and with potential scheduling between CPUs
+	 * with and without the feature.
+	 */
+	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v))
+		return true;
 	return false;
 }
 
 static inline bool __must_check arch_get_random_int(unsigned int *v)
 {
+	if (cpus_have_const_cap(ARM64_HAS_RNG)) {
+		unsigned long val;
+
+		if (__arm64_rndr(&val)) {
+			*v = val;
+			return true;
+		}
+	}
 	return false;
 }
 
@@ -71,12 +105,11 @@ static inline bool __must_check arch_get_random_seed_long(unsigned long *v)
 	}
 
 	/*
-	 * Only support the generic interface after we have detected
-	 * the system wide capability, avoiding complexity with the
-	 * cpufeature code and with potential scheduling between CPUs
-	 * with and without the feature.
+	 * RNDRRS is not backed by an entropy source but by a DRBG that is
+	 * reseeded after each invocation. This is not a 100% fit but good
+	 * enough to implement this API if no other entropy source exists.
 	 */
-	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v))
+	if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndrrs(v))
 		return true;
 
 	return false;

arch/arm64/include/asm/archrandom.h static inline bool __must_check arch_get_random_seed_int(unsigned int *v) · line 135

Quoted 8 lines
arch/arm64/include/asm/archrandom.h +1 -1
@@ -96,7 +129,7 @@ static inline bool __must_check arch_get_random_seed_int(unsigned int *v)
 	}
 
 	if (cpus_have_const_cap(ARM64_HAS_RNG)) {
-		if (__arm64_rndr(&val)) {
+		if (__arm64_rndrrs(&val)) {
 			*v = val;
 			return true;
 		}

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#7 lore raw
In reply to Ard Biesheuvel
Quoted 10 lines · Ard Biesheuvel

When support for RNDR/RNDRRS was introduced, we elected to only implement arch_get_random_seed_int/_long(), and back them by RNDR instead of RNDRRS. This was needed to prevent potential performance and/or starvation issues resulting from the fact that the /dev/random driver used to invoke these routines on various hot paths.

These issues have all been addressed now [0] [1], and so we can wire up this API more straight-forwardly:

[...]

Applied to arm64 (for-next/rng), thanks!

[1/1] arm64: random: implement arch_get_random_int/_long based on RNDR

      https://git.kernel.org/arm64/c/35bde68bba54

Cheers,

Signature · 10 lines
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev

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