New: mvebu: no pcie devices detected on turris omnia (5.16.3 regression)
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A message that is not in the archive (sent off-list or not yet received): [email protected]/
[+cc Thomas, Pali]
Quoted 19 lines · On Thu, Jan 27, 2022 at 10:52:43PM +0000, [email protected]…
https://bugzilla.kernel.org/show_bug.cgi?id=215540
Bug ID: 215540 Summary: mvebu: no pcie devices detected on turris omnia (5.16.3 regression) Product: Drivers Version: 2.5 Kernel Version: 5.16.3 Hardware: ARM OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: PCI Assignee: [email protected] Reporter: [email protected] Regression: No
Quoted 4 lines
After kernel upgrade from 5.16.1 to 5.16.3 Turris Omnia (Armada 385) no longer detects pcie devices (wifi/msata). Haven't tried 5.16.2 but it doesn't seem to have any relevant changes, while 5.16.3 carries a few.
Here are some of the dmesg diffs between v5.16.1 (good) and v5.16.3 (bad):
pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400
-pci 0000:00:01.0: reg 0x38: [mem 0x00000000-0x000007ff pref]
pci 0000:00:02.0: [11ab:6820] type 01 class 0x060400
-pci 0000:00:02.0: reg 0x38: [mem 0x00000000-0x000007ff pref]
pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400
-pci 0000:00:03.0: reg 0x38: [mem 0x00000000-0x000007ff pref]
That means both kernels *discovered* the devices, but v5.16.3 couldn't size the BARs.
Between v5.16.1 and v5.16.3, there were several changes to mvebu and the root port emulation it uses (though the devices above are on the root bus and shouldn't be below a root port):
71ceae67ef9b ("PCI: pci-bridge-emul: Set PCI_STATUS_CAP_LIST for PCIe device") 2c8683fbf143 ("PCI: pci-bridge-emul: Correctly set PCIe capabilities")
6863f571a546 ("PCI: pci-bridge-emul: Fix definitions of reserved bits")
9e6e6e641f26 ("PCI: pci-bridge-emul: Properly mark reserved PCIe bits in PCI config space") 174a6ab8722e ("PCI: pci-bridge-emul: Make expansion ROM Base Address register read-only") ce16d4b7e5f6 ("PCI: mvebu: Fix support for DEVCAP2, DEVCTL2 and LNKCTL2 registers on emulated bridge") 004408c5b7b4 ("PCI: mvebu: Fix support for PCI_EXP_RTSTA on emulated bridge") e9dd0d0efece ("PCI: mvebu: Fix support for PCI_EXP_DEVCTL on emulated bridge") 802d9ee9cbd3 ("PCI: mvebu: Fix support for PCI_BRIDGE_CTL_BUS_RESET on emulated bridge") 4523e727c349 ("PCI: mvebu: Setup PCIe controller to Root Complex mode")
7cde9bf07316 ("PCI: mvebu: Fix configuring secondary bus of PCIe Root Port via emulated bridge") 3de91c80b70a ("PCI: mvebu: Fix support for bus mastering and PCI_COMMAND on emulated bridge") d9bfeaab65b3 ("PCI: mvebu: Do not modify PCI IO type bits in conf_write") e7e52bc07021 ("PCI: mvebu: Check for errors from pci_bridge_emul_init() call")
I think these are all from Pali (cc'd), so he'll likely see the problem.
Quoted 184 lines
5.16.3:
$ dmesg|grep -i pci [ 0.075893] PCI: CLS 0 bytes, default 64 [ 0.127393] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4 [ 0.127679] mvebu-pcie soc:pcie: host bridge /soc/pcie ranges: [ 0.127723] mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000 [ 0.127743] mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000 [ 0.127760] mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000 [ 0.127775] mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000 [ 0.127790] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127804] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127819] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127833] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127847] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127861] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127875] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.127886] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.128145] mvebu-pcie soc:pcie: PCI host bridge to bus 0000:00 [ 0.128162] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.128174] pci_bus 0000:00: root bus resource [mem 0xf1080000-0xf1081fff] (bus address [0x00080000-0x00081fff]) [ 0.128183] pci_bus 0000:00: root bus resource [mem 0xf1040000-0xf1041fff] (bus address [0x00040000-0x00041fff]) [ 0.128191] pci_bus 0000:00: root bus resource [mem 0xf1044000-0xf1045fff] (bus address [0x00044000-0x00045fff]) [ 0.128199] pci_bus 0000:00: root bus resource [mem 0xf1048000-0xf1049fff] (bus address [0x00048000-0x00049fff]) [ 0.128206] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff] [ 0.128212] pci_bus 0000:00: root bus resource [io 0x1000-0xeffff] [ 0.128354] pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400 [ 0.128634] pci 0000:00:02.0: [11ab:6820] type 01 class 0x060400 [ 0.128866] pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 [ 0.129958] PCI: bus0: Fast back to back transfers disabled [ 0.129979] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129994] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.130004] pci 0000:00:03.0: bridge configuration invalid ([bus 01-00]), reconfiguring [ 0.131172] PCI: bus1: Fast back to back transfers enabled [ 0.131198] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.131363] pci 0000:02:00.0: [11ab:6820] type 00 class 0x058000 [ 0.131386] pci 0000:02:00.0: reg 0x10: [mem 0xf1000000-0xf10fffff] [ 0.131401] pci 0000:02:00.0: reg 0x18: [mem 0x00000000-0x7fffffff] [ 0.131459] pci 0000:02:00.0: supports D1 D2 [ 0.132655] PCI: bus2: Fast back to back transfers disabled [ 0.132681] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 0.132831] pci 0000:03:00.0: [11ab:6820] type 00 class 0x058000 [ 0.132853] pci 0000:03:00.0: reg 0x10: [mem 0xf1000000-0xf10fffff] [ 0.132868] pci 0000:03:00.0: reg 0x18: [mem 0x00000000-0x7fffffff] [ 0.132926] pci 0000:03:00.0: supports D1 D2 [ 0.134166] PCI: bus3: Fast back to back transfers disabled [ 0.134194] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03 [ 0.134303] pci 0000:00:02.0: BAR 14: no space for [mem size 0xc0000000] [ 0.134318] pci 0000:00:02.0: BAR 14: failed to assign [mem size 0xc0000000] [ 0.134329] pci 0000:00:03.0: BAR 14: no space for [mem size 0xc0000000] [ 0.134337] pci 0000:00:03.0: BAR 14: failed to assign [mem size 0xc0000000] [ 0.134348] pci 0000:00:01.0: PCI bridge to [bus 01] [ 0.134364] pci 0000:02:00.0: BAR 2: no space for [mem size 0x80000000] [ 0.134372] pci 0000:02:00.0: BAR 2: failed to assign [mem size 0x80000000] [ 0.134379] pci 0000:02:00.0: BAR 0: no space for [mem size 0x00100000] [ 0.134385] pci 0000:02:00.0: BAR 0: failed to assign [mem size 0x00100000] [ 0.134393] pci 0000:00:02.0: PCI bridge to [bus 02] [ 0.134406] pci 0000:03:00.0: BAR 2: no space for [mem size 0x80000000] [ 0.134413] pci 0000:03:00.0: BAR 2: failed to assign [mem size 0x80000000] [ 0.134420] pci 0000:03:00.0: BAR 0: no space for [mem size 0x00100000] [ 0.134426] pci 0000:03:00.0: BAR 0: failed to assign [mem size 0x00100000] [ 0.134433] pci 0000:00:03.0: PCI bridge to [bus 03]5.16.1:
[ 0.127673] mvebu-pcie soc:pcie: host bridge /soc/pcie ranges: [ 0.127717] mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000 [ 0.127737] mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000 [ 0.127753] mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000 [ 0.127768] mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000 [ 0.127783] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127798] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127812] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127826] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127839] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127853] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127867] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.127877] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.128140] mvebu-pcie soc:pcie: PCI host bridge to bus 0000:00 [ 0.128157] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.128170] pci_bus 0000:00: root bus resource [mem 0xf1080000-0xf1081fff] (bus address [0x00080000-0x00081fff]) [ 0.128179] pci_bus 0000:00: root bus resource [mem 0xf1040000-0xf1041fff] (bus address [0x00040000-0x00041fff]) [ 0.128187] pci_bus 0000:00: root bus resource [mem 0xf1044000-0xf1045fff] (bus address [0x00044000-0x00045fff]) [ 0.128196] pci_bus 0000:00: root bus resource [mem 0xf1048000-0xf1049fff] (bus address [0x00048000-0x00049fff]) [ 0.128203] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff] [ 0.128210] pci_bus 0000:00: root bus resource [io 0x1000-0xeffff] [ 0.128341] pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400 [ 0.128362] pci 0000:00:01.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.128631] pci 0000:00:02.0: [11ab:6820] type 01 class 0x060400 [ 0.128655] pci 0000:00:02.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.128871] pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 [ 0.128893] pci 0000:00:03.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.129975] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129989] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129999] pci 0000:00:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.131184] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.131344] pci 0000:02:00.0: [168c:003c] type 00 class 0x028000 [ 0.131375] pci 0000:02:00.0: reg 0x10: [mem 0x00000000-0x001fffff 64bit] [ 0.131408] pci 0000:02:00.0: reg 0x30: [mem 0x00000000-0x0000ffff pref] [ 0.131507] pci 0000:02:00.0: supports D1 [ 0.131515] pci 0000:02:00.0: PME# supported from D0 D1 D3hot [ 0.131734] pci 0000:00:02.0: ASPM: current common clock configuration is inconsistent, reconfiguring [ 0.131753] pci 0000:00:02.0: ASPM: Bridge does not support changing Link Speed to 2.5 GT/s [ 0.131759] pci 0000:00:02.0: ASPM: Retrain Link at higher speed is disallowed by quirk [ 0.131765] pci 0000:00:02.0: ASPM: Could not configure common clock [ 0.132832] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 0.132993] pci 0000:03:00.0: [168c:002e] type 00 class 0x028000 [ 0.133027] pci 0000:03:00.0: reg 0x10: [mem 0x00000000-0x0000ffff 64bit] [ 0.133152] pci 0000:03:00.0: supports D1 [ 0.133161] pci 0000:03:00.0: PME# supported from D0 D1 D3hot [ 0.133396] pci 0000:00:03.0: ASPM: current common clock configuration is inconsistent, reconfiguring [ 0.133413] pci 0000:00:03.0: ASPM: Bridge does not support changing Link Speed to 2.5 GT/s [ 0.133421] pci 0000:00:03.0: ASPM: Retrain Link at higher speed is disallowed by quirk [ 0.133427] pci 0000:00:03.0: ASPM: Could not configure common clock [ 0.134545] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03 [ 0.134655] pci 0000:00:02.0: BAR 14: assigned [mem 0xe0000000-0xe02fffff] [ 0.134673] pci 0000:00:03.0: BAR 14: assigned [mem 0xe0300000-0xe03fffff] [ 0.134685] pci 0000:00:01.0: BAR 6: assigned [mem 0xe0400000-0xe04007ff pref] [ 0.134696] pci 0000:00:02.0: BAR 6: assigned [mem 0xe0500000-0xe05007ff pref] [ 0.134706] pci 0000:00:03.0: BAR 6: assigned [mem 0xe0600000-0xe06007ff pref] [ 0.134717] pci 0000:00:01.0: PCI bridge to [bus 01] [ 0.134737] pci 0000:02:00.0: BAR 0: assigned [mem 0xe0000000-0xe01fffff 64bit] [ 0.134755] pci 0000:02:00.0: BAR 6: assigned [mem 0xe0200000-0xe020ffff pref] [ 0.134764] pci 0000:00:02.0: PCI bridge to [bus 02] [ 0.134772] pci 0000:00:02.0: bridge window [mem 0xe0000000-0xe02fffff] [ 0.134784] pci 0000:03:00.0: BAR 0: assigned [mem 0xe0300000-0xe030ffff 64bit] [ 0.134798] pci 0000:00:03.0: PCI bridge to [bus 03] [ 0.134806] pci 0000:00:03.0: bridge window [mem 0xe0300000-0xe03fffff] [ 0.134997] pcieport 0000:00:02.0: enabling device (0140 -> 0142) [ 0.135084] pcieport 0000:00:03.0: enabling device (0140 -> 0142)Signature · 4 lines
You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.
[TLDR: I'm adding this regression to regzbot, the Linux kernel regression tracking bot; most text you find below is compiled from a few templates paragraphs some of you might have seen already.]
Hi, this is your Linux kernel regression tracker speaking.
Adding the regression mailing list to the list of recipients, as it should be in the loop for all regressions, as explained here:
https://www.kernel.org/doc/html/latest/admin-guide/reporting-issues.html
Quoted 1 line · Bjorn Helgaas
[+cc Thomas, Pali]
CCing also Greg and the stable list, as this is a issue in a stable kernel.
Anyway:
Quoted 20 lines · On Thu, Jan 27, 2022 at 10:52:43PM +0000, [email protected]…
Quoted 19 lines
https://bugzilla.kernel.org/show_bug.cgi?id=215540
Bug ID: 215540 Summary: mvebu: no pcie devices detected on turris omnia (5.16.3 regression) Product: Drivers Version: 2.5 Kernel Version: 5.16.3 Hardware: ARM OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: PCI Assignee: [email protected] Reporter: [email protected] Regression: No
Quoted 4 lines
Quoted 4 lines
After kernel upgrade from 5.16.1 to 5.16.3 Turris Omnia (Armada 385) no longer detects pcie devices (wifi/msata). Haven't tried 5.16.2 but it doesn't seem to have any relevant changes, while 5.16.3 carries a few.
To be sure this issue doesn't fall through the cracks unnoticed, I'm adding it to regzbot, my Linux kernel regression tracking bot:
#regzbot ^introduced v5.16.1..v5.16.3
#regzbot title mvebu: no pcie devices detected on turris omnia #regzbot from: Jan Palus <[email protected]>
#regzbot ignore-activity
#regzbot link: https://bugzilla.kernel.org/show_bug.cgi?id=215540
Ciao, Thorsten (wearing his 'Linux kernel regression tracker' hat)
P.S.: As a Linux kernel regression tracker I'm getting a lot of reports on my table. I can only look briefly into most of them. Unfortunately therefore I sometimes will get things wrong or miss something important. I hope that's not the case here; if you think it is, don't hesitate to tell me about it in a public reply, that's in everyone's interest.
BTW, I have no personal interest in this issue, which is tracked using regzbot, my Linux kernel regression tracking bot
(https://linux-regtracking.leemhuis.info/regzbot/). I'm only posting this mail to get things rolling again and hence don't need to be CC on all further activities wrt to this regression.
Quoted 32 lines
Here are some of the dmesg diffs between v5.16.1 (good) and v5.16.3 (bad):
pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400-pci 0000:00:01.0: reg
0x38: [mem 0x00000000-0x000007ff pref]
pci 0000:00:02.0: [11ab:6820] type 01 class0x060400
-pci 0000:00:02.0: reg0x38: [mem 0x00000000-0x000007ff pref]
pci 0000:00:03.0: [11ab:6820] type 01 class0x060400
-pci 0000:00:03.0: reg0x38: [mem 0x00000000-0x000007ff pref]That means both kernels *discovered* the devices, but v5.16.3 couldn't size the BARs.
Between v5.16.1 and v5.16.3, there were several changes to mvebu and the root port emulation it uses (though the devices above are on the root bus and shouldn't be below a root port):
71ceae67ef9b("PCI: pci-bridge-emul: SetPCI_STATUS_CAP_LISTfor PCIe device")2c8683fbf143("PCI: pci-bridge-emul: Correctly set PCIe capabilities")
6863f571a546("PCI: pci-bridge-emul: Fix definitions of reserved bits")
9e6e6e641f26("PCI: pci-bridge-emul: Properly mark reserved PCIe bits in PCI config space")174a6ab8722e("PCI: pci-bridge-emul: Make expansion ROM Base Address register read-only")ce16d4b7e5f6("PCI: mvebu: Fix support for DEVCAP2, DEVCTL2 and LNKCTL2 registers on emulated bridge")004408c5b7b4("PCI: mvebu: Fix support forPCI_EXP_RTSTAon emulated bridge")e9dd0d0efece("PCI: mvebu: Fix support forPCI_EXP_DEVCTLon emulated bridge")802d9ee9cbd3("PCI: mvebu: Fix support forPCI_BRIDGE_CTL_BUS_RESETon emulated bridge")4523e727c349("PCI: mvebu: Setup PCIe controller to Root Complex mode")
7cde9bf07316("PCI: mvebu: Fix configuring secondary bus of PCIe Root Port via emulated bridge")3de91c80b70a("PCI: mvebu: Fix support for bus mastering andPCI_COMMANDon emulated bridge")d9bfeaab65b3("PCI: mvebu: Do not modify PCI IO type bits inconf_write")e7e52bc07021("PCI: mvebu: Check for errors frompci_bridge_emul_init()call")
Quoted 187 lines
I think these are all from Pali (cc'd), so he'll likely see the problem.
Quoted 184 lines
5.16.3:
$ dmesg|grep -i pci [ 0.075893] PCI: CLS 0 bytes, default 64 [ 0.127393] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4 [ 0.127679] mvebu-pcie soc:pcie: host bridge /soc/pcie ranges: [ 0.127723] mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000 [ 0.127743] mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000 [ 0.127760] mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000 [ 0.127775] mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000 [ 0.127790] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127804] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127819] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127833] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127847] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127861] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127875] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.127886] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.128145] mvebu-pcie soc:pcie: PCI host bridge to bus 0000:00 [ 0.128162] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.128174] pci_bus 0000:00: root bus resource [mem 0xf1080000-0xf1081fff] (bus address [0x00080000-0x00081fff]) [ 0.128183] pci_bus 0000:00: root bus resource [mem 0xf1040000-0xf1041fff] (bus address [0x00040000-0x00041fff]) [ 0.128191] pci_bus 0000:00: root bus resource [mem 0xf1044000-0xf1045fff] (bus address [0x00044000-0x00045fff]) [ 0.128199] pci_bus 0000:00: root bus resource [mem 0xf1048000-0xf1049fff] (bus address [0x00048000-0x00049fff]) [ 0.128206] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff] [ 0.128212] pci_bus 0000:00: root bus resource [io 0x1000-0xeffff] [ 0.128354] pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400 [ 0.128634] pci 0000:00:02.0: [11ab:6820] type 01 class 0x060400 [ 0.128866] pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 [ 0.129958] PCI: bus0: Fast back to back transfers disabled [ 0.129979] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129994] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.130004] pci 0000:00:03.0: bridge configuration invalid ([bus 01-00]), reconfiguring [ 0.131172] PCI: bus1: Fast back to back transfers enabled [ 0.131198] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.131363] pci 0000:02:00.0: [11ab:6820] type 00 class 0x058000 [ 0.131386] pci 0000:02:00.0: reg 0x10: [mem 0xf1000000-0xf10fffff] [ 0.131401] pci 0000:02:00.0: reg 0x18: [mem 0x00000000-0x7fffffff] [ 0.131459] pci 0000:02:00.0: supports D1 D2 [ 0.132655] PCI: bus2: Fast back to back transfers disabled [ 0.132681] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 0.132831] pci 0000:03:00.0: [11ab:6820] type 00 class 0x058000 [ 0.132853] pci 0000:03:00.0: reg 0x10: [mem 0xf1000000-0xf10fffff] [ 0.132868] pci 0000:03:00.0: reg 0x18: [mem 0x00000000-0x7fffffff] [ 0.132926] pci 0000:03:00.0: supports D1 D2 [ 0.134166] PCI: bus3: Fast back to back transfers disabled [ 0.134194] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03 [ 0.134303] pci 0000:00:02.0: BAR 14: no space for [mem size 0xc0000000] [ 0.134318] pci 0000:00:02.0: BAR 14: failed to assign [mem size 0xc0000000] [ 0.134329] pci 0000:00:03.0: BAR 14: no space for [mem size 0xc0000000] [ 0.134337] pci 0000:00:03.0: BAR 14: failed to assign [mem size 0xc0000000] [ 0.134348] pci 0000:00:01.0: PCI bridge to [bus 01] [ 0.134364] pci 0000:02:00.0: BAR 2: no space for [mem size 0x80000000] [ 0.134372] pci 0000:02:00.0: BAR 2: failed to assign [mem size 0x80000000] [ 0.134379] pci 0000:02:00.0: BAR 0: no space for [mem size 0x00100000] [ 0.134385] pci 0000:02:00.0: BAR 0: failed to assign [mem size 0x00100000] [ 0.134393] pci 0000:00:02.0: PCI bridge to [bus 02] [ 0.134406] pci 0000:03:00.0: BAR 2: no space for [mem size 0x80000000] [ 0.134413] pci 0000:03:00.0: BAR 2: failed to assign [mem size 0x80000000] [ 0.134420] pci 0000:03:00.0: BAR 0: no space for [mem size 0x00100000] [ 0.134426] pci 0000:03:00.0: BAR 0: failed to assign [mem size 0x00100000] [ 0.134433] pci 0000:00:03.0: PCI bridge to [bus 03]5.16.1:
[ 0.127673] mvebu-pcie soc:pcie: host bridge /soc/pcie ranges: [ 0.127717] mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000 [ 0.127737] mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000 [ 0.127753] mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000 [ 0.127768] mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000 [ 0.127783] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127798] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127812] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127826] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127839] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127853] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127867] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.127877] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.128140] mvebu-pcie soc:pcie: PCI host bridge to bus 0000:00 [ 0.128157] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.128170] pci_bus 0000:00: root bus resource [mem 0xf1080000-0xf1081fff] (bus address [0x00080000-0x00081fff]) [ 0.128179] pci_bus 0000:00: root bus resource [mem 0xf1040000-0xf1041fff] (bus address [0x00040000-0x00041fff]) [ 0.128187] pci_bus 0000:00: root bus resource [mem 0xf1044000-0xf1045fff] (bus address [0x00044000-0x00045fff]) [ 0.128196] pci_bus 0000:00: root bus resource [mem 0xf1048000-0xf1049fff] (bus address [0x00048000-0x00049fff]) [ 0.128203] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff] [ 0.128210] pci_bus 0000:00: root bus resource [io 0x1000-0xeffff] [ 0.128341] pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400 [ 0.128362] pci 0000:00:01.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.128631] pci 0000:00:02.0: [11ab:6820] type 01 class 0x060400 [ 0.128655] pci 0000:00:02.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.128871] pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 [ 0.128893] pci 0000:00:03.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.129975] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129989] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129999] pci 0000:00:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.131184] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.131344] pci 0000:02:00.0: [168c:003c] type 00 class 0x028000 [ 0.131375] pci 0000:02:00.0: reg 0x10: [mem 0x00000000-0x001fffff 64bit] [ 0.131408] pci 0000:02:00.0: reg 0x30: [mem 0x00000000-0x0000ffff pref] [ 0.131507] pci 0000:02:00.0: supports D1 [ 0.131515] pci 0000:02:00.0: PME# supported from D0 D1 D3hot [ 0.131734] pci 0000:00:02.0: ASPM: current common clock configuration is inconsistent, reconfiguring [ 0.131753] pci 0000:00:02.0: ASPM: Bridge does not support changing Link Speed to 2.5 GT/s [ 0.131759] pci 0000:00:02.0: ASPM: Retrain Link at higher speed is disallowed by quirk [ 0.131765] pci 0000:00:02.0: ASPM: Could not configure common clock [ 0.132832] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 0.132993] pci 0000:03:00.0: [168c:002e] type 00 class 0x028000 [ 0.133027] pci 0000:03:00.0: reg 0x10: [mem 0x00000000-0x0000ffff 64bit] [ 0.133152] pci 0000:03:00.0: supports D1 [ 0.133161] pci 0000:03:00.0: PME# supported from D0 D1 D3hot [ 0.133396] pci 0000:00:03.0: ASPM: current common clock configuration is inconsistent, reconfiguring [ 0.133413] pci 0000:00:03.0: ASPM: Bridge does not support changing Link Speed to 2.5 GT/s [ 0.133421] pci 0000:00:03.0: ASPM: Retrain Link at higher speed is disallowed by quirk [ 0.133427] pci 0000:00:03.0: ASPM: Could not configure common clock [ 0.134545] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03 [ 0.134655] pci 0000:00:02.0: BAR 14: assigned [mem 0xe0000000-0xe02fffff] [ 0.134673] pci 0000:00:03.0: BAR 14: assigned [mem 0xe0300000-0xe03fffff] [ 0.134685] pci 0000:00:01.0: BAR 6: assigned [mem 0xe0400000-0xe04007ff pref] [ 0.134696] pci 0000:00:02.0: BAR 6: assigned [mem 0xe0500000-0xe05007ff pref] [ 0.134706] pci 0000:00:03.0: BAR 6: assigned [mem 0xe0600000-0xe06007ff pref] [ 0.134717] pci 0000:00:01.0: PCI bridge to [bus 01] [ 0.134737] pci 0000:02:00.0: BAR 0: assigned [mem 0xe0000000-0xe01fffff 64bit] [ 0.134755] pci 0000:02:00.0: BAR 6: assigned [mem 0xe0200000-0xe020ffff pref] [ 0.134764] pci 0000:00:02.0: PCI bridge to [bus 02] [ 0.134772] pci 0000:00:02.0: bridge window [mem 0xe0000000-0xe02fffff] [ 0.134784] pci 0000:03:00.0: BAR 0: assigned [mem 0xe0300000-0xe030ffff 64bit] [ 0.134798] pci 0000:00:03.0: PCI bridge to [bus 03] [ 0.134806] pci 0000:00:03.0: bridge window [mem 0xe0300000-0xe03fffff] [ 0.134997] pcieport 0000:00:02.0: enabling device (0140 -> 0142) [ 0.135084] pcieport 0000:00:03.0: enabling device (0140 -> 0142)Signature · 4 lines
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Hello!
[+ Marek]
Quoted 26 lines · On Thursday 27 January 2022 17:49:17 Bjorn Helgaas wrote:
[+cc Thomas, Pali]
Quoted 23 lines · On Thu, Jan 27, 2022 at 10:52:43PM +0000, [email protected]…
https://bugzilla.kernel.org/show_bug.cgi?id=215540
Bug ID: 215540 Summary: mvebu: no pcie devices detected on turris omnia (5.16.3 regression) Product: Drivers Version: 2.5 Kernel Version: 5.16.3 Hardware: ARM OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: PCI Assignee: [email protected] Reporter: [email protected] Regression: NoAfter kernel upgrade from 5.16.1 to 5.16.3 Turris Omnia (Armada 385) no longer detects pcie devices (wifi/msata). Haven't tried 5.16.2 but it doesn't seem to have any relevant changes, while 5.16.3 carries a few.
I was trying to reproduce this issue on Turris Omnia but it looks like that kernel v5.16.3 is totally broken and I'm not able to boot it. It crashes somewhere in non-pci related code.
[ 1.848417] ip_gre: GRE over IPv4 tunneling driver [ 1.849114] NET: Registered PF_INET6 protocol family [ 1.866501] Segment Routing with IPv6 [ 1.870185] In-situ OAM (IOAM) with IPv6 [ 1.874201] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver [ 1.880680] ip6_gre: GRE over IPv6 tunneling driver [ 1.885860] NET: Registered PF_PACKET protocol family [ 1.891012] 8021q: 802.1Q VLAN Support v1.8 [ 1.895348] Registering SWP/SWPB emulation handler [ 1.900560] Internal error: Oops - undefined instruction: 0 [#1] SMP ARM [ 1.907282] Modules linked in: [ 1.910346] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.16.3 #124 [ 1.916455] Hardware name: Marvell Armada 380/385 (Device Tree) [ 1.922387] PC is at crypto_unregister_alg+0xf4/0xfc [ 1.927370] LR is at 0x0 [ 1.929909] pc : [<c04e1a6c>] lr : [<00000000>] psr: 20000013 [ 1.936190] sp : c1863ea0 ip : 00000000 fp : c10b0000 [ 1.941425] r10: c0f49838 r9 : c0f49858 r8 : c18b0000 [ 1.946660] r7 : c10b0484 r6 : c1863eac r5 : c1004f48 r4 : c2311280 [ 1.953201] r3 : 00000002 r2 : ffffffff r1 : 00000001 r0 : c1082c70 [ 1.959743] Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none [ 1.966896] Control: 10c5387d Table: 0000404a DAC: 00000051 [ 1.972654] Register r0 information: non-slab/vmalloc memory [ 1.978328] Register r1 information: non-paged memory [ 1.983391] Register r2 information: non-paged memory [ 1.988453] Register r3 information: non-paged memory [ 1.993516] Register r4 information: slab kmalloc-512 start c2311200 pointer offset 128 size 512 [ 2.002329] Register r5 information: non-slab/vmalloc memory [ 2.008000] Register r6 information: non-slab/vmalloc memory [ 2.013672] Register r7 information: non-slab/vmalloc memory [ 2.019343] Register r8 information: slab task_struct start c18b0000 pointer offset 0 [ 2.027196] Register r9 information: non-slab/vmalloc memory [ 2.032867] Register r10 information: non-slab/vmalloc memory [ 2.038626] Register r11 information: non-slab/vmalloc memory [ 2.044384] Register r12 information: NULL pointer [ 2.049185] Process swapper/0 (pid: 1, stack limit = 0x(ptrval)) [ 2.055205] Stack: (0xc1863ea0 to 0xc1864000) [ 2.059573] 3ea0: c18b0000 c100c66a c0f49838 c1863eac c1863eac 72a9cbca c2311200 c10b0498 [ 2.067772] 3ec0: 00000001 c04fd268 c10b0488 c011ee7c c100c740 fffffffe 00000001 c0f09218 [ 2.075968] 3ee0: c10b0000 c1004f48 c0f091a0 00000000 c18b0000 c0101720 c1823444 c014f9dc [ 2.084164] 3f00: c0e9480c c0d90300 00000000 00000007 00000007 c0d97860 00000000 c1004f48 [ 2.092362] 3f20: c0da2044 c0d978d4 37320000 c1823434 c1823442 72a9cbca c10dd7d4 00000008 [ 2.100558] 3f40: c0e9480c 72a9cbca c0f5a0e8 c0e9480c 00000008 c18233c0 00000125 c0f01298 [ 2.108754] 3f60: 00000007 00000007 00000000 c0f003fc 00000001 c0f003fc 00000000 c1004f40 [ 2.116950] 3f80: c0b91d40 00000000 00000000 00000000 00000000 00000000 00000000 c0b91d58 [ 2.125147] 3fa0: 00000000 c0b91d40 00000000 c0100148 00000000 00000000 00000000 00000000 [ 2.133344] 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 2.141541] 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 [ 2.149740] [<c04e1a6c>] (crypto_unregister_alg) from [<c04fd268>] (simd_skcipher_free+0x10/0x1c) [ 2.158645] [<c04fd268>] (simd_skcipher_free) from [<c011ee7c>] (aes_exit+0x20/0x3c) [ 2.166413] [<c011ee7c>] (aes_exit) from [<c0f09218>] (aes_init+0x78/0x94) [ 2.173309] [<c0f09218>] (aes_init) from [<c0101720>] (do_one_initcall+0x64/0x1ac) [ 2.180902] [<c0101720>] (do_one_initcall) from [<c0f01298>] (kernel_init_freeable+0x210/0x274) [ 2.189629] [<c0f01298>] (kernel_init_freeable) from [<c0b91d58>] (kernel_init+0x18/0x12c) [ 2.197923] [<c0b91d58>] (kernel_init) from [<c0100148>] (ret_from_fork+0x14/0x2c) [ 2.205513] Exception stack(0xc1863fb0 to 0xc1863ff8) [ 2.210577] 3fa0: 00000000 00000000 00000000 00000000 [ 2.218773] 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 2.226968] 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 [ 2.233599] Code: e30011ca e58d4000 eb1a86bd eaffffec (e7f001f2) [ 2.239709] ---[ end trace 36f3af5192e0cf87 ]--- [ 2.244337] Kernel panic - not syncing: Fatal exception [ 2.249573] CPU1: stopping [ 2.252289] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G D 5.16.3 #124 [ 2.259792] Hardware name: Marvell Armada 380/385 (Device Tree) [ 2.265725] [<c010e120>] (unwind_backtrace) from [<c010a170>] (show_stack+0x10/0x14) [ 2.273496] [<c010a170>] (show_stack) from [<c0b89fa8>] (dump_stack_lvl+0x40/0x4c) [ 2.281087] [<c0b89fa8>] (dump_stack_lvl) from [<c010c3f8>] (do_handle_IPI+0xf4/0x128) [ 2.289026] [<c010c3f8>] (do_handle_IPI) from [<c010c444>] (ipi_handler+0x18/0x20) [ 2.296616] [<c010c444>] (ipi_handler) from [<c0187de4>] (handle_percpu_devid_irq+0x78/0x124) [ 2.305167] [<c0187de4>] (handle_percpu_devid_irq) from [<c0182208>] (generic_handle_domain_irq+0x44/0x88) [ 2.314851] [<c0182208>] (generic_handle_domain_irq) from [<c05bde1c>] (gic_handle_irq+0x74/0x88) [ 2.323751] [<c05bde1c>] (gic_handle_irq) from [<c0b91950>] (generic_handle_arch_irq+0x34/0x44) [ 2.332475] [<c0b91950>] (generic_handle_arch_irq) from [<c0100b10>] (__irq_svc+0x50/0x68) [ 2.340763] Exception stack(0xc187df50 to 0xc187df98) [ 2.345826] df40: 00000dd0 00000000 00000001 c0116ba0 [ 2.354023] df60: c1004f90 c1004fd4 00000002 00000000 c1004f48 c0f5d268 c18b6900 00000000 [ 2.362219] df80: 00000000 c187dfa0 c01076f4 c01076f8 60000013 ffffffff [ 2.368847] [<c0100b10>] (__irq_svc) from [<c01076f8>] (arch_cpu_idle+0x38/0x3c) [ 2.376265] [<c01076f8>] (arch_cpu_idle) from [<c0b98df8>] (default_idle_call+0x1c/0x2c) [ 2.384379] [<c0b98df8>] (default_idle_call) from [<c015fc74>] (do_idle+0x1c8/0x218) [ 2.392147] [<c015fc74>] (do_idle) from [<c015ff80>] (cpu_startup_entry+0x18/0x20) [ 2.399739] [<c015ff80>] (cpu_startup_entry) from [<001014b4>] (0x1014b4) [ 2.406549] Rebooting in 1 seconds..
I'm not sure where is the issue and why it crashes. But I tested all sent pci patches on Turris Omnia in the past and they worked fine.
Quoted 219 lines
Here are some of the dmesg diffs between v5.16.1 (good) and v5.16.3 (bad):
pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400-pci 0000:00:01.0: reg
0x38: [mem 0x00000000-0x000007ff pref]
pci 0000:00:02.0: [11ab:6820] type 01 class0x060400
-pci 0000:00:02.0: reg0x38: [mem 0x00000000-0x000007ff pref]
pci 0000:00:03.0: [11ab:6820] type 01 class0x060400
-pci 0000:00:03.0: reg0x38: [mem 0x00000000-0x000007ff pref]That means both kernels *discovered* the devices, but v5.16.3 couldn't size the BARs.
Between v5.16.1 and v5.16.3, there were several changes to mvebu and the root port emulation it uses (though the devices above are on the root bus and shouldn't be below a root port):
71ceae67ef9b("PCI: pci-bridge-emul: SetPCI_STATUS_CAP_LISTfor PCIe device")2c8683fbf143("PCI: pci-bridge-emul: Correctly set PCIe capabilities")
6863f571a546("PCI: pci-bridge-emul: Fix definitions of reserved bits")
9e6e6e641f26("PCI: pci-bridge-emul: Properly mark reserved PCIe bits in PCI config space")174a6ab8722e("PCI: pci-bridge-emul: Make expansion ROM Base Address register read-only")ce16d4b7e5f6("PCI: mvebu: Fix support for DEVCAP2, DEVCTL2 and LNKCTL2 registers on emulated bridge")004408c5b7b4("PCI: mvebu: Fix support forPCI_EXP_RTSTAon emulated bridge")e9dd0d0efece("PCI: mvebu: Fix support forPCI_EXP_DEVCTLon emulated bridge")802d9ee9cbd3("PCI: mvebu: Fix support forPCI_BRIDGE_CTL_BUS_RESETon emulated bridge")4523e727c349("PCI: mvebu: Setup PCIe controller to Root Complex mode")
7cde9bf07316("PCI: mvebu: Fix configuring secondary bus of PCIe Root Port via emulated bridge")3de91c80b70a("PCI: mvebu: Fix support for bus mastering andPCI_COMMANDon emulated bridge")d9bfeaab65b3("PCI: mvebu: Do not modify PCI IO type bits inconf_write")e7e52bc07021("PCI: mvebu: Check for errors frompci_bridge_emul_init()call")I think these are all from Pali (cc'd), so he'll likely see the problem.
Quoted 184 lines
5.16.3:
$ dmesg|grep -i pci [ 0.075893] PCI: CLS 0 bytes, default 64 [ 0.127393] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4 [ 0.127679] mvebu-pcie soc:pcie: host bridge /soc/pcie ranges: [ 0.127723] mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000 [ 0.127743] mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000 [ 0.127760] mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000 [ 0.127775] mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000 [ 0.127790] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127804] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127819] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127833] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127847] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127861] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127875] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.127886] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.128145] mvebu-pcie soc:pcie: PCI host bridge to bus 0000:00 [ 0.128162] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.128174] pci_bus 0000:00: root bus resource [mem 0xf1080000-0xf1081fff] (bus address [0x00080000-0x00081fff]) [ 0.128183] pci_bus 0000:00: root bus resource [mem 0xf1040000-0xf1041fff] (bus address [0x00040000-0x00041fff]) [ 0.128191] pci_bus 0000:00: root bus resource [mem 0xf1044000-0xf1045fff] (bus address [0x00044000-0x00045fff]) [ 0.128199] pci_bus 0000:00: root bus resource [mem 0xf1048000-0xf1049fff] (bus address [0x00048000-0x00049fff]) [ 0.128206] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff] [ 0.128212] pci_bus 0000:00: root bus resource [io 0x1000-0xeffff] [ 0.128354] pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400 [ 0.128634] pci 0000:00:02.0: [11ab:6820] type 01 class 0x060400 [ 0.128866] pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 [ 0.129958] PCI: bus0: Fast back to back transfers disabled [ 0.129979] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129994] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.130004] pci 0000:00:03.0: bridge configuration invalid ([bus 01-00]), reconfiguring [ 0.131172] PCI: bus1: Fast back to back transfers enabled [ 0.131198] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.131363] pci 0000:02:00.0: [11ab:6820] type 00 class 0x058000 [ 0.131386] pci 0000:02:00.0: reg 0x10: [mem 0xf1000000-0xf10fffff] [ 0.131401] pci 0000:02:00.0: reg 0x18: [mem 0x00000000-0x7fffffff] [ 0.131459] pci 0000:02:00.0: supports D1 D2 [ 0.132655] PCI: bus2: Fast back to back transfers disabled [ 0.132681] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 0.132831] pci 0000:03:00.0: [11ab:6820] type 00 class 0x058000 [ 0.132853] pci 0000:03:00.0: reg 0x10: [mem 0xf1000000-0xf10fffff] [ 0.132868] pci 0000:03:00.0: reg 0x18: [mem 0x00000000-0x7fffffff] [ 0.132926] pci 0000:03:00.0: supports D1 D2 [ 0.134166] PCI: bus3: Fast back to back transfers disabled [ 0.134194] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03 [ 0.134303] pci 0000:00:02.0: BAR 14: no space for [mem size 0xc0000000] [ 0.134318] pci 0000:00:02.0: BAR 14: failed to assign [mem size 0xc0000000] [ 0.134329] pci 0000:00:03.0: BAR 14: no space for [mem size 0xc0000000] [ 0.134337] pci 0000:00:03.0: BAR 14: failed to assign [mem size 0xc0000000] [ 0.134348] pci 0000:00:01.0: PCI bridge to [bus 01] [ 0.134364] pci 0000:02:00.0: BAR 2: no space for [mem size 0x80000000] [ 0.134372] pci 0000:02:00.0: BAR 2: failed to assign [mem size 0x80000000] [ 0.134379] pci 0000:02:00.0: BAR 0: no space for [mem size 0x00100000] [ 0.134385] pci 0000:02:00.0: BAR 0: failed to assign [mem size 0x00100000] [ 0.134393] pci 0000:00:02.0: PCI bridge to [bus 02] [ 0.134406] pci 0000:03:00.0: BAR 2: no space for [mem size 0x80000000] [ 0.134413] pci 0000:03:00.0: BAR 2: failed to assign [mem size 0x80000000] [ 0.134420] pci 0000:03:00.0: BAR 0: no space for [mem size 0x00100000] [ 0.134426] pci 0000:03:00.0: BAR 0: failed to assign [mem size 0x00100000] [ 0.134433] pci 0000:00:03.0: PCI bridge to [bus 03]5.16.1:
[ 0.127673] mvebu-pcie soc:pcie: host bridge /soc/pcie ranges: [ 0.127717] mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000 [ 0.127737] mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000 [ 0.127753] mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000 [ 0.127768] mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000 [ 0.127783] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127798] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127812] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127826] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127839] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127853] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127867] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.127877] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.128140] mvebu-pcie soc:pcie: PCI host bridge to bus 0000:00 [ 0.128157] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.128170] pci_bus 0000:00: root bus resource [mem 0xf1080000-0xf1081fff] (bus address [0x00080000-0x00081fff]) [ 0.128179] pci_bus 0000:00: root bus resource [mem 0xf1040000-0xf1041fff] (bus address [0x00040000-0x00041fff]) [ 0.128187] pci_bus 0000:00: root bus resource [mem 0xf1044000-0xf1045fff] (bus address [0x00044000-0x00045fff]) [ 0.128196] pci_bus 0000:00: root bus resource [mem 0xf1048000-0xf1049fff] (bus address [0x00048000-0x00049fff]) [ 0.128203] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff] [ 0.128210] pci_bus 0000:00: root bus resource [io 0x1000-0xeffff] [ 0.128341] pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400 [ 0.128362] pci 0000:00:01.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.128631] pci 0000:00:02.0: [11ab:6820] type 01 class 0x060400 [ 0.128655] pci 0000:00:02.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.128871] pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 [ 0.128893] pci 0000:00:03.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.129975] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129989] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129999] pci 0000:00:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.131184] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.131344] pci 0000:02:00.0: [168c:003c] type 00 class 0x028000 [ 0.131375] pci 0000:02:00.0: reg 0x10: [mem 0x00000000-0x001fffff 64bit] [ 0.131408] pci 0000:02:00.0: reg 0x30: [mem 0x00000000-0x0000ffff pref] [ 0.131507] pci 0000:02:00.0: supports D1 [ 0.131515] pci 0000:02:00.0: PME# supported from D0 D1 D3hot [ 0.131734] pci 0000:00:02.0: ASPM: current common clock configuration is inconsistent, reconfiguring [ 0.131753] pci 0000:00:02.0: ASPM: Bridge does not support changing Link Speed to 2.5 GT/s [ 0.131759] pci 0000:00:02.0: ASPM: Retrain Link at higher speed is disallowed by quirk [ 0.131765] pci 0000:00:02.0: ASPM: Could not configure common clock [ 0.132832] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 0.132993] pci 0000:03:00.0: [168c:002e] type 00 class 0x028000 [ 0.133027] pci 0000:03:00.0: reg 0x10: [mem 0x00000000-0x0000ffff 64bit] [ 0.133152] pci 0000:03:00.0: supports D1 [ 0.133161] pci 0000:03:00.0: PME# supported from D0 D1 D3hot [ 0.133396] pci 0000:00:03.0: ASPM: current common clock configuration is inconsistent, reconfiguring [ 0.133413] pci 0000:00:03.0: ASPM: Bridge does not support changing Link Speed to 2.5 GT/s [ 0.133421] pci 0000:00:03.0: ASPM: Retrain Link at higher speed is disallowed by quirk [ 0.133427] pci 0000:00:03.0: ASPM: Could not configure common clock [ 0.134545] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03 [ 0.134655] pci 0000:00:02.0: BAR 14: assigned [mem 0xe0000000-0xe02fffff] [ 0.134673] pci 0000:00:03.0: BAR 14: assigned [mem 0xe0300000-0xe03fffff] [ 0.134685] pci 0000:00:01.0: BAR 6: assigned [mem 0xe0400000-0xe04007ff pref] [ 0.134696] pci 0000:00:02.0: BAR 6: assigned [mem 0xe0500000-0xe05007ff pref] [ 0.134706] pci 0000:00:03.0: BAR 6: assigned [mem 0xe0600000-0xe06007ff pref] [ 0.134717] pci 0000:00:01.0: PCI bridge to [bus 01] [ 0.134737] pci 0000:02:00.0: BAR 0: assigned [mem 0xe0000000-0xe01fffff 64bit] [ 0.134755] pci 0000:02:00.0: BAR 6: assigned [mem 0xe0200000-0xe020ffff pref] [ 0.134764] pci 0000:00:02.0: PCI bridge to [bus 02] [ 0.134772] pci 0000:00:02.0: bridge window [mem 0xe0000000-0xe02fffff] [ 0.134784] pci 0000:03:00.0: BAR 0: assigned [mem 0xe0300000-0xe030ffff 64bit] [ 0.134798] pci 0000:00:03.0: PCI bridge to [bus 03] [ 0.134806] pci 0000:00:03.0: bridge window [mem 0xe0300000-0xe03fffff] [ 0.134997] pcieport 0000:00:02.0: enabling device (0140 -> 0142) [ 0.135084] pcieport 0000:00:03.0: enabling device (0140 -> 0142)Signature · 4 lines
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Quoted 27 lines · Pali Rohár
Hello!
[+ Marek]
Quoted 22 lines · On Thursday 27 January 2022 17:49:17 Bjorn Helgaas wrote:
[+cc Thomas, Pali]
Quoted 19 lines · On Thu, Jan 27, 2022 at 10:52:43PM +0000, [email protected]…
https://bugzilla.kernel.org/show_bug.cgi?id=215540
Bug ID: 215540 Summary: mvebu: no pcie devices detected on turris omnia (5.16.3 regression) Product: Drivers Version: 2.5 Kernel Version: 5.16.3 Hardware: ARM OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: PCI Assignee: [email protected] Reporter: [email protected] Regression: No
Quoted 7 lines
Quoted 4 lines
Quoted 4 lines
After kernel upgrade from 5.16.1 to 5.16.3 Turris Omnia (Armada 385) no longer detects pcie devices (wifi/msata). Haven't tried 5.16.2 but it doesn't seem to have any relevant changes, while 5.16.3 carries a few.
I'm not sure where is the issue and why it crashes. But I tested all sent pci patches on Turris Omnia in the past and they worked fine.
Not sure if it's of any help but I've added info to bz about specific commit that seems to cause the regression:
commit 7cde9bf0731688896831f90da9fe755f44a6d5e0
author Pali Rohár <[email protected]>
PCI: mvebu: Fix configuring secondary bus of PCIe Root Port via emulated bridge
[ Upstream commit 91a8d79fc797d3486ae978beebdfc55261c7d65b ]
[+ Greg]
Quoted 31 lines · On Thursday 03 February 2022 13:26:42 Pali Rohár wrote:
Hello!
[+ Marek]
Quoted 26 lines · On Thursday 27 January 2022 17:49:17 Bjorn Helgaas wrote:
[+cc Thomas, Pali]
Quoted 23 lines · On Thu, Jan 27, 2022 at 10:52:43PM +0000, [email protected]…
https://bugzilla.kernel.org/show_bug.cgi?id=215540
Bug ID: 215540 Summary: mvebu: no pcie devices detected on turris omnia (5.16.3 regression) Product: Drivers Version: 2.5 Kernel Version: 5.16.3 Hardware: ARM OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: PCI Assignee: [email protected] Reporter: [email protected] Regression: NoAfter kernel upgrade from 5.16.1 to 5.16.3 Turris Omnia (Armada 385) no longer detects pcie devices (wifi/msata). Haven't tried 5.16.2 but it doesn't seem to have any relevant changes, while 5.16.3 carries a few.
I found another issue: Into stable tree was backported "modified" patch. I'm not sure it is is source of this issue but looks like it is related.
If you open mentioned problematic commit in web ui:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.16.y&id=7cde9bf0731688896831f90da9fe755f44a6d5e0
And compare it with patch which is on "Link:" line from commit message:
https://lore.kernel.org/r/[email protected]
You will see that diffs are different. In my original patch (which I sent to ML) is:
mvebu_pcie_setup_hw(port); mvebu_pcie_set_local_dev_nr(port, 1);
+ mvebu_pcie_set_local_bus_nr(port, 0);
But in git web ui is:
mvebu_pcie_setup_hw(port);
- mvebu_pcie_set_local_dev_nr(port, 1);
+ mvebu_pcie_set_local_dev_nr(port, 0);
I do not know how it could happen. But local **device** number must be always set to 1 (see comment above code for explanation) and default value of local **bus** number should be 0 (as is in my original patch).
So above patch in stable tree is broken.
Bjorn & Greg: How do you want to handle this situation? Should I prepare special patch for stable which fix it? Or something else?
Anyway, do you know how it could happen that patch was incorrectly auto-backported into stable? Differences between original and wrongly-modified patch looks very similar (both "bus" and "dev" keywords have same number of characters) and it was hard for me to see that there are differences. So probably overlooking could happen or maybe git or patch tools could do such small changes when doing backports?
Quoted 311 lines
I was trying to reproduce this issue on Turris Omnia but it looks like that kernel v5.16.3 is totally broken and I'm not able to boot it. It crashes somewhere in non-pci related code.
[ 1.848417] ip_gre: GRE over IPv4 tunneling driver [ 1.849114] NET: Registered PF_INET6 protocol family [ 1.866501] Segment Routing with IPv6 [ 1.870185] In-situ OAM (IOAM) with IPv6 [ 1.874201] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver [ 1.880680] ip6_gre: GRE over IPv6 tunneling driver [ 1.885860] NET: Registered PF_PACKET protocol family [ 1.891012] 8021q: 802.1Q VLAN Support v1.8 [ 1.895348] Registering SWP/SWPB emulation handler [ 1.900560] Internal error: Oops - undefined instruction: 0 [#1] SMP ARM [ 1.907282] Modules linked in: [ 1.910346] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.16.3 #124 [ 1.916455] Hardware name: Marvell Armada 380/385 (Device Tree) [ 1.922387] PC is at crypto_unregister_alg+0xf4/0xfc [ 1.927370] LR is at 0x0 [ 1.929909] pc : [<c04e1a6c>] lr : [<00000000>] psr: 20000013 [ 1.936190] sp : c1863ea0 ip : 00000000 fp : c10b0000 [ 1.941425] r10: c0f49838 r9 : c0f49858 r8 : c18b0000 [ 1.946660] r7 : c10b0484 r6 : c1863eac r5 : c1004f48 r4 : c2311280 [ 1.953201] r3 : 00000002 r2 : ffffffff r1 : 00000001 r0 : c1082c70 [ 1.959743] Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none [ 1.966896] Control: 10c5387d Table: 0000404a DAC: 00000051 [ 1.972654] Register r0 information: non-slab/vmalloc memory [ 1.978328] Register r1 information: non-paged memory [ 1.983391] Register r2 information: non-paged memory [ 1.988453] Register r3 information: non-paged memory [ 1.993516] Register r4 information: slab kmalloc-512 start c2311200 pointer offset 128 size 512 [ 2.002329] Register r5 information: non-slab/vmalloc memory [ 2.008000] Register r6 information: non-slab/vmalloc memory [ 2.013672] Register r7 information: non-slab/vmalloc memory [ 2.019343] Register r8 information: slab task_struct start c18b0000 pointer offset 0 [ 2.027196] Register r9 information: non-slab/vmalloc memory [ 2.032867] Register r10 information: non-slab/vmalloc memory [ 2.038626] Register r11 information: non-slab/vmalloc memory [ 2.044384] Register r12 information: NULL pointer [ 2.049185] Process swapper/0 (pid: 1, stack limit = 0x(ptrval)) [ 2.055205] Stack: (0xc1863ea0 to 0xc1864000) [ 2.059573] 3ea0: c18b0000 c100c66a c0f49838 c1863eac c1863eac 72a9cbca c2311200 c10b0498 [ 2.067772] 3ec0: 00000001 c04fd268 c10b0488 c011ee7c c100c740 fffffffe 00000001 c0f09218 [ 2.075968] 3ee0: c10b0000 c1004f48 c0f091a0 00000000 c18b0000 c0101720 c1823444 c014f9dc [ 2.084164] 3f00: c0e9480c c0d90300 00000000 00000007 00000007 c0d97860 00000000 c1004f48 [ 2.092362] 3f20: c0da2044 c0d978d4 37320000 c1823434 c1823442 72a9cbca c10dd7d4 00000008 [ 2.100558] 3f40: c0e9480c 72a9cbca c0f5a0e8 c0e9480c 00000008 c18233c0 00000125 c0f01298 [ 2.108754] 3f60: 00000007 00000007 00000000 c0f003fc 00000001 c0f003fc 00000000 c1004f40 [ 2.116950] 3f80: c0b91d40 00000000 00000000 00000000 00000000 00000000 00000000 c0b91d58 [ 2.125147] 3fa0: 00000000 c0b91d40 00000000 c0100148 00000000 00000000 00000000 00000000 [ 2.133344] 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 2.141541] 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 [ 2.149740] [<c04e1a6c>] (crypto_unregister_alg) from [<c04fd268>] (simd_skcipher_free+0x10/0x1c) [ 2.158645] [<c04fd268>] (simd_skcipher_free) from [<c011ee7c>] (aes_exit+0x20/0x3c) [ 2.166413] [<c011ee7c>] (aes_exit) from [<c0f09218>] (aes_init+0x78/0x94) [ 2.173309] [<c0f09218>] (aes_init) from [<c0101720>] (do_one_initcall+0x64/0x1ac) [ 2.180902] [<c0101720>] (do_one_initcall) from [<c0f01298>] (kernel_init_freeable+0x210/0x274) [ 2.189629] [<c0f01298>] (kernel_init_freeable) from [<c0b91d58>] (kernel_init+0x18/0x12c) [ 2.197923] [<c0b91d58>] (kernel_init) from [<c0100148>] (ret_from_fork+0x14/0x2c) [ 2.205513] Exception stack(0xc1863fb0 to 0xc1863ff8) [ 2.210577] 3fa0: 00000000 00000000 00000000 00000000 [ 2.218773] 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 2.226968] 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 [ 2.233599] Code: e30011ca e58d4000 eb1a86bd eaffffec (e7f001f2) [ 2.239709] ---[ end trace 36f3af5192e0cf87 ]--- [ 2.244337] Kernel panic - not syncing: Fatal exception [ 2.249573] CPU1: stopping [ 2.252289] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G D 5.16.3 #124 [ 2.259792] Hardware name: Marvell Armada 380/385 (Device Tree) [ 2.265725] [<c010e120>] (unwind_backtrace) from [<c010a170>] (show_stack+0x10/0x14) [ 2.273496] [<c010a170>] (show_stack) from [<c0b89fa8>] (dump_stack_lvl+0x40/0x4c) [ 2.281087] [<c0b89fa8>] (dump_stack_lvl) from [<c010c3f8>] (do_handle_IPI+0xf4/0x128) [ 2.289026] [<c010c3f8>] (do_handle_IPI) from [<c010c444>] (ipi_handler+0x18/0x20) [ 2.296616] [<c010c444>] (ipi_handler) from [<c0187de4>] (handle_percpu_devid_irq+0x78/0x124) [ 2.305167] [<c0187de4>] (handle_percpu_devid_irq) from [<c0182208>] (generic_handle_domain_irq+0x44/0x88) [ 2.314851] [<c0182208>] (generic_handle_domain_irq) from [<c05bde1c>] (gic_handle_irq+0x74/0x88) [ 2.323751] [<c05bde1c>] (gic_handle_irq) from [<c0b91950>] (generic_handle_arch_irq+0x34/0x44) [ 2.332475] [<c0b91950>] (generic_handle_arch_irq) from [<c0100b10>] (__irq_svc+0x50/0x68) [ 2.340763] Exception stack(0xc187df50 to 0xc187df98) [ 2.345826] df40: 00000dd0 00000000 00000001 c0116ba0 [ 2.354023] df60: c1004f90 c1004fd4 00000002 00000000 c1004f48 c0f5d268 c18b6900 00000000 [ 2.362219] df80: 00000000 c187dfa0 c01076f4 c01076f8 60000013 ffffffff [ 2.368847] [<c0100b10>] (__irq_svc) from [<c01076f8>] (arch_cpu_idle+0x38/0x3c) [ 2.376265] [<c01076f8>] (arch_cpu_idle) from [<c0b98df8>] (default_idle_call+0x1c/0x2c) [ 2.384379] [<c0b98df8>] (default_idle_call) from [<c015fc74>] (do_idle+0x1c8/0x218) [ 2.392147] [<c015fc74>] (do_idle) from [<c015ff80>] (cpu_startup_entry+0x18/0x20) [ 2.399739] [<c015ff80>] (cpu_startup_entry) from [<001014b4>] (0x1014b4) [ 2.406549] Rebooting in 1 seconds..I'm not sure where is the issue and why it crashes. But I tested all sent pci patches on Turris Omnia in the past and they worked fine.
Quoted 219 lines
Here are some of the dmesg diffs between v5.16.1 (good) and v5.16.3 (bad):
pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400-pci 0000:00:01.0: reg
0x38: [mem 0x00000000-0x000007ff pref]
pci 0000:00:02.0: [11ab:6820] type 01 class0x060400
-pci 0000:00:02.0: reg0x38: [mem 0x00000000-0x000007ff pref]
pci 0000:00:03.0: [11ab:6820] type 01 class0x060400
-pci 0000:00:03.0: reg0x38: [mem 0x00000000-0x000007ff pref]That means both kernels *discovered* the devices, but v5.16.3 couldn't size the BARs.
Between v5.16.1 and v5.16.3, there were several changes to mvebu and the root port emulation it uses (though the devices above are on the root bus and shouldn't be below a root port):
71ceae67ef9b("PCI: pci-bridge-emul: SetPCI_STATUS_CAP_LISTfor PCIe device")2c8683fbf143("PCI: pci-bridge-emul: Correctly set PCIe capabilities")
6863f571a546("PCI: pci-bridge-emul: Fix definitions of reserved bits")
9e6e6e641f26("PCI: pci-bridge-emul: Properly mark reserved PCIe bits in PCI config space")174a6ab8722e("PCI: pci-bridge-emul: Make expansion ROM Base Address register read-only")ce16d4b7e5f6("PCI: mvebu: Fix support for DEVCAP2, DEVCTL2 and LNKCTL2 registers on emulated bridge")004408c5b7b4("PCI: mvebu: Fix support forPCI_EXP_RTSTAon emulated bridge")e9dd0d0efece("PCI: mvebu: Fix support forPCI_EXP_DEVCTLon emulated bridge")802d9ee9cbd3("PCI: mvebu: Fix support forPCI_BRIDGE_CTL_BUS_RESETon emulated bridge")4523e727c349("PCI: mvebu: Setup PCIe controller to Root Complex mode")
7cde9bf07316("PCI: mvebu: Fix configuring secondary bus of PCIe Root Port via emulated bridge")3de91c80b70a("PCI: mvebu: Fix support for bus mastering andPCI_COMMANDon emulated bridge")d9bfeaab65b3("PCI: mvebu: Do not modify PCI IO type bits inconf_write")e7e52bc07021("PCI: mvebu: Check for errors frompci_bridge_emul_init()call")I think these are all from Pali (cc'd), so he'll likely see the problem.
Quoted 184 lines
5.16.3:
$ dmesg|grep -i pci [ 0.075893] PCI: CLS 0 bytes, default 64 [ 0.127393] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4 [ 0.127679] mvebu-pcie soc:pcie: host bridge /soc/pcie ranges: [ 0.127723] mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000 [ 0.127743] mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000 [ 0.127760] mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000 [ 0.127775] mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000 [ 0.127790] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127804] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127819] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127833] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127847] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127861] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127875] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.127886] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.128145] mvebu-pcie soc:pcie: PCI host bridge to bus 0000:00 [ 0.128162] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.128174] pci_bus 0000:00: root bus resource [mem 0xf1080000-0xf1081fff] (bus address [0x00080000-0x00081fff]) [ 0.128183] pci_bus 0000:00: root bus resource [mem 0xf1040000-0xf1041fff] (bus address [0x00040000-0x00041fff]) [ 0.128191] pci_bus 0000:00: root bus resource [mem 0xf1044000-0xf1045fff] (bus address [0x00044000-0x00045fff]) [ 0.128199] pci_bus 0000:00: root bus resource [mem 0xf1048000-0xf1049fff] (bus address [0x00048000-0x00049fff]) [ 0.128206] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff] [ 0.128212] pci_bus 0000:00: root bus resource [io 0x1000-0xeffff] [ 0.128354] pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400 [ 0.128634] pci 0000:00:02.0: [11ab:6820] type 01 class 0x060400 [ 0.128866] pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 [ 0.129958] PCI: bus0: Fast back to back transfers disabled [ 0.129979] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129994] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.130004] pci 0000:00:03.0: bridge configuration invalid ([bus 01-00]), reconfiguring [ 0.131172] PCI: bus1: Fast back to back transfers enabled [ 0.131198] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.131363] pci 0000:02:00.0: [11ab:6820] type 00 class 0x058000 [ 0.131386] pci 0000:02:00.0: reg 0x10: [mem 0xf1000000-0xf10fffff] [ 0.131401] pci 0000:02:00.0: reg 0x18: [mem 0x00000000-0x7fffffff] [ 0.131459] pci 0000:02:00.0: supports D1 D2 [ 0.132655] PCI: bus2: Fast back to back transfers disabled [ 0.132681] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 0.132831] pci 0000:03:00.0: [11ab:6820] type 00 class 0x058000 [ 0.132853] pci 0000:03:00.0: reg 0x10: [mem 0xf1000000-0xf10fffff] [ 0.132868] pci 0000:03:00.0: reg 0x18: [mem 0x00000000-0x7fffffff] [ 0.132926] pci 0000:03:00.0: supports D1 D2 [ 0.134166] PCI: bus3: Fast back to back transfers disabled [ 0.134194] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03 [ 0.134303] pci 0000:00:02.0: BAR 14: no space for [mem size 0xc0000000] [ 0.134318] pci 0000:00:02.0: BAR 14: failed to assign [mem size 0xc0000000] [ 0.134329] pci 0000:00:03.0: BAR 14: no space for [mem size 0xc0000000] [ 0.134337] pci 0000:00:03.0: BAR 14: failed to assign [mem size 0xc0000000] [ 0.134348] pci 0000:00:01.0: PCI bridge to [bus 01] [ 0.134364] pci 0000:02:00.0: BAR 2: no space for [mem size 0x80000000] [ 0.134372] pci 0000:02:00.0: BAR 2: failed to assign [mem size 0x80000000] [ 0.134379] pci 0000:02:00.0: BAR 0: no space for [mem size 0x00100000] [ 0.134385] pci 0000:02:00.0: BAR 0: failed to assign [mem size 0x00100000] [ 0.134393] pci 0000:00:02.0: PCI bridge to [bus 02] [ 0.134406] pci 0000:03:00.0: BAR 2: no space for [mem size 0x80000000] [ 0.134413] pci 0000:03:00.0: BAR 2: failed to assign [mem size 0x80000000] [ 0.134420] pci 0000:03:00.0: BAR 0: no space for [mem size 0x00100000] [ 0.134426] pci 0000:03:00.0: BAR 0: failed to assign [mem size 0x00100000] [ 0.134433] pci 0000:00:03.0: PCI bridge to [bus 03]5.16.1:
[ 0.127673] mvebu-pcie soc:pcie: host bridge /soc/pcie ranges: [ 0.127717] mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000 [ 0.127737] mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000 [ 0.127753] mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000 [ 0.127768] mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000 [ 0.127783] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127798] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127812] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127826] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127839] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127853] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127867] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.127877] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.128140] mvebu-pcie soc:pcie: PCI host bridge to bus 0000:00 [ 0.128157] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.128170] pci_bus 0000:00: root bus resource [mem 0xf1080000-0xf1081fff] (bus address [0x00080000-0x00081fff]) [ 0.128179] pci_bus 0000:00: root bus resource [mem 0xf1040000-0xf1041fff] (bus address [0x00040000-0x00041fff]) [ 0.128187] pci_bus 0000:00: root bus resource [mem 0xf1044000-0xf1045fff] (bus address [0x00044000-0x00045fff]) [ 0.128196] pci_bus 0000:00: root bus resource [mem 0xf1048000-0xf1049fff] (bus address [0x00048000-0x00049fff]) [ 0.128203] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff] [ 0.128210] pci_bus 0000:00: root bus resource [io 0x1000-0xeffff] [ 0.128341] pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400 [ 0.128362] pci 0000:00:01.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.128631] pci 0000:00:02.0: [11ab:6820] type 01 class 0x060400 [ 0.128655] pci 0000:00:02.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.128871] pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 [ 0.128893] pci 0000:00:03.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.129975] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129989] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129999] pci 0000:00:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.131184] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.131344] pci 0000:02:00.0: [168c:003c] type 00 class 0x028000 [ 0.131375] pci 0000:02:00.0: reg 0x10: [mem 0x00000000-0x001fffff 64bit] [ 0.131408] pci 0000:02:00.0: reg 0x30: [mem 0x00000000-0x0000ffff pref] [ 0.131507] pci 0000:02:00.0: supports D1 [ 0.131515] pci 0000:02:00.0: PME# supported from D0 D1 D3hot [ 0.131734] pci 0000:00:02.0: ASPM: current common clock configuration is inconsistent, reconfiguring [ 0.131753] pci 0000:00:02.0: ASPM: Bridge does not support changing Link Speed to 2.5 GT/s [ 0.131759] pci 0000:00:02.0: ASPM: Retrain Link at higher speed is disallowed by quirk [ 0.131765] pci 0000:00:02.0: ASPM: Could not configure common clock [ 0.132832] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 0.132993] pci 0000:03:00.0: [168c:002e] type 00 class 0x028000 [ 0.133027] pci 0000:03:00.0: reg 0x10: [mem 0x00000000-0x0000ffff 64bit] [ 0.133152] pci 0000:03:00.0: supports D1 [ 0.133161] pci 0000:03:00.0: PME# supported from D0 D1 D3hot [ 0.133396] pci 0000:00:03.0: ASPM: current common clock configuration is inconsistent, reconfiguring [ 0.133413] pci 0000:00:03.0: ASPM: Bridge does not support changing Link Speed to 2.5 GT/s [ 0.133421] pci 0000:00:03.0: ASPM: Retrain Link at higher speed is disallowed by quirk [ 0.133427] pci 0000:00:03.0: ASPM: Could not configure common clock [ 0.134545] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03 [ 0.134655] pci 0000:00:02.0: BAR 14: assigned [mem 0xe0000000-0xe02fffff] [ 0.134673] pci 0000:00:03.0: BAR 14: assigned [mem 0xe0300000-0xe03fffff] [ 0.134685] pci 0000:00:01.0: BAR 6: assigned [mem 0xe0400000-0xe04007ff pref] [ 0.134696] pci 0000:00:02.0: BAR 6: assigned [mem 0xe0500000-0xe05007ff pref] [ 0.134706] pci 0000:00:03.0: BAR 6: assigned [mem 0xe0600000-0xe06007ff pref] [ 0.134717] pci 0000:00:01.0: PCI bridge to [bus 01] [ 0.134737] pci 0000:02:00.0: BAR 0: assigned [mem 0xe0000000-0xe01fffff 64bit] [ 0.134755] pci 0000:02:00.0: BAR 6: assigned [mem 0xe0200000-0xe020ffff pref] [ 0.134764] pci 0000:00:02.0: PCI bridge to [bus 02] [ 0.134772] pci 0000:00:02.0: bridge window [mem 0xe0000000-0xe02fffff] [ 0.134784] pci 0000:03:00.0: BAR 0: assigned [mem 0xe0300000-0xe030ffff 64bit] [ 0.134798] pci 0000:00:03.0: PCI bridge to [bus 03] [ 0.134806] pci 0000:00:03.0: bridge window [mem 0xe0300000-0xe03fffff] [ 0.134997] pcieport 0000:00:02.0: enabling device (0140 -> 0142) [ 0.135084] pcieport 0000:00:03.0: enabling device (0140 -> 0142)Signature · 4 lines
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Quoted 47 lines · Pali Rohár
[+ Greg]
Quoted 31 lines · On Thursday 03 February 2022 13:26:42 Pali Rohár wrote:
Hello!
[+ Marek]
Quoted 26 lines · On Thursday 27 January 2022 17:49:17 Bjorn Helgaas wrote:
[+cc Thomas, Pali]
Quoted 23 lines · On Thu, Jan 27, 2022 at 10:52:43PM +0000, [email protected]…
https://bugzilla.kernel.org/show_bug.cgi?id=215540
Bug ID: 215540 Summary: mvebu: no pcie devices detected on turris omnia (5.16.3 regression) Product: Drivers Version: 2.5 Kernel Version: 5.16.3 Hardware: ARM OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: PCI Assignee: [email protected] Reporter: [email protected] Regression: NoAfter kernel upgrade from 5.16.1 to 5.16.3 Turris Omnia (Armada 385) no longer detects pcie devices (wifi/msata). Haven't tried 5.16.2 but it doesn't seem to have any relevant changes, while 5.16.3 carries a few.
I found another issue: Into stable tree was backported "modified" patch. I'm not sure it is is source of this issue but looks like it is related.
If you open mentioned problematic commit in web ui:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.16.y&id=7cde9bf0731688896831f90da9fe755f44a6d5e0And compare it with patch which is on "Link:" line from commit message:
https://lore.kernel.org/r/[email protected]You will see that diffs are different. In my original patch (which I sent to ML) is:
Review
Quoted 3 lines
(quoted diff) +1
-0mvebu_pcie_setup_hw(port); mvebu_pcie_set_local_dev_nr(port, 1); + mvebu_pcie_set_local_bus_nr(port, 0);
Tested with above change and can confirm everything works fine again. Thanks.
Quoted 334 lines
But in git web ui is:
(quoted diff) +1
-1mvebu_pcie_setup_hw(port); - mvebu_pcie_set_local_dev_nr(port, 1); + mvebu_pcie_set_local_dev_nr(port, 0);I do not know how it could happen. But local **device** number must be always set to 1 (see comment above code for explanation) and default value of local **bus** number should be 0 (as is in my original patch).
So above patch in stable tree is broken.
Bjorn & Greg: How do you want to handle this situation? Should I prepare special patch for stable which fix it? Or something else?
Anyway, do you know how it could happen that patch was incorrectly auto-backported into stable? Differences between original and wrongly-modified patch looks very similar (both "bus" and "dev" keywords have same number of characters) and it was hard for me to see that there are differences. So probably overlooking could happen or maybe git or patch tools could do such small changes when doing backports?
Quoted 311 lines
I was trying to reproduce this issue on Turris Omnia but it looks like that kernel v5.16.3 is totally broken and I'm not able to boot it. It crashes somewhere in non-pci related code.
[ 1.848417] ip_gre: GRE over IPv4 tunneling driver [ 1.849114] NET: Registered PF_INET6 protocol family [ 1.866501] Segment Routing with IPv6 [ 1.870185] In-situ OAM (IOAM) with IPv6 [ 1.874201] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver [ 1.880680] ip6_gre: GRE over IPv6 tunneling driver [ 1.885860] NET: Registered PF_PACKET protocol family [ 1.891012] 8021q: 802.1Q VLAN Support v1.8 [ 1.895348] Registering SWP/SWPB emulation handler [ 1.900560] Internal error: Oops - undefined instruction: 0 [#1] SMP ARM [ 1.907282] Modules linked in: [ 1.910346] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 5.16.3 #124 [ 1.916455] Hardware name: Marvell Armada 380/385 (Device Tree) [ 1.922387] PC is at crypto_unregister_alg+0xf4/0xfc [ 1.927370] LR is at 0x0 [ 1.929909] pc : [<c04e1a6c>] lr : [<00000000>] psr: 20000013 [ 1.936190] sp : c1863ea0 ip : 00000000 fp : c10b0000 [ 1.941425] r10: c0f49838 r9 : c0f49858 r8 : c18b0000 [ 1.946660] r7 : c10b0484 r6 : c1863eac r5 : c1004f48 r4 : c2311280 [ 1.953201] r3 : 00000002 r2 : ffffffff r1 : 00000001 r0 : c1082c70 [ 1.959743] Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment none [ 1.966896] Control: 10c5387d Table: 0000404a DAC: 00000051 [ 1.972654] Register r0 information: non-slab/vmalloc memory [ 1.978328] Register r1 information: non-paged memory [ 1.983391] Register r2 information: non-paged memory [ 1.988453] Register r3 information: non-paged memory [ 1.993516] Register r4 information: slab kmalloc-512 start c2311200 pointer offset 128 size 512 [ 2.002329] Register r5 information: non-slab/vmalloc memory [ 2.008000] Register r6 information: non-slab/vmalloc memory [ 2.013672] Register r7 information: non-slab/vmalloc memory [ 2.019343] Register r8 information: slab task_struct start c18b0000 pointer offset 0 [ 2.027196] Register r9 information: non-slab/vmalloc memory [ 2.032867] Register r10 information: non-slab/vmalloc memory [ 2.038626] Register r11 information: non-slab/vmalloc memory [ 2.044384] Register r12 information: NULL pointer [ 2.049185] Process swapper/0 (pid: 1, stack limit = 0x(ptrval)) [ 2.055205] Stack: (0xc1863ea0 to 0xc1864000) [ 2.059573] 3ea0: c18b0000 c100c66a c0f49838 c1863eac c1863eac 72a9cbca c2311200 c10b0498 [ 2.067772] 3ec0: 00000001 c04fd268 c10b0488 c011ee7c c100c740 fffffffe 00000001 c0f09218 [ 2.075968] 3ee0: c10b0000 c1004f48 c0f091a0 00000000 c18b0000 c0101720 c1823444 c014f9dc [ 2.084164] 3f00: c0e9480c c0d90300 00000000 00000007 00000007 c0d97860 00000000 c1004f48 [ 2.092362] 3f20: c0da2044 c0d978d4 37320000 c1823434 c1823442 72a9cbca c10dd7d4 00000008 [ 2.100558] 3f40: c0e9480c 72a9cbca c0f5a0e8 c0e9480c 00000008 c18233c0 00000125 c0f01298 [ 2.108754] 3f60: 00000007 00000007 00000000 c0f003fc 00000001 c0f003fc 00000000 c1004f40 [ 2.116950] 3f80: c0b91d40 00000000 00000000 00000000 00000000 00000000 00000000 c0b91d58 [ 2.125147] 3fa0: 00000000 c0b91d40 00000000 c0100148 00000000 00000000 00000000 00000000 [ 2.133344] 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 2.141541] 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 00000000 00000000 [ 2.149740] [<c04e1a6c>] (crypto_unregister_alg) from [<c04fd268>] (simd_skcipher_free+0x10/0x1c) [ 2.158645] [<c04fd268>] (simd_skcipher_free) from [<c011ee7c>] (aes_exit+0x20/0x3c) [ 2.166413] [<c011ee7c>] (aes_exit) from [<c0f09218>] (aes_init+0x78/0x94) [ 2.173309] [<c0f09218>] (aes_init) from [<c0101720>] (do_one_initcall+0x64/0x1ac) [ 2.180902] [<c0101720>] (do_one_initcall) from [<c0f01298>] (kernel_init_freeable+0x210/0x274) [ 2.189629] [<c0f01298>] (kernel_init_freeable) from [<c0b91d58>] (kernel_init+0x18/0x12c) [ 2.197923] [<c0b91d58>] (kernel_init) from [<c0100148>] (ret_from_fork+0x14/0x2c) [ 2.205513] Exception stack(0xc1863fb0 to 0xc1863ff8) [ 2.210577] 3fa0: 00000000 00000000 00000000 00000000 [ 2.218773] 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 [ 2.226968] 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000 [ 2.233599] Code: e30011ca e58d4000 eb1a86bd eaffffec (e7f001f2) [ 2.239709] ---[ end trace 36f3af5192e0cf87 ]--- [ 2.244337] Kernel panic - not syncing: Fatal exception [ 2.249573] CPU1: stopping [ 2.252289] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G D 5.16.3 #124 [ 2.259792] Hardware name: Marvell Armada 380/385 (Device Tree) [ 2.265725] [<c010e120>] (unwind_backtrace) from [<c010a170>] (show_stack+0x10/0x14) [ 2.273496] [<c010a170>] (show_stack) from [<c0b89fa8>] (dump_stack_lvl+0x40/0x4c) [ 2.281087] [<c0b89fa8>] (dump_stack_lvl) from [<c010c3f8>] (do_handle_IPI+0xf4/0x128) [ 2.289026] [<c010c3f8>] (do_handle_IPI) from [<c010c444>] (ipi_handler+0x18/0x20) [ 2.296616] [<c010c444>] (ipi_handler) from [<c0187de4>] (handle_percpu_devid_irq+0x78/0x124) [ 2.305167] [<c0187de4>] (handle_percpu_devid_irq) from [<c0182208>] (generic_handle_domain_irq+0x44/0x88) [ 2.314851] [<c0182208>] (generic_handle_domain_irq) from [<c05bde1c>] (gic_handle_irq+0x74/0x88) [ 2.323751] [<c05bde1c>] (gic_handle_irq) from [<c0b91950>] (generic_handle_arch_irq+0x34/0x44) [ 2.332475] [<c0b91950>] (generic_handle_arch_irq) from [<c0100b10>] (__irq_svc+0x50/0x68) [ 2.340763] Exception stack(0xc187df50 to 0xc187df98) [ 2.345826] df40: 00000dd0 00000000 00000001 c0116ba0 [ 2.354023] df60: c1004f90 c1004fd4 00000002 00000000 c1004f48 c0f5d268 c18b6900 00000000 [ 2.362219] df80: 00000000 c187dfa0 c01076f4 c01076f8 60000013 ffffffff [ 2.368847] [<c0100b10>] (__irq_svc) from [<c01076f8>] (arch_cpu_idle+0x38/0x3c) [ 2.376265] [<c01076f8>] (arch_cpu_idle) from [<c0b98df8>] (default_idle_call+0x1c/0x2c) [ 2.384379] [<c0b98df8>] (default_idle_call) from [<c015fc74>] (do_idle+0x1c8/0x218) [ 2.392147] [<c015fc74>] (do_idle) from [<c015ff80>] (cpu_startup_entry+0x18/0x20) [ 2.399739] [<c015ff80>] (cpu_startup_entry) from [<001014b4>] (0x1014b4) [ 2.406549] Rebooting in 1 seconds..I'm not sure where is the issue and why it crashes. But I tested all sent pci patches on Turris Omnia in the past and they worked fine.
Quoted 219 lines
Here are some of the dmesg diffs between v5.16.1 (good) and v5.16.3 (bad):
pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400-pci 0000:00:01.0: reg
0x38: [mem 0x00000000-0x000007ff pref]
pci 0000:00:02.0: [11ab:6820] type 01 class0x060400
-pci 0000:00:02.0: reg0x38: [mem 0x00000000-0x000007ff pref]
pci 0000:00:03.0: [11ab:6820] type 01 class0x060400
-pci 0000:00:03.0: reg0x38: [mem 0x00000000-0x000007ff pref]That means both kernels *discovered* the devices, but v5.16.3 couldn't size the BARs.
Between v5.16.1 and v5.16.3, there were several changes to mvebu and the root port emulation it uses (though the devices above are on the root bus and shouldn't be below a root port):
71ceae67ef9b("PCI: pci-bridge-emul: SetPCI_STATUS_CAP_LISTfor PCIe device")2c8683fbf143("PCI: pci-bridge-emul: Correctly set PCIe capabilities")
6863f571a546("PCI: pci-bridge-emul: Fix definitions of reserved bits")
9e6e6e641f26("PCI: pci-bridge-emul: Properly mark reserved PCIe bits in PCI config space")174a6ab8722e("PCI: pci-bridge-emul: Make expansion ROM Base Address register read-only")ce16d4b7e5f6("PCI: mvebu: Fix support for DEVCAP2, DEVCTL2 and LNKCTL2 registers on emulated bridge")004408c5b7b4("PCI: mvebu: Fix support forPCI_EXP_RTSTAon emulated bridge")e9dd0d0efece("PCI: mvebu: Fix support forPCI_EXP_DEVCTLon emulated bridge")802d9ee9cbd3("PCI: mvebu: Fix support forPCI_BRIDGE_CTL_BUS_RESETon emulated bridge")4523e727c349("PCI: mvebu: Setup PCIe controller to Root Complex mode")
7cde9bf07316("PCI: mvebu: Fix configuring secondary bus of PCIe Root Port via emulated bridge")3de91c80b70a("PCI: mvebu: Fix support for bus mastering andPCI_COMMANDon emulated bridge")d9bfeaab65b3("PCI: mvebu: Do not modify PCI IO type bits inconf_write")e7e52bc07021("PCI: mvebu: Check for errors frompci_bridge_emul_init()call")I think these are all from Pali (cc'd), so he'll likely see the problem.
Quoted 184 lines
5.16.3:
$ dmesg|grep -i pci [ 0.075893] PCI: CLS 0 bytes, default 64 [ 0.127393] shpchp: Standard Hot Plug PCI Controller Driver version: 0.4 [ 0.127679] mvebu-pcie soc:pcie: host bridge /soc/pcie ranges: [ 0.127723] mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000 [ 0.127743] mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000 [ 0.127760] mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000 [ 0.127775] mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000 [ 0.127790] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127804] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127819] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127833] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127847] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127861] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127875] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.127886] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.128145] mvebu-pcie soc:pcie: PCI host bridge to bus 0000:00 [ 0.128162] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.128174] pci_bus 0000:00: root bus resource [mem 0xf1080000-0xf1081fff] (bus address [0x00080000-0x00081fff]) [ 0.128183] pci_bus 0000:00: root bus resource [mem 0xf1040000-0xf1041fff] (bus address [0x00040000-0x00041fff]) [ 0.128191] pci_bus 0000:00: root bus resource [mem 0xf1044000-0xf1045fff] (bus address [0x00044000-0x00045fff]) [ 0.128199] pci_bus 0000:00: root bus resource [mem 0xf1048000-0xf1049fff] (bus address [0x00048000-0x00049fff]) [ 0.128206] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff] [ 0.128212] pci_bus 0000:00: root bus resource [io 0x1000-0xeffff] [ 0.128354] pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400 [ 0.128634] pci 0000:00:02.0: [11ab:6820] type 01 class 0x060400 [ 0.128866] pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 [ 0.129958] PCI: bus0: Fast back to back transfers disabled [ 0.129979] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129994] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.130004] pci 0000:00:03.0: bridge configuration invalid ([bus 01-00]), reconfiguring [ 0.131172] PCI: bus1: Fast back to back transfers enabled [ 0.131198] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.131363] pci 0000:02:00.0: [11ab:6820] type 00 class 0x058000 [ 0.131386] pci 0000:02:00.0: reg 0x10: [mem 0xf1000000-0xf10fffff] [ 0.131401] pci 0000:02:00.0: reg 0x18: [mem 0x00000000-0x7fffffff] [ 0.131459] pci 0000:02:00.0: supports D1 D2 [ 0.132655] PCI: bus2: Fast back to back transfers disabled [ 0.132681] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 0.132831] pci 0000:03:00.0: [11ab:6820] type 00 class 0x058000 [ 0.132853] pci 0000:03:00.0: reg 0x10: [mem 0xf1000000-0xf10fffff] [ 0.132868] pci 0000:03:00.0: reg 0x18: [mem 0x00000000-0x7fffffff] [ 0.132926] pci 0000:03:00.0: supports D1 D2 [ 0.134166] PCI: bus3: Fast back to back transfers disabled [ 0.134194] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03 [ 0.134303] pci 0000:00:02.0: BAR 14: no space for [mem size 0xc0000000] [ 0.134318] pci 0000:00:02.0: BAR 14: failed to assign [mem size 0xc0000000] [ 0.134329] pci 0000:00:03.0: BAR 14: no space for [mem size 0xc0000000] [ 0.134337] pci 0000:00:03.0: BAR 14: failed to assign [mem size 0xc0000000] [ 0.134348] pci 0000:00:01.0: PCI bridge to [bus 01] [ 0.134364] pci 0000:02:00.0: BAR 2: no space for [mem size 0x80000000] [ 0.134372] pci 0000:02:00.0: BAR 2: failed to assign [mem size 0x80000000] [ 0.134379] pci 0000:02:00.0: BAR 0: no space for [mem size 0x00100000] [ 0.134385] pci 0000:02:00.0: BAR 0: failed to assign [mem size 0x00100000] [ 0.134393] pci 0000:00:02.0: PCI bridge to [bus 02] [ 0.134406] pci 0000:03:00.0: BAR 2: no space for [mem size 0x80000000] [ 0.134413] pci 0000:03:00.0: BAR 2: failed to assign [mem size 0x80000000] [ 0.134420] pci 0000:03:00.0: BAR 0: no space for [mem size 0x00100000] [ 0.134426] pci 0000:03:00.0: BAR 0: failed to assign [mem size 0x00100000] [ 0.134433] pci 0000:00:03.0: PCI bridge to [bus 03]5.16.1:
[ 0.127673] mvebu-pcie soc:pcie: host bridge /soc/pcie ranges: [ 0.127717] mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000 [ 0.127737] mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000 [ 0.127753] mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000 [ 0.127768] mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000 [ 0.127783] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127798] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000 [ 0.127812] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127826] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000 [ 0.127839] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127853] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000 [ 0.127867] mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.127877] mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000 [ 0.128140] mvebu-pcie soc:pcie: PCI host bridge to bus 0000:00 [ 0.128157] pci_bus 0000:00: root bus resource [bus 00-ff] [ 0.128170] pci_bus 0000:00: root bus resource [mem 0xf1080000-0xf1081fff] (bus address [0x00080000-0x00081fff]) [ 0.128179] pci_bus 0000:00: root bus resource [mem 0xf1040000-0xf1041fff] (bus address [0x00040000-0x00041fff]) [ 0.128187] pci_bus 0000:00: root bus resource [mem 0xf1044000-0xf1045fff] (bus address [0x00044000-0x00045fff]) [ 0.128196] pci_bus 0000:00: root bus resource [mem 0xf1048000-0xf1049fff] (bus address [0x00048000-0x00049fff]) [ 0.128203] pci_bus 0000:00: root bus resource [mem 0xe0000000-0xe7ffffff] [ 0.128210] pci_bus 0000:00: root bus resource [io 0x1000-0xeffff] [ 0.128341] pci 0000:00:01.0: [11ab:6820] type 01 class 0x060400 [ 0.128362] pci 0000:00:01.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.128631] pci 0000:00:02.0: [11ab:6820] type 01 class 0x060400 [ 0.128655] pci 0000:00:02.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.128871] pci 0000:00:03.0: [11ab:6820] type 01 class 0x060400 [ 0.128893] pci 0000:00:03.0: reg 0x38: [mem 0x00000000-0x000007ff pref] [ 0.129975] pci 0000:00:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129989] pci 0000:00:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.129999] pci 0000:00:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring [ 0.131184] pci_bus 0000:01: busn_res: [bus 01-ff] end is updated to 01 [ 0.131344] pci 0000:02:00.0: [168c:003c] type 00 class 0x028000 [ 0.131375] pci 0000:02:00.0: reg 0x10: [mem 0x00000000-0x001fffff 64bit] [ 0.131408] pci 0000:02:00.0: reg 0x30: [mem 0x00000000-0x0000ffff pref] [ 0.131507] pci 0000:02:00.0: supports D1 [ 0.131515] pci 0000:02:00.0: PME# supported from D0 D1 D3hot [ 0.131734] pci 0000:00:02.0: ASPM: current common clock configuration is inconsistent, reconfiguring [ 0.131753] pci 0000:00:02.0: ASPM: Bridge does not support changing Link Speed to 2.5 GT/s [ 0.131759] pci 0000:00:02.0: ASPM: Retrain Link at higher speed is disallowed by quirk [ 0.131765] pci 0000:00:02.0: ASPM: Could not configure common clock [ 0.132832] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 02 [ 0.132993] pci 0000:03:00.0: [168c:002e] type 00 class 0x028000 [ 0.133027] pci 0000:03:00.0: reg 0x10: [mem 0x00000000-0x0000ffff 64bit] [ 0.133152] pci 0000:03:00.0: supports D1 [ 0.133161] pci 0000:03:00.0: PME# supported from D0 D1 D3hot [ 0.133396] pci 0000:00:03.0: ASPM: current common clock configuration is inconsistent, reconfiguring [ 0.133413] pci 0000:00:03.0: ASPM: Bridge does not support changing Link Speed to 2.5 GT/s [ 0.133421] pci 0000:00:03.0: ASPM: Retrain Link at higher speed is disallowed by quirk [ 0.133427] pci 0000:00:03.0: ASPM: Could not configure common clock [ 0.134545] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03 [ 0.134655] pci 0000:00:02.0: BAR 14: assigned [mem 0xe0000000-0xe02fffff] [ 0.134673] pci 0000:00:03.0: BAR 14: assigned [mem 0xe0300000-0xe03fffff] [ 0.134685] pci 0000:00:01.0: BAR 6: assigned [mem 0xe0400000-0xe04007ff pref] [ 0.134696] pci 0000:00:02.0: BAR 6: assigned [mem 0xe0500000-0xe05007ff pref] [ 0.134706] pci 0000:00:03.0: BAR 6: assigned [mem 0xe0600000-0xe06007ff pref] [ 0.134717] pci 0000:00:01.0: PCI bridge to [bus 01] [ 0.134737] pci 0000:02:00.0: BAR 0: assigned [mem 0xe0000000-0xe01fffff 64bit] [ 0.134755] pci 0000:02:00.0: BAR 6: assigned [mem 0xe0200000-0xe020ffff pref] [ 0.134764] pci 0000:00:02.0: PCI bridge to [bus 02] [ 0.134772] pci 0000:00:02.0: bridge window [mem 0xe0000000-0xe02fffff] [ 0.134784] pci 0000:03:00.0: BAR 0: assigned [mem 0xe0300000-0xe030ffff 64bit] [ 0.134798] pci 0000:00:03.0: PCI bridge to [bus 03] [ 0.134806] pci 0000:00:03.0: bridge window [mem 0xe0300000-0xe03fffff] [ 0.134997] pcieport 0000:00:02.0: enabling device (0140 -> 0142) [ 0.135084] pcieport 0000:00:03.0: enabling device (0140 -> 0142)Signature · 4 lines
You may reply to this email to add a comment. You are receiving this mail because: You are watching the assignee of the bug.
[+cc Lorenzo, beginning of thread:
https://lore.kernel.org/r/20220127234917.GA150851@bhelgaas]
Quoted 49 lines · Pali Rohár
Quoted 21 lines · On Thursday 03 February 2022 13:26:42 Pali Rohár wrote:
Quoted 20 lines · On Thursday 27 January 2022 17:49:17 Bjorn Helgaas wrote:
Quoted 19 lines · On Thu, Jan 27, 2022 at 10:52:43PM +0000, [email protected]…
https://bugzilla.kernel.org/show_bug.cgi?id=215540
Bug ID: 215540 Summary: mvebu: no pcie devices detected on turris omnia (5.16.3 regression) Product: Drivers Version: 2.5 Kernel Version: 5.16.3 Hardware: ARM OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: PCI Assignee: [email protected] Reporter: [email protected] Regression: NoQuoted 4 lines
Quoted 4 lines
Quoted 4 lines
After kernel upgrade from 5.16.1 to 5.16.3 Turris Omnia (Armada 385) no longer detects pcie devices (wifi/msata). Haven't tried 5.16.2 but it doesn't seem to have any relevant changes, while 5.16.3 carries a few.
I found another issue: Into stable tree was backported "modified" patch. I'm not sure it is is source of this issue but looks like it is related.
If you open mentioned problematic commit in web ui:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.16.y&id=7cde9bf0731688896831f90da9fe755f44a6d5e0And compare it with patch which is on "Link:" line from commit message:
https://lore.kernel.org/r/[email protected]You will see that diffs are different. In my original patch (which I sent to ML) is:
(quoted diff) +1
-0mvebu_pcie_setup_hw(port); mvebu_pcie_set_local_dev_nr(port, 1); + mvebu_pcie_set_local_bus_nr(port, 0);But in git web ui is:
(quoted diff) +1
-1mvebu_pcie_setup_hw(port); - mvebu_pcie_set_local_dev_nr(port, 1); + mvebu_pcie_set_local_dev_nr(port, 0);
Quoted 5 lines
I do not know how it could happen. But local **device** number must be always set to 1 (see comment above code for explanation) and default value of local **bus** number should be 0 (as is in my original patch).
So above patch in stable tree is broken.
I think current mainline is broken, too, isn't it? See below.
Quoted 9 lines
Bjorn & Greg: How do you want to handle this situation? Should I prepare special patch for stable which fix it? Or something else?
Anyway, do you know how it could happen that patch was incorrectly auto-backported into stable? Differences between original and wrongly-modified patch looks very similar (both "bus" and "dev" keywords have same number of characters) and it was hard for me to see that there are differences. So probably overlooking could happen or maybe git or patch tools could do such small changes when doing backports?
Your patch on the mailing list [1] contains:
mvebu_pcie_setup_hw(port);
mvebu_pcie_set_local_dev_nr(port, 1); + mvebu_pcie_set_local_bus_nr(port, 0);
91a8d79fc797 ("PCI: mvebu: Fix configuring secondary bus of PCIe Root Port via emulated bridge") [2] appeared in v5.17-rc1 and contains:
mvebu_pcie_setup_hw(port);
- mvebu_pcie_set_local_dev_nr(port, 1);
+ mvebu_pcie_set_local_dev_nr(port, 0);
And this is the current state of mainline [3].
91a8d79fc797 was backported to v5.16.3 as 7cde9bf07316 [4], which also contains:
mvebu_pcie_setup_hw(port);
- mvebu_pcie_set_local_dev_nr(port, 1);
+ mvebu_pcie_set_local_dev_nr(port, 0);
So I think the problem was a merge error when we first applied this for mainline, and we just need to make a patch for mainline, apply it for v5.17, and mark it for stable.
Bjorn
[1] https://lore.kernel.org/r/[email protected]
[2] https://git.kernel.org/linus/91a8d79fc797
[3] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/pci-mvebu.c?id=v5.17-rc2#n1323
[4] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.16.y&id=7cde9bf07316
Quoted 53 lines · On Thursday 03 February 2022 09:47:28 Bjorn Helgaas wrote:
[+cc Lorenzo, beginning of thread:
https://lore.kernel.org/r/20220127234917.GA150851@bhelgaas]Quoted 49 lines · Pali Rohár
Quoted 21 lines · On Thursday 03 February 2022 13:26:42 Pali Rohár wrote:
Quoted 20 lines · On Thursday 27 January 2022 17:49:17 Bjorn Helgaas wrote:
Quoted 19 lines · On Thu, Jan 27, 2022 at 10:52:43PM +0000, [email protected]…
https://bugzilla.kernel.org/show_bug.cgi?id=215540
Bug ID: 215540 Summary: mvebu: no pcie devices detected on turris omnia (5.16.3 regression) Product: Drivers Version: 2.5 Kernel Version: 5.16.3 Hardware: ARM OS: Linux Tree: Mainline Status: NEW Severity: normal Priority: P1 Component: PCI Assignee: [email protected] Reporter: [email protected] Regression: NoQuoted 4 lines
Quoted 4 lines
Quoted 4 lines
After kernel upgrade from 5.16.1 to 5.16.3 Turris Omnia (Armada 385) no longer detects pcie devices (wifi/msata). Haven't tried 5.16.2 but it doesn't seem to have any relevant changes, while 5.16.3 carries a few.
I found another issue: Into stable tree was backported "modified" patch. I'm not sure it is is source of this issue but looks like it is related.
If you open mentioned problematic commit in web ui:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.16.y&id=7cde9bf0731688896831f90da9fe755f44a6d5e0And compare it with patch which is on "Link:" line from commit message:
https://lore.kernel.org/r/[email protected]You will see that diffs are different. In my original patch (which I sent to ML) is:
(quoted diff) +1
-0mvebu_pcie_setup_hw(port); mvebu_pcie_set_local_dev_nr(port, 1); + mvebu_pcie_set_local_bus_nr(port, 0);But in git web ui is:
(quoted diff) +1
-1mvebu_pcie_setup_hw(port); - mvebu_pcie_set_local_dev_nr(port, 1); + mvebu_pcie_set_local_dev_nr(port, 0);
Quoted 7 lines
Quoted 5 lines
I do not know how it could happen. But local **device** number must be always set to 1 (see comment above code for explanation) and default value of local **bus** number should be 0 (as is in my original patch).
So above patch in stable tree is broken.
I think current mainline is broken, too, isn't it? See below.
I see, it is.
Quoted 28 lines
Quoted 9 lines
Bjorn & Greg: How do you want to handle this situation? Should I prepare special patch for stable which fix it? Or something else?
Anyway, do you know how it could happen that patch was incorrectly auto-backported into stable? Differences between original and wrongly-modified patch looks very similar (both "bus" and "dev" keywords have same number of characters) and it was hard for me to see that there are differences. So probably overlooking could happen or maybe git or patch tools could do such small changes when doing backports?
Your patch on the mailing list [1] contains:
mvebu_pcie_setup_hw(port); mvebu_pcie_set_local_dev_nr(port, 1);+
mvebu_pcie_set_local_bus_nr(port, 0);
91a8d79fc797("PCI: mvebu: Fix configuring secondary bus of PCIe Root Port via emulated bridge") [2] appeared in v5.17-rc1 and contains:mvebu_pcie_setup_hw(port);-
mvebu_pcie_set_local_dev_nr(port, 1);
+mvebu_pcie_set_local_dev_nr(port, 0);And this is the current state of mainline [3].
91a8d79fc797was backported to v5.16.3 as7cde9bf07316[4], which also contains:
Quoted 7 lines
mvebu_pcie_setup_hw(port);-
mvebu_pcie_set_local_dev_nr(port, 1);
+mvebu_pcie_set_local_dev_nr(port, 0);So I think the problem was a merge error when we first applied this for mainline, and we just need to make a patch for mainline, apply it for v5.17, and mark it for stable.
Should I prepare and send fixup patch?
Quoted 6 lines
Bjorn
[1] https://lore.kernel.org/r/[email protected]
[2] https://git.kernel.org/linus/91a8d79fc797
[3] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/pci-mvebu.c?id=v5.17-rc2#n1323
[4] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.16.y&id=7cde9bf07316
Quoted 37 lines · Pali Rohár
Quoted 36 lines · On Thursday 03 February 2022 09:47:28 Bjorn Helgaas wrote:
[+cc Lorenzo, beginning of thread:
https://lore.kernel.org/r/20220127234917.GA150851@bhelgaas]Quoted 9 lines · Pali Rohár
Bjorn & Greg: How do you want to handle this situation? Should I prepare special patch for stable which fix it? Or something else?
Anyway, do you know how it could happen that patch was incorrectly auto-backported into stable? Differences between original and wrongly-modified patch looks very similar (both "bus" and "dev" keywords have same number of characters) and it was hard for me to see that there are differences. So probably overlooking could happen or maybe git or patch tools could do such small changes when doing backports?
Your patch on the mailing list [1] contains:
mvebu_pcie_setup_hw(port); mvebu_pcie_set_local_dev_nr(port, 1);+
mvebu_pcie_set_local_bus_nr(port, 0);
91a8d79fc797("PCI: mvebu: Fix configuring secondary bus of PCIe Root Port via emulated bridge") [2] appeared in v5.17-rc1 and contains:mvebu_pcie_setup_hw(port);-
mvebu_pcie_set_local_dev_nr(port, 1);
+mvebu_pcie_set_local_dev_nr(port, 0);And this is the current state of mainline [3].
91a8d79fc797was backported to v5.16.3 as7cde9bf07316[4], which also contains:mvebu_pcie_setup_hw(port);-
mvebu_pcie_set_local_dev_nr(port, 1);
+mvebu_pcie_set_local_dev_nr(port, 0);
Quoted 5 lines
Quoted 3 lines
So I think the problem was a merge error when we first applied this for mainline, and we just need to make a patch for mainline, apply it for v5.17, and mark it for stable.
Should I prepare and send fixup patch?
Yes, please. Sorry for the inconvenience!
Quoted 4 lines
Quoted 4 lines
[1] https://lore.kernel.org/r/[email protected]
[2] https://git.kernel.org/linus/91a8d79fc797
[3] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/pci-mvebu.c?id=v5.17-rc2#n1323
[4] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.16.y&id=7cde9bf07316
Quoted 38 lines · On Friday 11 February 2022 13:57:44 Bjorn Helgaas wrote:
Quoted 37 lines · Pali Rohár
Quoted 36 lines · On Thursday 03 February 2022 09:47:28 Bjorn Helgaas wrote:
[+cc Lorenzo, beginning of thread:
https://lore.kernel.org/r/20220127234917.GA150851@bhelgaas]Quoted 9 lines · Pali Rohár
Bjorn & Greg: How do you want to handle this situation? Should I prepare special patch for stable which fix it? Or something else?
Anyway, do you know how it could happen that patch was incorrectly auto-backported into stable? Differences between original and wrongly-modified patch looks very similar (both "bus" and "dev" keywords have same number of characters) and it was hard for me to see that there are differences. So probably overlooking could happen or maybe git or patch tools could do such small changes when doing backports?
Your patch on the mailing list [1] contains:
mvebu_pcie_setup_hw(port); mvebu_pcie_set_local_dev_nr(port, 1);+
mvebu_pcie_set_local_bus_nr(port, 0);
91a8d79fc797("PCI: mvebu: Fix configuring secondary bus of PCIe Root Port via emulated bridge") [2] appeared in v5.17-rc1 and contains:mvebu_pcie_setup_hw(port);-
mvebu_pcie_set_local_dev_nr(port, 1);
+mvebu_pcie_set_local_dev_nr(port, 0);And this is the current state of mainline [3].
91a8d79fc797was backported to v5.16.3 as7cde9bf07316[4], which also contains:mvebu_pcie_setup_hw(port);-
mvebu_pcie_set_local_dev_nr(port, 1);
+mvebu_pcie_set_local_dev_nr(port, 0);
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So I think the problem was a merge error when we first applied this for mainline, and we just need to make a patch for mainline, apply it for v5.17, and mark it for stable.
Should I prepare and send fixup patch?
Yes, please. Sorry for the inconvenience!
Done!
https://lore.kernel.org/linux-pci/[email protected]/
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[1] https://lore.kernel.org/r/[email protected]
[2] https://git.kernel.org/linus/91a8d79fc797
[3] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/pci-mvebu.c?id=v5.17-rc2#n1323
[4] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.16.y&id=7cde9bf07316