KVM/arm64 fixes for 5.17, take #2
Marc Zyngier
maintainerPaolo,
Here's a handful of fixes for -rc3, all courtesy of James Morse.
Please pull,
M.
The following changes since commit 26291c54e111ff6ba87a164d85d4a4e134b7315c:
Linux 5.17-rc2 (2022-01-30 15:37:07 +0200)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git tags/kvmarm-fixes-5.17-2
for you to fetch changes up to 1dd498e5e26ad71e3e9130daf72cfb6a693fee03:
KVM: arm64: Workaround Cortex-A510's single-step and PAC trap errata (2022-02-03 09:22:30 +0000)
----------------------------------------------------------------
KVM/arm64 fixes for 5.17, take #2
- A couple of fixes when handling an exception while a SError has been delivered
- Workaround for Cortex-A510's single-step[ erratum
----------------------------------------------------------------
James Morse (3):
KVM: arm64: Avoid consuming a stale esr value when SError occur
KVM: arm64: Stop handle_exit() from handling HVC twice when an SError occurs
KVM: arm64: Workaround Cortex-A510's single-step and PAC trap errata
Documentation/arm64/silicon-errata.rst | 2 ++ arch/arm64/Kconfig | 16 ++++++++++++++++ arch/arm64/kernel/cpu_errata.c | 8 ++++++++ arch/arm64/kvm/handle_exit.c | 8 ++++++++ arch/arm64/kvm/hyp/include/hyp/switch.h | 23 +++++++++++++++++++++-- arch/arm64/tools/cpucaps | 5 +++-- 6 files changed, 58 insertions(+), 4 deletions(-)
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Paolo Bonzini
maintainerQuoted 34 lines · Marc Zyngier
Paolo,
Here's a handful of fixes for -rc3, all courtesy of James Morse.
Please pull,
M.The following changes since commit
26291c54e111ff6ba87a164d85d4a4e134b7315c:Linux 5.17-rc2 (2022-01-30 15:37:07 +0200)are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.gittags/kvmarm-fixes-5.17-2for you to fetch changes up to
1dd498e5e26ad71e3e9130daf72cfb6a693fee03:KVM: arm64: Workaround Cortex-A510's single-step and PAC trap errata (2022-02-03 09:22:30 +0000)----------------------------------------------------------------
KVM/arm64 fixes for 5.17, take #2- A couple of fixes when handling an exception while a SError has been delivered
- Workaround for Cortex-A510's single-step[ erratum
----------------------------------------------------------------
James Morse (3):
KVM: arm64: Avoid consuming a stale esr value when SError occur
KVM: arm64: Stophandle_exit()from handling HVC twice when an SError occurs
KVM: arm64: Workaround Cortex-A510's single-step and PAC trap errata
Quoted 8 lines
Documentation/arm64/silicon-errata.rst | 2 ++ arch/arm64/Kconfig | 16 ++++++++++++++++ arch/arm64/kernel/cpu_errata.c | 8 ++++++++ arch/arm64/kvm/handle_exit.c | 8 ++++++++ arch/arm64/kvm/hyp/include/hyp/switch.h | 23 +++++++++++++++++++++-- arch/arm64/tools/cpucaps | 5 +++-- 6 files changed, 58 insertions(+), 4 deletions(-)
Pulled, thanks (and sent already the pull request to Linus).
Paolo