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Add sata nodes to rk356x

PATCH Applied Frank Wunderlich 5 participants 17 messages Mar 1, 2022 – Mar 5, 2022

Subsystems (4)
Device tree bindings libata Arm Rockchip Broadcom iproc Arm architecture

v4 of 6 Applied Latest is v6 →

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Frank Wunderlich

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#0 lore raw

v4 cover Add sata nodes to rk356x

From: Frank Wunderlich <[email protected]>

This Series converts the binding for ahci-platform to yaml and adds sata nodes to rockchip rk356x device trees.

v4:
YAML binding:
- fix min vs. max
- fix indention of examples
- move up sata-common.yaml
- reorder compatible
- add descriptions/maxitems
- fix compatible-structure
- fix typo in example achi vs. ahci
- add clock-names and reg-names
DTS-Patches:
- drop newline in dts
- re-add clock-names
- add soc specific compatible
- fix sata nodename in arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi
v3:
- add conversion to sata-series
- fix some errors in dt_binding_check and dtbs_check
- move to unevaluated properties = false
- add power-domain to yaml
- move sata0 to rk3568.dtsi
- drop clock-names and interrupt-names

Frank Wunderlich (5):
dt-bindings: Convert ahci-platform DT bindings to yaml
arm64: dts: broadcom: Fix sata nodename
dt-bindings: Add power-domains property to ahci-platform
dt-bindings: Add rk3568-dwc3-ahci compatible
arm64: dts: rockchip: Add sata nodes to rk356x

 .../devicetree/bindings/ata/ahci-platform.txt |  79 --------
 .../bindings/ata/ahci-platform.yaml           | 169 ++++++++++++++++++
 .../boot/dts/broadcom/northstar2/ns2.dtsi     |   2 +-
 arch/arm64/boot/dts/rockchip/rk3568.dtsi      |  14 ++
 arch/arm64/boot/dts/rockchip/rk356x.dtsi      |  28 +++
 5 files changed, 212 insertions(+), 80 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt
 create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml
Signature · 1 line
2.25.1
author
#1 lore raw

PATCH v4 1/5 dt-bindings: Convert ahci-platform DT bindings to yaml

From: Frank Wunderlich <[email protected]>

Create a yaml file for dtbs_check from the old txt binding.

Signed-off-by Frank Wunderlich <[email protected]>

---
v4:
- fix min vs. max
- fix indention of examples
- move up sata-common.yaml
- reorder compatible
- add descriptions/maxitems
- fix compatible-structure
- fix typo in example achi vs. ahci
- add clock-names and reg-names
- fix ns2 errors in separate patch
v3:
- add conversion to sata-series
- fix some errors in dt_binding_check and dtbs_check
- move to unevaluated properties = false

---

imho all errors should be fixed in the dts not in the yaml...

errors about the subitem requirement that was defined in txt but not fixed some marvell dts

some dts for Marvell SoC bring error
'phys' is a required property
'target-supply' is a required property

problem is in arch/arm64/boot/dts/marvell/armada-cp11x.dtsi:331
here the sata-port@0 is defined, but not overridden with phy/target-supply in any following dts

---
 .../devicetree/bindings/ata/ahci-platform.txt |  79 ---------
 .../bindings/ata/ahci-platform.yaml           | 162 ++++++++++++++++++
 2 files changed, 162 insertions(+), 79 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt
 create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml
Documentation/devicetree/bindings/ata/ahci-platform.txt deleted +0 -79
deleted file mode 100644
index 77091a277642..000000000000
@@ -1,79 +0,0 @@
-* AHCI SATA Controller
-
-SATA nodes are defined to describe on-chip Serial ATA controllers.
-Each SATA controller should have its own node.
-
-It is possible, but not required, to represent each port as a sub-node.
-It allows to enable each port independently when dealing with multiple
-PHYs.
-
-Required properties:
-- compatible        : compatible string, one of:
-  - "brcm,iproc-ahci"
-  - "hisilicon,hisi-ahci"
-  - "cavium,octeon-7130-ahci"
-  - "ibm,476gtr-ahci"
-  - "marvell,armada-380-ahci"
-  - "marvell,armada-3700-ahci"
-  - "snps,dwc-ahci"
-  - "snps,spear-ahci"
-  - "generic-ahci"
-- interrupts        : <interrupt mapping for SATA IRQ>
-- reg               : <registers mapping>
-
-Please note that when using "generic-ahci" you must also specify a SoC specific
-compatible:
-	compatible = "manufacturer,soc-model-ahci", "generic-ahci";
-
-Optional properties:
-- dma-coherent      : Present if dma operations are coherent
-- clocks            : a list of phandle + clock specifier pairs
-- resets            : a list of phandle + reset specifier pairs
-- target-supply     : regulator for SATA target power
-- phy-supply        : regulator for PHY power
-- phys              : reference to the SATA PHY node
-- phy-names         : must be "sata-phy"
-- ahci-supply       : regulator for AHCI controller
-- ports-implemented : Mask that indicates which ports that the HBA supports
-		      are available for software to use. Useful if PORTS_IMPL
-		      is not programmed by the BIOS, which is true with
-		      some embedded SOC's.
-
-Required properties when using sub-nodes:
-- #address-cells    : number of cells to encode an address
-- #size-cells       : number of cells representing the size of an address
-
-Sub-nodes required properties:
-- reg		    : the port number
-And at least one of the following properties:
-- phys		    : reference to the SATA PHY node
-- target-supply     : regulator for SATA target power
-
-Examples:
-        sata@ffe08000 {
-		compatible = "snps,spear-ahci";
-		reg = <0xffe08000 0x1000>;
-		interrupts = <115>;
-        };
-
-With sub-nodes:
-	sata@f7e90000 {
-		compatible = "marvell,berlin2q-achi", "generic-ahci";
-		reg = <0xe90000 0x1000>;
-		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&chip CLKID_SATA>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		sata0: sata-port@0 {
-			reg = <0>;
-			phys = <&sata_phy 0>;
-			target-supply = <&reg_sata0>;
-		};
-
-		sata1: sata-port@1 {
-			reg = <1>;
-			phys = <&sata_phy 1>;
-			target-supply = <&reg_sata1>;;
-		};
-	};
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +162 -0

162 lines not on this page · raw message

Signature · 1 line
2.25.1
#2 lore raw

Re: [PATCH v4 1/5] dt-bindings: Convert ahci-platform DT bindings to yaml

Quoted 154 lines · Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Create a yaml file for dtbs_check from the old txt binding.

Signed-off-by Frank Wunderlich <[email protected]>

---
v4:
- fix min vs. max
- fix indention of examples
- move up sata-common.yaml
- reorder compatible
- add descriptions/maxitems
- fix compatible-structure
- fix typo in example achi vs. ahci
- add clock-names and reg-names
- fix ns2 errors in separate patch
v3:
- add conversion to sata-series
- fix some errors in dt_binding_check and dtbs_check
- move to unevaluated properties = false

---

imho all errors should be fixed in the dts not in the yaml...

errors about the subitem requirement that was defined in txt but not fixed some marvell dts

some dts for Marvell SoC bring error
'phys' is a required property
'target-supply' is a required property

problem is in arch/arm64/boot/dts/marvell/armada-cp11x.dtsi:331
here the sata-port@0 is defined, but not overridden with phy/target-supply in any following dts

---
 .../devicetree/bindings/ata/ahci-platform.txt |  79 ---------
 .../bindings/ata/ahci-platform.yaml           | 162 ++++++++++++++++++
 2 files changed, 162 insertions(+), 79 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt
 create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml
Documentation/devicetree/bindings/ata/ahci-platform.txt deleted +0 -79
deleted file mode 100644
index 77091a277642..000000000000
@@ -1,79 +0,0 @@
-* AHCI SATA Controller
-
-SATA nodes are defined to describe on-chip Serial ATA controllers.
-Each SATA controller should have its own node.
-
-It is possible, but not required, to represent each port as a sub-node.
-It allows to enable each port independently when dealing with multiple
-PHYs.
-
-Required properties:
-- compatible        : compatible string, one of:
-  - "brcm,iproc-ahci"
-  - "hisilicon,hisi-ahci"
-  - "cavium,octeon-7130-ahci"
-  - "ibm,476gtr-ahci"
-  - "marvell,armada-380-ahci"
-  - "marvell,armada-3700-ahci"
-  - "snps,dwc-ahci"
-  - "snps,spear-ahci"
-  - "generic-ahci"
-- interrupts        : <interrupt mapping for SATA IRQ>
-- reg               : <registers mapping>
-
-Please note that when using "generic-ahci" you must also specify a SoC specific
-compatible:
-	compatible = "manufacturer,soc-model-ahci", "generic-ahci";
-
-Optional properties:
-- dma-coherent      : Present if dma operations are coherent
-- clocks            : a list of phandle + clock specifier pairs
-- resets            : a list of phandle + reset specifier pairs
-- target-supply     : regulator for SATA target power
-- phy-supply        : regulator for PHY power
-- phys              : reference to the SATA PHY node
-- phy-names         : must be "sata-phy"
-- ahci-supply       : regulator for AHCI controller
-- ports-implemented : Mask that indicates which ports that the HBA supports
-		      are available for software to use. Useful if PORTS_IMPL
-		      is not programmed by the BIOS, which is true with
-		      some embedded SOC's.
-
-Required properties when using sub-nodes:
-- #address-cells    : number of cells to encode an address
-- #size-cells       : number of cells representing the size of an address
-
-Sub-nodes required properties:
-- reg		    : the port number
-And at least one of the following properties:
-- phys		    : reference to the SATA PHY node
-- target-supply     : regulator for SATA target power
-
-Examples:
-        sata@ffe08000 {
-		compatible = "snps,spear-ahci";
-		reg = <0xffe08000 0x1000>;
-		interrupts = <115>;
-        };
-
-With sub-nodes:
-	sata@f7e90000 {
-		compatible = "marvell,berlin2q-achi", "generic-ahci";
-		reg = <0xe90000 0x1000>;
-		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&chip CLKID_SATA>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		sata0: sata-port@0 {
-			reg = <0>;
-			phys = <&sata_phy 0>;
-			target-supply = <&reg_sata0>;
-		};
-
-		sata1: sata-port@1 {
-			reg = <1>;
-			phys = <&sata_phy 1>;
-			target-supply = <&reg_sata1>;;
-		};
-	};
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +23 -0
new file mode 100644
index 000000000000..cf67ddfc6afb
@@ -0,0 +1,162 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: AHCI SATA Controller
+description:
+  SATA nodes are defined to describe on-chip Serial ATA controllers.
+  Each SATA controller should have its own node.
+
+  It is possible, but not required, to represent each port as a sub-node.
+  It allows to enable each port independently when dealing with multiple
+  PHYs.
+
+maintainers:
+  - Hans de Goede <[email protected]>
+  - Jens Axboe <[email protected]>
+
+allOf:
+- $ref: "sata-common.yaml#"
+
+properties:

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 33

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+  compatible:
+    oneOf:
+      - items:
+        - enum:
+          - brcm,iproc-ahci
+          - marvell,armada-8k-ahci
+          - marvell,berlin2q-ahci
+        - const: generic-ahci
+      - enum:
+        - brcm,iproc-ahci

This one is already earlier in generic-ahci, so you can skip him here.

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+        - cavium,octeon-7130-ahci
+        - hisilicon,hisi-ahci
+        - ibm,476gtr-ahci
+        - marvell,armada-3700-ahci
+        - marvell,armada-380-ahci
+        - snps,dwc-ahci
+        - snps,spear-ahci
+
+  reg:
+    maxItems: 1

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 53

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+
+  clocks:
+    description:
+      Clock IDs array as required by the controller.
+    minItems: 1
+    maxItems: 3
+
+  interrupts:
+    description:
+      specifies the interrupt number for the controller.

Skip description, it's obvious.

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 64

Quoted 11 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +11 -0
+    maxItems: 1
+
+  ahci-supply:
+    description:
+      regulator for AHCI controller
+
+  clock-names:
+    description:
+      Names of clocks corresponding to IDs in the clock property.
+    minItems: 1
+    maxItems: 3

Put the clock-names next to clocks.

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 67

Quoted 3 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +3 -0
+
+  dma-coherent:
+    true

New line not needed. "dma-coherent: true"

Quoted 13 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +13 -0
+
+  phy-supply:
+    description:
+      regulator for PHY power
+
+  phys:
+    description:
+      List of all PHYs on this controller
+    maxItems: 1
+
+  phy-names:
+    description:
+      Name specifier for the PHYs

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 90

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+    maxItems: 1
+
+  ports-implemented:
+    $ref: '/schemas/types.yaml#/definitions/uint32'
+    description:
+      Mask that indicates which ports that the HBA supports
+      are available for software to use. Useful if PORTS_IMPL
+      is not programmed by the BIOS, which is true with
+      some embedded SoCs.
+    maxItems: 1

maxItems are incorrect here, this is not an array.

Quoted 18 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +18 -0
+
+  reg-names:
+    maxItems: 1
+
+  resets:
+    maxItems: 1
+
+  target-supply:
+    description:
+      regulator for SATA target power
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+patternProperties:
+  "^sata-port@[0-9a-f]+$":

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 118

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+    type: object
+    description:
+      Subnode with configuration of the Ports.
+
+    properties:
+      reg:
+        maxItems: 1
+
+      phys:
+        minItems: 1

maxItems: 1

Quoted 17 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +17 -0
+
+      target-supply:
+        description:
+          regulator for SATA target power
+
+    required:
+      - reg
+
+    anyOf:
+      - required: [ phys ]
+      - required: [ target-supply ]
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    sata@ffe08000 {

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 145

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+           compatible = "snps,spear-ahci";
+           reg = <0xffe08000 0x1000>;
+           interrupts = <115>;
+    };
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/berlin2q.h>
+    sata@f7e90000 {
+            compatible = "marvell,berlin2q-ahci", "generic-ahci";
+            reg = <0xe90000 0x1000>;

You still have wrong address.

Quoted 7 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +7 -0
+            interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+            clocks = <&chip CLKID_SATA>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            sata0: sata-port@0 {
+                    reg = <0>;

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 162

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+                    phys = <&sata_phy 0>;
+                    target-supply = <&reg_sata0>;
+            };
+
+            sata1: sata-port@1 {
+                    reg = <1>;
+                    phys = <&sata_phy 1>;
+                    target-supply = <&reg_sata1>;
+            };
+    };

Best regards,
Krzysztof

#3 lore raw

Aw: Re: [PATCH v4 1/5] dt-bindings: Convert ahci-platform DT bindings to yaml

Hi

Quoted 18 lines

Gesendet: Mittwoch, 02. März 2022 um 10:46 Uhr
Von: "Krzysztof Kozlowski" <[email protected]>

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 33

Quoted 13 lines · Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +11 -0
+properties:
+  compatible:
+    oneOf:
+      - items:
+        - enum:
+          - brcm,iproc-ahci
+          - marvell,armada-8k-ahci
+          - marvell,berlin2q-ahci
+        - const: generic-ahci
+      - enum:
+        - brcm,iproc-ahci
Quoted 1 line

This one is already earlier in generic-ahci, so you can skip him here.

OK, i drop it

Quoted 14 lines
Quoted 14 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +14 -0
+        - cavium,octeon-7130-ahci
+        - hisilicon,hisi-ahci
+        - ibm,476gtr-ahci
+        - marvell,armada-3700-ahci
+        - marvell,armada-380-ahci
+        - snps,dwc-ahci
+        - snps,spear-ahci
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description:
+      Clock IDs array as required by the controller.
Quoted 8 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 53

Quoted 6 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +6 -0
+    minItems: 1
+    maxItems: 3
+
+  interrupts:
+    description:
+      specifies the interrupt number for the controller.

Skip description, it's obvious.

OK

Quoted 5 lines
Quoted 5 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +5 -0
+    maxItems: 1
+
+  ahci-supply:
+    description:
+      regulator for AHCI controller
Quoted 8 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 64

Quoted 6 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +6 -0
+
+  clock-names:
+    description:
+      Names of clocks corresponding to IDs in the clock property.
+    minItems: 1
+    maxItems: 3

Put the clock-names next to clocks.

had moved them down as they are optional, but ok, i move up

Quoted 5 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 67

Quoted 3 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +3 -0
+
+  dma-coherent:
+    true

New line not needed. "dma-coherent: true"

OK

Quoted 10 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 90

Quoted 8 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +8 -0
+  ports-implemented:
+    $ref: '/schemas/types.yaml#/definitions/uint32'
+    description:
+      Mask that indicates which ports that the HBA supports
+      are available for software to use. Useful if PORTS_IMPL
+      is not programmed by the BIOS, which is true with
+      some embedded SoCs.
+    maxItems: 1

maxItems are incorrect here, this is not an array.

right, i'll change it

Quoted 6 lines
Quoted 6 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +6 -0
+patternProperties:
+  "^sata-port@[0-9a-f]+$":
+    type: object
+    description:
+      Subnode with configuration of the Ports.
+
Quoted 8 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 118

Quoted 6 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +6 -0
+    properties:
+      reg:
+        maxItems: 1
+
+      phys:
+        minItems: 1

maxItems: 1

oh, missed that

Quoted 7 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 145

Quoted 5 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +5 -0
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/berlin2q.h>
+    sata@f7e90000 {
+            compatible = "marvell,berlin2q-ahci", "generic-ahci";
+            reg = <0xe90000 0x1000>;

You still have wrong address.

only took the example from the txt, but i guess reg should be <0xf7e90000 0x1000>; ?

will also fix all subjects to

"dt-bindings: ata: ahci-platform: ..."

Thanks

_______________________________________________
Linux-rockchip mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-rockchip

#4 lore raw

Re: Aw: Re: [PATCH v4 1/5] dt-bindings: Convert ahci-platform DT bindings to yaml

Quoted 11 lines · Frank Wunderlich
Quoted 8 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 145

Quoted 6 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +5 -0
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/berlin2q.h>
+    sata@f7e90000 {
+            compatible = "marvell,berlin2q-ahci", "generic-ahci";
+            reg = <0xe90000 0x1000>;

You still have wrong address.

only took the example from the txt, but i guess reg should be <0xf7e90000 0x1000>; ?

Yes.

Best regards,
Krzysztof

maintainer
#5 lore raw

Re: [PATCH v4 1/5] dt-bindings: Convert ahci-platform DT bindings to yaml

In reply to Frank Wunderlich
Quoted 131 lines · Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Create a yaml file for dtbs_check from the old txt binding.

Signed-off-by Frank Wunderlich <[email protected]>

---
v4:
- fix min vs. max
- fix indention of examples
- move up sata-common.yaml
- reorder compatible
- add descriptions/maxitems
- fix compatible-structure
- fix typo in example achi vs. ahci
- add clock-names and reg-names
- fix ns2 errors in separate patch
v3:
- add conversion to sata-series
- fix some errors in dt_binding_check and dtbs_check
- move to unevaluated properties = false

---

imho all errors should be fixed in the dts not in the yaml...

errors about the subitem requirement that was defined in txt but not fixed some marvell dts

some dts for Marvell SoC bring error
'phys' is a required property
'target-supply' is a required property

problem is in arch/arm64/boot/dts/marvell/armada-cp11x.dtsi:331
here the sata-port@0 is defined, but not overridden with phy/target-supply in any following dts

---
 .../devicetree/bindings/ata/ahci-platform.txt |  79 ---------
 .../bindings/ata/ahci-platform.yaml           | 162 ++++++++++++++++++
 2 files changed, 162 insertions(+), 79 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.txt
 create mode 100644 Documentation/devicetree/bindings/ata/ahci-platform.yaml
Documentation/devicetree/bindings/ata/ahci-platform.txt deleted +0 -79
deleted file mode 100644
index 77091a277642..000000000000
@@ -1,79 +0,0 @@
-* AHCI SATA Controller
-
-SATA nodes are defined to describe on-chip Serial ATA controllers.
-Each SATA controller should have its own node.
-
-It is possible, but not required, to represent each port as a sub-node.
-It allows to enable each port independently when dealing with multiple
-PHYs.
-
-Required properties:
-- compatible        : compatible string, one of:
-  - "brcm,iproc-ahci"
-  - "hisilicon,hisi-ahci"
-  - "cavium,octeon-7130-ahci"
-  - "ibm,476gtr-ahci"
-  - "marvell,armada-380-ahci"
-  - "marvell,armada-3700-ahci"
-  - "snps,dwc-ahci"
-  - "snps,spear-ahci"
-  - "generic-ahci"
-- interrupts        : <interrupt mapping for SATA IRQ>
-- reg               : <registers mapping>
-
-Please note that when using "generic-ahci" you must also specify a SoC specific
-compatible:
-	compatible = "manufacturer,soc-model-ahci", "generic-ahci";
-
-Optional properties:
-- dma-coherent      : Present if dma operations are coherent
-- clocks            : a list of phandle + clock specifier pairs
-- resets            : a list of phandle + reset specifier pairs
-- target-supply     : regulator for SATA target power
-- phy-supply        : regulator for PHY power
-- phys              : reference to the SATA PHY node
-- phy-names         : must be "sata-phy"
-- ahci-supply       : regulator for AHCI controller
-- ports-implemented : Mask that indicates which ports that the HBA supports
-		      are available for software to use. Useful if PORTS_IMPL
-		      is not programmed by the BIOS, which is true with
-		      some embedded SOC's.
-
-Required properties when using sub-nodes:
-- #address-cells    : number of cells to encode an address
-- #size-cells       : number of cells representing the size of an address
-
-Sub-nodes required properties:
-- reg		    : the port number
-And at least one of the following properties:
-- phys		    : reference to the SATA PHY node
-- target-supply     : regulator for SATA target power
-
-Examples:
-        sata@ffe08000 {
-		compatible = "snps,spear-ahci";
-		reg = <0xffe08000 0x1000>;
-		interrupts = <115>;
-        };
-
-With sub-nodes:
-	sata@f7e90000 {
-		compatible = "marvell,berlin2q-achi", "generic-ahci";
-		reg = <0xe90000 0x1000>;
-		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&chip CLKID_SATA>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		sata0: sata-port@0 {
-			reg = <0>;
-			phys = <&sata_phy 0>;
-			target-supply = <&reg_sata0>;
-		};
-
-		sata1: sata-port@1 {
-			reg = <1>;
-			phys = <&sata_phy 1>;
-			target-supply = <&reg_sata1>;;
-		};
-	};
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +0 -0
new file mode 100644
index 000000000000..cf67ddfc6afb

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 7

Quoted 7 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +7 -0
@@ -0,0 +1,162 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: AHCI SATA Controller

blank line.

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 14

Quoted 7 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +7 -0
+description:
+  SATA nodes are defined to describe on-chip Serial ATA controllers.
+  Each SATA controller should have its own node.
+
+  It is possible, but not required, to represent each port as a sub-node.
+  It allows to enable each port independently when dealing with multiple
+  PHYs.

You need a '|' after 'description' if you want to maintain the paragraphs.

Quoted 16 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +16 -0
+
+maintainers:
+  - Hans de Goede <[email protected]>
+  - Jens Axboe <[email protected]>
+
+allOf:
+- $ref: "sata-common.yaml#"
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+        - enum:
+          - brcm,iproc-ahci
+          - marvell,armada-8k-ahci
+          - marvell,berlin2q-ahci

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 40

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+        - const: generic-ahci
+      - enum:
+        - brcm,iproc-ahci
+        - cavium,octeon-7130-ahci
+        - hisilicon,hisi-ahci
+        - ibm,476gtr-ahci
+        - marvell,armada-3700-ahci
+        - marvell,armada-380-ahci
+        - snps,dwc-ahci
+        - snps,spear-ahci

Install yamllint and run 'make dt_binding_check'. It's going to complain about the indentation.

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description:
+      Clock IDs array as required by the controller.
+    minItems: 1
+    maxItems: 3
+

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 60

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+  interrupts:
+    description:
+      specifies the interrupt number for the controller.
+    maxItems: 1
+
+  ahci-supply:
+    description:
+      regulator for AHCI controller
+
+  clock-names:

Group with 'clocks'

Quoted 20 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +20 -0
+    description:
+      Names of clocks corresponding to IDs in the clock property.
+    minItems: 1
+    maxItems: 3
+
+  dma-coherent:
+    true
+
+  phy-supply:
+    description:
+      regulator for PHY power
+
+  phys:
+    description:
+      List of all PHYs on this controller
+    maxItems: 1
+
+  phy-names:
+    description:
+      Name specifier for the PHYs

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 90

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+    maxItems: 1
+
+  ports-implemented:
+    $ref: '/schemas/types.yaml#/definitions/uint32'
+    description:
+      Mask that indicates which ports that the HBA supports
+      are available for software to use. Useful if PORTS_IMPL
+      is not programmed by the BIOS, which is true with
+      some embedded SoCs.
+    maxItems: 1

A uint32 is only ever 1 item. Drop.

IIRC, isn't the max here 0xff? Add constraints.

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 93

Quoted 3 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +3 -0
+
+  reg-names:
+    maxItems: 1

Group with 'reg'.

Quoted 6 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +6 -0
+
+  resets:
+    maxItems: 1
+
+  target-supply:
+    description:

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 109

Quoted 10 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +10 -0
+      regulator for SATA target power
+
+required:
+  - compatible
+  - reg
+  - interrupts
+
+patternProperties:
+  "^sata-port@[0-9a-f]+$":
+    type: object

additionalProperties: false

Quoted 61 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +53 -0
+    description:
+      Subnode with configuration of the Ports.
+
+    properties:
+      reg:
+        maxItems: 1
+
+      phys:
+        minItems: 1
+
+      target-supply:
+        description:
+          regulator for SATA target power
+
+    required:
+      - reg
+
+    anyOf:
+      - required: [ phys ]
+      - required: [ target-supply ]
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    sata@ffe08000 {
+           compatible = "snps,spear-ahci";
+           reg = <0xffe08000 0x1000>;
+           interrupts = <115>;
+    };
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/clock/berlin2q.h>
+    sata@f7e90000 {
+            compatible = "marvell,berlin2q-ahci", "generic-ahci";
+            reg = <0xe90000 0x1000>;
+            interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+            clocks = <&chip CLKID_SATA>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            sata0: sata-port@0 {
+                    reg = <0>;
+                    phys = <&sata_phy 0>;
+                    target-supply = <&reg_sata0>;
+            };
+
+            sata1: sata-port@1 {
+                    reg = <1>;
+                    phys = <&sata_phy 1>;
+                    target-supply = <&reg_sata1>;
+            };
+    };
Signature · 7 lines
2.25.1


_______________________________________________
linux-arm-kernel mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
#6 lore raw

Aw: Re: [PATCH v4 1/5] dt-bindings: Convert ahci-platform DT bindings to yaml

Hi Rob,

thanks for review,

have prepared the changes based on yours and krzysztof comments

https://github.com/frank-w/BPI-R2-4.14/commits/5.17-next-20220225

(just ignore the top 2 commits) i thought i had a size-cells-error, but did not get them again after reverting this part, seems they are fixed by inclusion of the sata-common binding

Quoted 7 lines

Gesendet: Mittwoch, 02. März 2022 um 19:14 Uhr
Von: "Rob Herring" <[email protected]>
An: "Frank Wunderlich" <[email protected]>

Quoted 1 line · Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Quoted 15 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 7

Quoted 13 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +7 -0
new file mode 100644
index 000000000000..cf67ddfc6afb
@@ -0,0 +1,162 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: AHCI SATA Controller

blank line.

done

Quoted 10 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 14

Quoted 7 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +7 -0
+description:
+  SATA nodes are defined to describe on-chip Serial ATA controllers.
+  Each SATA controller should have its own node.
+
+  It is possible, but not required, to represent each port as a sub-node.
+  It allows to enable each port independently when dealing with multiple
+  PHYs.

You need a '|' after 'description' if you want to maintain the paragraphs.

ok added | to all multiline descriptions

Quoted 21 lines
Quoted 21 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +21 -0
+
+maintainers:
+  - Hans de Goede <[email protected]>
+  - Jens Axboe <[email protected]>
+
+allOf:
+- $ref: "sata-common.yaml#"
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+        - enum:
+          - brcm,iproc-ahci
+          - marvell,armada-8k-ahci
+          - marvell,berlin2q-ahci
+        - const: generic-ahci
+      - enum:
+        - brcm,iproc-ahci
+        - cavium,octeon-7130-ahci
+        - hisilicon,hisi-ahci
Quoted 8 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 40

Quoted 5 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +5 -0
+        - ibm,476gtr-ahci
+        - marvell,armada-3700-ahci
+        - marvell,armada-380-ahci
+        - snps,dwc-ahci
+        - snps,spear-ahci

Install yamllint and run 'make dt_binding_check'. It's going to complain about the indentation.

you're right, i had no yamllint installed, so i have not seen these indention errors

Quoted 7 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 60

Quoted 5 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +5 -0
+  ahci-supply:
+    description:
+      regulator for AHCI controller
+
+  clock-names:

Group with 'clocks'

ok, already done in my tree because of krzysztofs comment

Quoted 9 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 90

Quoted 8 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +8 -0
+  ports-implemented:
+    $ref: '/schemas/types.yaml#/definitions/uint32'
+    description:
+      Mask that indicates which ports that the HBA supports
+      are available for software to use. Useful if PORTS_IMPL
+      is not programmed by the BIOS, which is true with
+      some embedded SoCs.
+    maxItems: 1
Quoted 3 lines

A uint32 is only ever 1 item. Drop.

IIRC, isn't the max here 0xff? Add constraints.

i've found it only set to 0x1 so i have currently set the maximum to 0x1, is this ok? If some higher value is needed binding needs to be touched...

Quoted 5 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 93

Quoted 3 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +3 -0
+
+  reg-names:
+    maxItems: 1

Group with 'reg'.

ok

Quoted 5 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 109

Quoted 3 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +3 -0
+patternProperties:
+  "^sata-port@[0-9a-f]+$":
+    type: object

additionalProperties: false

ok added to my tree

and needed to add phy-names because some marvell boards using this

arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dt.yaml: sata@540000: sata-port@1: 'phy-names' does not match any of the regexes: 'pinctrl-[0-9]+'

now i have only the marvell-errors about incomplete sata-port subnode (without phy/target-supply) like i mention in the patch...how to proceed with this?

regards Frank

_______________________________________________
Linux-rockchip mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-rockchip

maintainer
#7 lore raw

Re: Re: [PATCH v4 1/5] dt-bindings: Convert ahci-platform DT bindings to yaml

Quoted 100 lines · Frank Wunderlich

Hi Rob,

thanks for review,

have prepared the changes based on yours and krzysztof comments

https://github.com/frank-w/BPI-R2-4.14/commits/5.17-next-20220225

(just ignore the top 2 commits) i thought i had a size-cells-error, but did not get them again after reverting this part, seems they are fixed by inclusion of the sata-common binding

Quoted 7 lines

Gesendet: Mittwoch, 02. März 2022 um 19:14 Uhr
Von: "Rob Herring" <[email protected]>
An: "Frank Wunderlich" <[email protected]>

Quoted 1 line · Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Quoted 15 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 7

Quoted 13 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +7 -0
new file mode 100644
index 000000000000..cf67ddfc6afb
@@ -0,0 +1,162 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/ata/ahci-platform.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: AHCI SATA Controller

blank line.

done

Quoted 10 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 14

Quoted 7 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +7 -0
+description:
+  SATA nodes are defined to describe on-chip Serial ATA controllers.
+  Each SATA controller should have its own node.
+
+  It is possible, but not required, to represent each port as a sub-node.
+  It allows to enable each port independently when dealing with multiple
+  PHYs.

You need a '|' after 'description' if you want to maintain the paragraphs.

ok added | to all multiline descriptions

Quoted 21 lines
Quoted 21 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +21 -0
+
+maintainers:
+  - Hans de Goede <[email protected]>
+  - Jens Axboe <[email protected]>
+
+allOf:
+- $ref: "sata-common.yaml#"
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+        - enum:
+          - brcm,iproc-ahci
+          - marvell,armada-8k-ahci
+          - marvell,berlin2q-ahci
+        - const: generic-ahci
+      - enum:
+        - brcm,iproc-ahci
+        - cavium,octeon-7130-ahci
+        - hisilicon,hisi-ahci
Quoted 8 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 40

Quoted 5 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +5 -0
+        - ibm,476gtr-ahci
+        - marvell,armada-3700-ahci
+        - marvell,armada-380-ahci
+        - snps,dwc-ahci
+        - snps,spear-ahci

Install yamllint and run 'make dt_binding_check'. It's going to complain about the indentation.

you're right, i had no yamllint installed, so i have not seen these indention errors

Quoted 7 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 60

Quoted 5 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +5 -0
+  ahci-supply:
+    description:
+      regulator for AHCI controller
+
+  clock-names:

Group with 'clocks'

ok, already done in my tree because of krzysztofs comment

Quoted 9 lines
Quoted 8 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +8 -0
+  ports-implemented:
+    $ref: '/schemas/types.yaml#/definitions/uint32'
+    description:
+      Mask that indicates which ports that the HBA supports
+      are available for software to use. Useful if PORTS_IMPL
+      is not programmed by the BIOS, which is true with
+      some embedded SoCs.
+    maxItems: 1
Quoted 6 lines
Quoted 3 lines

A uint32 is only ever 1 item. Drop.

IIRC, isn't the max here 0xff? Add constraints.

i've found it only set to 0x1 so i have currently set the maximum to 0x1, is this ok? If some higher value is needed binding needs to be touched...

There's a spec for it, so no need to look at what's used. Calxeda AHCI had 5 ports IIRC.

Quoted 13 lines
Quoted 4 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 55

Quoted 2 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +2 -0
+  reg-names:
+    maxItems: 1

Group with 'reg'.

ok

Quoted 5 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 109

Quoted 3 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +3 -0
+patternProperties:
+  "^sata-port@[0-9a-f]+$":
+    type: object

additionalProperties: false

Quoted 7 lines

ok added to my tree

and needed to add phy-names because some marvell boards using this

arch/arm64/boot/dts/marvell/armada-8040-mcbin-singleshot.dt.yaml: sata@540000: sata-port@1: 'phy-names' does not match any of the regexes: 'pinctrl-[0-9]+'

now i have only the marvell-errors about incomplete sata-port subnode (without phy/target-supply) like i mention in the patch...how to proceed with this?

So the child nodes are incomplete? They should be disabled then (status = "disabled") and that turns off required properties checks.

Rob

#8 lore raw

Aw: Re: Re: [PATCH v4 1/5] dt-bindings: Convert ahci-platform DT bindings to yaml

Hi

Quoted 14 lines

Gesendet: Samstag, 05. März 2022 um 00:37 Uhr
Von: "Rob Herring" <[email protected]>

Quoted 11 lines
Quoted 11 lines

Documentation/devicetree/bindings/ata/ahci-platform.yaml line 90

Quoted 8 lines
Documentation/devicetree/bindings/ata/ahci-platform.yaml new file +8 -0
+  ports-implemented:
+    $ref: '/schemas/types.yaml#/definitions/uint32'
+    description:
+      Mask that indicates which ports that the HBA supports
+      are available for software to use. Useful if PORTS_IMPL
+      is not programmed by the BIOS, which is true with
+      some embedded SoCs.
+    maxItems: 1

A uint32 is only ever 1 item. Drop.

Quoted 7 lines
Quoted 4 lines
Quoted 1 line

IIRC, isn't the max here 0xff? Add constraints.

i've found it only set to 0x1 so i have currently set the maximum to 0x1, is this ok? If some higher value is needed binding needs to be touched...

There's a spec for it, so no need to look at what's used. Calxeda AHCI had 5 ports IIRC.

as far as i understand code in libahci.c line 535+ [1]
i guess i need to set lower 5 bits to 1 for 5 ports, right? resulting in max value 0x1f

Quoted 4 lines
Quoted 1 line

now i have only the marvell-errors about incomplete sata-port subnode (without phy/target-supply) like i mention in the patch...how to proceed with this?

So the child nodes are incomplete? They should be disabled then (status = "disabled") and that turns off required properties checks.

thanks, have disable the nodes and reenable them where phys/target-supply was added [2]...

now the dtbs_check is clean

[1] https://elixir.bootlin.com/linux/v5.17-rc6/source/drivers/ata/libahci.c#L535
[2] https://github.com/frank-w/BPI-R2-4.14/commits/5.17-next-20220225

regards Frank

_______________________________________________
Linux-rockchip mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-rockchip

#9 lore raw

Aw: Re: Re: [PATCH v4 1/5] dt-bindings: Convert ahci-platform DT bindings to yaml

Take a look again of the mentioned calxeda...

it looks like it only uses the compatible "calxeda,hb-ahci" handled by drivers/ata/sata_highbank.c and seems not using the ahci-platform.c

obj-$(CONFIG_SATA_HIGHBANK) += sata_highbank.o libahci.o

so imho the maximum 0x1 still should be right

regards Frank

Quoted 5 lines
Quoted 5 lines

Gesendet: Samstag, 05. März 2022 um 00:37 Uhr
Von: "Rob Herring" <[email protected]>

There's a spec for it, so no need to look at what's used. Calxeda AHCI had 5 ports IIRC.

author
#10 lore raw

PATCH v4 2/5 arm64: dts: broadcom: Fix sata nodename

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

After converting ahci-platform txt binding to yaml nodename is reported as not matching the standard:

arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dt.yaml:
ahci@663f2000: $nodename:0: 'ahci@663f2000' does not match '^sata(@.*)?$'

Fix it to match binding.

Fixes ac9aae00f0fc ("arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2")
Signed-off-by Frank Wunderlich <[email protected]>

---
v4:
- new Patch

---
 arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi +1 -1
index 2cfeaf3b0a87..8c218689fef7 100644
@@ -687,7 +687,7 @@ sata_phy1: sata-phy@1 {
 			};
 		};
 
-		sata: ahci@663f2000 {
+		sata: sata@663f2000 {
 			compatible = "brcm,iproc-ahci", "generic-ahci";
 			reg = <0x663f2000 0x1000>;
 			dma-coherent;
Signature · 1 line
2.25.1
Applied
#11 lore raw

Re: [PATCH v4 2/5] arm64: dts: broadcom: Fix sata nodename

Quoted 5 lines · Frank Wunderlich

From: Frank Wunderlich <[email protected]>

After converting ahci-platform txt binding to yaml nodename is reported as not matching the standard:

Quoted 8 lines

arch/arm64/boot/dts/broadcom/northstar2/ns2-svk.dt.yaml:
ahci@663f2000: $nodename:0: 'ahci@663f2000' does not match '^sata(@.*)?$'

Fix it to match binding.

Fixes ac9aae00f0fc ("arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2")
Signed-off-by Frank Wunderlich <[email protected]>

---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree-arm64/next, thanks! --
Florian

author
#12 lore raw

PATCH v4 3/5 dt-bindings: Add power-domains property to ahci-platform

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Some SoC using power-domains property so add it here

Signed-off-by Frank Wunderlich <[email protected]>

---
changes in v4: none
changes in v3:
- new patch

---
 Documentation/devicetree/bindings/ata/ahci-platform.yaml | 3 +++
 1 file changed, 3 insertions(+)
Documentation/devicetree/bindings/ata/ahci-platform.yaml +3 -0
index cf67ddfc6afb..ea1af283d125 100644
@@ -89,6 +89,9 @@ properties:
       some embedded SoCs.
     maxItems: 1
 
+  power-domains:
+    maxItems: 1
+
   reg-names:
     maxItems: 1
Signature · 1 line
2.25.1
Reviewed-by on v4 3/5
#13 lore raw

Re: [PATCH v4 3/5] dt-bindings: Add power-domains property to ahci-platform

Quoted 4 lines · Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Some SoC using power-domains property so add it here

Quoted 9 lines
Signed-off-by Frank Wunderlich <[email protected]>

---
changes in v4: none
changes in v3:
- new patch

---
 Documentation/devicetree/bindings/ata/ahci-platform.yaml | 3 +++
 1 file changed, 3 insertions(+)
Reviewed-by Krzysztof Kozlowski <[email protected]>

Best regards,
Krzysztof

author
#14 lore raw

PATCH v4 4/5 dt-bindings: Add rk3568-dwc3-ahci compatible

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Add SoC specific compatible for rk3568 ahci controller

Signed-off-by Frank Wunderlich <[email protected]>

---
v4: new Patch

 Documentation/devicetree/bindings/ata/ahci-platform.yaml | 4 ++++
 1 file changed, 4 insertions(+)
Documentation/devicetree/bindings/ata/ahci-platform.yaml +4 -0
index ea1af283d125..7111cf448f45 100644
@@ -29,6 +29,10 @@ properties:
           - marvell,armada-8k-ahci
           - marvell,berlin2q-ahci
         - const: generic-ahci
+      - items:
+        - enum:
+          - rockchip,rk3568-dwc-ahci
+        - const: snps,dwc-ahci
       - enum:
         - brcm,iproc-ahci
         - cavium,octeon-7130-ahci
Signature · 7 lines
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#15 lore raw

Re: [PATCH v4 4/5] dt-bindings: Add rk3568-dwc3-ahci compatible

Quoted 10 lines · Frank Wunderlich

From: Frank Wunderlich <[email protected]>

Add SoC specific compatible for rk3568 ahci controller

Signed-off-by Frank Wunderlich <[email protected]>

---
v4: new Patch

 Documentation/devicetree/bindings/ata/ahci-platform.yaml | 4 ++++
 1 file changed, 4 insertions(+)

Here and in previous bindings patches - you have wrong subject. I already said it with v3. I gave you exact subject prefix to use.

Best regards,
Krzysztof

author
#16 lore raw

PATCH v4 5/5 arm64: dts: rockchip: Add sata nodes to rk356x

In reply to Frank Wunderlich

From: Frank Wunderlich <[email protected]>

RK356x supports up to 3 sata controllers which were compatible with the existing snps,dwc-ahci binding.

Signed-off-by Frank Wunderlich <[email protected]>

---
changes in v4:
- drop newline in dts
- re-add clock-names
- add soc specific compatible
changes in v3:
- fix combphy error by moving sata0 to rk3568.dtsi
- remove clock-names and interrupt-names
changes in v2:
- added sata0 + 1, but have only tested sata2

---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 14 ++++++++++++
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 28 ++++++++++++++++++++++++
 2 files changed, 42 insertions(+)
arch/arm64/boot/dts/rockchip/rk3568.dtsi +14 -0
index 5b0f528d6818..3e07d9f6a2d1 100644
@@ -8,6 +8,20 @@
 / {
 	compatible = "rockchip,rk3568";
 
+	sata0: sata@fc000000 {
+		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
+		reg = <0 0xfc000000 0 0x1000>;
+		clocks = <&cru ACLK_SATA0>, <&cru CLK_SATA0_PMALIVE>,
+			 <&cru CLK_SATA0_RXOOB>;
+		clock-names = "sata", "pmalive", "rxoob";
+		interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&combphy0 PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3568_PD_PIPE>;
+		status = "disabled";
+	};
+
 	pipe_phy_grf0: syscon@fdc70000 {
 		compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
 		reg = <0x0 0xfdc70000 0x0 0x1000>;
arch/arm64/boot/dts/rockchip/rk356x.dtsi +28 -0
index 7cdef800cb3c..264dd030e703 100644
@@ -230,6 +230,34 @@ scmi_shmem: sram@0 {
 		};
 	};
 
+	sata1: sata@fc400000 {
+		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
+		reg = <0 0xfc400000 0 0x1000>;
+		clocks = <&cru ACLK_SATA1>, <&cru CLK_SATA1_PMALIVE>,
+			 <&cru CLK_SATA1_RXOOB>;
+		clock-names = "sata", "pmalive", "rxoob";
+		interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&combphy1 PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3568_PD_PIPE>;
+		status = "disabled";
+	};
+
+	sata2: sata@fc800000 {
+		compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
+		reg = <0 0xfc800000 0 0x1000>;
+		clocks = <&cru ACLK_SATA2>, <&cru CLK_SATA2_PMALIVE>,
+			 <&cru CLK_SATA2_RXOOB>;
+		clock-names = "sata", "pmalive", "rxoob";
+		interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+		phys = <&combphy2 PHY_TYPE_SATA>;
+		phy-names = "sata-phy";
+		ports-implemented = <0x1>;
+		power-domains = <&power RK3568_PD_PIPE>;
+		status = "disabled";
+	};
+
 	gic: interrupt-controller@fd400000 {
 		compatible = "arm,gic-v3";
 		reg = <0x0 0xfd400000 0 0x10000>, /* GICD */
Signature · 1 line
2.25.1