gpiolib: Handle immutable irq_chip structures
Subsystems (10)
v3 cover gpiolib: Handle immutable irq_chip structures
This is a followup from [2].
I recently realised that the gpiolib play ugly tricks on the unsuspecting irq_chip structures by patching the callbacks.
Not only this breaks when an irq_chip structure is made const (which really should be the default case), but it also forces this structure to be copied at nauseam for each instance of the GPIO block, which is a waste of memory.
My current approach is to add a new irq_chip flag (IRQCHIP_IMMUTABLE) which does what it says on the tin: don't you dare writing to them. Gpiolib is further updated not to install its own callbacks, and it becomes the responsibility of the driver to call into the gpiolib when required. This is similar to what we do for other subsystems such as PCI-MSI.
5 drivers are updated to this new model: M1, QC, Tegra, pl061 and AMD (as I actively use them) keeping a single irq_chip structure, marking it const, and exposing the new flag.
Nothing breaks, the volume of change is small, the memory usage goes down and we have fewer callbacks that can be used as attack vectors. What's not to love?
Since there wasn't any objection in the previous round of review, I'm going to take this series into -next to see if anything breaks at scale.
Thanks,
M.
* From v2 [2]:
- Fixed documentation
- Collected RBs, with thanks
* From v1 [1]:
- pl061 and AMD drivers converted
- New helpers to keep the changes small
- New warning for non-converted drivers
- Documentation and TODO updates
[1] https://lore.kernel.org/r/[email protected]
[2] https://lore.kernel.org/r/[email protected]
Marc Zyngier (10):
gpio: Don't fiddle with irqchips marked as immutable
gpio: Expose the gpiochip_irq_re[ql]res helpers
gpio: Add helpers to ease the transition towards immutable irq_chip
gpio: tegra186: Make the irqchip immutable
gpio: pl061: Make the irqchip immutable
pinctrl: apple-gpio: Make the irqchip immutable
pinctrl: msmgpio: Make the irqchip immutable
pinctrl: amd: Make the irqchip immutable
gpio: Update TODO to mention immutable irq_chip structures
Documentation: Update the recommended pattern for GPIO irqchips
Documentation/driver-api/gpio/driver.rst | 175 ++++++++++++++++++----- drivers/gpio/TODO | 19 +++ drivers/gpio/gpio-pl061.c | 32 +++-- drivers/gpio/gpio-tegra186.c | 32 +++-- drivers/gpio/gpiolib.c | 13 +- drivers/pinctrl/pinctrl-amd.c | 11 +- drivers/pinctrl/pinctrl-apple-gpio.c | 29 ++-- drivers/pinctrl/qcom/pinctrl-msm.c | 53 ++++--- include/linux/gpio/driver.h | 16 +++ include/linux/irq.h | 2 + kernel/irq/debugfs.c | 1 + 11 files changed, 293 insertions(+), 90 deletions(-)
Signature · 1 line
2.34.1
PATCH v3 1/10 gpio: Don't fiddle with irqchips marked as immutable
In order to move away from gpiolib messing with the internals of unsuspecting irqchips, add a flag by which irqchips advertise that they are not to be messed with, and do solemnly swear that they correctly call into the gpiolib helpers when required.
Also nudge the users into converting their drivers to the new model.
--- drivers/gpio/gpiolib.c | 7 ++++++- include/linux/irq.h | 2 ++ kernel/irq/debugfs.c | 1 + 3 files changed, 9 insertions(+), 1 deletion(-)
drivers/gpio/gpiolib.c +6 -1
@@ -1475,6 +1475,11 @@ static void gpiochip_set_irq_hooks(struct gpio_chip *gc) {struct irq_chip *irqchip = gc->irq.chip; +if (irqchip->flags &IRQCHIP_IMMUTABLE ) +return ; + +chip_warn (gc,"not an immutable chip, please consider fixing it!\n" ); +if (!irqchip->irq_request_resources && !irqchip->irq_release_resources) { irqchip->irq_request_resources = gpiochip_irq_reqres;
@@ -1633,7 +1638,7 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gc)irq_domain_remove (gc->irq.domain); } -if (irqchip) { +if (irqchip && !(irqchip->flags &IRQCHIP_IMMUTABLE )) {if (irqchip->irq_request_resources == gpiochip_irq_reqres) { irqchip->irq_request_resources =NULL ; irqchip->irq_release_resources =NULL ;
include/linux/irq.h +2 -0
@@ -569,6 +569,7 @@ struct irq_chip {* IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND: Invokes __enable_irq()/__disable_irq() for wake irqs * in the suspend path if they are in disabled state * IRQCHIP_AFFINITY_PRE_STARTUP: Default affinity update before startup +* IRQCHIP_IMMUTABLE: Don't ever change anything in this chip */ enum {IRQCHIP_SET_TYPE_MASKED = (1 <<0 ),
@@ -582,6 +583,7 @@ enum {IRQCHIP_SUPPORTS_NMI = (1 <<8 ),IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND = (1 <<9 ),IRQCHIP_AFFINITY_PRE_STARTUP = (1 <<10 ), + IRQCHIP_IMMUTABLE = (1 << 11), };#include <linux/irqdesc.h>
kernel/irq/debugfs.c +1 -0
@@ -58,6 +58,7 @@ static const struct irq_bit_descr irqchip_flags[] = {BIT_MASK_DESCR (IRQCHIP_SUPPORTS_LEVEL_MSI ),BIT_MASK_DESCR (IRQCHIP_SUPPORTS_NMI ),BIT_MASK_DESCR (IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND ), + BIT_MASK_DESCR(IRQCHIP_IMMUTABLE), }; static void
Signature · 1 line
2.34.1
[irqchip: irq/irqchip-next] gpio: Don't fiddle with irqchips marked as immutable
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 6c846d026d490b2383d395bc8e7b06336219667b Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/6c846d026d490b2383d395bc8e7b06336219667b Author: Marc Zyngier <[email protected]> AuthorDate: Tue, 19 Apr 2022 15:18:37 +01:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Tue, 19 Apr 2022 15:22:25 +01:00
gpio: Don't fiddle with irqchips marked as immutable
In order to move away from gpiolib messing with the internals of unsuspecting irqchips, add a flag by which irqchips advertise that they are not to be messed with, and do solemnly swear that they correctly call into the gpiolib helpers when required.
Also nudge the users into converting their drivers to the new model.
--- drivers/gpio/gpiolib.c | 7 ++++++- include/linux/irq.h | 2 ++ kernel/irq/debugfs.c | 1 + 3 files changed, 9 insertions(+), 1 deletion(-)
drivers/gpio/gpiolib.c +6 -1
@@ -1475,6 +1475,11 @@ static void gpiochip_set_irq_hooks(struct gpio_chip *gc) {struct irq_chip *irqchip = gc->irq.chip; +if (irqchip->flags &IRQCHIP_IMMUTABLE ) +return ; + +chip_warn (gc,"not an immutable chip, please consider fixing it!\n" ); +if (!irqchip->irq_request_resources && !irqchip->irq_release_resources) { irqchip->irq_request_resources = gpiochip_irq_reqres;
@@ -1633,7 +1638,7 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gc)irq_domain_remove (gc->irq.domain); } -if (irqchip) { +if (irqchip && !(irqchip->flags &IRQCHIP_IMMUTABLE )) {if (irqchip->irq_request_resources == gpiochip_irq_reqres) { irqchip->irq_request_resources =NULL ; irqchip->irq_release_resources =NULL ;
include/linux/irq.h +2 -0
@@ -569,6 +569,7 @@ struct irq_chip {* IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND: Invokes __enable_irq()/__disable_irq() for wake irqs * in the suspend path if they are in disabled state * IRQCHIP_AFFINITY_PRE_STARTUP: Default affinity update before startup +* IRQCHIP_IMMUTABLE: Don't ever change anything in this chip */ enum {IRQCHIP_SET_TYPE_MASKED = (1 <<0 ),
@@ -582,6 +583,7 @@ enum {IRQCHIP_SUPPORTS_NMI = (1 <<8 ),IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND = (1 <<9 ),IRQCHIP_AFFINITY_PRE_STARTUP = (1 <<10 ), + IRQCHIP_IMMUTABLE = (1 << 11), };#include <linux/irqdesc.h>
kernel/irq/debugfs.c +1 -0
@@ -58,6 +58,7 @@ static const struct irq_bit_descr irqchip_flags[] = {BIT_MASK_DESCR (IRQCHIP_SUPPORTS_LEVEL_MSI ),BIT_MASK_DESCR (IRQCHIP_SUPPORTS_NMI ),BIT_MASK_DESCR (IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND ), + BIT_MASK_DESCR(IRQCHIP_IMMUTABLE), }; static void
PATCH v3 2/10 gpio: Expose the gpiochip_irq_re[ql]res helpers
In reply to Marc ZyngierThe GPIO subsystem has a couple of internal helpers to manage resources on behalf of the irqchip. Expose them so that GPIO drivers can use them directly.
--- drivers/gpio/gpiolib.c | 6 ++++-- include/linux/gpio/driver.h | 4 ++++ 2 files changed, 8 insertions(+), 2 deletions(-)
drivers/gpio/gpiolib.c +4 -2
@@ -1423,19 +1423,21 @@ static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)return irq_create_mapping (domain, offset); } -static int gpiochip_irq_reqres (struct irq_data *d) +int gpiochip_irq_reqres (struct irq_data *d) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d);return gpiochip_reqres_irq (gc, d->hwirq); } +EXPORT_SYMBOL (gpiochip_irq_reqres); -static void gpiochip_irq_relres (struct irq_data *d) +void gpiochip_irq_relres (struct irq_data *d) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d);gpiochip_relres_irq (gc, d->hwirq); } +EXPORT_SYMBOL (gpiochip_irq_relres);static void gpiochip_irq_mask (struct irq_data *d) {
include/linux/gpio/driver.h +4 -0
@@ -579,6 +579,10 @@ void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset);void gpiochip_disable_irq (struct gpio_chip *gc,unsigned int offset);void gpiochip_enable_irq (struct gpio_chip *gc,unsigned int offset); +/* irq_data versions of the above */ +int gpiochip_irq_reqres (struct irq_data *data); +void gpiochip_irq_relres (struct irq_data *data); +/* Line status inquiry for drivers */ bool gpiochip_line_is_open_drain (struct gpio_chip *gc,unsigned int offset);bool gpiochip_line_is_open_source (struct gpio_chip *gc,unsigned int offset);
Signature · 1 line
2.34.1
[irqchip: irq/irqchip-next] gpio: Expose the gpiochip_irq_re[ql]res helpers
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 704f08753b6dcd0e08c1953af0b2c7f3fac87111 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/704f08753b6dcd0e08c1953af0b2c7f3fac87111 Author: Marc Zyngier <[email protected]> AuthorDate: Tue, 19 Apr 2022 15:18:38 +01:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Tue, 19 Apr 2022 15:22:25 +01:00
gpio: Expose the gpiochip_irq_re[ql]res helpers
The GPIO subsystem has a couple of internal helpers to manage resources on behalf of the irqchip. Expose them so that GPIO drivers can use them directly.
--- drivers/gpio/gpiolib.c | 6 ++++-- include/linux/gpio/driver.h | 4 ++++ 2 files changed, 8 insertions(+), 2 deletions(-)
drivers/gpio/gpiolib.c +4 -2
@@ -1423,19 +1423,21 @@ static int gpiochip_to_irq(struct gpio_chip *gc, unsigned int offset)return irq_create_mapping (domain, offset); } -static int gpiochip_irq_reqres (struct irq_data *d) +int gpiochip_irq_reqres (struct irq_data *d) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d);return gpiochip_reqres_irq (gc, d->hwirq); } +EXPORT_SYMBOL (gpiochip_irq_reqres); -static void gpiochip_irq_relres (struct irq_data *d) +void gpiochip_irq_relres (struct irq_data *d) {struct gpio_chip *gc =irq_data_get_irq_chip_data (d);gpiochip_relres_irq (gc, d->hwirq); } +EXPORT_SYMBOL (gpiochip_irq_relres);static void gpiochip_irq_mask (struct irq_data *d) {
include/linux/gpio/driver.h +4 -0
@@ -579,6 +579,10 @@ void gpiochip_relres_irq(struct gpio_chip *gc, unsigned int offset);void gpiochip_disable_irq (struct gpio_chip *gc,unsigned int offset);void gpiochip_enable_irq (struct gpio_chip *gc,unsigned int offset); +/* irq_data versions of the above */ +int gpiochip_irq_reqres (struct irq_data *data); +void gpiochip_irq_relres (struct irq_data *data); +/* Line status inquiry for drivers */ bool gpiochip_line_is_open_drain (struct gpio_chip *gc,unsigned int offset);bool gpiochip_line_is_open_source (struct gpio_chip *gc,unsigned int offset);
PATCH v3 3/10 gpio: Add helpers to ease the transition towards immutable irq_chip
In reply to Marc ZyngierAdd a couple of new helpers to make it slightly simpler to convert drivers to immutable irq_chip structures:
- GPIOCHIP_IRQ_RESOURCE_HELPERS populates the irq_chip structure with the resource management callbacks
- gpio_irq_chip_set_chip() populates the gpio_irq_chip.chip structure, avoiding the proliferation of ugly casts
--- include/linux/gpio/driver.h | 12 ++++++++++++ 1 file changed, 12 insertions(+)
include/linux/gpio/driver.h +12 -0
@@ -583,6 +583,18 @@ void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset);int gpiochip_irq_reqres (struct irq_data *data);void gpiochip_irq_relres (struct irq_data *data); +/* Paste this in your irq_chip structure */ +#define GPIOCHIP_IRQ_RESOURCE_HELPERS \ + .irq_request_resources = gpiochip_irq_reqres, \ + .irq_release_resources = gpiochip_irq_relres + +static inline void gpio_irq_chip_set_chip (struct gpio_irq_chip *girq, +const struct irq_chip *chip) +{ +/* Yes, dropping const is ugly, but it isn't like we have a choice */ + girq->chip = (struct irq_chip *)chip; +} +/* Line status inquiry for drivers */ bool gpiochip_line_is_open_drain (struct gpio_chip *gc,unsigned int offset);bool gpiochip_line_is_open_source (struct gpio_chip *gc,unsigned int offset);
Signature · 1 line
2.34.1
[irqchip: irq/irqchip-next] gpio: Add helpers to ease the transition towards immutable irq_chip
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 36b78aae4bfee749bbde73be570796bfd0f56bec Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/36b78aae4bfee749bbde73be570796bfd0f56bec Author: Marc Zyngier <[email protected]> AuthorDate: Tue, 19 Apr 2022 15:18:39 +01:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Tue, 19 Apr 2022 15:22:25 +01:00
gpio: Add helpers to ease the transition towards immutable irq_chip
Add a couple of new helpers to make it slightly simpler to convert drivers to immutable irq_chip structures:
- GPIOCHIP_IRQ_RESOURCE_HELPERS populates the irq_chip structure with the resource management callbacks
- gpio_irq_chip_set_chip() populates the gpio_irq_chip.chip structure, avoiding the proliferation of ugly casts
--- include/linux/gpio/driver.h | 12 ++++++++++++ 1 file changed, 12 insertions(+)
include/linux/gpio/driver.h +12 -0
@@ -583,6 +583,18 @@ void gpiochip_enable_irq(struct gpio_chip *gc, unsigned int offset);int gpiochip_irq_reqres (struct irq_data *data);void gpiochip_irq_relres (struct irq_data *data); +/* Paste this in your irq_chip structure */ +#define GPIOCHIP_IRQ_RESOURCE_HELPERS \ + .irq_request_resources = gpiochip_irq_reqres, \ + .irq_release_resources = gpiochip_irq_relres + +static inline void gpio_irq_chip_set_chip (struct gpio_irq_chip *girq, +const struct irq_chip *chip) +{ +/* Yes, dropping const is ugly, but it isn't like we have a choice */ + girq->chip = (struct irq_chip *)chip; +} +/* Line status inquiry for drivers */ bool gpiochip_line_is_open_drain (struct gpio_chip *gc,unsigned int offset);bool gpiochip_line_is_open_source (struct gpio_chip *gc,unsigned int offset);
PATCH v3 4/10 gpio: tegra186: Make the irqchip immutable
In reply to Marc ZyngierPrevent gpiolib from messing with the irqchip by advertising the irq_chip structure as immutable, making it const, and adding the various calls that gpiolib relies upon.
--- drivers/gpio/gpio-tegra186.c | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-)
drivers/gpio/gpio-tegra186.c +23 -9
@@ -80,7 +80,6 @@ struct tegra_gpio_soc {struct tegra_gpio {struct gpio_chip gpio; -struct irq_chip intc;unsigned int num_irq;unsigned int *irq;
@@ -372,6 +371,8 @@ static void tegra186_irq_mask(struct irq_data *data) value =readl (base +TEGRA186_GPIO_ENABLE_CONFIG ); value &= ~TEGRA186_GPIO_ENABLE_CONFIG_INTERRUPT ;writel (value, base +TEGRA186_GPIO_ENABLE_CONFIG ); + +gpiochip_disable_irq (&gpio->gpio, data->hwirq); }static void tegra186_irq_unmask (struct irq_data *data)
@@ -385,6 +386,8 @@ static void tegra186_irq_unmask(struct irq_data *data)if (WARN_ON (base ==NULL ))return ; +gpiochip_enable_irq (&gpio->gpio, data->hwirq); + value =readl (base +TEGRA186_GPIO_ENABLE_CONFIG ); value |=TEGRA186_GPIO_ENABLE_CONFIG_INTERRUPT ;writel (value, base +TEGRA186_GPIO_ENABLE_CONFIG );
@@ -456,6 +459,24 @@ static int tegra186_irq_set_wake(struct irq_data *data, unsigned int on)return 0 ; } +static void tegra186_irq_print_chip (struct irq_data *data,struct seq_file *p) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (data); + +seq_printf (p,dev_name (gc->parent)); +} + +static const struct irq_chip tegra186_gpio_irq_chip = { + .irq_ack = tegra186_irq_ack, + .irq_mask = tegra186_irq_mask, + .irq_unmask = tegra186_irq_unmask, + .irq_set_type = tegra186_irq_set_type, + .irq_set_wake = tegra186_irq_set_wake, + .irq_print_chip = tegra186_irq_print_chip, + .flags =IRQCHIP_IMMUTABLE , +GPIOCHIP_IRQ_RESOURCE_HELPERS , +}; +static void tegra186_gpio_irq (struct irq_desc *desc) {struct tegra_gpio *gpio =irq_desc_get_handler_data (desc);
@@ -760,15 +781,8 @@ static int tegra186_gpio_probe(struct platform_device *pdev) gpio->gpio.of_xlate = tegra186_gpio_of_xlate;#endif /* CONFIG_OF_GPIO */ - gpio->intc.name =dev_name (&pdev->dev); - gpio->intc.irq_ack = tegra186_irq_ack; - gpio->intc.irq_mask = tegra186_irq_mask; - gpio->intc.irq_unmask = tegra186_irq_unmask; - gpio->intc.irq_set_type = tegra186_irq_set_type; - gpio->intc.irq_set_wake = tegra186_irq_set_wake; - irq = &gpio->gpio.irq; - irq->chip = &gpio->intc; +gpio_irq_chip_set_chip (irq, &tegra186_gpio_irq_chip); irq->fwnode =of_node_to_fwnode (pdev->dev.of_node); irq->child_to_parent_hwirq = tegra186_gpio_child_to_parent_hwirq; irq->populate_parent_alloc_arg = tegra186_gpio_populate_parent_fwspec;
Signature · 1 line
2.34.1
[irqchip: irq/irqchip-next] gpio: tegra186: Make the irqchip immutable
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: bba00555ede79ad8a743da908f708466f6bac0f8 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/bba00555ede79ad8a743da908f708466f6bac0f8 Author: Marc Zyngier <[email protected]> AuthorDate: Tue, 19 Apr 2022 15:18:40 +01:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Tue, 19 Apr 2022 15:22:26 +01:00
gpio: tegra186: Make the irqchip immutable
Prevent gpiolib from messing with the irqchip by advertising the irq_chip structure as immutable, making it const, and adding the various calls that gpiolib relies upon.
--- drivers/gpio/gpio-tegra186.c | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-)
drivers/gpio/gpio-tegra186.c +23 -9
@@ -80,7 +80,6 @@ struct tegra_gpio_soc {struct tegra_gpio {struct gpio_chip gpio; -struct irq_chip intc;unsigned int num_irq;unsigned int *irq;
@@ -372,6 +371,8 @@ static void tegra186_irq_mask(struct irq_data *data) value =readl (base +TEGRA186_GPIO_ENABLE_CONFIG ); value &= ~TEGRA186_GPIO_ENABLE_CONFIG_INTERRUPT ;writel (value, base +TEGRA186_GPIO_ENABLE_CONFIG ); + +gpiochip_disable_irq (&gpio->gpio, data->hwirq); }static void tegra186_irq_unmask (struct irq_data *data)
@@ -385,6 +386,8 @@ static void tegra186_irq_unmask(struct irq_data *data)if (WARN_ON (base ==NULL ))return ; +gpiochip_enable_irq (&gpio->gpio, data->hwirq); + value =readl (base +TEGRA186_GPIO_ENABLE_CONFIG ); value |=TEGRA186_GPIO_ENABLE_CONFIG_INTERRUPT ;writel (value, base +TEGRA186_GPIO_ENABLE_CONFIG );
@@ -456,6 +459,24 @@ static int tegra186_irq_set_wake(struct irq_data *data, unsigned int on)return 0 ; } +static void tegra186_irq_print_chip (struct irq_data *data,struct seq_file *p) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (data); + +seq_printf (p,dev_name (gc->parent)); +} + +static const struct irq_chip tegra186_gpio_irq_chip = { + .irq_ack = tegra186_irq_ack, + .irq_mask = tegra186_irq_mask, + .irq_unmask = tegra186_irq_unmask, + .irq_set_type = tegra186_irq_set_type, + .irq_set_wake = tegra186_irq_set_wake, + .irq_print_chip = tegra186_irq_print_chip, + .flags =IRQCHIP_IMMUTABLE , +GPIOCHIP_IRQ_RESOURCE_HELPERS , +}; +static void tegra186_gpio_irq (struct irq_desc *desc) {struct tegra_gpio *gpio =irq_desc_get_handler_data (desc);
@@ -760,15 +781,8 @@ static int tegra186_gpio_probe(struct platform_device *pdev) gpio->gpio.of_xlate = tegra186_gpio_of_xlate;#endif /* CONFIG_OF_GPIO */ - gpio->intc.name =dev_name (&pdev->dev); - gpio->intc.irq_ack = tegra186_irq_ack; - gpio->intc.irq_mask = tegra186_irq_mask; - gpio->intc.irq_unmask = tegra186_irq_unmask; - gpio->intc.irq_set_type = tegra186_irq_set_type; - gpio->intc.irq_set_wake = tegra186_irq_set_wake; - irq = &gpio->gpio.irq; - irq->chip = &gpio->intc; +gpio_irq_chip_set_chip (irq, &tegra186_gpio_irq_chip); irq->fwnode =of_node_to_fwnode (pdev->dev.of_node); irq->child_to_parent_hwirq = tegra186_gpio_child_to_parent_hwirq; irq->populate_parent_alloc_arg = tegra186_gpio_populate_parent_fwspec;
PATCH v3 5/10 gpio: pl061: Make the irqchip immutable
In reply to Marc ZyngierPrevent gpiolib from messing with the irqchip by advertising the irq_chip structure as immutable, making it const, and adding the various calls that gpiolib relies upon.
--- drivers/gpio/gpio-pl061.c | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-)
drivers/gpio/gpio-pl061.c +23 -9
@@ -52,7 +52,6 @@ struct pl061 {void __iomem *base;struct gpio_chip gc; -struct irq_chip irq_chip;int parent_irq;#ifdef CONFIG_PM
@@ -241,6 +240,8 @@ static void pl061_irq_mask(struct irq_data *d) gpioie =readb (pl061->base +GPIOIE ) & ~mask;writeb (gpioie, pl061->base +GPIOIE );raw_spin_unlock (&pl061->lock); + +gpiochip_disable_irq (gc, d->hwirq); }static void pl061_irq_unmask (struct irq_data *d)
@@ -250,6 +251,8 @@ static void pl061_irq_unmask(struct irq_data *d)u8 mask =BIT (irqd_to_hwirq (d) %PL061_GPIO_NR );u8 gpioie; +gpiochip_enable_irq (gc, d->hwirq); +raw_spin_lock (&pl061->lock); gpioie =readb (pl061->base +GPIOIE ) | mask;writeb (gpioie, pl061->base +GPIOIE );
@@ -283,6 +286,24 @@ static int pl061_irq_set_wake(struct irq_data *d, unsigned int state)return irq_set_irq_wake (pl061->parent_irq, state); } +static void pl061_irq_print_chip (struct irq_data *data,struct seq_file *p) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (data); + +seq_printf (p,dev_name (gc->parent)); +} + +static const struct irq_chip pl061_irq_chip = { + .irq_ack = pl061_irq_ack, + .irq_mask = pl061_irq_mask, + .irq_unmask = pl061_irq_unmask, + .irq_set_type = pl061_irq_type, + .irq_set_wake = pl061_irq_set_wake, + .irq_print_chip = pl061_irq_print_chip, + .flags =IRQCHIP_IMMUTABLE , +GPIOCHIP_IRQ_RESOURCE_HELPERS , +}; +static int pl061_probe (struct amba_device *adev,const struct amba_id *id) {struct device *dev = &adev->dev;
@@ -315,13 +336,6 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id)/* * irq_chip support */ - pl061->irq_chip.name =dev_name (dev); - pl061->irq_chip.irq_ack = pl061_irq_ack; - pl061->irq_chip.irq_mask = pl061_irq_mask; - pl061->irq_chip.irq_unmask = pl061_irq_unmask; - pl061->irq_chip.irq_set_type = pl061_irq_type; - pl061->irq_chip.irq_set_wake = pl061_irq_set_wake; -writeb (0 , pl061->base +GPIOIE );/* disable irqs */ irq = adev->irq[0 ];if (!irq)
@@ -329,7 +343,7 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) pl061->parent_irq = irq; girq = &pl061->gc.irq; - girq->chip = &pl061->irq_chip; +gpio_irq_chip_set_chip (girq, &pl061_irq_chip); girq->parent_handler = pl061_irq_handler; girq->num_parents =1 ; girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),
Signature · 1 line
2.34.1
[irqchip: irq/irqchip-next] gpio: pl061: Make the irqchip immutable
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 15d8c14ac849f41f2d41dbddb69f402aaf73ff8b Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/15d8c14ac849f41f2d41dbddb69f402aaf73ff8b Author: Marc Zyngier <[email protected]> AuthorDate: Tue, 19 Apr 2022 15:18:41 +01:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Tue, 19 Apr 2022 15:22:26 +01:00
gpio: pl061: Make the irqchip immutable
Prevent gpiolib from messing with the irqchip by advertising the irq_chip structure as immutable, making it const, and adding the various calls that gpiolib relies upon.
--- drivers/gpio/gpio-pl061.c | 32 +++++++++++++++++++++++--------- 1 file changed, 23 insertions(+), 9 deletions(-)
drivers/gpio/gpio-pl061.c +23 -9
@@ -52,7 +52,6 @@ struct pl061 {void __iomem *base;struct gpio_chip gc; -struct irq_chip irq_chip;int parent_irq;#ifdef CONFIG_PM
@@ -241,6 +240,8 @@ static void pl061_irq_mask(struct irq_data *d) gpioie =readb (pl061->base +GPIOIE ) & ~mask;writeb (gpioie, pl061->base +GPIOIE );raw_spin_unlock (&pl061->lock); + +gpiochip_disable_irq (gc, d->hwirq); }static void pl061_irq_unmask (struct irq_data *d)
@@ -250,6 +251,8 @@ static void pl061_irq_unmask(struct irq_data *d)u8 mask =BIT (irqd_to_hwirq (d) %PL061_GPIO_NR );u8 gpioie; +gpiochip_enable_irq (gc, d->hwirq); +raw_spin_lock (&pl061->lock); gpioie =readb (pl061->base +GPIOIE ) | mask;writeb (gpioie, pl061->base +GPIOIE );
@@ -283,6 +286,24 @@ static int pl061_irq_set_wake(struct irq_data *d, unsigned int state)return irq_set_irq_wake (pl061->parent_irq, state); } +static void pl061_irq_print_chip (struct irq_data *data,struct seq_file *p) +{ +struct gpio_chip *gc =irq_data_get_irq_chip_data (data); + +seq_printf (p,dev_name (gc->parent)); +} + +static const struct irq_chip pl061_irq_chip = { + .irq_ack = pl061_irq_ack, + .irq_mask = pl061_irq_mask, + .irq_unmask = pl061_irq_unmask, + .irq_set_type = pl061_irq_type, + .irq_set_wake = pl061_irq_set_wake, + .irq_print_chip = pl061_irq_print_chip, + .flags =IRQCHIP_IMMUTABLE , +GPIOCHIP_IRQ_RESOURCE_HELPERS , +}; +static int pl061_probe (struct amba_device *adev,const struct amba_id *id) {struct device *dev = &adev->dev;
@@ -315,13 +336,6 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id)/* * irq_chip support */ - pl061->irq_chip.name =dev_name (dev); - pl061->irq_chip.irq_ack = pl061_irq_ack; - pl061->irq_chip.irq_mask = pl061_irq_mask; - pl061->irq_chip.irq_unmask = pl061_irq_unmask; - pl061->irq_chip.irq_set_type = pl061_irq_type; - pl061->irq_chip.irq_set_wake = pl061_irq_set_wake; -writeb (0 , pl061->base +GPIOIE );/* disable irqs */ irq = adev->irq[0 ];if (!irq)
@@ -329,7 +343,7 @@ static int pl061_probe(struct amba_device *adev, const struct amba_id *id) pl061->parent_irq = irq; girq = &pl061->gc.irq; - girq->chip = &pl061->irq_chip; +gpio_irq_chip_set_chip (girq, &pl061_irq_chip); girq->parent_handler = pl061_irq_handler; girq->num_parents =1 ; girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),
PATCH v3 6/10 pinctrl: apple-gpio: Make the irqchip immutable
In reply to Marc ZyngierPrevent gpiolib from messing with the irqchip by advertising the irq_chip structure as immutable, making it const, and adding the various calls that gpiolib relies upon.
--- drivers/pinctrl/pinctrl-apple-gpio.c | 29 +++++++++++++++------------- 1 file changed, 16 insertions(+), 13 deletions(-)
drivers/pinctrl/pinctrl-apple-gpio.c +16 -13
@@ -36,7 +36,6 @@ struct apple_gpio_pinctrl {struct pinctrl_desc pinctrl_desc;struct gpio_chip gpio_chip; -struct irq_chip irq_chip;u8 irqgrps[]; };
@@ -275,17 +274,21 @@ static unsigned int apple_gpio_irq_type(unsigned int type)static void apple_gpio_irq_mask (struct irq_data *data) { -struct apple_gpio_pinctrl *pctl =gpiochip_get_data (irq_data_get_irq_chip_data (data)); +struct gpio_chip *gc =irq_data_get_irq_chip_data (data); +struct apple_gpio_pinctrl *pctl =gpiochip_get_data (gc);apple_gpio_set_reg (pctl, data->hwirq, REG_GPIOx_MODE,FIELD_PREP (REG_GPIOx_MODE, REG_GPIOx_IN_IRQ_OFF)); +gpiochip_disable_irq (gc, data->hwirq); }static void apple_gpio_irq_unmask (struct irq_data *data) { -struct apple_gpio_pinctrl *pctl =gpiochip_get_data (irq_data_get_irq_chip_data (data)); +struct gpio_chip *gc =irq_data_get_irq_chip_data (data); +struct apple_gpio_pinctrl *pctl =gpiochip_get_data (gc);unsigned int irqtype =apple_gpio_irq_type (irqd_get_trigger_type (data)); +gpiochip_enable_irq (gc, data->hwirq);apple_gpio_set_reg (pctl, data->hwirq, REG_GPIOx_MODE,FIELD_PREP (REG_GPIOx_MODE, irqtype)); }
@@ -343,13 +346,15 @@ static void apple_gpio_irq_handler(struct irq_desc *desc)chained_irq_exit (chip, desc); } -static struct irq_chip apple_gpio_irqchip = { - .name ="Apple-GPIO" , - .irq_startup = apple_gpio_irq_startup, - .irq_ack = apple_gpio_irq_ack, - .irq_mask = apple_gpio_irq_mask, - .irq_unmask = apple_gpio_irq_unmask, - .irq_set_type = apple_gpio_irq_set_type, +static const struct irq_chip apple_gpio_irqchip = { + .name ="Apple-GPIO" , + .irq_startup = apple_gpio_irq_startup, + .irq_ack = apple_gpio_irq_ack, + .irq_mask = apple_gpio_irq_mask, + .irq_unmask = apple_gpio_irq_unmask, + .irq_set_type = apple_gpio_irq_set_type, + .flags =IRQCHIP_IMMUTABLE , +GPIOCHIP_IRQ_RESOURCE_HELPERS , };/* Probe & register */
@@ -360,8 +365,6 @@ static int apple_gpio_register(struct apple_gpio_pinctrl *pctl)void **irq_data =NULL ;int ret; - pctl->irq_chip = apple_gpio_irqchip; - pctl->gpio_chip.label =dev_name (pctl->dev); pctl->gpio_chip.request = gpiochip_generic_request; pctl->gpio_chip.free = gpiochip_generic_free;
@@ -377,7 +380,7 @@ static int apple_gpio_register(struct apple_gpio_pinctrl *pctl)if (girq->num_parents) {int i; - girq->chip = &pctl->irq_chip; +gpio_irq_chip_set_chip (girq, &apple_gpio_irqchip); girq->parent_handler = apple_gpio_irq_handler; girq->parents = kmalloc_array(girq->num_parents,
Signature · 1 line
2.34.1
[irqchip: irq/irqchip-next] pinctrl: apple-gpio: Make the irqchip immutable
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 374b87a0fcf9fa5dd1379271337ae19f95682956 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/374b87a0fcf9fa5dd1379271337ae19f95682956 Author: Marc Zyngier <[email protected]> AuthorDate: Tue, 19 Apr 2022 15:18:42 +01:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Tue, 19 Apr 2022 15:22:26 +01:00
pinctrl: apple-gpio: Make the irqchip immutable
Prevent gpiolib from messing with the irqchip by advertising the irq_chip structure as immutable, making it const, and adding the various calls that gpiolib relies upon.
--- drivers/pinctrl/pinctrl-apple-gpio.c | 29 ++++++++++++++------------- 1 file changed, 16 insertions(+), 13 deletions(-)
drivers/pinctrl/pinctrl-apple-gpio.c +16 -13
@@ -36,7 +36,6 @@ struct apple_gpio_pinctrl {struct pinctrl_desc pinctrl_desc;struct gpio_chip gpio_chip; -struct irq_chip irq_chip;u8 irqgrps[]; };
@@ -275,17 +274,21 @@ static unsigned int apple_gpio_irq_type(unsigned int type)static void apple_gpio_irq_mask (struct irq_data *data) { -struct apple_gpio_pinctrl *pctl =gpiochip_get_data (irq_data_get_irq_chip_data (data)); +struct gpio_chip *gc =irq_data_get_irq_chip_data (data); +struct apple_gpio_pinctrl *pctl =gpiochip_get_data (gc);apple_gpio_set_reg (pctl, data->hwirq, REG_GPIOx_MODE,FIELD_PREP (REG_GPIOx_MODE, REG_GPIOx_IN_IRQ_OFF)); +gpiochip_disable_irq (gc, data->hwirq); }static void apple_gpio_irq_unmask (struct irq_data *data) { -struct apple_gpio_pinctrl *pctl =gpiochip_get_data (irq_data_get_irq_chip_data (data)); +struct gpio_chip *gc =irq_data_get_irq_chip_data (data); +struct apple_gpio_pinctrl *pctl =gpiochip_get_data (gc);unsigned int irqtype =apple_gpio_irq_type (irqd_get_trigger_type (data)); +gpiochip_enable_irq (gc, data->hwirq);apple_gpio_set_reg (pctl, data->hwirq, REG_GPIOx_MODE,FIELD_PREP (REG_GPIOx_MODE, irqtype)); }
@@ -343,13 +346,15 @@ static void apple_gpio_irq_handler(struct irq_desc *desc)chained_irq_exit (chip, desc); } -static struct irq_chip apple_gpio_irqchip = { - .name ="Apple-GPIO" , - .irq_startup = apple_gpio_irq_startup, - .irq_ack = apple_gpio_irq_ack, - .irq_mask = apple_gpio_irq_mask, - .irq_unmask = apple_gpio_irq_unmask, - .irq_set_type = apple_gpio_irq_set_type, +static const struct irq_chip apple_gpio_irqchip = { + .name ="Apple-GPIO" , + .irq_startup = apple_gpio_irq_startup, + .irq_ack = apple_gpio_irq_ack, + .irq_mask = apple_gpio_irq_mask, + .irq_unmask = apple_gpio_irq_unmask, + .irq_set_type = apple_gpio_irq_set_type, + .flags =IRQCHIP_IMMUTABLE , +GPIOCHIP_IRQ_RESOURCE_HELPERS , };/* Probe & register */
@@ -360,8 +365,6 @@ static int apple_gpio_register(struct apple_gpio_pinctrl *pctl)void **irq_data =NULL ;int ret; - pctl->irq_chip = apple_gpio_irqchip; - pctl->gpio_chip.label =dev_name (pctl->dev); pctl->gpio_chip.request = gpiochip_generic_request; pctl->gpio_chip.free = gpiochip_generic_free;
@@ -377,7 +380,7 @@ static int apple_gpio_register(struct apple_gpio_pinctrl *pctl)if (girq->num_parents) {int i; - girq->chip = &pctl->irq_chip; +gpio_irq_chip_set_chip (girq, &apple_gpio_irqchip); girq->parent_handler = apple_gpio_irq_handler; girq->parents = kmalloc_array(girq->num_parents,
PATCH v3 7/10 pinctrl: msmgpio: Make the irqchip immutable
In reply to Marc ZyngierPrevent gpiolib from messing with the irqchip by advertising the irq_chip structure as immutable, making it const, and adding the various calls that gpiolib relies upon.
--- drivers/pinctrl/qcom/pinctrl-msm.c | 53 +++++++++++++++++++----------- 1 file changed, 33 insertions(+), 20 deletions(-)
drivers/pinctrl/qcom/pinctrl-msm.c +33 -20
@@ -42,7 +42,6 @@* @chip: gpiochip handle. * @desc: pin controller descriptor * @restart_nb: restart notifier block. -* @irq_chip: irq chip information * @irq: parent irq for the TLMM irq_chip. * @intr_target_use_scm: route irq to application cpu using scm calls * @lock: Spinlock to protect register resources as well
@@ -63,7 +62,6 @@ struct msm_pinctrl {struct pinctrl_desc desc;struct notifier_block restart_nb; -struct irq_chip irq_chip;int irq;bool intr_target_use_scm;
@@ -868,6 +866,8 @@ static void msm_gpio_irq_enable(struct irq_data *d)struct gpio_chip *gc =irq_data_get_irq_chip_data (d);struct msm_pinctrl *pctrl =gpiochip_get_data (gc); +gpiochip_enable_irq (gc, d->hwirq); +if (d->parent_data)irq_chip_enable_parent (d);
@@ -885,6 +885,8 @@ static void msm_gpio_irq_disable(struct irq_data *d)if (!test_bit (d->hwirq, pctrl->skip_wake_irqs))msm_gpio_irq_mask (d); + +gpiochip_disable_irq (gc, d->hwirq); }/**
@@ -958,6 +960,14 @@ static void msm_gpio_irq_ack(struct irq_data *d)raw_spin_unlock_irqrestore (&pctrl->lock, flags); } +static void msm_gpio_irq_eoi (struct irq_data *d) +{ + d = d->parent_data; + +if (d) + d->chip->irq_eoi (d); +} +static bool msm_gpio_needs_dual_edge_parent_workaround (struct irq_data *d,unsigned int type) {
@@ -1255,6 +1265,26 @@ static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl)return device_property_count_u16 (pctrl->dev,"gpios" ) >0 ; } +static const struct irq_chip msm_gpio_irq_chip = { + .name ="msmgpio" , + .irq_enable = msm_gpio_irq_enable, + .irq_disable = msm_gpio_irq_disable, + .irq_mask = msm_gpio_irq_mask, + .irq_unmask = msm_gpio_irq_unmask, + .irq_ack = msm_gpio_irq_ack, + .irq_eoi = msm_gpio_irq_eoi, + .irq_set_type = msm_gpio_irq_set_type, + .irq_set_wake = msm_gpio_irq_set_wake, + .irq_request_resources = msm_gpio_irq_reqres, + .irq_release_resources = msm_gpio_irq_relres, + .irq_set_affinity = msm_gpio_irq_set_affinity, + .irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity, + .flags = (IRQCHIP_MASK_ON_SUSPEND | +IRQCHIP_SET_TYPE_MASKED | +IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND | +IRQCHIP_IMMUTABLE ), +}; +static int msm_gpio_init (struct msm_pinctrl *pctrl) {struct gpio_chip *chip;
@@ -1276,22 +1306,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)if (msm_gpio_needs_valid_mask (pctrl)) chip->init_valid_mask = msm_gpio_init_valid_mask; - pctrl->irq_chip.name ="msmgpio" ; - pctrl->irq_chip.irq_enable = msm_gpio_irq_enable; - pctrl->irq_chip.irq_disable = msm_gpio_irq_disable; - pctrl->irq_chip.irq_mask = msm_gpio_irq_mask; - pctrl->irq_chip.irq_unmask = msm_gpio_irq_unmask; - pctrl->irq_chip.irq_ack = msm_gpio_irq_ack; - pctrl->irq_chip.irq_set_type = msm_gpio_irq_set_type; - pctrl->irq_chip.irq_set_wake = msm_gpio_irq_set_wake; - pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres; - pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; - pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; - pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity; - pctrl->irq_chip.flags =IRQCHIP_MASK_ON_SUSPEND | -IRQCHIP_SET_TYPE_MASKED | -IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND ; - np =of_parse_phandle (pctrl->dev->of_node,"wakeup-parent" ,0 );if (np) { chip->irq.parent_domain = irq_find_matching_host(np,
@@ -1300,7 +1314,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)if (!chip->irq.parent_domain)return -EPROBE_DEFER ; chip->irq.child_to_parent_hwirq = msm_gpio_wakeirq; - pctrl->irq_chip.irq_eoi = irq_chip_eoi_parent;/* * Let's skip handling the GPIOs, if the parent irqchip * is handling the direct connect IRQ of the GPIO.
@@ -1313,7 +1326,7 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) } girq = &chip->irq; - girq->chip = &pctrl->irq_chip; +gpio_irq_chip_set_chip (girq, &msm_gpio_irq_chip); girq->parent_handler = msm_gpio_irq_handler; girq->fwnode = pctrl->dev->fwnode; girq->num_parents =1 ;
Signature · 1 line
2.34.1
[irqchip: irq/irqchip-next] pinctrl: msmgpio: Make the irqchip immutable
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 14dbe186b9d42cbf662eae5a4da14687edbf0edb Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/14dbe186b9d42cbf662eae5a4da14687edbf0edb Author: Marc Zyngier <[email protected]> AuthorDate: Tue, 19 Apr 2022 15:18:43 +01:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Tue, 19 Apr 2022 15:22:26 +01:00
pinctrl: msmgpio: Make the irqchip immutable
Prevent gpiolib from messing with the irqchip by advertising the irq_chip structure as immutable, making it const, and adding the various calls that gpiolib relies upon.
--- drivers/pinctrl/qcom/pinctrl-msm.c | 53 ++++++++++++++++++----------- 1 file changed, 33 insertions(+), 20 deletions(-)
drivers/pinctrl/qcom/pinctrl-msm.c +33 -20
@@ -42,7 +42,6 @@* @chip: gpiochip handle. * @desc: pin controller descriptor * @restart_nb: restart notifier block. -* @irq_chip: irq chip information * @irq: parent irq for the TLMM irq_chip. * @intr_target_use_scm: route irq to application cpu using scm calls * @lock: Spinlock to protect register resources as well
@@ -63,7 +62,6 @@ struct msm_pinctrl {struct pinctrl_desc desc;struct notifier_block restart_nb; -struct irq_chip irq_chip;int irq;bool intr_target_use_scm;
@@ -868,6 +866,8 @@ static void msm_gpio_irq_enable(struct irq_data *d)struct gpio_chip *gc =irq_data_get_irq_chip_data (d);struct msm_pinctrl *pctrl =gpiochip_get_data (gc); +gpiochip_enable_irq (gc, d->hwirq); +if (d->parent_data)irq_chip_enable_parent (d);
@@ -885,6 +885,8 @@ static void msm_gpio_irq_disable(struct irq_data *d)if (!test_bit (d->hwirq, pctrl->skip_wake_irqs))msm_gpio_irq_mask (d); + +gpiochip_disable_irq (gc, d->hwirq); }/**
@@ -958,6 +960,14 @@ static void msm_gpio_irq_ack(struct irq_data *d)raw_spin_unlock_irqrestore (&pctrl->lock, flags); } +static void msm_gpio_irq_eoi (struct irq_data *d) +{ + d = d->parent_data; + +if (d) + d->chip->irq_eoi (d); +} +static bool msm_gpio_needs_dual_edge_parent_workaround (struct irq_data *d,unsigned int type) {
@@ -1255,6 +1265,26 @@ static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl)return device_property_count_u16 (pctrl->dev,"gpios" ) >0 ; } +static const struct irq_chip msm_gpio_irq_chip = { + .name ="msmgpio" , + .irq_enable = msm_gpio_irq_enable, + .irq_disable = msm_gpio_irq_disable, + .irq_mask = msm_gpio_irq_mask, + .irq_unmask = msm_gpio_irq_unmask, + .irq_ack = msm_gpio_irq_ack, + .irq_eoi = msm_gpio_irq_eoi, + .irq_set_type = msm_gpio_irq_set_type, + .irq_set_wake = msm_gpio_irq_set_wake, + .irq_request_resources = msm_gpio_irq_reqres, + .irq_release_resources = msm_gpio_irq_relres, + .irq_set_affinity = msm_gpio_irq_set_affinity, + .irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity, + .flags = (IRQCHIP_MASK_ON_SUSPEND | +IRQCHIP_SET_TYPE_MASKED | +IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND | +IRQCHIP_IMMUTABLE ), +}; +static int msm_gpio_init (struct msm_pinctrl *pctrl) {struct gpio_chip *chip;
@@ -1276,22 +1306,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)if (msm_gpio_needs_valid_mask (pctrl)) chip->init_valid_mask = msm_gpio_init_valid_mask; - pctrl->irq_chip.name ="msmgpio" ; - pctrl->irq_chip.irq_enable = msm_gpio_irq_enable; - pctrl->irq_chip.irq_disable = msm_gpio_irq_disable; - pctrl->irq_chip.irq_mask = msm_gpio_irq_mask; - pctrl->irq_chip.irq_unmask = msm_gpio_irq_unmask; - pctrl->irq_chip.irq_ack = msm_gpio_irq_ack; - pctrl->irq_chip.irq_set_type = msm_gpio_irq_set_type; - pctrl->irq_chip.irq_set_wake = msm_gpio_irq_set_wake; - pctrl->irq_chip.irq_request_resources = msm_gpio_irq_reqres; - pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres; - pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity; - pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity; - pctrl->irq_chip.flags =IRQCHIP_MASK_ON_SUSPEND | -IRQCHIP_SET_TYPE_MASKED | -IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND ; - np =of_parse_phandle (pctrl->dev->of_node,"wakeup-parent" ,0 );if (np) { chip->irq.parent_domain = irq_find_matching_host(np,
@@ -1300,7 +1314,6 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)if (!chip->irq.parent_domain)return -EPROBE_DEFER ; chip->irq.child_to_parent_hwirq = msm_gpio_wakeirq; - pctrl->irq_chip.irq_eoi = irq_chip_eoi_parent;/* * Let's skip handling the GPIOs, if the parent irqchip * is handling the direct connect IRQ of the GPIO.
@@ -1313,7 +1326,7 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl) } girq = &chip->irq; - girq->chip = &pctrl->irq_chip; +gpio_irq_chip_set_chip (girq, &msm_gpio_irq_chip); girq->parent_handler = msm_gpio_irq_handler; girq->fwnode = pctrl->dev->fwnode; girq->num_parents =1 ;
PATCH v3 8/10 pinctrl: amd: Make the irqchip immutable
In reply to Marc ZyngierPrevent gpiolib from messing with the irqchip by advertising the irq_chip structure as immutable, making it const, and adding the various calls that gpiolib relies upon.
--- drivers/pinctrl/pinctrl-amd.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)
drivers/pinctrl/pinctrl-amd.c +8 -3
@@ -387,6 +387,8 @@ static void amd_gpio_irq_enable(struct irq_data *d)struct gpio_chip *gc =irq_data_get_irq_chip_data (d);struct amd_gpio *gpio_dev =gpiochip_get_data (gc); +gpiochip_enable_irq (gc, d->hwirq); +raw_spin_lock_irqsave (&gpio_dev->lock, flags); pin_reg =readl (gpio_dev->base + (d->hwirq)*4 ); pin_reg |=BIT (INTERRUPT_ENABLE_OFF );
@@ -408,6 +410,8 @@ static void amd_gpio_irq_disable(struct irq_data *d) pin_reg &= ~BIT (INTERRUPT_MASK_OFF );writel (pin_reg, gpio_dev->base + (d->hwirq)*4 );raw_spin_unlock_irqrestore (&gpio_dev->lock, flags); + +gpiochip_disable_irq (gc, d->hwirq); }static void amd_gpio_irq_mask (struct irq_data *d)
@@ -577,7 +581,7 @@ static void amd_irq_ack(struct irq_data *d)*/ } -static struct irq_chip amd_gpio_irqchip = { +static const struct irq_chip amd_gpio_irqchip = { .name ="amd_gpio" , .irq_ack = amd_irq_ack, .irq_enable = amd_gpio_irq_enable,
@@ -593,7 +597,8 @@ static struct irq_chip amd_gpio_irqchip = {* the wake event. Otherwise the wake event will never clear and * prevent the system from suspending. */ - .flags = IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND, + .flags = IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND | IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, };#define PIN_IRQ_PENDING (BIT(INTERRUPT_STS_OFF) | BIT(WAKE_STS_OFF))
@@ -1026,7 +1031,7 @@ static int amd_gpio_probe(struct platform_device *pdev)amd_gpio_irq_init (gpio_dev); girq = &gpio_dev->gc.irq; - girq->chip = &amd_gpio_irqchip; +gpio_irq_chip_set_chip (girq, &amd_gpio_irqchip);/* This will let us handle the parent IRQ in the driver */ girq->parent_handler =NULL ; girq->num_parents =0 ;
Signature · 1 line
2.34.1
[irqchip: irq/irqchip-next] pinctrl: amd: Make the irqchip immutable
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 6173e56f76c712aac9d45208ccec7a065382911f Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/6173e56f76c712aac9d45208ccec7a065382911f Author: Marc Zyngier <[email protected]> AuthorDate: Tue, 19 Apr 2022 15:18:44 +01:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Tue, 19 Apr 2022 15:22:26 +01:00
pinctrl: amd: Make the irqchip immutable
Prevent gpiolib from messing with the irqchip by advertising the irq_chip structure as immutable, making it const, and adding the various calls that gpiolib relies upon.
--- drivers/pinctrl/pinctrl-amd.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)
drivers/pinctrl/pinctrl-amd.c +8 -3
@@ -387,6 +387,8 @@ static void amd_gpio_irq_enable(struct irq_data *d)struct gpio_chip *gc =irq_data_get_irq_chip_data (d);struct amd_gpio *gpio_dev =gpiochip_get_data (gc); +gpiochip_enable_irq (gc, d->hwirq); +raw_spin_lock_irqsave (&gpio_dev->lock, flags); pin_reg =readl (gpio_dev->base + (d->hwirq)*4 ); pin_reg |=BIT (INTERRUPT_ENABLE_OFF );
@@ -408,6 +410,8 @@ static void amd_gpio_irq_disable(struct irq_data *d) pin_reg &= ~BIT (INTERRUPT_MASK_OFF );writel (pin_reg, gpio_dev->base + (d->hwirq)*4 );raw_spin_unlock_irqrestore (&gpio_dev->lock, flags); + +gpiochip_disable_irq (gc, d->hwirq); }static void amd_gpio_irq_mask (struct irq_data *d)
@@ -577,7 +581,7 @@ static void amd_irq_ack(struct irq_data *d)*/ } -static struct irq_chip amd_gpio_irqchip = { +static const struct irq_chip amd_gpio_irqchip = { .name ="amd_gpio" , .irq_ack = amd_irq_ack, .irq_enable = amd_gpio_irq_enable,
@@ -593,7 +597,8 @@ static struct irq_chip amd_gpio_irqchip = {* the wake event. Otherwise the wake event will never clear and * prevent the system from suspending. */ - .flags = IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND, + .flags = IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND | IRQCHIP_IMMUTABLE, + GPIOCHIP_IRQ_RESOURCE_HELPERS, };#define PIN_IRQ_PENDING (BIT(INTERRUPT_STS_OFF) | BIT(WAKE_STS_OFF))
@@ -1026,7 +1031,7 @@ static int amd_gpio_probe(struct platform_device *pdev)amd_gpio_irq_init (gpio_dev); girq = &gpio_dev->gc.irq; - girq->chip = &amd_gpio_irqchip; +gpio_irq_chip_set_chip (girq, &amd_gpio_irqchip);/* This will let us handle the parent IRQ in the driver */ girq->parent_handler =NULL ; girq->num_parents =0 ;
PATCH v3 9/10 gpio: Update TODO to mention immutable irq_chip structures
In reply to Marc Zyngier5 drivers are converted, a few hundred to go. Definitely worth of a TODO entry, in the hope that someone will notice it and do a bulk update.
--- drivers/gpio/TODO | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
drivers/gpio/TODO +19 -0
@@ -178,3 +178,22 @@ discussed but the idea is to provide a low-level access point for debugging and hacking and to expose all lines without the need of any exporting. Also provide ample ammunition to shoot oneself in the foot, because this is debugfs after all. + + +Moving over to immutable irq_chip structures + +Most of the gpio chips implementing interrupt support rely on gpiolib +intercepting some of the irq_chip callbacks, preventing the structures +from being made read-only and forcing duplication of structures that +should otherwise be unique. + +The solution is to call into the gpiolib code when needed (resource +management, enable/disable or unmask/mask callbacks), and to let the +core code know about that by exposing a flag (IRQCHIP_IMMUTABLE) in +the irq_chip structure. The irq_chip structure can then be made unique +and const. + +A small number of drivers have been converted (pl061, tegra186, msm, +amd, apple), and can be used as examples of how to proceed with this +conversion. Note that drivers using the generic irqchip framework +cannot be converted yet, but watch this space!
Signature · 1 line
2.34.1
[irqchip: irq/irqchip-next] gpio: Update TODO to mention immutable irq_chip structures
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: afefc3266272d40cdcd0fd713c7b42008fea19d5 Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/afefc3266272d40cdcd0fd713c7b42008fea19d5 Author: Marc Zyngier <[email protected]> AuthorDate: Tue, 19 Apr 2022 15:18:45 +01:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Tue, 19 Apr 2022 15:22:26 +01:00
gpio: Update TODO to mention immutable irq_chip structures
5 drivers are converted, a few hundred to go. Definitely worth of a TODO entry, in the hope that someone will notice it and do a bulk update.
--- drivers/gpio/TODO | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+)
drivers/gpio/TODO +19 -0
@@ -178,3 +178,22 @@ discussed but the idea is to provide a low-level access point for debugging and hacking and to expose all lines without the need of any exporting. Also provide ample ammunition to shoot oneself in the foot, because this is debugfs after all. + + +Moving over to immutable irq_chip structures + +Most of the gpio chips implementing interrupt support rely on gpiolib +intercepting some of the irq_chip callbacks, preventing the structures +from being made read-only and forcing duplication of structures that +should otherwise be unique. + +The solution is to call into the gpiolib code when needed (resource +management, enable/disable or unmask/mask callbacks), and to let the +core code know about that by exposing a flag (IRQCHIP_IMMUTABLE) in +the irq_chip structure. The irq_chip structure can then be made unique +and const. + +A small number of drivers have been converted (pl061, tegra186, msm, +amd, apple), and can be used as examples of how to proceed with this +conversion. Note that drivers using the generic irqchip framework +cannot be converted yet, but watch this space!
PATCH v3 10/10 Documentation: Update the recommended pattern for GPIO irqchips
In reply to Marc ZyngierUpdate the documentation to get rid of the per-gpio_irq_chip irq_chip structure, and give examples of the new pattern.
--- Documentation/driver-api/gpio/driver.rst | 175 ++++++++++++++++++----- 1 file changed, 142 insertions(+), 33 deletions(-)
Documentation/driver-api/gpio/driver.rst +142 -33
@@ -417,30 +417,66 @@ struct gpio_irq_chip inside struct gpio_chip before adding the gpio_chip. If you do this, the additional irq_chip will be set up by gpiolib at the same time as setting up the rest of the GPIO functionality. The following is a typical example of a chained cascaded interrupt handler using -the gpio_irq_chip: +the gpio_irq_chip. Note how the mask/unmask (or disable/enable) functions +call into the core gpiolib code: .. code-block:: c - /* Typical state container with dynamic irqchip */ + /* Typical state container */ struct my_gpio { struct gpio_chip gc; - struct irq_chip irq; + }; + + static void my_gpio_mask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + /* + * Perform any necessary action to mask the interrupt, + * and then call into the core code to synchronise the + * state. + */ + + gpiochip_disable_irq(gc, d->hwirq); + } + + static void my_gpio_unmask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + gpiochip_enable_irq(gc, d->hwirq); + + /* + * Perform any necessary action to unmask the interrupt, + * after having called into the core code to synchronise + * the state. + */ + } + + /* + * Statically populate the irqchip. Note that it is made const + * (further indicated by the IRQCHIP_IMMUTABLE flag), and that + * the GPIOCHIP_IRQ_RESOURCE_HELPER macro adds some extra + * callbacks to the structure. + */ + static const struct irq_chip my_gpio_irq_chip = { + .name = "my_gpio_irq", + .irq_ack = my_gpio_ack_irq, + .irq_mask = my_gpio_mask_irq, + .irq_unmask = my_gpio_unmask_irq, + .irq_set_type = my_gpio_set_irq_type, + .flags = IRQCHIP_IMMUTABLE, + /* Provide the gpio resource callbacks */ + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; int irq; /* from platform etc */ struct my_gpio *g; struct gpio_irq_chip *girq; - /* Set up the irqchip dynamically */ - g->irq.name = "my_gpio_irq"; - g->irq.irq_ack = my_gpio_ack_irq; - g->irq.irq_mask = my_gpio_mask_irq; - g->irq.irq_unmask = my_gpio_unmask_irq; - g->irq.irq_set_type = my_gpio_set_irq_type; - /* Get a pointer to the gpio_irq_chip */ girq = &g->gc.irq; - girq->chip = &g->irq; + gpio_irq_chip_set_chip(girq, &my_gpio_irq_chip); girq->parent_handler = ftgpio_gpio_irq_handler; girq->num_parents = 1; girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),
@@ -458,23 +494,58 @@ the interrupt separately and go with it: .. code-block:: c - /* Typical state container with dynamic irqchip */ + /* Typical state container */ struct my_gpio { struct gpio_chip gc; - struct irq_chip irq; + }; + + static void my_gpio_mask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + /* + * Perform any necessary action to mask the interrupt, + * and then call into the core code to synchronise the + * state. + */ + + gpiochip_disable_irq(gc, d->hwirq); + } + + static void my_gpio_unmask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + gpiochip_enable_irq(gc, d->hwirq); + + /* + * Perform any necessary action to unmask the interrupt, + * after having called into the core code to synchronise + * the state. + */ + } + + /* + * Statically populate the irqchip. Note that it is made const + * (further indicated by the IRQCHIP_IMMUTABLE flag), and that + * the GPIOCHIP_IRQ_RESOURCE_HELPER macro adds some extra + * callbacks to the structure. + */ + static const struct irq_chip my_gpio_irq_chip = { + .name = "my_gpio_irq", + .irq_ack = my_gpio_ack_irq, + .irq_mask = my_gpio_mask_irq, + .irq_unmask = my_gpio_unmask_irq, + .irq_set_type = my_gpio_set_irq_type, + .flags = IRQCHIP_IMMUTABLE, + /* Provide the gpio resource callbacks */ + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; int irq; /* from platform etc */ struct my_gpio *g; struct gpio_irq_chip *girq; - /* Set up the irqchip dynamically */ - g->irq.name = "my_gpio_irq"; - g->irq.irq_ack = my_gpio_ack_irq; - g->irq.irq_mask = my_gpio_mask_irq; - g->irq.irq_unmask = my_gpio_unmask_irq; - g->irq.irq_set_type = my_gpio_set_irq_type; - ret = devm_request_threaded_irq(dev, irq, NULL, irq_thread_fn, IRQF_ONESHOT, "my-chip", g); if (ret < 0)
@@ -482,7 +553,7 @@ the interrupt separately and go with it: /* Get a pointer to the gpio_irq_chip */ girq = &g->gc.irq; - girq->chip = &g->irq; + gpio_irq_chip_set_chip(girq, &my_gpio_irq_chip); /* This will let us handle the parent IRQ in the driver */ girq->parent_handler = NULL; girq->num_parents = 0;
@@ -500,24 +571,61 @@ In this case the typical set-up will look like this: /* Typical state container with dynamic irqchip */ struct my_gpio { struct gpio_chip gc; - struct irq_chip irq; struct fwnode_handle *fwnode; }; - int irq; /* from platform etc */ + static void my_gpio_mask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + /* + * Perform any necessary action to mask the interrupt, + * and then call into the core code to synchronise the + * state. + */ + + gpiochip_disable_irq(gc, d->hwirq); + irq_mask_mask_parent(d); + } + + static void my_gpio_unmask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + gpiochip_enable_irq(gc, d->hwirq); + + /* + * Perform any necessary action to unmask the interrupt, + * after having called into the core code to synchronise + * the state. + */ + + irq_mask_unmask_parent(d); + } + + /* + * Statically populate the irqchip. Note that it is made const + * (further indicated by the IRQCHIP_IMMUTABLE flag), and that + * the GPIOCHIP_IRQ_RESOURCE_HELPER macro adds some extra + * callbacks to the structure. + */ + static const struct irq_chip my_gpio_irq_chip = { + .name = "my_gpio_irq", + .irq_ack = my_gpio_ack_irq, + .irq_mask = my_gpio_mask_irq, + .irq_unmask = my_gpio_unmask_irq, + .irq_set_type = my_gpio_set_irq_type, + .flags = IRQCHIP_IMMUTABLE, + /* Provide the gpio resource callbacks */ + GPIOCHIP_IRQ_RESOURCE_HELPERS, + }; + struct my_gpio *g; struct gpio_irq_chip *girq; - /* Set up the irqchip dynamically */ - g->irq.name = "my_gpio_irq"; - g->irq.irq_ack = my_gpio_ack_irq; - g->irq.irq_mask = my_gpio_mask_irq; - g->irq.irq_unmask = my_gpio_unmask_irq; - g->irq.irq_set_type = my_gpio_set_irq_type; - /* Get a pointer to the gpio_irq_chip */ girq = &g->gc.irq; - girq->chip = &g->irq; + gpio_irq_chip_set_chip(girq, &my_gpio_irq_chip); girq->default_type = IRQ_TYPE_NONE; girq->handler = handle_bad_irq; girq->fwnode = g->fwnode;
@@ -605,8 +713,9 @@ When implementing an irqchip inside a GPIO driver, these two functions should typically be called in the .irq_disable() and .irq_enable() callbacks from the irqchip. -When using the gpiolib irqchip helpers, these callbacks are automatically -assigned. +When IRQCHIP_IMMUTABLE is not advertised by the irqchip, these callbacks +are automatically assigned. This behaviour is deprecated and on its way +to be removed from the kernel. Real-Time compliance for GPIO IRQ chips
Signature · 1 line
2.34.1
[irqchip: irq/irqchip-next] Documentation: Update the recommended pattern for GPIO irqchips
The following commit has been merged into the irq/irqchip-next branch of irqchip:
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 5644b66a9c63c3cadc6ba85faf5a15604e6cf29a Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/5644b66a9c63c3cadc6ba85faf5a15604e6cf29a Author: Marc Zyngier <[email protected]> AuthorDate: Tue, 19 Apr 2022 15:18:46 +01:00 Committer: Marc Zyngier <[email protected]> CommitterDate: Tue, 19 Apr 2022 15:22:27 +01:00
Documentation: Update the recommended pattern for GPIO irqchips
Update the documentation to get rid of the per-gpio_irq_chip irq_chip structure, and give examples of the new pattern.
--- Documentation/driver-api/gpio/driver.rst | 175 +++++++++++++++++----- 1 file changed, 142 insertions(+), 33 deletions(-)
Documentation/driver-api/gpio/driver.rst +142 -33
@@ -417,30 +417,66 @@ struct gpio_irq_chip inside struct gpio_chip before adding the gpio_chip. If you do this, the additional irq_chip will be set up by gpiolib at the same time as setting up the rest of the GPIO functionality. The following is a typical example of a chained cascaded interrupt handler using -the gpio_irq_chip: +the gpio_irq_chip. Note how the mask/unmask (or disable/enable) functions +call into the core gpiolib code: .. code-block:: c - /* Typical state container with dynamic irqchip */ + /* Typical state container */ struct my_gpio { struct gpio_chip gc; - struct irq_chip irq; + }; + + static void my_gpio_mask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + /* + * Perform any necessary action to mask the interrupt, + * and then call into the core code to synchronise the + * state. + */ + + gpiochip_disable_irq(gc, d->hwirq); + } + + static void my_gpio_unmask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + gpiochip_enable_irq(gc, d->hwirq); + + /* + * Perform any necessary action to unmask the interrupt, + * after having called into the core code to synchronise + * the state. + */ + } + + /* + * Statically populate the irqchip. Note that it is made const + * (further indicated by the IRQCHIP_IMMUTABLE flag), and that + * the GPIOCHIP_IRQ_RESOURCE_HELPER macro adds some extra + * callbacks to the structure. + */ + static const struct irq_chip my_gpio_irq_chip = { + .name = "my_gpio_irq", + .irq_ack = my_gpio_ack_irq, + .irq_mask = my_gpio_mask_irq, + .irq_unmask = my_gpio_unmask_irq, + .irq_set_type = my_gpio_set_irq_type, + .flags = IRQCHIP_IMMUTABLE, + /* Provide the gpio resource callbacks */ + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; int irq; /* from platform etc */ struct my_gpio *g; struct gpio_irq_chip *girq; - /* Set up the irqchip dynamically */ - g->irq.name = "my_gpio_irq"; - g->irq.irq_ack = my_gpio_ack_irq; - g->irq.irq_mask = my_gpio_mask_irq; - g->irq.irq_unmask = my_gpio_unmask_irq; - g->irq.irq_set_type = my_gpio_set_irq_type; - /* Get a pointer to the gpio_irq_chip */ girq = &g->gc.irq; - girq->chip = &g->irq; + gpio_irq_chip_set_chip(girq, &my_gpio_irq_chip); girq->parent_handler = ftgpio_gpio_irq_handler; girq->num_parents = 1; girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),
@@ -458,23 +494,58 @@ the interrupt separately and go with it: .. code-block:: c - /* Typical state container with dynamic irqchip */ + /* Typical state container */ struct my_gpio { struct gpio_chip gc; - struct irq_chip irq; + }; + + static void my_gpio_mask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + /* + * Perform any necessary action to mask the interrupt, + * and then call into the core code to synchronise the + * state. + */ + + gpiochip_disable_irq(gc, d->hwirq); + } + + static void my_gpio_unmask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + gpiochip_enable_irq(gc, d->hwirq); + + /* + * Perform any necessary action to unmask the interrupt, + * after having called into the core code to synchronise + * the state. + */ + } + + /* + * Statically populate the irqchip. Note that it is made const + * (further indicated by the IRQCHIP_IMMUTABLE flag), and that + * the GPIOCHIP_IRQ_RESOURCE_HELPER macro adds some extra + * callbacks to the structure. + */ + static const struct irq_chip my_gpio_irq_chip = { + .name = "my_gpio_irq", + .irq_ack = my_gpio_ack_irq, + .irq_mask = my_gpio_mask_irq, + .irq_unmask = my_gpio_unmask_irq, + .irq_set_type = my_gpio_set_irq_type, + .flags = IRQCHIP_IMMUTABLE, + /* Provide the gpio resource callbacks */ + GPIOCHIP_IRQ_RESOURCE_HELPERS, }; int irq; /* from platform etc */ struct my_gpio *g; struct gpio_irq_chip *girq; - /* Set up the irqchip dynamically */ - g->irq.name = "my_gpio_irq"; - g->irq.irq_ack = my_gpio_ack_irq; - g->irq.irq_mask = my_gpio_mask_irq; - g->irq.irq_unmask = my_gpio_unmask_irq; - g->irq.irq_set_type = my_gpio_set_irq_type; - ret = devm_request_threaded_irq(dev, irq, NULL, irq_thread_fn, IRQF_ONESHOT, "my-chip", g); if (ret < 0)
@@ -482,7 +553,7 @@ the interrupt separately and go with it: /* Get a pointer to the gpio_irq_chip */ girq = &g->gc.irq; - girq->chip = &g->irq; + gpio_irq_chip_set_chip(girq, &my_gpio_irq_chip); /* This will let us handle the parent IRQ in the driver */ girq->parent_handler = NULL; girq->num_parents = 0;
@@ -500,24 +571,61 @@ In this case the typical set-up will look like this: /* Typical state container with dynamic irqchip */ struct my_gpio { struct gpio_chip gc; - struct irq_chip irq; struct fwnode_handle *fwnode; }; - int irq; /* from platform etc */ + static void my_gpio_mask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + /* + * Perform any necessary action to mask the interrupt, + * and then call into the core code to synchronise the + * state. + */ + + gpiochip_disable_irq(gc, d->hwirq); + irq_mask_mask_parent(d); + } + + static void my_gpio_unmask_irq(struct irq_data *d) + { + struct gpio_chip *gc = irq_desc_get_handler_data(d); + + gpiochip_enable_irq(gc, d->hwirq); + + /* + * Perform any necessary action to unmask the interrupt, + * after having called into the core code to synchronise + * the state. + */ + + irq_mask_unmask_parent(d); + } + + /* + * Statically populate the irqchip. Note that it is made const + * (further indicated by the IRQCHIP_IMMUTABLE flag), and that + * the GPIOCHIP_IRQ_RESOURCE_HELPER macro adds some extra + * callbacks to the structure. + */ + static const struct irq_chip my_gpio_irq_chip = { + .name = "my_gpio_irq", + .irq_ack = my_gpio_ack_irq, + .irq_mask = my_gpio_mask_irq, + .irq_unmask = my_gpio_unmask_irq, + .irq_set_type = my_gpio_set_irq_type, + .flags = IRQCHIP_IMMUTABLE, + /* Provide the gpio resource callbacks */ + GPIOCHIP_IRQ_RESOURCE_HELPERS, + }; + struct my_gpio *g; struct gpio_irq_chip *girq; - /* Set up the irqchip dynamically */ - g->irq.name = "my_gpio_irq"; - g->irq.irq_ack = my_gpio_ack_irq; - g->irq.irq_mask = my_gpio_mask_irq; - g->irq.irq_unmask = my_gpio_unmask_irq; - g->irq.irq_set_type = my_gpio_set_irq_type; - /* Get a pointer to the gpio_irq_chip */ girq = &g->gc.irq; - girq->chip = &g->irq; + gpio_irq_chip_set_chip(girq, &my_gpio_irq_chip); girq->default_type = IRQ_TYPE_NONE; girq->handler = handle_bad_irq; girq->fwnode = g->fwnode;
@@ -605,8 +713,9 @@ When implementing an irqchip inside a GPIO driver, these two functions should typically be called in the .irq_disable() and .irq_enable() callbacks from the irqchip. -When using the gpiolib irqchip helpers, these callbacks are automatically -assigned. +When IRQCHIP_IMMUTABLE is not advertised by the irqchip, these callbacks +are automatically assigned. This behaviour is deprecated and on its way +to be removed from the kernel. Real-Time compliance for GPIO IRQ chips
Quoted 21 lines · Marc Zyngier
This is a followup from [2].
I recently realised that the gpiolib play ugly tricks on the unsuspecting
irq_chipstructures by patching the callbacks.Not only this breaks when an
irq_chipstructure is made const (which really should be the default case), but it also forces this structure to be copied at nauseam for each instance of the GPIO block, which is a waste of memory.My current approach is to add a new
irq_chipflag (IRQCHIP_IMMUTABLE) which does what it says on the tin: don't you dare writing to them. Gpiolib is further updated not to install its own callbacks, and it becomes the responsibility of the driver to call into the gpiolib when required. This is similar to what we do for other subsystems such as PCI-MSI.5 drivers are updated to this new model: M1, QC, Tegra, pl061 and AMD (as I actively use them) keeping a single
irq_chipstructure, marking it const, and exposing the new flag.
Quoted 7 lines
Nothing breaks, the volume of change is small, the memory usage goes down and we have fewer callbacks that can be used as attack vectors. What's not to love?
Since there wasn't any objection in the previous round of review, I'm going to take this series into -next to see if anything breaks at scale.
The series:
Bartosz: if you're happy with this can you apply it to an immutable branch from v5.18-rc1 and merge that into the GPIO for-next and then I can also pull that into pinctrl?
Yours,
Linus Walleij
_______________________________________________
linux-arm-kernel mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Quoted 32 lines · Linus Walleij
Quoted 21 lines · Marc Zyngier
This is a followup from [2].
I recently realised that the gpiolib play ugly tricks on the unsuspecting
irq_chipstructures by patching the callbacks.Not only this breaks when an
irq_chipstructure is made const (which really should be the default case), but it also forces this structure to be copied at nauseam for each instance of the GPIO block, which is a waste of memory.My current approach is to add a new
irq_chipflag (IRQCHIP_IMMUTABLE) which does what it says on the tin: don't you dare writing to them. Gpiolib is further updated not to install its own callbacks, and it becomes the responsibility of the driver to call into the gpiolib when required. This is similar to what we do for other subsystems such as PCI-MSI.5 drivers are updated to this new model: M1, QC, Tegra, pl061 and AMD (as I actively use them) keeping a single
irq_chipstructure, marking it const, and exposing the new flag.Quoted 7 lines
Nothing breaks, the volume of change is small, the memory usage goes down and we have fewer callbacks that can be used as attack vectors. What's not to love?
Since there wasn't any objection in the previous round of review, I'm going to take this series into -next to see if anything breaks at scale.
Quoted 6 lines
The series:
Acked-by Linus Walleij <[email protected]>Bartosz: if you're happy with this can you apply it to an immutable branch from v5.18-rc1 and merge that into the GPIO for-next and then I can also pull that into pinctrl?
For what it is worth, I've pushed this branch into irqchip-next.
You can pick it up from:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/gpio-immutable
but I can also drop it from the irqchip tree.
Just let me know.
M.
Signature · 1 line
Without deviation from the norm, progress is not possible.
Quoted 44 lines · Marc Zyngier
Quoted 32 lines · Linus Walleij
Quoted 21 lines · Marc Zyngier
This is a followup from [2].
I recently realised that the gpiolib play ugly tricks on the unsuspecting
irq_chipstructures by patching the callbacks.Not only this breaks when an
irq_chipstructure is made const (which really should be the default case), but it also forces this structure to be copied at nauseam for each instance of the GPIO block, which is a waste of memory.My current approach is to add a new
irq_chipflag (IRQCHIP_IMMUTABLE) which does what it says on the tin: don't you dare writing to them. Gpiolib is further updated not to install its own callbacks, and it becomes the responsibility of the driver to call into the gpiolib when required. This is similar to what we do for other subsystems such as PCI-MSI.5 drivers are updated to this new model: M1, QC, Tegra, pl061 and AMD (as I actively use them) keeping a single
irq_chipstructure, marking it const, and exposing the new flag.Quoted 7 lines
Nothing breaks, the volume of change is small, the memory usage goes down and we have fewer callbacks that can be used as attack vectors. What's not to love?
Since there wasn't any objection in the previous round of review, I'm going to take this series into -next to see if anything breaks at scale.
Quoted 6 lines
The series:
Acked-by Linus Walleij <[email protected]>Bartosz: if you're happy with this can you apply it to an immutable branch from v5.18-rc1 and merge that into the GPIO for-next and then I can also pull that into pinctrl?
For what it is worth, I've pushed this branch into irqchip-next.
Quoted 7 lines
You can pick it up from:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/gpio-immutable
but I can also drop it from the irqchip tree.
Just let me know.
I would prefer it if it goes as is now and every stakeholder can just pull it. As far as my drivers are concerned I also want to convert them sooner than later, meaning I want to pull this into my little tree as well. Bart, Linus, would it be also preferable for you?
Signature · 7 lines
With Best Regards, Andy Shevchenko _______________________________________________ linux-arm-kernel mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Quoted 9 lines · Andy Shevchenko
Quoted 7 lines · Marc Zyngier
You can pick it up from:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/gpio-immutable
but I can also drop it from the irqchip tree.
Just let me know.
Pulling that looks good to me.
If Bartosz pulls this to the GPIO tree I will also pull it to pin control, I just want him to decide, because the impact is biggest on GPIO.
Quoted 4 lines
I would prefer it if it goes as is now and every stakeholder can just pull it. As far as my drivers are concerned I also want to convert them sooner than later, meaning I want to pull this into my little tree as well. Bart, Linus, would it be also preferable for you?
I'd say let's all three pull this branch, Bart?
Yours,
Linus Walleij
Quoted 9 lines · Marc Zyngier
Quoted 3 lines
Bartosz: if you're happy with this can you apply it to an immutable branch from v5.18-rc1 and merge that into the GPIO for-next and then I can also pull that into pinctrl?
For what it is worth, I've pushed this branch into irqchip-next.
You can pick it up from:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/gpio-immutable
Bartosz are you pulling this? Most of the changes are in GPIO. Patches have started to arrive that go on top of these changes so would be nice to have it in both GPIO and pin control as a baseline.
Yours,
Linus Walleij
Quoted 9 lines · Linus Walleij
Quoted 6 lines · Marc Zyngier
Quoted 3 lines
Bartosz: if you're happy with this can you apply it to an immutable branch from v5.18-rc1 and merge that into the GPIO for-next and then I can also pull that into pinctrl?
For what it is worth, I've pushed this branch into irqchip-next.
Quoted 8 lines
Quoted 3 lines
You can pick it up from:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/gpio-immutable
Bartosz are you pulling this? Most of the changes are in GPIO. Patches have started to arrive that go on top of these changes so would be nice to have it in both GPIO and pin control as a baseline.
I'm happy to queue things on top of my series if that helps.
M.
Signature · 1 line
Without deviation from the norm, progress is not possible.
Quoted 13 lines · Linus Walleij
Quoted 9 lines · Marc Zyngier
Quoted 3 lines
Bartosz: if you're happy with this can you apply it to an immutable branch from v5.18-rc1 and merge that into the GPIO for-next and then I can also pull that into pinctrl?
For what it is worth, I've pushed this branch into irqchip-next.
You can pick it up from:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/gpio-immutable
Quoted 7 lines
Bartosz are you pulling this? Most of the changes are in GPIO. Patches have started to arrive that go on top of these changes so would be nice to have it in both GPIO and pin control as a baseline.
Yours,
Linus Walleij
Yes! Sorry for the delay. Pulling now.
Bart
Quoted 19 lines · Bartosz Golaszewski
Quoted 18 lines · Linus Walleij
Quoted 9 lines · Marc Zyngier
Quoted 3 lines
Bartosz: if you're happy with this can you apply it to an immutable branch from v5.18-rc1 and merge that into the GPIO for-next and then I can also pull that into pinctrl?
For what it is worth, I've pushed this branch into irqchip-next.
You can pick it up from:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/gpio-immutable
Bartosz are you pulling this? Most of the changes are in GPIO. Patches have started to arrive that go on top of these changes so would be nice to have it in both GPIO and pin control as a baseline.
Quoted 4 lines
Quoted 2 lines
Yours,
Linus WalleijYes! Sorry for the delay. Pulling now.
Excellent, pulled it into pincontrol as well.
Yours,
Linus Walleij
Quoted 9 lines · Marc Zyngier
This is a followup from [2].
I recently realised that the gpiolib play ugly tricks on the unsuspecting
irq_chipstructures by patching the callbacks.Not only this breaks when an
irq_chipstructure is made const (which really should be the default case), but it also forces this structure to be copied at nauseam for each instance of the GPIO block, which is a waste of memory.
Is this brings us to the issue with IRQ chip name?
The use case in my mind is the following:
1) we have two or more GPIO chips that supports IRQ;
2) the user registers two IRQs of the same (by number) pin on different chips;
3) cat /proc/interrupt will show 'my_gpio_chip XX', where XX is the number.
So, do I understand correct current state of affairs?
If so, we have to fix this to have any kind of ID added to the chip name that we can map /proc/interrupts output correctly.
Quoted 18 lines
My current approach is to add a new
irq_chipflag (IRQCHIP_IMMUTABLE) which does what it says on the tin: don't you dare writing to them. Gpiolib is further updated not to install its own callbacks, and it becomes the responsibility of the driver to call into the gpiolib when required. This is similar to what we do for other subsystems such as PCI-MSI.5 drivers are updated to this new model: M1, QC, Tegra, pl061 and AMD (as I actively use them) keeping a single
irq_chipstructure, marking it const, and exposing the new flag.Nothing breaks, the volume of change is small, the memory usage goes down and we have fewer callbacks that can be used as attack vectors. What's not to love?
Since there wasn't any objection in the previous round of review, I'm going to take this series into -next to see if anything breaks at scale.
Signature · 2 lines
With Best Regards, Andy Shevchenko
Quoted 18 lines · Andy Shevchenko
Quoted 9 lines · Marc Zyngier
This is a followup from [2].
I recently realised that the gpiolib play ugly tricks on the unsuspecting
irq_chipstructures by patching the callbacks.Not only this breaks when an
irq_chipstructure is made const (which really should be the default case), but it also forces this structure to be copied at nauseam for each instance of the GPIO block, which is a waste of memory.Is this brings us to the issue with IRQ chip name?
The use case in my mind is the following:
1) we have two or more GPIO chips that supports IRQ;
2) the user registers two IRQs of the same (by number) pin on different chips;
3) cat/proc/interruptwill show 'my_gpio_chipXX', where XX is the number.
Quoted 4 lines
So, do I understand correct current state of affairs?
If so, we have to fix this to have any kind of ID added to the chip name that we can map
/proc/interruptsoutput correctly.
Hmm... Some drivers are using static names, some -- dynamically prepared (one way or another). Either way I think the ID is good to have if we still miss it.
Signature · 9 lines
With Best Regards, Andy Shevchenko _______________________________________________ linux-arm-kernel mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
Quoted 20 lines · Andy Shevchenko
Quoted 18 lines · Andy Shevchenko
Quoted 9 lines · Marc Zyngier
This is a followup from [2].
I recently realised that the gpiolib play ugly tricks on the unsuspecting
irq_chipstructures by patching the callbacks.Not only this breaks when an
irq_chipstructure is made const (which really should be the default case), but it also forces this structure to be copied at nauseam for each instance of the GPIO block, which is a waste of memory.Is this brings us to the issue with IRQ chip name?
The use case in my mind is the following:
1) we have two or more GPIO chips that supports IRQ;
2) the user registers two IRQs of the same (by number) pin on different chips;
3) cat/proc/interruptwill show 'my_gpio_chipXX', where XX is the number.
Quoted 8 lines
Quoted 4 lines
So, do I understand correct current state of affairs?
If so, we have to fix this to have any kind of ID added to the chip name that we can map
/proc/interruptsoutput correctly.Hmm... Some drivers are using static names, some -- dynamically prepared (one way or another). Either way I think the ID is good to have if we still miss it.
No, this is a terrible idea. /proc/interrupts gives you a hint of which driver/subsystem deals with the interrupt. This isn't a source of topological information. /sys/kernel/debug/irq has all the information you can dream of, and much more. Just make use of it.
M.
Signature · 1 line
Without deviation from the norm, progress is not possible.
Quoted 27 lines · Marc Zyngier
Quoted 25 lines · Andy Shevchenko
Quoted 22 lines · Andy Shevchenko
Quoted 9 lines · Marc Zyngier
This is a followup from [2].
I recently realised that the gpiolib play ugly tricks on the unsuspecting
irq_chipstructures by patching the callbacks.Not only this breaks when an
irq_chipstructure is made const (which really should be the default case), but it also forces this structure to be copied at nauseam for each instance of the GPIO block, which is a waste of memory.Is this brings us to the issue with IRQ chip name?
The use case in my mind is the following:
1) we have two or more GPIO chips that supports IRQ;
2) the user registers two IRQs of the same (by number) pin on different chips;
3) cat/proc/interruptwill show 'my_gpio_chipXX', where XX is the number.So, do I understand correct current state of affairs?
If so, we have to fix this to have any kind of ID added to the chip name that we can map
/proc/interruptsoutput correctly.
Quoted 8 lines
Quoted 3 lines
Hmm... Some drivers are using static names, some -- dynamically prepared (one way or another). Either way I think the ID is good to have if we still miss it.
No, this is a terrible idea.
/proc/interruptsgives you a hint of which driver/subsystem deals with the interrupt. This isn't a source of topological information./sys/kernel/debug/irqhas all the information you can dream of, and much more. Just make use of it.
Okay, so IIUC the mapping is that: I got a vIRQ number from /proc/interrupts, but then I have to mount debugfs and look into it for a detailed answer of which chip/domain this vIRQ belongs to. Also /sys/kernel/irq rings a bell, but not sure if it's related.
Signature · 2 lines
With Best Regards, Andy Shevchenko
Quoted 33 lines · Andy Shevchenko
Quoted 31 lines · Marc Zyngier
Quoted 28 lines · Andy Shevchenko
Quoted 18 lines · Andy Shevchenko
Quoted 9 lines · Marc Zyngier
This is a followup from [2].
I recently realised that the gpiolib play ugly tricks on the unsuspecting
irq_chipstructures by patching the callbacks.Not only this breaks when an
irq_chipstructure is made const (which really should be the default case), but it also forces this structure to be copied at nauseam for each instance of the GPIO block, which is a waste of memory.Is this brings us to the issue with IRQ chip name?
The use case in my mind is the following:
1) we have two or more GPIO chips that supports IRQ;
2) the user registers two IRQs of the same (by number) pin on different chips;
3) cat/proc/interruptwill show 'my_gpio_chipXX', where XX is the number.Quoted 4 lines
So, do I understand correct current state of affairs?
If so, we have to fix this to have any kind of ID added to the chip name that we can map
/proc/interruptsoutput correctly.Hmm... Some drivers are using static names, some -- dynamically prepared (one way or another). Either way I think the ID is good to have if we still miss it.
Quoted 8 lines
Quoted 4 lines
No, this is a terrible idea.
/proc/interruptsgives you a hint of which driver/subsystem deals with the interrupt. This isn't a source of topological information./sys/kernel/debug/irqhas all the information you can dream of, and much more. Just make use of it.Okay, so IIUC the mapping is that: I got a vIRQ number from
/proc/interrupts, but then I have to mount debugfs and look into it for a detailed answer of which chip/domain this vIRQ belongs to.
Normal users shouldn't care about irqdomains. If you are developing, you already have debugfs enabled and mounted on your system.
Quoted 1 line
Also
/sys/kernel/irqrings a bell, but not sure if it's related.
This is the same thing as /proc/interrupt, just dumped with a different format.
M.
Signature · 1 line
Without deviation from the norm, progress is not possible.
Quoted 12 lines · Andy Shevchenko
Quoted 9 lines · Marc Zyngier
This is a followup from [2].
I recently realised that the gpiolib play ugly tricks on the unsuspecting
irq_chipstructures by patching the callbacks.Not only this breaks when an
irq_chipstructure is made const (which really should be the default case), but it also forces this structure to be copied at nauseam for each instance of the GPIO block, which is a waste of memory.
Quoted 6 lines
Is this brings us to the issue with IRQ chip name?
The use case in my mind is the following:
1) we have two or more GPIO chips that supports IRQ;
2) the user registers two IRQs of the same (by number) pin on different chips;
3) cat/proc/interruptwill show 'my_gpio_chipXX', where XX is the number.
/proc/interrupts isn't a dumping ground for debug information. Yes, some irqchips do that, and they have been fixed by providing the irq_print_chip callback, thus ensuring that the irq_chip structure is never written to. I would have loved to simply get rid of the variable string, but this is obviously ABI, and we can't break that.
Quoted 4 lines
So, do I understand correct current state of affairs?
If so, we have to fix this to have any kind of ID added to the chip name that we can map
/proc/interruptsoutput correctly.
This is already done.
That's not an excuse to add more of those though. We already have the required infrastructure in debugfs, and that's where this sort of thing should happen.
M.
Signature · 1 line
Without deviation from the norm, progress is not possible.