riscv: Fix ALT_THEAD_PMA's asm parameters
PATCH 1/1 riscv: Fix ALT_THEAD_PMA's asm parameters
After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"), builds with LLVM's integrated assembler fail like:
In file included from arch/riscv/kernel/asm-offsets.c:10:
In file included from ./include/linux/mm.h:29:
In file included from ./include/linux/pgtable.h:6:
In file included from ./arch/riscv/include/asm/pgtable.h:114:
./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
ALT_THEAD_PMA(prot_val);
^
./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
: "0"(_val), \
^This was reported upstream to LLVM where Jessica pointed out a couple of issues with the existing implementation of ALT_THEAD_PMA:
* t3 is modified but not listed in the clobbers list.
* "+r"(_val) marks _val as both an input and output of the asm but then "0"(_val) marks _val as an input matching constraint, which does not make much sense in this situation, as %1 is not actually used in the asm and matching constraints are designed to be used for different inputs that need to use the same register.
Drop the matching contraint and shift all the operands by one, as %1 is unused, and mark t3 as clobbered. This resolves the build error and goes not cause any problems with GNU as.
--- arch/riscv/include/asm/errata_list.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)
arch/riscv/include/asm/errata_list.h +7 -7
@@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \ "nop\n\t" \ "nop\n\t" \ "nop", \ - "li t3, %2\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %1\n\t" \ + "slli t3, t3, %3\n\t" \ "and t3, %0, t3\n\t" \ "bne t3, zero, 2f\n\t" \ - "li t3, %3\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %2\n\t" \ + "slli t3, t3, %3\n\t" \ "or %0, %0, t3\n\t" \ "2:", THEAD_VENDOR_ID, \ ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ : "+r"(_val) \ - : "0"(_val), \ -" I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ +: " I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ " I "(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \ - "I"(ALT_THEAD_PBMT_SHIFT)) +" I "(ALT_THEAD_PBMT_SHIFT) \ + : "t3") #else #define ALT_THEAD_PMA(_val)#endif
base-commit: 93c0651617a62a69717299f1464dda798af8bebb
Signature · 1 line
2.36.1
Quoted 20 lines · Nathan Chancellor
After commit
a35707c3d850("riscv: add memory-type errata for T-Head"), builds with LLVM's integrated assembler fail like:In file included from
arch/riscv/kernel/asm-offsets.c:10:
In file included from./include/linux/mm.h:29:
In file included from./include/linux/pgtable.h:6:
In file included from./arch/riscv/include/asm/pgtable.h:114:
./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asmALT_THEAD_PMA(prot_val); ^ ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA' : "0"(_val), \ ^This was reported upstream to LLVM where Jessica pointed out a couple of issues with the existing implementation of
ALT_THEAD_PMA:* t3 is modified but not listed in the clobbers list.
Quoted 7 lines
* "+r"(_val) marks
_valas both an input and output of the asm but then "0"(_val) marks_valas an input matching constraint, which does not make much sense in this situation, as %1 is not actually used in the asm and matching constraints are designed to be used for different inputs that need to use the same register.Drop the matching contraint and shift all the operands by one, as %1 is
s/contraint/constraint/
Thanks for the fix!
Quoted 50 lines
unused, and mark t3 as clobbered. This resolves the build error and goes not cause any problems with GNU as.
Fixes a35707c3d850 ("riscv: add memory-type errata for T-Head")Suggested-by Jessica Clarke <[email protected]>Signed-off-by Nathan Chancellor <[email protected]>--- arch/riscv/include/asm/errata_list.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)arch/riscv/include/asm/errata_list.h +7
-7@@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \ "nop\n\t" \ "nop\n\t" \ "nop", \ - "li t3, %2\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %1\n\t" \ + "slli t3, t3, %3\n\t" \ "and t3, %0, t3\n\t" \ "bne t3, zero, 2f\n\t" \ - "li t3, %3\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %2\n\t" \ + "slli t3, t3, %3\n\t" \ "or %0, %0, t3\n\t" \ "2:", THEAD_VENDOR_ID, \ ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ : "+r"(_val) \ - : "0"(_val), \ - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ +: " I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ " I "(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \ - "I"(ALT_THEAD_PBMT_SHIFT)) +" I "(ALT_THEAD_PBMT_SHIFT) \ + : "t3") #else #define ALT_THEAD_PMA(_val)#endif base-commit:
93c0651617a62a69717299f1464dda798af8bebb--
2.36.1
Signature · 2 lines
Thanks, ~Nick Desaulniers
Am Mittwoch, 18. Mai 2022, 20:45:29 CEST schrieb Nathan Chancellor:
Quoted 29 lines
After commit
a35707c3d850("riscv: add memory-type errata for T-Head"), builds with LLVM's integrated assembler fail like:In file included from
arch/riscv/kernel/asm-offsets.c:10:
In file included from./include/linux/mm.h:29:
In file included from./include/linux/pgtable.h:6:
In file included from./arch/riscv/include/asm/pgtable.h:114:
./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asmALT_THEAD_PMA(prot_val); ^ ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA' : "0"(_val), \ ^This was reported upstream to LLVM where Jessica pointed out a couple of issues with the existing implementation of
ALT_THEAD_PMA:* t3 is modified but not listed in the clobbers list.
* "+r"(_val) marks
_valas both an input and output of the asm but then "0"(_val) marks_valas an input matching constraint, which does not make much sense in this situation, as %1 is not actually used in the asm and matching constraints are designed to be used for different inputs that need to use the same register.Drop the matching contraint and shift all the operands by one, as %1 is unused, and mark t3 as clobbered. This resolves the build error and goes not cause any problems with GNU as.
Quoted 6 lines
Fixes a35707c3d850 ("riscv: add memory-type errata for T-Head")Suggested-by Jessica Clarke <[email protected]>Signed-off-by Nathan Chancellor <[email protected]>
I'm not sure anymore why it ended up the original way, but with this change it definitly looks better
On an actual D1-Nezha board also
Thanks for doing that improvement
Heiko
Quoted 39 lines
--- arch/riscv/include/asm/errata_list.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)arch/riscv/include/asm/errata_list.h +7
-7@@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \ "nop\n\t" \ "nop\n\t" \ "nop", \ - "li t3, %2\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %1\n\t" \ + "slli t3, t3, %3\n\t" \ "and t3, %0, t3\n\t" \ "bne t3, zero, 2f\n\t" \ - "li t3, %3\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %2\n\t" \ + "slli t3, t3, %3\n\t" \ "or %0, %0, t3\n\t" \ "2:", THEAD_VENDOR_ID, \ ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ : "+r"(_val) \ - : "0"(_val), \ -" I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ +: " I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ " I "(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \ - "I"(ALT_THEAD_PBMT_SHIFT)) +" I "(ALT_THEAD_PBMT_SHIFT) \ + : "t3") #else #define ALT_THEAD_PMA(_val)#endif base-commit:
93c0651617a62a69717299f1464dda798af8bebb
Small ping on this and https://lore.kernel.org/[email protected]/.
Our builds on -next have been broken for a week now. Hopefully these can make the first RISC-V pull request to avoid mainline being broken in the same fashion.
Cheers,
Nathan
Quoted 81 lines · Nathan Chancellor
After commit
a35707c3d850("riscv: add memory-type errata for T-Head"), builds with LLVM's integrated assembler fail like:In file included from
arch/riscv/kernel/asm-offsets.c:10:
In file included from./include/linux/mm.h:29:
In file included from./include/linux/pgtable.h:6:
In file included from./arch/riscv/include/asm/pgtable.h:114:
./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asmALT_THEAD_PMA(prot_val); ^ ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA' : "0"(_val), \ ^This was reported upstream to LLVM where Jessica pointed out a couple of issues with the existing implementation of
ALT_THEAD_PMA:* t3 is modified but not listed in the clobbers list.
* "+r"(_val) marks
_valas both an input and output of the asm but then "0"(_val) marks_valas an input matching constraint, which does not make much sense in this situation, as %1 is not actually used in the asm and matching constraints are designed to be used for different inputs that need to use the same register.Drop the matching contraint and shift all the operands by one, as %1 is unused, and mark t3 as clobbered. This resolves the build error and goes not cause any problems with GNU as.
Fixes a35707c3d850 ("riscv: add memory-type errata for T-Head")Suggested-by Jessica Clarke <[email protected]>Signed-off-by Nathan Chancellor <[email protected]>--- arch/riscv/include/asm/errata_list.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)arch/riscv/include/asm/errata_list.h +7
-7@@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \ "nop\n\t" \ "nop\n\t" \ "nop", \ - "li t3, %2\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %1\n\t" \ + "slli t3, t3, %3\n\t" \ "and t3, %0, t3\n\t" \ "bne t3, zero, 2f\n\t" \ - "li t3, %3\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %2\n\t" \ + "slli t3, t3, %3\n\t" \ "or %0, %0, t3\n\t" \ "2:", THEAD_VENDOR_ID, \ ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ : "+r"(_val) \ - : "0"(_val), \ -" I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ +: " I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ " I "(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \ - "I"(ALT_THEAD_PBMT_SHIFT)) +" I "(ALT_THEAD_PBMT_SHIFT) \ + : "t3") #else #define ALT_THEAD_PMA(_val)#endif base-commit:
93c0651617a62a69717299f1464dda798af8bebbSignature · 7 lines
2.36.1 _______________________________________________ linux-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-riscv
Quoted 5 lines · Nathan Chancellor
Small ping on this and https://lore.kernel.org/[email protected]/.
Our builds on -next have been broken for a week now. Hopefully these can make the first RISC-V pull request to avoid mainline being broken in the same fashion.
One more small ping. The patch linked above made it into 5.19-rc1 but this one has not been applied so our builds are still broken.
Cheers,
Nathan
Quoted 83 lines · Nathan Chancellor
Quoted 81 lines
After commit
a35707c3d850("riscv: add memory-type errata for T-Head"), builds with LLVM's integrated assembler fail like:In file included from
arch/riscv/kernel/asm-offsets.c:10:
In file included from./include/linux/mm.h:29:
In file included from./include/linux/pgtable.h:6:
In file included from./arch/riscv/include/asm/pgtable.h:114:
./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asmALT_THEAD_PMA(prot_val); ^ ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA' : "0"(_val), \ ^This was reported upstream to LLVM where Jessica pointed out a couple of issues with the existing implementation of
ALT_THEAD_PMA:* t3 is modified but not listed in the clobbers list.
* "+r"(_val) marks
_valas both an input and output of the asm but then "0"(_val) marks_valas an input matching constraint, which does not make much sense in this situation, as %1 is not actually used in the asm and matching constraints are designed to be used for different inputs that need to use the same register.Drop the matching contraint and shift all the operands by one, as %1 is unused, and mark t3 as clobbered. This resolves the build error and goes not cause any problems with GNU as.
Fixes a35707c3d850 ("riscv: add memory-type errata for T-Head")Suggested-by Jessica Clarke <[email protected]>Signed-off-by Nathan Chancellor <[email protected]>--- arch/riscv/include/asm/errata_list.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)arch/riscv/include/asm/errata_list.h +7
-7@@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \ "nop\n\t" \ "nop\n\t" \ "nop", \ - "li t3, %2\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %1\n\t" \ + "slli t3, t3, %3\n\t" \ "and t3, %0, t3\n\t" \ "bne t3, zero, 2f\n\t" \ - "li t3, %3\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %2\n\t" \ + "slli t3, t3, %3\n\t" \ "or %0, %0, t3\n\t" \ "2:", THEAD_VENDOR_ID, \ ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ : "+r"(_val) \ - : "0"(_val), \ -" I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ +: " I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ " I "(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \ - "I"(ALT_THEAD_PBMT_SHIFT)) +" I "(ALT_THEAD_PBMT_SHIFT) \ + : "t3") #else #define ALT_THEAD_PMA(_val)#endif base-commit:
93c0651617a62a69717299f1464dda798af8bebbSignature · 7 lines
2.36.1 _______________________________________________ linux-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-riscv
Palmer Dabbelt
maintainerQuoted 9 lines · On Mon, 13 Jun 2022 13:26:17 PDT (-0700), [email protected] wrote:
Quoted 5 lines · Nathan Chancellor
Small ping on this and https://lore.kernel.org/[email protected]/.
Our builds on -next have been broken for a week now. Hopefully these can make the first RISC-V pull request to avoid mainline being broken in the same fashion.
One more small ping. The patch linked above made it into 5.19-rc1 but this one has not been applied so our builds are still broken.
Sorry I dropped the ball on this one, it's in fixes. Thanks!
Quoted 86 lines
Cheers,
NathanQuoted 83 lines · Nathan Chancellor
Quoted 81 lines
After commit
a35707c3d850("riscv: add memory-type errata for T-Head"), builds with LLVM's integrated assembler fail like:In file included from
arch/riscv/kernel/asm-offsets.c:10:
In file included from./include/linux/mm.h:29:
In file included from./include/linux/pgtable.h:6:
In file included from./arch/riscv/include/asm/pgtable.h:114:
./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asmALT_THEAD_PMA(prot_val); ^ ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA' : "0"(_val), \ ^This was reported upstream to LLVM where Jessica pointed out a couple of issues with the existing implementation of
ALT_THEAD_PMA:* t3 is modified but not listed in the clobbers list.
* "+r"(_val) marks
_valas both an input and output of the asm but then "0"(_val) marks_valas an input matching constraint, which does not make much sense in this situation, as %1 is not actually used in the asm and matching constraints are designed to be used for different inputs that need to use the same register.Drop the matching contraint and shift all the operands by one, as %1 is unused, and mark t3 as clobbered. This resolves the build error and goes not cause any problems with GNU as.
Fixes a35707c3d850 ("riscv: add memory-type errata for T-Head")Suggested-by Jessica Clarke <[email protected]>Signed-off-by Nathan Chancellor <[email protected]>--- arch/riscv/include/asm/errata_list.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)arch/riscv/include/asm/errata_list.h +7
-7@@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \ "nop\n\t" \ "nop\n\t" \ "nop", \ - "li t3, %2\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %1\n\t" \ + "slli t3, t3, %3\n\t" \ "and t3, %0, t3\n\t" \ "bne t3, zero, 2f\n\t" \ - "li t3, %3\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %2\n\t" \ + "slli t3, t3, %3\n\t" \ "or %0, %0, t3\n\t" \ "2:", THEAD_VENDOR_ID, \ ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ : "+r"(_val) \ - : "0"(_val), \ -" I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ +: " I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ " I "(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \ - "I"(ALT_THEAD_PBMT_SHIFT)) +" I "(ALT_THEAD_PBMT_SHIFT) \ + : "t3") #else #define ALT_THEAD_PMA(_val)#endif base-commit:
93c0651617a62a69717299f1464dda798af8bebb--
2.36.1_______________________________________________
linux-riscv mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-riscv
Quoted 4 lines · Palmer Dabbelt
Quoted 3 lines · On Mon, 13 Jun 2022 13:26:17 PDT (-0700), [email protected] wrote:
Quoted 2 lines · Nathan Chancellor
Small ping on this and https://lore.kernel.org/[email protected]/.
Quoted 8 lines
Quoted 6 lines
Quoted 3 lines
Our builds on -next have been broken for a week now. Hopefully these can make the first RISC-V pull request to avoid mainline being broken in the same fashion.
One more small ping. The patch linked above made it into 5.19-rc1 but this one has not been applied so our builds are still broken.
Sorry I dropped the ball on this one, it's in fixes. Thanks!
Better late than never :) thanks a lot!
Cheers,
Nathan
Quoted 83 lines
Quoted 83 lines
Quoted 83 lines · Nathan Chancellor
Quoted 81 lines
After commit
a35707c3d850("riscv: add memory-type errata for T-Head"), builds with LLVM's integrated assembler fail like:In file included from
arch/riscv/kernel/asm-offsets.c:10:
In file included from./include/linux/mm.h:29:
In file included from./include/linux/pgtable.h:6:
In file included from./arch/riscv/include/asm/pgtable.h:114:
./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asmALT_THEAD_PMA(prot_val); ^ ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA' : "0"(_val), \ ^This was reported upstream to LLVM where Jessica pointed out a couple of issues with the existing implementation of
ALT_THEAD_PMA:* t3 is modified but not listed in the clobbers list.
* "+r"(_val) marks
_valas both an input and output of the asm but then "0"(_val) marks_valas an input matching constraint, which does not make much sense in this situation, as %1 is not actually used in the asm and matching constraints are designed to be used for different inputs that need to use the same register.Drop the matching contraint and shift all the operands by one, as %1 is unused, and mark t3 as clobbered. This resolves the build error and goes not cause any problems with GNU as.
Fixes a35707c3d850 ("riscv: add memory-type errata for T-Head")Suggested-by Jessica Clarke <[email protected]>Signed-off-by Nathan Chancellor <[email protected]>--- arch/riscv/include/asm/errata_list.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)arch/riscv/include/asm/errata_list.h +7
-7@@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \ "nop\n\t" \ "nop\n\t" \ "nop", \ - "li t3, %2\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %1\n\t" \ + "slli t3, t3, %3\n\t" \ "and t3, %0, t3\n\t" \ "bne t3, zero, 2f\n\t" \ - "li t3, %3\n\t" \ - "slli t3, t3, %4\n\t" \ + "li t3, %2\n\t" \ + "slli t3, t3, %3\n\t" \ "or %0, %0, t3\n\t" \ "2:", THEAD_VENDOR_ID, \ ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \ : "+r"(_val) \ - : "0"(_val), \ -" I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ +: " I "(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \ " I "(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \ - "I"(ALT_THEAD_PBMT_SHIFT)) +" I "(ALT_THEAD_PBMT_SHIFT) \ + : "t3") #else #define ALT_THEAD_PMA(_val)#endif base-commit:
93c0651617a62a69717299f1464dda798af8bebb--
2.36.1_______________________________________________
linux-riscv mailing list
[email protected]
http://lists.infradead.org/mailman/listinfo/linux-riscv