mmc: sdhci-brcmstb: Add support for optional sdio_freq clock
Subsystems (5)
v3 cover mmc: sdhci-brcmstb: Add support for optional sdio_freq clock
v3 changes:
- PATCH 1/2 v3
- Based on review comments reverted to using the 'clock-frequency' field in sdhci-brcmstb controller node for the sdio_freq clock
- PATCH 2/2 v3
- use devm_clk_get_optional() to get sdio_freq clock
- look for clock-frequency value if set in the sdhci-brcmstb dt node
- Added pmops to unprepare, prepare sdio_freq clock on suspend/resume in addition to the sdhci_pltfm_suspend/resume()
v2 changes :
- Added Reviewed-by tag to PATCH v2 1/2
- In PATCH v2 2/2 Used host->mmc->f_max instead of parsing the device tree again, /s/clock-frequency/max-frequency in commit message
v1 Changes :
Sending the remaining 2 patches separately after implementing review comments for the patches 3/4 and 4/4 as part of the following:
"mmc: sdhci-brcmstb: host controller clock enhancements"
https://lore.kernel.org/linux-arm-kernel/[email protected]/t/
changes are rebased overgit://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.git refs/heads/next
tested brcm,sdhci-brcmstb.yaml and driver with and without sdio_freq clock.
Kamal Dasu (2):
dt-bindings: mmc: Add Broadcom optional sdio_freq clock
mmc: sdhci-brcmstb: Add ability to increase max clock rate for 72116b0
.../bindings/mmc/brcm,sdhci-brcmstb.yaml | 32 +++++++-- drivers/mmc/host/sdhci-brcmstb.c | 69 ++++++++++++++++++- 2 files changed, 94 insertions(+), 7 deletions(-)
Signature · 1 line
2.17.1
PATCH v3 1/2 dt-bindings: mmc: Add Broadcom optional sdio_freq clock
The 72116B0 has improved SDIO controllers that allow the max clock rate to be increased from a max of 100MHz to a max of 150MHz. Optional "sdio_freq" clock is used to drive the bus clock if present optional property "clock-frequency" specifies a base clock frequency in Hz that overrides the base clock frequency in the CAPS registers.
--- .../bindings/mmc/brcm,sdhci-brcmstb.yaml | 32 +++++++++++++++---- 1 file changed, 26 insertions(+), 6 deletions(-)
Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml +26 -6
@@ -10,9 +10,6 @@ maintainers: - Al Cooper <[email protected]> - Florian Fainelli <[email protected]> -allOf: - - $ref: mmc-controller.yaml# - properties: compatible: oneOf:
@@ -42,23 +39,46 @@ properties: maxItems: 1 clocks: - maxItems: 1 - description: - handle to core clock for the sdhci controller. + minItems: 1 + items: + - description: handle to core clock for the sdhci controller + - description: handle to improved 150Mhz clock for sdhci controller (Optional clock) clock-names: + minItems: 1 items: - const: sw_sdio + - const: sdio_freq # Optional clock + + clock-frequency: + description: + Maximum operating frequency of sdio_freq sdhci controller clock + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 100000000 + maximum: 150000000 sdhci,auto-cmd12: type: boolean description: Specifies that controller should use auto CMD12 +allOf: + - $ref: mmc-controller.yaml# + - if: + properties: + clock-names: + contains: + const: sdio_freq + + then: + required: + - clock-frequency + required: - compatible - reg - interrupts - clocks + - clock-names unevaluatedProperties: false
Signature · 1 line
2.17.1
PATCH v3 2/2 mmc: sdhci-brcmstb: Add ability to increase max clock rate for 72116b0
In reply to Kamal DasuThe 72116B0 has improved SDIO controllers that allow the max clock rate to be increased from a max of 100MHz to a max of 150MHz. The driver will need to get the clock and increase it's default rate and override the caps register, that still indicates a max of 100MHz. The new clock will be named "sdio_freq" in the DT node's "clock-names" list. The driver will use a DT property, "clock-frequency", to enable this functionality and will get the actual rate in MHz from the property to allow various speeds to be requested.
--- drivers/mmc/host/sdhci-brcmstb.c | 69 +++++++++++++++++++++++++++++++- 1 file changed, 68 insertions(+), 1 deletion(-)
drivers/mmc/host/sdhci-brcmstb.c +68 -1
@@ -31,6 +31,8 @@struct sdhci_brcmstb_priv {void __iomem *cfg_regs;unsigned int flags; +struct clk *base_clk; +u32 base_freq_hz; };struct brcmstb_match_priv {
@@ -250,9 +252,11 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)struct sdhci_pltfm_host *pltfm_host;const struct of_device_id *match;struct sdhci_brcmstb_priv *priv; +u32 actual_clock_mhz;struct sdhci_host *host;struct resource *iomem;struct clk *clk; +struct clk *base_clk;int res; match =of_match_node (sdhci_brcm_of_match, pdev->dev.of_node);
@@ -330,6 +334,35 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev)if (match_priv->flags &BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT ) host->quirks |=SDHCI_QUIRK_BROKEN_TIMEOUT_VAL ; +/* Change the base clock frequency if the DT property exists */ +if (device_property_read_u32 (&pdev->dev,"clock-frequency" , + &priv->base_freq_hz) !=0 ) + goto add_host; + + base_clk =devm_clk_get_optional (&pdev->dev,"sdio_freq" ); +if (IS_ERR (base_clk)) { +dev_warn (&pdev->dev,"Clock for \"sdio_freq\" not found\n" ); + goto add_host; + } + + res =clk_prepare_enable (base_clk); +if (res) + goto err; + +/* set improved clock rate */ +clk_set_rate (base_clk, priv->base_freq_hz); + actual_clock_mhz =clk_get_rate (base_clk) /1000000 ; + + host->caps &= ~SDHCI_CLOCK_V3_BASE_MASK ; + host->caps |= (actual_clock_mhz <<SDHCI_CLOCK_BASE_SHIFT ); +/* Disable presets because they are now incorrect */ + host->quirks2 |=SDHCI_QUIRK2_PRESET_VALUE_BROKEN ; + +dev_dbg (&pdev->dev,"Base Clock Frequency changed to %dMHz\n" , + actual_clock_mhz); + priv->base_clk = base_clk; + +add_host: res =sdhci_brcmstb_add_host (host, priv);if (res) goto err;
@@ -340,6 +373,7 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) err:sdhci_pltfm_free (pdev); err_clk: +clk_disable_unprepare (base_clk);clk_disable_unprepare (clk);return res; }
@@ -351,11 +385,44 @@ static void sdhci_brcmstb_shutdown(struct platform_device *pdev)MODULE_DEVICE_TABLE (of, sdhci_brcm_of_match); +#ifdef CONFIG_PM_SLEEP +static int sdhci_brcmstb_suspend (struct device *dev) +{ +struct sdhci_host *host =dev_get_drvdata (dev); +struct sdhci_pltfm_host *pltfm_host =sdhci_priv (host); +struct sdhci_brcmstb_priv *priv =sdhci_pltfm_priv (pltfm_host); + +clk_disable_unprepare (priv->base_clk); +return sdhci_pltfm_suspend (dev); +} + +static int sdhci_brcmstb_resume (struct device *dev) +{ +struct sdhci_host *host =dev_get_drvdata (dev); +struct sdhci_pltfm_host *pltfm_host =sdhci_priv (host); +struct sdhci_brcmstb_priv *priv =sdhci_pltfm_priv (pltfm_host); +int ret; + + ret =sdhci_pltfm_resume (dev); +if (!ret && priv->base_freq_hz) { + ret =clk_prepare_enable (priv->base_clk); +if (!ret) + ret =clk_set_rate (priv->base_clk, priv->base_freq_hz); + } + +return ret; +} +#endif + +static const struct dev_pm_ops sdhci_brcmstb_pmops = { +SET_SYSTEM_SLEEP_PM_OPS (sdhci_brcmstb_suspend, sdhci_brcmstb_resume) +}; +static struct platform_driver sdhci_brcmstb_driver = { .driver = { .name ="sdhci-brcmstb" , .probe_type =PROBE_PREFER_ASYNCHRONOUS , - .pm = &sdhci_pltfm_pmops, + .pm = &sdhci_brcmstb_pmops, .of_match_table =of_match_ptr (sdhci_brcm_of_match), }, .probe = sdhci_brcmstb_probe,
Signature · 1 line
2.17.1
Re: [PATCH v3 2/2] mmc: sdhci-brcmstb: Add ability to increase max clock rate for 72116b0
Quoted 11 lines · Kamal Dasu
The 72116B0 has improved SDIO controllers that allow the max clock rate to be increased from a max of 100MHz to a max of 150MHz. The driver will need to get the clock and increase it's default rate and override the caps register, that still indicates a max of 100MHz. The new clock will be named "
sdio_freq" in the DT node's "clock-names" list. The driver will use a DT property, "clock-frequency", to enable this functionality and will get the actual rate in MHz from the property to allow various speeds to be requested.Signed-off-by Al Cooper <[email protected]>Signed-off-by Kamal Dasu <[email protected]>
Signature · 1 line
Florian
Ulf Hansson
AppliedQuoted 27 lines · Kamal Dasu
v3 changes:
- PATCH 1/2 v3
- Based on review comments reverted to using the 'clock-frequency' field in sdhci-brcmstb controller node for thesdio_freqclock
- PATCH 2/2 v3
- usedevm_clk_get_optional()to getsdio_freqclock
- look for clock-frequency value if set in the sdhci-brcmstb dt node
- Added pmops to unprepare, preparesdio_freqclock on suspend/resume in addition to the sdhci_pltfm_suspend/resume()v2 changes :
- Added Reviewed-by tag to PATCH v2 1/2
- In PATCH v2 2/2 Usedhost->mmc->f_maxinstead of parsing the device tree again, /s/clock-frequency/max-frequency in commit messagev1 Changes :
Sending the remaining 2 patches separately after implementing review comments for the patches 3/4 and 4/4 as part of the following:
"mmc: sdhci-brcmstb: host controller clock enhancements"
https://lore.kernel.org/linux-arm-kernel/[email protected]/t/
changes are rebased overgit://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc.gitrefs/heads/nexttested brcm,sdhci-brcmstb.yaml and driver with and without
sdio_freqclock.
Quoted 8 lines
Kamal Dasu (2):
dt-bindings: mmc: Add Broadcom optionalsdio_freqclock
mmc: sdhci-brcmstb: Add ability to increase max clock rate for 72116b0.../bindings/mmc/brcm,sdhci-brcmstb.yaml | 32 +++++++-- drivers/mmc/host/sdhci-brcmstb.c | 69 ++++++++++++++++++- 2 files changed, 94 insertions(+), 7 deletions(-)
Queued for v5.20 on the devel branch, thanks!
Kind regards
Uffe