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arm64: dts: qcom: ipq6018: correct QUP peripheral labels

PATCH Applied Robert Marko 2 participants 2 messages Jun 4, 2022 – Jul 3, 2022

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Robert Marko

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PATCH 1/1 arm64: dts: qcom: ipq6018: correct QUP peripheral labels

Current QUP peripheral labels like spi_0 and i2c_0 dont really tell what is the exact QUP HW being used as there are actually 6 identical QUP HW blocks for UART, SPI and I2C.
For example current i2c_0 label actually points to the QUP2 I2C HW.

This style of labeling does not follow what the rest of Qualcomm SoC-s use, for example IPQ8074 which has the identical QUP blocks.
It also makes it really hard to add the missing QUP DT nodes as there are multiple missing.

So utilize the same style as other Qualcomm SoC-s are using and update the CP01 DTS as its the current sole user of them.

Signed-off-by Robert Marko <[email protected]>
---
 arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 ++--
 arch/arm64/boot/dts/qcom/ipq6018.dtsi        | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)
arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts +2 -2
index 5aec18308712..b603961c5831 100644
@@ -29,13 +29,13 @@ &blsp1_uart3 {
 	status = "okay";
 };
 
-&i2c_1 {
+&blsp1_i2c3 {
 	pinctrl-0 = <&i2c_1_pins>;
 	pinctrl-names = "default";
 	status = "okay";
 };
 
-&spi_0 {
+&blsp1_spi1 {
 	cs-select = <0>;
 	status = "okay";
arch/arm64/boot/dts/qcom/ipq6018.dtsi +4 -4
index aac56575e30d..1c3f3d521715 100644
@@ -282,7 +282,7 @@ blsp1_uart3: serial@78b1000 {
 			status = "disabled";
 		};
 
-		spi_0: spi@78b5000 {
+		blsp1_spi1: spi@78b5000 {
 			compatible = "qcom,spi-qup-v2.2.1";
 			#address-cells = <1>;
 			#size-cells = <0>;

@@ -297,7 +297,7 @@ spi_0: spi@78b5000 {
 			status = "disabled";
 		};
 
-		spi_1: spi@78b6000 {
+		blsp1_spi2: spi@78b6000 {
 			compatible = "qcom,spi-qup-v2.2.1";
 			#address-cells = <1>;
 			#size-cells = <0>;

@@ -312,7 +312,7 @@ spi_1: spi@78b6000 {
 			status = "disabled";
 		};
 
-		i2c_0: i2c@78b6000 {
+		blsp1_i2c2: i2c@78b6000 {
 			compatible = "qcom,i2c-qup-v2.2.1";
 			#address-cells = <1>;
 			#size-cells = <0>;

@@ -327,7 +327,7 @@ i2c_0: i2c@78b6000 {
 			status = "disabled";
 		};
 
-		i2c_1: i2c@78b7000 { /* BLSP1 QUP2 */
+		blsp1_i2c3: i2c@78b7000 {
 			compatible = "qcom,i2c-qup-v2.2.1";
 			#address-cells = <1>;
 			#size-cells = <0>;
Signature · 1 line
2.36.1
Applied
#1 lore raw

Re: (subset) [PATCH] arm64: dts: qcom: ipq6018: correct QUP peripheral labels

Quoted 11 lines · Robert Marko

Current QUP peripheral labels like spi_0 and i2c_0 dont really tell what is the exact QUP HW being used as there are actually 6 identical QUP HW blocks for UART, SPI and I2C.
For example current i2c_0 label actually points to the QUP2 I2C HW.

This style of labeling does not follow what the rest of Qualcomm SoC-s use, for example IPQ8074 which has the identical QUP blocks.
It also makes it really hard to add the missing QUP DT nodes as there are multiple missing.

[...]

Applied, thanks!

[1/1] arm64: dts: qcom: ipq6018: correct QUP peripheral labels

      commit: f82c48d468521cd9d1a31797c6f9e6cac6f7c1b3

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>