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i2c: designware: introduce a custom scl recovery for SoCFPGA platforms

PATCH Superseded Dinh Nguyen 2 participants 4 messages Jun 16, 2022 – Jun 20, 2022

Subsystems (4)

v5 of 6 Superseded Latest is v6 →

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PATCH v5 1/2 i2c: designware: introduce a custom scl recovery for SoCFPGA platforms

The I2C pins on the SoCFPGA platforms do not go through a GPIO module, thus cannot be recovered by the default method of by doing a GPIO access. Only a reset of the I2C IP block can a recovery be successful.

The assignment of the recover_bus needs to get done before the call to devm_gpiod_get_optional(), otherwise, the assignment is not taking place because of an error after returning from devm_gpiod_get_optional().

---
v5: remove stray nextline
add Reviewed-by
v4: re-arrange code per Andy Shevchenko's recommendation
v3: simplify the function
update commit message
v2: remove change to MODEL_MASK
s/i2c_custom_scl_recovery/i2c_socfpga_scl_recovery

---
 drivers/i2c/busses/i2c-designware-core.h    |  1 +
 drivers/i2c/busses/i2c-designware-master.c  | 49 ++++++++++++++++++---
 drivers/i2c/busses/i2c-designware-platdrv.c |  1 +
 3 files changed, 45 insertions(+), 6 deletions(-)
drivers/i2c/busses/i2c-designware-core.h +1 -0
index 70b80e710990..7b22ec1d6a96 100644
@@ -303,6 +303,7 @@ struct dw_i2c_dev {
 #define MODEL_MSCC_OCELOT	BIT(8)
 #define MODEL_BAIKAL_BT1	BIT(9)
 #define MODEL_AMD_NAVI_GPU	BIT(10)
+#define MODEL_SOCFPGA		BIT(11)
 #define MODEL_MASK		GENMASK(11, 8)
 
 /*
drivers/i2c/busses/i2c-designware-master.c +43 -6

66 lines not on this page · raw message

drivers/i2c/busses/i2c-designware-platdrv.c +1 -0
index 70ade5306e45..b33e015e6732 100644
@@ -153,6 +153,7 @@ static const struct of_device_id dw_i2c_of_match[] = {
 	{ .compatible = "snps,designware-i2c", },
 	{ .compatible = "mscc,ocelot-i2c", .data = (void *)MODEL_MSCC_OCELOT },
 	{ .compatible = "baikal,bt1-sys-i2c", .data = (void *)MODEL_BAIKAL_BT1 },
+	{ .compatible = "intel,socfpga-i2c", .data = (void *)MODEL_SOCFPGA },
 	{},
 };
 MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
Signature · 1 line
2.25.1
#1 lore raw

PATCH v5 2/2 dt-bindings: i2c: dw: Add Intel's SoCFPGA I2C controller

The I2C pins on Intel's SoCFPGA platform are not connected to GPIOs and thus cannot be recovered by the standard GPIO method.

Document the "intel,socfpga-i2c" binding.

---
v5: no changes
v4: no changes
v3: no changes
v2: Added Acked-by

---
 Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml | 2 ++
 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml +2 -0
index d9293c57f573..a130059e97ab 100644
@@ -33,6 +33,8 @@ properties:
           - const: snps,designware-i2c
       - description: Baikal-T1 SoC System I2C controller
         const: baikal,bt1-sys-i2c
+      - description: Intel's SoCFPGA I2C controller
+        const: intel,socfpga-i2c
 
   reg:
     minItems: 1
Signature · 1 line
2.25.1
#2 lore raw
In reply to Dinh Nguyen

Hi

Quoted 4 lines · Dinh Nguyen

The I2C pins on the SoCFPGA platforms do not go through a GPIO module, thus cannot be recovered by the default method of by doing a GPIO access. Only a reset of the I2C IP block can a recovery be successful.

One thing what is unclear to me how does this release the I2C slave that potentially keeps the SDA stuck low. Does platform specific reset sequence send 9 SCL pulses, toggle HW reset of the clients or cycle power of them?

If recovery is only controller point of view then worth to emphasis it in the commit log and perhaps add a comment too into i2c_socfpga_scl_recovery(). Some might hit an issue that I2C client is stuck and wonder why recovery won't work.

Quoted 4 lines

The assignment of the recover_bus needs to get done before the call to devm_gpiod_get_optional(), otherwise, the assignment is not taking place because of an error after returning from devm_gpiod_get_optional().

This sentence no longer true after v3?

Otherwise code looks good to me.

Jarkko

#3 lore raw
Quoted 10 lines · Jarkko Nikula

Hi

Quoted 4 lines · Dinh Nguyen

The I2C pins on the SoCFPGA platforms do not go through a GPIO module, thus cannot be recovered by the default method of by doing a GPIO access. Only a reset of the I2C IP block can a recovery be successful.

One thing what is unclear to me how does this release the I2C slave that potentially keeps the SDA stuck low. Does platform specific reset sequence send 9 SCL pulses, toggle HW reset of the clients or cycle power of them?

If recovery is only controller point of view then worth to emphasis it in the commit log and perhaps add a comment too into i2c_socfpga_scl_recovery(). Some might hit an issue that I2C client is stuck and wonder why recovery won't work.

The recovery is only resetting the controller itself and not the client. I'll add a comment in v6 to highlight this.

Quoted 6 lines
Quoted 5 lines

The assignment of the recover_bus needs to get done before the call to devm_gpiod_get_optional(), otherwise, the assignment is not taking place because of an error after returning from devm_gpiod_get_optional().

This sentence no longer true after v3?

Correct...will update.

Dinh