dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
PATCH 1/1 dt-bindings: bus: add device tree bindings for fsl,p1021rdb-pc-cpld
Add binding for CPLD bus interface of Freescale P1021RDB Combo Board CPLD Design.
--- .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml new file +73 -0
@@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/fsl,p1021rdb-pc-cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CPLD Bus Inteface for Freescale P1021RDB Combo Board CPLD Design + +maintainers: + - Pali Rohár <[email protected]> + +description: | + A simple bus enabling access to peripherals on boards with use Freescale + P1021RDB Combo Board CPLD Design. + + The "fsl,p1021rdb-pc-cpld" follows the "simple-bus" set of properties, as + specified in the Devicetree Specification. It is an extension of "simple-bus" + because some registers are CPLD specific and allows to identify if board has + wired CPLD according to Freescale P1021RDB Combo Board CPLD Design. + +select: + properties: + compatible: + contains: + const: fsl,p1021rdb-pc-cpld + required: + - compatible + +properties: + $nodename: + pattern: "^cpld(@[0-9a-f]+(,[0-9a-f]+)?)?$" + + compatible: + items: + - const: fsl,p1021rdb-pc-cpld + - const: simple-bus + + '#address-cells': + enum: [ 1, 2 ] + + '#size-cells': + enum: [ 1, 2 ] + + reg: + maxItems: 1 + + ranges: true + +required: + - compatible + - '#address-cells' + - '#size-cells' + - reg + - ranges + +additionalProperties: + type: object + +examples: + - | + + localbus { + #address-cells = <2>; + #size-cells = <1>; + + cpld@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p1021rdb-pc-cpld", "simple-bus"; + reg = <0x3 0x0 0x20000>; + ranges = <0x0 0x3 0x0 0x20000>; + }; + };
Signature · 1 line
2.35.1
Rob Herring
maintainerQuoted 9 lines · Marek Behún
Add binding for CPLD bus interface of Freescale P1021RDB Combo Board CPLD Design.
Signed-off-by Marek Behún <[email protected]>--- .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/linux-dt-review/Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.example.dtb: cpld@3,0: $nodename:0: 'cpld@3,0' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
From schema: /usr/local/lib/python3.10/dist-packages/dtschema/schemas/simple-bus.yaml
doc reference errors (make refcheckdocs):
See https://patchwork.ozlabs.org/patch/
This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1.
If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date:
pip3 install dtschema --upgrade
Please check and re-submit.
Quoted 76 lines · Marek Behún
Add binding for CPLD bus interface of Freescale P1021RDB Combo Board CPLD Design.
Signed-off-by Marek Behún <[email protected]>--- .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yamlDocumentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml new file +60
-0@@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/fsl,p1021rdb-pc-cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CPLD Bus Inteface for Freescale P1021RDB Combo Board CPLD Design + +maintainers: + - Pali Rohár <[email protected]> + +description: | + A simple bus enabling access to peripherals on boards with use Freescale + P1021RDB Combo Board CPLD Design. + + The "fsl,p1021rdb-pc-cpld" follows the "simple-bus" set of properties, as + specified in the Devicetree Specification. It is an extension of "simple-bus" + because some registers are CPLD specific and allows to identify if board has + wired CPLD according to Freescale P1021RDB Combo Board CPLD Design. + +select: + properties: + compatible: + contains: + const: fsl,p1021rdb-pc-cpld + required: + - compatible + +properties: + $nodename: + pattern: "^cpld(@[0-9a-f]+(,[0-9a-f]+)?)?$" + + compatible: + items: + - const: fsl,p1021rdb-pc-cpld + - const: simple-bus + + '#address-cells': + enum: [ 1, 2 ] + + '#size-cells': + enum: [ 1, 2 ] + + reg: + maxItems: 1 + + ranges: true + +required: + - compatible + - '#address-cells' + - '#size-cells' + - reg + - ranges + +additionalProperties: + type: object + +examples: + - |
Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml line 70
Quoted 10 lines
Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml new file +10
-0+ + localbus { + #address-cells = <2>; + #size-cells = <1>; + + cpld@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p1021rdb-pc-cpld", "simple-bus"; + reg = <0x3 0x0 0x20000>;
Not really a simple-bus if it has registers to init/program the bus.
Quoted 6 lines
Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml new file +3
-1+ ranges = <0x0 0x3 0x0 0x20000>; + }; + }; --2.35.1
Quoted 1 line · On Tue, 5 Jul 2022 14:09:36 -0600 Rob Herring <[email protected]> wrote:
Not really a simple-bus if it has registers to init/program the bus.
It doesn't.
Marek
Rob Herring
maintainerQuoted 6 lines · Marek Behún
Quoted 1 line · On Tue, 5 Jul 2022 14:09:36 -0600 Rob Herring <[email protected]> wrote:
Not really a simple-bus if it has registers to init/program the bus.
It doesn't.
Then what is in 'reg'? It looks the same range as 'ranges', so maybe you don't need 'reg'.
Rob
Quoted 4 lines · On Tuesday 12 July 2022 11:05:35 Rob Herring wrote:
Quoted 3 lines · Marek Behún
On Tue, 5 Jul 2022 14:09:36 -0600
Rob Herring <[email protected]> wrote:
Quoted 8 lines
Quoted 3 lines
Quoted 1 line
Not really a simple-bus if it has registers to init/program the bus.
It doesn't.
Then what is in 'reg'? It looks the same range as 'ranges', so maybe you don't need 'reg'.
Rob
Without 'reg' kernel cannot register devices on this bus, e.g. register-bit-led does not work. So 'reg' is needed. Why? I do not know.
PING? Documentation binding patch is waiting there fore two months. Could we move forward?
Note that meanwhile turris1x.dts which uses this was merged.
Quoted 91 lines · On Tuesday 05 July 2022 19:54:50 Marek Behún wrote:
Add binding for CPLD bus interface of Freescale P1021RDB Combo Board CPLD Design.
Signed-off-by Marek Behún <[email protected]>--- .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yamlDocumentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml new file +73
-0@@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/fsl,p1021rdb-pc-cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CPLD Bus Inteface for Freescale P1021RDB Combo Board CPLD Design + +maintainers: + - Pali Rohár <[email protected]> + +description: | + A simple bus enabling access to peripherals on boards with use Freescale + P1021RDB Combo Board CPLD Design. + + The "fsl,p1021rdb-pc-cpld" follows the "simple-bus" set of properties, as + specified in the Devicetree Specification. It is an extension of "simple-bus" + because some registers are CPLD specific and allows to identify if board has + wired CPLD according to Freescale P1021RDB Combo Board CPLD Design. + +select: + properties: + compatible: + contains: + const: fsl,p1021rdb-pc-cpld + required: + - compatible + +properties: + $nodename: + pattern: "^cpld(@[0-9a-f]+(,[0-9a-f]+)?)?$" + + compatible: + items: + - const: fsl,p1021rdb-pc-cpld + - const: simple-bus + + '#address-cells': + enum: [ 1, 2 ] + + '#size-cells': + enum: [ 1, 2 ] + + reg: + maxItems: 1 + + ranges: true + +required: + - compatible + - '#address-cells' + - '#size-cells' + - reg + - ranges + +additionalProperties: + type: object + +examples: + - | + + localbus { + #address-cells = <2>; + #size-cells = <1>; + + cpld@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p1021rdb-pc-cpld", "simple-bus"; + reg = <0x3 0x0 0x20000>; + ranges = <0x0 0x3 0x0 0x20000>; + }; + };Signature · 1 line
2.35.1
PING?
If you really do not care about documentation then just tell people to not waste time on doing it. Because dts files can be compiled and used on the real hardware without those superfluous YAML files.
Quoted 97 lines · On Wednesday 31 August 2022 13:46:40 Pali Rohár wrote:
PING? Documentation binding patch is waiting there fore two months. Could we move forward?
Note that meanwhile
turris1x.dtswhich uses this was merged.Quoted 91 lines · On Tuesday 05 July 2022 19:54:50 Marek Behún wrote:
Add binding for CPLD bus interface of Freescale P1021RDB Combo Board CPLD Design.
Signed-off-by Marek Behún <[email protected]>--- .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yamlDocumentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml new file +73
-0@@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/fsl,p1021rdb-pc-cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CPLD Bus Inteface for Freescale P1021RDB Combo Board CPLD Design + +maintainers: + - Pali Rohár <[email protected]> + +description: | + A simple bus enabling access to peripherals on boards with use Freescale + P1021RDB Combo Board CPLD Design. + + The "fsl,p1021rdb-pc-cpld" follows the "simple-bus" set of properties, as + specified in the Devicetree Specification. It is an extension of "simple-bus" + because some registers are CPLD specific and allows to identify if board has + wired CPLD according to Freescale P1021RDB Combo Board CPLD Design. + +select: + properties: + compatible: + contains: + const: fsl,p1021rdb-pc-cpld + required: + - compatible + +properties: + $nodename: + pattern: "^cpld(@[0-9a-f]+(,[0-9a-f]+)?)?$" + + compatible: + items: + - const: fsl,p1021rdb-pc-cpld + - const: simple-bus + + '#address-cells': + enum: [ 1, 2 ] + + '#size-cells': + enum: [ 1, 2 ] + + reg: + maxItems: 1 + + ranges: true + +required: + - compatible + - '#address-cells' + - '#size-cells' + - reg + - ranges + +additionalProperties: + type: object + +examples: + - | + + localbus { + #address-cells = <2>; + #size-cells = <1>; + + cpld@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p1021rdb-pc-cpld", "simple-bus"; + reg = <0x3 0x0 0x20000>; + ranges = <0x0 0x3 0x0 0x20000>; + }; + };Signature · 1 line
2.35.1
PING?
Quoted 104 lines · On Sunday 09 October 2022 13:38:25 Pali Rohár wrote:
PING?
If you really do not care about documentation then just tell people to not waste time on doing it. Because dts files can be compiled and used on the real hardware without those superfluous YAML files.
Quoted 97 lines · On Wednesday 31 August 2022 13:46:40 Pali Rohár wrote:
PING? Documentation binding patch is waiting there fore two months. Could we move forward?
Note that meanwhile
turris1x.dtswhich uses this was merged.Quoted 91 lines · On Tuesday 05 July 2022 19:54:50 Marek Behún wrote:
Add binding for CPLD bus interface of Freescale P1021RDB Combo Board CPLD Design.
Signed-off-by Marek Behún <[email protected]>--- .../bindings/bus/fsl,p1021rdb-pc-cpld.yaml | 73 +++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100644 Documentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yamlDocumentation/devicetree/bindings/bus/fsl,p1021rdb-pc-cpld.yaml new file +73
-0@@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/fsl,p1021rdb-pc-cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: CPLD Bus Inteface for Freescale P1021RDB Combo Board CPLD Design + +maintainers: + - Pali Rohár <[email protected]> + +description: | + A simple bus enabling access to peripherals on boards with use Freescale + P1021RDB Combo Board CPLD Design. + + The "fsl,p1021rdb-pc-cpld" follows the "simple-bus" set of properties, as + specified in the Devicetree Specification. It is an extension of "simple-bus" + because some registers are CPLD specific and allows to identify if board has + wired CPLD according to Freescale P1021RDB Combo Board CPLD Design. + +select: + properties: + compatible: + contains: + const: fsl,p1021rdb-pc-cpld + required: + - compatible + +properties: + $nodename: + pattern: "^cpld(@[0-9a-f]+(,[0-9a-f]+)?)?$" + + compatible: + items: + - const: fsl,p1021rdb-pc-cpld + - const: simple-bus + + '#address-cells': + enum: [ 1, 2 ] + + '#size-cells': + enum: [ 1, 2 ] + + reg: + maxItems: 1 + + ranges: true + +required: + - compatible + - '#address-cells' + - '#size-cells' + - reg + - ranges + +additionalProperties: + type: object + +examples: + - | + + localbus { + #address-cells = <2>; + #size-cells = <1>; + + cpld@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,p1021rdb-pc-cpld", "simple-bus"; + reg = <0x3 0x0 0x20000>; + ranges = <0x0 0x3 0x0 0x20000>; + }; + };Signature · 1 line
2.35.1