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mailbox: qcom-apcs-ipc: make regmap max_register configurable

PATCH Applied Robert Marko 2 participants 10 messages Jul 7, 2022 – Jul 17, 2022

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#0 lore raw

PATCH v6 1/4 mailbox: qcom-apcs-ipc: make regmap max_register configurable

APCS register space in IPQ8074 is 0x6000 so regmap max_register needs to be 0x5ffc.

Instead of making it global, make max_register configurable via match data.

---
 drivers/mailbox/qcom-apcs-ipc-mailbox.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)
drivers/mailbox/qcom-apcs-ipc-mailbox.c +9 -3
index 80a54d81412e..c05f3276d02c 100644
@@ -27,6 +27,7 @@ struct qcom_apcs_ipc {
 struct qcom_apcs_ipc_data {
 	int offset;
 	char *clk_name;
+	unsigned int max_register;
 };
 
 static const struct qcom_apcs_ipc_data ipq6018_apcs_data = {
@@ -53,7 +54,7 @@ static const struct qcom_apcs_ipc_data sdx55_apcs_data = {
 	.offset = 0x1008, .clk_name = "qcom-sdx55-acps-clk"
 };
 
-static const struct regmap_config apcs_regmap_config = {
+static struct regmap_config apcs_regmap_config = {
 	.reg_bits = 32,
 	.reg_stride = 4,
 	.val_bits = 32,
@@ -91,12 +92,17 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev)
 	if (IS_ERR(base))
 		return PTR_ERR(base);
 
+	apcs_data = of_device_get_match_data(&pdev->dev);
+	if (!apcs_data)
+		return -ENODATA;
+
+	if (apcs_data->max_register)
+		apcs_regmap_config.max_register = apcs_data->max_register;
+
 	regmap = devm_regmap_init_mmio(&pdev->dev, base, &apcs_regmap_config);
 	if (IS_ERR(regmap))
 		return PTR_ERR(regmap);
 
-	apcs_data = of_device_get_match_data(&pdev->dev);
-
 	apcs->regmap = regmap;
 	apcs->offset = apcs_data->offset;
 
Signature · 1 line
2.36.1
#1 lore raw

PATCH v6 2/4 mailbox: qcom-apcs-ipc: add IPQ8074 APSS clock controller support

IPQ8074 has the APSS clock controller utilizing the same register space as the APCS, so provide access to the APSS utilizing a child device like IPQ6018 does as well, but just by utilizing the IPQ8074 specific APSS clock driver.

---
Changes in v6:
* Adjust max_register value using match data instead of globally

Changes in v5:
* Use lower case hex for max_register
* Update the APSS clock name to match the new one without commas

---
 drivers/mailbox/qcom-apcs-ipc-mailbox.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)
drivers/mailbox/qcom-apcs-ipc-mailbox.c +7 -1
index c05f3276d02c..5d6b41fa6256 100644
@@ -34,6 +34,12 @@ static const struct qcom_apcs_ipc_data ipq6018_apcs_data = {
 	.offset = 8, .clk_name = "qcom,apss-ipq6018-clk"
 };
 
+static const struct qcom_apcs_ipc_data ipq8074_apcs_data = {
+	.offset = 8,
+	.max_register = 0x5ffc,
+	.clk_name = "qcom-apss-ipq8074-clk"
+};
+
 static const struct qcom_apcs_ipc_data msm8916_apcs_data = {
 	.offset = 8, .clk_name = "qcom-apcs-msm8916-clk"
 };
@@ -148,7 +154,7 @@ static int qcom_apcs_ipc_remove(struct platform_device *pdev)
 /* .data is the offset of the ipc register within the global block */
 static const struct of_device_id qcom_apcs_ipc_of_match[] = {
 	{ .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data },
-	{ .compatible = "qcom,ipq8074-apcs-apps-global", .data = &msm8994_apcs_data },
+	{ .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq8074_apcs_data },
 	{ .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data },
 	{ .compatible = "qcom,msm8939-apcs-kpss-global", .data = &msm8916_apcs_data },
 	{ .compatible = "qcom,msm8953-apcs-kpss-global", .data = &msm8994_apcs_data },
Signature · 1 line
2.36.1
Reviewed-by on v6 2/4
#2 lore raw

Re: [PATCH v6 2/4] mailbox: qcom-apcs-ipc: add IPQ8074 APSS clock controller support

Quoted 6 lines · Robert Marko

IPQ8074 has the APSS clock controller utilizing the same register space as the APCS, so provide access to the APSS utilizing a child device like IPQ6018 does as well, but just by utilizing the IPQ8074 specific APSS clock driver.

Regards,
Bjorn

Quoted 40 lines

---
Changes in v6:
* Adjust max_register value using match data instead of globally

Changes in v5:
* Use lower case hex for max_register
* Update the APSS clock name to match the new one without commas

---
 drivers/mailbox/qcom-apcs-ipc-mailbox.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)
drivers/mailbox/qcom-apcs-ipc-mailbox.c +7 -1
index c05f3276d02c..5d6b41fa6256 100644
@@ -34,6 +34,12 @@ static const struct qcom_apcs_ipc_data ipq6018_apcs_data = {
 	.offset = 8, .clk_name = "qcom,apss-ipq6018-clk"
 };
 
+static const struct qcom_apcs_ipc_data ipq8074_apcs_data = {
+	.offset = 8,
+	.max_register = 0x5ffc,
+	.clk_name = "qcom-apss-ipq8074-clk"
+};
+
 static const struct qcom_apcs_ipc_data msm8916_apcs_data = {
 	.offset = 8, .clk_name = "qcom-apcs-msm8916-clk"
 };
@@ -148,7 +154,7 @@ static int qcom_apcs_ipc_remove(struct platform_device *pdev)
 /* .data is the offset of the ipc register within the global block */
 static const struct of_device_id qcom_apcs_ipc_of_match[] = {
 	{ .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data },
-	{ .compatible = "qcom,ipq8074-apcs-apps-global", .data = &msm8994_apcs_data },
+	{ .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq8074_apcs_data },
 	{ .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data },
 	{ .compatible = "qcom,msm8939-apcs-kpss-global", .data = &msm8916_apcs_data },
 	{ .compatible = "qcom,msm8953-apcs-kpss-global", .data = &msm8994_apcs_data },
Signature · 1 line
2.36.1
#3 lore raw

Re: [PATCH v6 2/4] mailbox: qcom-apcs-ipc: add IPQ8074 APSS clock controller support

Quoted 11 lines · Bjorn Andersson
Quoted 6 lines · Robert Marko

IPQ8074 has the APSS clock controller utilizing the same register space as the APCS, so provide access to the APSS utilizing a child device like IPQ6018 does as well, but just by utilizing the IPQ8074 specific APSS clock driver.

Bjorn, please ignore the v6 series, a way simplified and better support is in the v8 series.
Which is mostly reviewed, only DTS is pending.

Regards,
Robert

Quoted 44 lines

Regards,
Bjorn

Quoted 40 lines

---
Changes in v6:
* Adjust max_register value using match data instead of globally

Changes in v5:
* Use lower case hex for max_register
* Update the APSS clock name to match the new one without commas

---
 drivers/mailbox/qcom-apcs-ipc-mailbox.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)
drivers/mailbox/qcom-apcs-ipc-mailbox.c +7 -2
index c05f3276d02c..5d6b41fa6256 100644
@@ -34,6 +34,12 @@ static const struct qcom_apcs_ipc_data ipq6018_apcs_data = {
      .offset = 8, .clk_name = "qcom,apss-ipq6018-clk"
 };
 
+static const struct qcom_apcs_ipc_data ipq8074_apcs_data = {
+     .offset = 8,
+     .max_register = 0x5ffc,
+     .clk_name = "qcom-apss-ipq8074-clk"
+};
+
 static const struct qcom_apcs_ipc_data msm8916_apcs_data = {
      .offset = 8, .clk_name = "qcom-apcs-msm8916-clk"
 };
@@ -148,7 +154,7 @@ static int qcom_apcs_ipc_remove(struct platform_device *pdev)
 /* .data is the offset of the ipc register within the global block */
 static const struct of_device_id qcom_apcs_ipc_of_match[] = {
      { .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data },
-     { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &msm8994_apcs_data },
+     { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq8074_apcs_data },
      { .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data },
      { .compatible = "qcom,msm8939-apcs-kpss-global", .data = &msm8916_apcs_data },
      { .compatible = "qcom,msm8953-apcs-kpss-global", .data = &msm8994_apcs_data },
--

2.36.1

#4 lore raw

PATCH v6 3/4 dt-bindings: mailbox: qcom: set correct #clock-cells

In reply to Robert Marko

IPQ6018 and IPQ8074 require #clock-cells to be set to 1 as their APSS clock driver provides multiple clock outputs.

So allow setting 1 as #clock-cells and check that its set to 1 for IPQ6018 and IPQ8074, check others for 0 as its currently.

---
Changes in v3:
* Drop not needed blank line

Changes in v2:
* Correct subject name

---
 .../bindings/mailbox/qcom,apcs-kpss-global.yaml | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +16 -1
index 3b5ba7ecc19d..95ecb84e3278 100644
@@ -50,7 +50,7 @@ properties:
     const: 1
 
   '#clock-cells':
-    const: 0
+    enum: [0, 1]
 
   clock-names:
     minItems: 2
@@ -96,6 +96,21 @@ allOf:
       properties:
         clocks:
           maxItems: 3
+  - if:
+      properties:
+        compatible:
+          enum:
+            - qcom,ipq6018-apcs-apps-global
+            - qcom,ipq8074-apcs-apps-global
+    then:
+      properties:
+        '#clock-cells':
+          const: 1
+    else:
+      properties:
+        '#clock-cells':
+          const: 0
+
 examples:
 
   # Example apcs with msm8996
Signature · 1 line
2.36.1
#5 lore raw

PATCH v6 4/4 arm64: dts: ipq8074: add APCS node

In reply to Robert Marko

APCS now has support for providing the APSS clocks as the child device for IPQ8074.

So, add the required DT node for it as it will later be used as the CPU clocksource.

---
Changes in v3:
* Node does not currently exist in the upstream kernel, so add it instead of modifying.

---
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)
arch/arm64/boot/dts/qcom/ipq8074.dtsi +8 -0
index b4ae13f16398..76707b9f9845 100644
@@ -886,5 +886,13 @@ IRQ_TYPE_LEVEL_HIGH>, /* int_c */
 				      "axi_m_sticky";
 			status = "disabled";
 		};
+
+		apcs_glb: mailbox@b111000 {
+			compatible = "qcom,ipq8074-apcs-apps-global";
+			reg = <0x0b111000 0x6000>;
+
+			#clock-cells = <1>;
+			#mbox-cells = <1>;
+		};
 	};
 };
Signature · 1 line
2.36.1
#6 lore raw

Re: (subset) [PATCH v6 4/4] arm64: dts: ipq8074: add APCS node

Quoted 8 lines · Robert Marko

APCS now has support for providing the APSS clocks as the child device for IPQ8074.

So, add the required DT node for it as it will later be used as the CPU clocksource.

[...]

Applied, thanks!

[4/4] arm64: dts: ipq8074: add APCS node

      commit: 50ed9fffec3aed88bc1ffed277d291f81153bd5d

Best regards,

Signature · 1 line
Bjorn Andersson <[email protected]>
#7 lore raw

Re: (subset) [PATCH v6 4/4] arm64: dts: ipq8074: add APCS node

Quoted 9 lines · Bjorn Andersson
Quoted 7 lines · Robert Marko

APCS now has support for providing the APSS clocks as the child device for IPQ8074.

So, add the required DT node for it as it will later be used as the CPU clocksource.

Quoted 6 lines
Quoted 1 line

[...]

Applied, thanks!

[4/4] arm64: dts: ipq8074: add APCS node

      commit: 50ed9fffec3aed88bc1ffed277d291f81153bd5d

Bjorn,
can you please apply the v8 series instead which superseded the v6 series, DTS is different
as it relies on PLL being separate and is much simpler.

v6 is superseded and should be ignored.

https://patchwork.kernel.org/project/linux-arm-msm/patch/[email protected]/

Regards,
Robert

Quoted 4 lines

Best regards,
--
Bjorn Andersson <[email protected]>

Reviewed-by on v6 1/4
#8 lore raw
In reply to Robert Marko
Quoted 6 lines · Robert Marko

APCS register space in IPQ8074 is 0x6000 so regmap max_register needs to be 0x5ffc.

Instead of making it global, make max_register configurable via match data.

Regards,
Bjorn

Quoted 48 lines
---
 drivers/mailbox/qcom-apcs-ipc-mailbox.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)
drivers/mailbox/qcom-apcs-ipc-mailbox.c +9 -3
index 80a54d81412e..c05f3276d02c 100644
@@ -27,6 +27,7 @@ struct qcom_apcs_ipc {
 struct qcom_apcs_ipc_data {
 	int offset;
 	char *clk_name;
+	unsigned int max_register;
 };
 
 static const struct qcom_apcs_ipc_data ipq6018_apcs_data = {
@@ -53,7 +54,7 @@ static const struct qcom_apcs_ipc_data sdx55_apcs_data = {
 	.offset = 0x1008, .clk_name = "qcom-sdx55-acps-clk"
 };
 
-static const struct regmap_config apcs_regmap_config = {
+static struct regmap_config apcs_regmap_config = {
 	.reg_bits = 32,
 	.reg_stride = 4,
 	.val_bits = 32,
@@ -91,12 +92,17 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev)
 	if (IS_ERR(base))
 		return PTR_ERR(base);
 
+	apcs_data = of_device_get_match_data(&pdev->dev);
+	if (!apcs_data)
+		return -ENODATA;
+
+	if (apcs_data->max_register)
+		apcs_regmap_config.max_register = apcs_data->max_register;
+
 	regmap = devm_regmap_init_mmio(&pdev->dev, base, &apcs_regmap_config);
 	if (IS_ERR(regmap))
 		return PTR_ERR(regmap);
 
-	apcs_data = of_device_get_match_data(&pdev->dev);
-
 	apcs->regmap = regmap;
 	apcs->offset = apcs_data->offset;
 
Signature · 1 line
2.36.1
#9 lore raw
Quoted 11 lines · Bjorn Andersson
Quoted 6 lines · Robert Marko

APCS register space in IPQ8074 is 0x6000 so regmap max_register needs to be 0x5ffc.

Instead of making it global, make max_register configurable via match data.

Bjorn, please ignore the v6 series, a way simplified and better support is in the v8 series.

Regards,
Robert

Quoted 52 lines

Regards,
Bjorn

Quoted 48 lines
---
 drivers/mailbox/qcom-apcs-ipc-mailbox.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)
drivers/mailbox/qcom-apcs-ipc-mailbox.c +9 -4
index 80a54d81412e..c05f3276d02c 100644
@@ -27,6 +27,7 @@ struct qcom_apcs_ipc {
 struct qcom_apcs_ipc_data {
      int offset;
      char *clk_name;
+     unsigned int max_register;
 };
 
 static const struct qcom_apcs_ipc_data ipq6018_apcs_data = {
@@ -53,7 +54,7 @@ static const struct qcom_apcs_ipc_data sdx55_apcs_data = {
      .offset = 0x1008, .clk_name = "qcom-sdx55-acps-clk"
 };
 
-static const struct regmap_config apcs_regmap_config = {
+static struct regmap_config apcs_regmap_config = {
      .reg_bits = 32,
      .reg_stride = 4,
      .val_bits = 32,
@@ -91,12 +92,17 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev)
      if (IS_ERR(base))
              return PTR_ERR(base);
 
+     apcs_data = of_device_get_match_data(&pdev->dev);
+     if (!apcs_data)
+             return -ENODATA;
+
+     if (apcs_data->max_register)
+             apcs_regmap_config.max_register = apcs_data->max_register;
+
      regmap = devm_regmap_init_mmio(&pdev->dev, base, &apcs_regmap_config);
      if (IS_ERR(regmap))
              return PTR_ERR(regmap);
 
-     apcs_data = of_device_get_match_data(&pdev->dev);
-
      apcs->regmap = regmap;
      apcs->offset = apcs_data->offset;
 
--

2.36.1