dt-bindings: mailbox: qcom: set correct #clock-cells
PATCH v8 1/4 dt-bindings: mailbox: qcom: set correct #clock-cells
IPQ6018 and IPQ8074 require #clock-cells to be set to 1 as their APSS clock driver provides multiple clock outputs.
So allow setting 1 as #clock-cells and check that its set to 1 for IPQ6018 and IPQ8074, check others for 0 as its currently.
---
Changes in v3:
* Drop not needed blank line
Changes in v2:
* Correct subject name
--- .../bindings/mailbox/qcom,apcs-kpss-global.yaml | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-)
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +16 -1
@@ -50,7 +50,7 @@ properties: const: 1 '#clock-cells': - const: 0 + enum: [0, 1] clock-names: minItems: 2
@@ -96,6 +96,21 @@ allOf: properties: clocks: maxItems: 3 + - if: + properties: + compatible: + enum: + - qcom,ipq6018-apcs-apps-global + - qcom,ipq8074-apcs-apps-global + then: + properties: + '#clock-cells': + const: 1 + else: + properties: + '#clock-cells': + const: 0 + examples: # Example apcs with msm8996
Signature · 1 line
2.36.1
PATCH v8 2/4 dt-bindings: mailbox: qcom: correct clocks for IPQ6018 and IPQ8074
IPQ6018 APSS driver is registered by APCS as they share the same register space, and it uses "pll" and "xo" as inputs.
Correct the allowed clocks for IPQ6018 and IPQ8074 as they share the same driver to allow "pll" and "xo" as clock-names.
---
Changes in v8:
* Add maxItems to clocks and clock-names
--- .../mailbox/qcom,apcs-kpss-global.yaml | 46 ++++++++++++++----- 1 file changed, 34 insertions(+), 12 deletions(-)
Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +34 -12
@@ -41,10 +41,7 @@ properties: clocks: description: phandles to the parent clocks of the clock driver minItems: 2 - items: - - description: primary pll parent of the clock driver - - description: auxiliary parent - - description: reference clock + maxItems: 3 '#mbox-cells': const: 1
@@ -54,10 +51,7 @@ properties: clock-names: minItems: 2 - items: - - const: pll - - const: aux - - const: ref + maxItems: 3 required: - compatible
@@ -71,8 +65,6 @@ allOf: properties: compatible: enum: - - qcom,ipq6018-apcs-apps-global - - qcom,ipq8074-apcs-apps-global - qcom,msm8916-apcs-kpss-global - qcom,msm8994-apcs-kpss-global - qcom,msm8996-apcs-hmss-global
@@ -86,7 +78,13 @@ allOf: then: properties: clocks: - maxItems: 2 + items: + - description: primary pll parent of the clock driver + - description: auxiliary parent + clock-names: + items: + - const: pll + - const: aux - if: properties: compatible:
@@ -95,7 +93,31 @@ allOf: then: properties: clocks: - maxItems: 3 + items: + - description: primary pll parent of the clock driver + - description: auxiliary parent + - description: reference clock + clock-names: + items: + - const: pll + - const: aux + - const: ref + - if: + properties: + compatible: + enum: + - qcom,ipq6018-apcs-apps-global + - qcom,ipq8074-apcs-apps-global + then: + properties: + clocks: + items: + - description: primary pll parent of the clock driver + - description: XO clock + clock-names: + items: + - const: pll + - const: xo - if: properties: compatible:
Signature · 1 line
2.36.1
Re: [PATCH v8 2/4] dt-bindings: mailbox: qcom: correct clocks for IPQ6018 and IPQ8074
Quoted 8 lines · Robert Marko
IPQ6018 APSS driver is registered by APCS as they share the same register space, and it uses "pll" and "xo" as inputs.
Correct the allowed clocks for IPQ6018 and IPQ8074 as they share the same driver to allow "pll" and "xo" as clock-names.
Signed-off-by Robert Marko <[email protected]>---
Best regards,
Krzysztof
PATCH v8 3/4 mailbox: qcom-apcs-ipc: add IPQ8074 APSS clock support
In reply to Robert MarkoIPQ8074 has the APSS clock controller utilizing the same register space as the APCS, so provide access to the APSS utilizing a child device like IPQ6018.
IPQ6018 and IPQ8074 use the same controller and driver, so just utilize IPQ6018 match data for IPQ8074.
---
Changes in v7:
* Dont max_register modifications
* Drop custom IPQ8074 match data and use IPQ6018 one as they share the controller and driver
Changes in v5:
* Use lower case hex for max_register
* Update the APSS clock name to match the new one without commas
--- drivers/mailbox/qcom-apcs-ipc-mailbox.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
drivers/mailbox/qcom-apcs-ipc-mailbox.c +1 -1
@@ -142,7 +142,7 @@ static int qcom_apcs_ipc_remove(struct platform_device *pdev)/* .data is the offset of the ipc register within the global block */ static const struct of_device_id qcom_apcs_ipc_of_match[] = { { .compatible ="qcom,ipq6018-apcs-apps-global" , .data = &ipq6018_apcs_data }, - { .compatible ="qcom,ipq8074-apcs-apps-global" , .data = &msm8994_apcs_data }, + { .compatible ="qcom,ipq8074-apcs-apps-global" , .data = &ipq6018_apcs_data }, { .compatible ="qcom,msm8916-apcs-kpss-global" , .data = &msm8916_apcs_data }, { .compatible ="qcom,msm8939-apcs-kpss-global" , .data = &msm8916_apcs_data }, { .compatible ="qcom,msm8953-apcs-kpss-global" , .data = &msm8994_apcs_data },
Signature · 1 line
2.36.1
PATCH v8 4/4 arm64: dts: ipq8074: add APCS support
In reply to Robert MarkoAPCS now has support for providing the APSS clocks as the child device for IPQ8074.
So, add the required DT node for APCS and A53PLL which feeds it the PLL clock for APSS, since APSS will be used for CPU frequency scaling.
---
Changes in v7:
* Drop review tag due to significant changes
* Add A53PLL node
* Add clocks to APCS node
Changes in v3:
* Node does not currently exist in the upstream kernel, so add it instead of modifying.
--- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
arch/arm64/boot/dts/qcom/ipq8074.dtsi +17 -0
@@ -879,6 +879,23 @@ IRQ_TYPE_LEVEL_HIGH>, /* int_c */ "axi_m_sticky"; status = "disabled"; }; + + apcs_glb: mailbox@b111000 { + compatible = "qcom,ipq8074-apcs-apps-global"; + reg = <0x0b111000 0x1000>; + #clock-cells = <1>; + clocks = <&a53pll>, <&xo>; + clock-names = "pll", "xo"; + #mbox-cells = <1>; + }; + + a53pll: clock@b116000 { + compatible = "qcom,ipq8074-a53pll"; + reg = <0x0b116000 0x40>; + #clock-cells = <0>; + clocks = <&xo>; + clock-names = "xo"; + }; }; timer {
Signature · 1 line
2.36.1