Add Anbernic RG353P and RG503
Subsystems (2)
v2 cover Add Anbernic RG353P and RG503
From: Chris Morgan <[email protected]>
Add the devicetrees for the Anbernic RG353P and RG503. This enables all the hardware that is currently supported via mainline Linux. The remaining hardware (for both devices) includes the display panel and the battery. The RG353P also requires drivers to be written and mainlined for the touchscreen.
Changes since V1:
- Corrected node names to always have only dashes (no underscores), except for ones that require hard-coded names (the rk817 PMIC).
- Corrected all node aliases to always have only underscores (no dashes).
- Appended "regulator" to all the regulator node names, except ones that require hard-coded names (the rk817 PMIC).
- Corrected name of RG353P. Previously was called RG353.
- Changed name of sound node from rk817-sound to just sound.
- Changed name of gpio-keys to gpio-keys-control and removed volume buttons.
- Added new node of gpio-keys-vol and added volume buttons. This is so we can do autorepeat on these two buttons. Note that buttons under gpio-keys-control remain labelled in ascending order for the GPIO in use.
- Added note to adc-keys node that we deviate from the BSP kernel to comply with Linux input guidelines regarding gamepad menu buttons.
- Added note to sound node that audio is reversed for both speakers and headphones.
- Added additional hardware details to commit message for devicetrees.
Chris Morgan (3):
dt-bindings: vendor-prefixes: add Anbernic
dt-bindings: arm: rockchip: Add Anbernic RG353P and RG503
arm64: dts: rockchip: add Anbernic RG353P and RG503
.../devicetree/bindings/arm/rockchip.yaml | 10 + .../devicetree/bindings/vendor-prefixes.yaml | 2 + arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/rk3566-anbernic-rg353p.dts | 103 +++ .../dts/rockchip/rk3566-anbernic-rg503.dts | 93 ++ .../dts/rockchip/rk3566-anbernic-rgxx3.dtsi | 821 ++++++++++++++++++ 6 files changed, 1031 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi
Signature · 1 line
2.25.1
PATCH v2 1/3 dt-bindings: vendor-prefixes: add Anbernic
From: Chris Morgan <[email protected]>
Anbernic designs and manufactures portable gaming systems.
https://anbernic.com/
--- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+)
Documentation/devicetree/bindings/vendor-prefixes.yaml +2 -0
@@ -105,6 +105,8 @@ patternProperties: description: AMS-Taos Inc. "^analogix,.*": description: Analogix Semiconductor, Inc. + "^anbernic,.*": + description: Anbernic "^andestech,.*": description: Andes Technology Corporation "^anvo,.*":
Signature · 1 line
2.25.1
PATCH v2 2/3 dt-bindings: arm: rockchip: Add Anbernic RG353P and RG503
In reply to Chris MorganFrom: Chris Morgan <[email protected]>
Add entry for the Anbernic RG353P and RG503 handheld devices.
--- Documentation/devicetree/bindings/arm/rockchip.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+)
Documentation/devicetree/bindings/arm/rockchip.yaml +10 -0
@@ -30,6 +30,16 @@ properties: - const: amarula,vyasa-rk3288 - const: rockchip,rk3288 + - description: Anbernic RG353P + items: + - const: anbernic,rg353p + - const: rockchip,rk3566 + + - description: Anbernic RG503 + items: + - const: anbernic,rg503 + - const: rockchip,rk3566 + - description: Asus Tinker board items: - const: asus,rk3288-tinker
Signature · 1 line
2.25.1
PATCH v2 3/3 arm64: dts: rockchip: add Anbernic RG353P and RG503
In reply to Chris MorganFrom: Chris Morgan <[email protected]>
Anbernic RG353P and RG503 are both RK3566 based handheld gaming devices from Anbernic.
Both devices have:
- 2 SDMMC slots.
- A Realtek rtl8821cs WiFi/Bluetooth adapter.
- A mini HDMI port.
- A USB C host port and a USB C otg port (currently only working as device).
- Multiple GPIO buttons and a single ADC button.
- Dual analog joysticks controlled via a GPIO mux.
- A headphone jack with amplified stereo speakers via a SGM4865 amp.
- A PWM based vibrator for force feedback.
The RG353P has:
- 2GB LPDDR4 RAM.
- A 32GB eMMC.
- A 3.5 inch 640x480 4-lane DSI panel of unknown origin with an i2c controlled touchscreen (touchscreen is a Hynitron CST340).
The RG503 has:
- 1GB LPDDR4 RAM.
- A 5 inch 960x544 AMOLED 2-lane DSI/DBI panel manufactured by Samsung with part number ams495qa04. Data for this panel is provided via the DSI interface, however commands are sent via a 9-bit 3-wire SPI interface. The MISO pin of SPI3 of the SOC is wired to the input of the panel, so it must be bitbanged.
This devicetree enables the following hardware:
- HDMI (plus audio).
- Analog audio, including speakers.
- All buttons.
- All SDMMC/eMMC/SDIO controllers.
- The ADC joysticks (note a pending patch is required to use them).
- WiFi/Bluetooth (note out of tree drivers are required).
- The PWM based vibrator motor.
The following hardware is not enabled:
- The display panels (drivers are being written and there are issues with the upstream DSI and VOP2 subsystems).
- Battery (driver pending).
- Touchscreen on the RG353P (note the i2c2 bus is enabled for it).
--- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/rk3566-anbernic-rg353p.dts | 103 +++ .../dts/rockchip/rk3566-anbernic-rg503.dts | 93 ++ .../dts/rockchip/rk3566-anbernic-rgxx3.dtsi | 821 ++++++++++++++++++ 4 files changed, 1019 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi
arch/arm64/boot/dts/rockchip/Makefile +2 -0
@@ -57,6 +57,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353p.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +103 -0
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arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts new file +93 -0
93 lines not on this page · raw message
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +821 -0
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Signature · 1 line
2.25.1
Re: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
Hello,
sob., 20 sie 2022 o 00:26 Chris Morgan <[email protected]> napisał(a):
Quoted 125 lines
From: Chris Morgan <[email protected]>
Anbernic RG353P and RG503 are both RK3566 based handheld gaming devices from Anbernic.
Both devices have:
- 2 SDMMC slots.
- A Realtek rtl8821cs WiFi/Bluetooth adapter.
- A mini HDMI port.
- A USB C host port and a USB C otg port (currently only working as device).
- Multiple GPIO buttons and a single ADC button.
- Dual analog joysticks controlled via a GPIO mux.
- A headphone jack with amplified stereo speakers via a SGM4865 amp.
- A PWM based vibrator for force feedback.The RG353P has:
- 2GB LPDDR4 RAM.
- A 32GB eMMC.
- A 3.5 inch 640x480 4-lane DSI panel of unknown origin with an i2c controlled touchscreen (touchscreen is a Hynitron CST340).The RG503 has:
- 1GB LPDDR4 RAM.
- A 5 inch 960x544 AMOLED 2-lane DSI/DBI panel manufactured by Samsung with part number ams495qa04. Data for this panel is provided via the DSI interface, however commands are sent via a 9-bit 3-wire SPI interface. The MISO pin of SPI3 of the SOC is wired to the input of the panel, so it must be bitbanged.This devicetree enables the following hardware:
- HDMI (plus audio).
- Analog audio, including speakers.
- All buttons.
- All SDMMC/eMMC/SDIO controllers.
- The ADC joysticks (note a pending patch is required to use them).
- WiFi/Bluetooth (note out of tree drivers are required).
- The PWM based vibrator motor.The following hardware is not enabled:
- The display panels (drivers are being written and there are issues with the upstream DSI and VOP2 subsystems).
- Battery (driver pending).
- Touchscreen on the RG353P (note the i2c2 bus is enabled for it).Signed-off-by Chris Morgan <[email protected]>--- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/rk3566-anbernic-rg353p.dts | 103 +++ .../dts/rockchip/rk3566-anbernic-rg503.dts | 93 ++ .../dts/rockchip/rk3566-anbernic-rgxx3.dtsi | 821 ++++++++++++++++++ 4 files changed, 1019 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsiarch/arm64/boot/dts/rockchip/Makefile +2
-0@@ -57,6 +57,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353p.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtbarch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +49
-0@@ -0,0 +1,103 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3566-anbernic-rgxx3.dtsi" + +/ { + model = "RG353P"; + compatible = "anbernic,rg353p", "rockchip,rk3566"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc0; + mmc2 = &sdmmc1; + mmc3 = &sdmmc2; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&vcc_sys>; + pwms = <&pwm4 0 25000 0>; + }; +}; + +&gpio_keys_control { + button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR2>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2";
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts line 59
Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +10
-0+ linux,code = <BTN_TR>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; + + button-15 {
I don't think just having the buttons numbered sequentially is the best course of action, but this preserves the GPIO ordering while other options don't...
I'm thinking about either having them named after their function, or named after what they're labeled on the PCB of the device.
Can any of DT maintainers give their input on this?
Quoted 17 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +17
-0+ gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; + label = "EAST"; + linux,code = <BTN_EAST>; + }; +}; + +&i2c0 { + /* This hardware is physically present but unused. */ + cw2015@62 { + compatible = "cellwise,cw2015"; + reg = <0x62>; + status = "disabled"; + }; +}; + +&i2c2 { + pintctrl-names = "default";
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts line 86
Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +10
-0+ pinctrl-0 = <&i2c2m1_xfer>; + status = "okay"; +}; + +&pinctrl { + gpio-lcd { + lcd_rst: lcd-rst { + rockchip,pins = + <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + };
Is it unused? If it is I think it would belong to patch that would add panel to this device
Quoted 105 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +17
-0+ }; +}; + +&pwm4 { + status = "okay"; +}; + +&sdhci { + pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>, <&emmc_datastrobe>, <&emmc_rstnout>; + pinctrl-names = "default"; + bus-width = <8>; + mmc-hs200-1_8v; + non-removable; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc_1v8>; + status = "okay"; +};arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts new file +82
-0@@ -0,0 +1,93 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3566-anbernic-rgxx3.dtsi" + +/ { + model = "RG503"; + compatible = "anbernic,rg503", "rockchip,rk3566"; + + aliases { + mmc0 = &sdmmc0; + mmc1 = &sdmmc1; + mmc2 = &sdmmc2; + }; + + gpio_spi: spi { + compatible = "spi-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&spi_pins>; + #address-cells = <1>; + #size-cells = <0>; + + sck-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; + num-chipselects = <0>; + }; +}; + +&gpio_keys_control { + button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR2>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "EAST"; + linux,code = <BTN_EAST>; + }; + + button-15 { + gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; +}; + +&pinctrl { + gpio-spi { + spi_pins: spi-pins { + rockchip,pins = + <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, + <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gpio-lcd {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts line 92
Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts new file +10
-0+ lcd_enable: lcd-enable { + rockchip,pins = + <4 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + lcd_reset: lcd-reset { + rockchip,pins = + <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + };
Same comment as above to the LCD pins on RG353P
Quoted 11 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts new file +1
-0+};arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +4
-0@@ -0,0 +1,821 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; +
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi line 14
Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +10
-0+#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include <dt-bindings/soc/rockchip,vop2.h> +#include "rk3566.dtsi" + +/ { + chosen: chosen { + stdout-path = "serial2:1500000n8";
I'm wondering if this should be changed to 115200 baud rate so it would end up the same as on other devices, like Odroid Go Advance.
Quoted 49 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +49
-0+ }; + + adc-joystick { + compatible = "adc-joystick"; + io-channels = <&adc_mux 0>, + <&adc_mux 1>, + <&adc_mux 2>, + <&adc_mux 3>; + pinctrl-0 = <&joy_mux_en>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + axis@0 { + reg = <0>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <1023 15>; + linux,code = <ABS_X>; + }; + + axis@1 { + reg = <1>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <15 1023>; + linux,code = <ABS_RX>; + }; + + axis@2 { + reg = <2>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <15 1023>; + linux,code = <ABS_Y>; + }; + + axis@3 { + reg = <3>; + abs-flat = <32>; + abs-fuzz = <32>; + abs-range = <1023 15>; + linux,code = <ABS_RY>; + }; + }; + + adc_keys: adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>;
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi line 73
Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +10
-0+ io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <60>; + + /* + * Button is mapped to F key in BSP kernel, but + * according to input guidelines it should be mode. + */ + button-mode { + label = "MODE";
The physical button is labeled "F", so maybe this should be "F" too?
Best Regards,
Maya Matuszczyk
Quoted 756 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +748
-1+ linux,code = <BTN_MODE>; + press-threshold-microvolt = <1750>; + }; + }; + + adc_mux: adc-mux { + compatible = "io-channel-mux"; + channels = "left_x", "right_x", "left_y", "right_y"; + #io-channel-cells = <1>; + io-channels = <&saradc 3>; + io-channel-names = "parent"; + mux-controls = <&gpio_mux>; + settle-time-us = <100>; + }; + + gpio_keys_control: gpio-keys-control { + compatible = "gpio-keys"; + pinctrl-0 = <&btn_pins_ctrl>; + pinctrl-names = "default"; + + button-1 { + gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; + label = "THUMBL"; + linux,code = <BTN_THUMBL>; + }; + + button-2 { + gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; + label = "THUMBR"; + linux,code = <BTN_THUMBR>; + }; + + button-3 { + gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>; + label = "DPAD-UP"; + linux,code = <BTN_DPAD_UP>; + }; + + button-4 { + gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>; + label = "DPAD-DOWN"; + linux,code = <BTN_DPAD_DOWN>; + }; + + button-7 { + gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; + label = "TL"; + linux,code = <BTN_TL>; + }; + + button-8 { + gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; + label = "TL2"; + linux,code = <BTN_TL2>; + }; + + button-11 { + gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>; + label = "START"; + linux,code = <BTN_START>; + }; + + button-12 { + gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; + label = "SELECT"; + linux,code = <BTN_SELECT>; + }; + + button-13 { + gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; + label = "NORTH"; + linux,code = <BTN_NORTH>; + }; + + button-16 { + gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_LOW>; + label = "SOUTH"; + linux,code = <BTN_SOUTH>; + }; + }; + + gpio_keys_vol: gpio-keys-vol { + compatible = "gpio-keys"; + autorepeat; + pinctrl-0 = <&btn_pins_vol>; + pinctrl-names = "default"; + + button-vol-down { + gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; + label = "VOLUMEDOWN"; + linux,code = <KEY_VOLUMEDOWN>; + }; + + button-vol-up { + gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; + label = "VOLUMEUP"; + linux,code = <KEY_VOLUMEUP>; + }; + }; + + gpio_mux: mux-controller { + compatible = "gpio-mux"; + mux-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>, + <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; + #mux-control-cells = <0>; + }; + + hdmi-con { + compatible = "hdmi-connector"; + type = "c"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; + }; + + leds: gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&led_pins>; + pinctrl-names = "default"; + + green_led: led-0 { + color = <LED_COLOR_ID_GREEN>; + default-state = "on"; + function = LED_FUNCTION_POWER; + gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + }; + + amber_led: led-1 { + color = <LED_COLOR_ID_AMBER>; + function = LED_FUNCTION_CHARGING; + gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; + retain-state-suspended; + }; + + red_led: led-2 { + color = <LED_COLOR_ID_RED>; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + }; + }; + + /* Channels reversed for both headphones and speakers. */ + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "anbernic_rk817"; + simple-audio-card,aux-devs = <&spk_amp>; + simple-audio-card,format = "i2s"; + simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; + simple-audio-card,mclk-fs = <256>; + simple-audio-card,widgets = + "Microphone", "Mic Jack", + "Headphone", "Headphones", + "Speaker", "Internal Speakers"; + simple-audio-card,routing = + "MICL", "Mic Jack", + "Headphones", "HPOL", + "Headphones", "HPOR", + "Internal Speakers", "Speaker Amp OUTL", + "Internal Speakers", "Speaker Amp OUTR", + "Speaker Amp INL", "HPOL", + "Speaker Amp INR", "HPOR"; + simple-audio-card,pin-switches = "Internal Speakers"; + + simple-audio-card,codec { + sound-dai = <&rk817>; + }; + + simple-audio-card,cpu { + sound-dai = <&i2s1_8ch>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk817 1>; + clock-names = "ext_clock"; + pinctrl-0 = <&wifi_enable_h>; + pinctrl-names = "default"; + post-power-on-delay-ms = <200>; + reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>; + }; + + spk_amp: audio-amplifier { + compatible = "simple-audio-amplifier"; + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&spk_amp_enable_h>; + pinctrl-names = "default"; + sound-name-prefix = "Speaker Amp"; + }; + + vcc3v3_lcd0_n: regulator-vcc3v3-lcd0 { + compatible = "regulator-fixed"; + gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; + enable-active-high; + pinctrl-0 = <&vcc_lcd_h>; + pinctrl-names = "default"; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_lcd0_n"; + vin-supply = <&vcc_3v3>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_sys: regulator-vcc-sys { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3800000>; + regulator-max-microvolt = <3800000>; + regulator-name = "vcc_sys"; + }; + + vcc_wifi: regulator-vcc-wifi { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&vcc_wifi_h>; + pinctrl-names = "default"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_wifi"; + }; + + vibrator: pwm-vibrator { + compatible = "pwm-vibrator"; + pwm-names = "enable"; + pwms = <&pwm5 0 1000000000 0>; + }; +}; + +&combphy1 { + status = "okay"; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply = <&vdd_cpu>; +}; + +&gpu { + mali-supply = <&vdd_gpu>; + status = "okay"; +}; + +&hdmi { + status = "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk817: pmic@20 { + compatible = "rockchip,rk817"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + #clock-cells = <1>; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_mclk>, <&pmic_int_l>; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&dcdc_boost>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_logic"; + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_gpu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_3v3: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-initial-mode = <0x2>; + regulator-name = "vcc_3v3"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca1v8_pmu: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc1v8_dvp: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc1v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG9 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + regulator-name = "vcc2v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + dcdc_boost: BOOST { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <4700000>; + regulator-max-microvolt = <5400000>; + regulator-name = "boost"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + otg_switch: OTG_SWITCH { + regulator-name = "otg_switch"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; + + vdd_cpu: regulator@40 { + compatible = "fcs,fan53555"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1390000>; + regulator-init-microvolt = <900000>; + regulator-name = "vdd_cpu"; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc_sys>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&i2c1 { + /* Unknown/unused device at 0x3c */ + status = "disabled"; +}; + +&i2s0_8ch { + status = "okay"; +}; + +&i2s1_8ch { + pinctrl-0 = <&i2s1m0_sclktx + &i2s1m0_lrcktx + &i2s1m0_sdi0 + &i2s1m0_sdo0>; + pinctrl-names = "default"; + rockchip,trcm-sync-tx-only; + status = "okay"; +}; + +&pinctrl { + audio-amplifier { + spk_amp_enable_h: spk-amp-enable-h { + rockchip,pins = + <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gpio-btns { + btn_pins_ctrl: btn-pins-ctrl { + rockchip,pins = + <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + btn_pins_vol: btn-pins-vol { + rockchip,pins = + <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, + <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + gpio-led { + led_pins: led-pins { + rockchip,pins = + <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + joy-mux { + joy_mux_en: joy-mux-en { + rockchip,pins = + <0 RK_PB5 RK_FUNC_GPIO &pcfg_output_low>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = + <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + vcc3v3-lcd { + vcc_lcd_h: vcc-lcd-h { + rockchip,pins = + <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + vcc-wifi { + vcc_wifi_h: vcc-wifi-h { + rockchip,pins = + <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + status = "okay"; + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc1v8_dvp>; + vccio7-supply = <&vcc_3v3>; +}; + +&pwm5 { + status = "okay"; +}; + +&saradc { + vref-supply = <&vcc_1v8>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + pinctrl-names = "default"; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&sdmmc1 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk &sdmmc1_det>; + pinctrl-names = "default"; + sd-uhs-sdr104; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vcc1v8_dvp>; + status = "okay"; +}; + +&sdmmc2 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; + pinctrl-names = "default"; + vmmc-supply = <&vcc_wifi>; + vqmmc-supply = <&vcca1v8_pmu>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn &uart1m1_rtsn>; + pinctrl-names = "default"; + uart-has-rtscts; + status = "okay"; + + bluetooth { + compatible = "realtek,rtl8821cs-bt"; + device-wake-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>; + enable-gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>; + host-wake-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; + }; +}; + +&uart2 { + status = "okay"; +}; + +/* + * Lack the schematics to verify, but port works as a peripheral + * (and not a host or OTG port). + */ +&usb_host0_xhci { + dr_mode = "peripheral"; + phys = <&usb2phy0_otg>; + phy-names = "usb2-phy"; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host1_xhci { + phy-names = "usb2-phy", "usb3-phy"; + phys = <&usb2phy1_host>, <&combphy1 PHY_TYPE_USB3>; + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_otg { + status = "okay"; +}; + +&usb2phy1 { + status = "okay"; +}; + +&usb2phy1_host { + status = "okay"; +}; + +&vop { + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status = "okay"; +}; + +&vop_mmu { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = <ROCKCHIP_VOP2_EP_HDMI0>; + remote-endpoint = <&hdmi_in_vp0>; + }; +}; --2.25.1
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Heiko Stübner
maintainerRe: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
Am Samstag, 20. August 2022, 10:40:34 CEST schrieb Maya Matuszczyk:
Quoted 3 lines
sob., 20 sie 2022 o 00:26 Chris Morgan <[email protected]> napisał(a):
Quoted 2 lines
From: Chris Morgan <[email protected]>
[...]
Quoted 31 lines
Quoted 31 lines
+&gpio_keys_control {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +30
-0+ button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR2>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; +
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Quoted 1 line
+ button-15 {
I don't think just having the buttons numbered sequentially is the best course of action, but this preserves the GPIO ordering while other options don't...
I'm thinking about either having them named after their function, or named after what they're labeled on the PCB of the device.
Can any of DT maintainers give their input on this?
Personally, I'd prefer going with what is on the PCB or defined in the schematics.
This makes it way easier finding dt-elements either in schematics or on the board itself.
This is true for all names ;-)
On the Odroid-Go for example buttons are really named sw1, sw2, ... so the dt-name became button-sw1 etc.
[...]
Quoted 8 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts line 86
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+&pinctrl {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +5
-0+ gpio-lcd { + lcd_rst: lcd-rst { + rockchip,pins = + <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + };Is it unused? If it is I think it would belong to patch that would add panel to this device
I tend to agree :-) .
Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi line 14
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arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +3
-0+/ { + chosen: chosen { + stdout-path = "serial2:1500000n8";I'm wondering if this should be changed to 115200 baud rate so it would end up the same as on other devices, like Odroid Go Advance.
That heavily depends on the bootloader. I.e. speeds should be consistent between them.
A lot of cheaper usb-ttl adapters tend to have difficulties with the faster speeds, so 115200 is easier for those, but you need u-boot to also use this speed.
On the Odroid-Go I did both the u-boot and kernel parts, so could make sure those matched.
[...]
Quoted 13 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi line 73
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arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +13
-0+ adc_keys: adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <60>; + + /* + * Button is mapped to F key in BSP kernel, but + * according to input guidelines it should be mode. + */ + button-mode { + label = "MODE";
Quoted 2 lines
The physical button is labeled "F", so maybe this should be "F" too?
same comment about ideally using board/schematics names. But then again, I won't make a fuss if it's named differently :-)
Heiko
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Re: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
Quoted 50 lines · Heiko Stübner
Am Samstag, 20. August 2022, 10:40:34 CEST schrieb Maya Matuszczyk:
Quoted 3 lines
sob., 20 sie 2022 o 00:26 Chris Morgan <[email protected]> napisał(a):
Quoted 2 lines
From: Chris Morgan <[email protected]>
[...]
Quoted 31 lines
Quoted 31 lines
+&gpio_keys_control {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +30
-0+ button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR2>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; +Quoted 8 lines
Quoted 1 line
+ button-15 {
I don't think just having the buttons numbered sequentially is the best course of action, but this preserves the GPIO ordering while other options don't...
I'm thinking about either having them named after their function, or named after what they're labeled on the PCB of the device.
Can any of DT maintainers give their input on this?Personally, I'd prefer going with what is on the PCB or defined in the schematics.
Quoted 8 lines
This makes it way easier finding dt-elements either in schematics or on the board itself.
This is true for all names ;-)
On the Odroid-Go for example buttons are really named sw1, sw2, ... so the dt-name became button-sw1 etc.
Matching what's on the schematics/board makes sense.
Best regards,
Krzysztof
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Re: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
Quoted 54 lines · Krzysztof Kozlowski
Quoted 53 lines · Heiko Stübner
Am Samstag, 20. August 2022, 10:40:34 CEST schrieb Maya Matuszczyk:
Quoted 3 lines
sob., 20 sie 2022 o 00:26 Chris Morgan <[email protected]> napisał(a):
Quoted 2 lines
From: Chris Morgan <[email protected]>
[...]
Quoted 31 lines
Quoted 31 lines
+&gpio_keys_control {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +30
-0+ button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR2>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; +Quoted 8 lines
Quoted 1 line
+ button-15 {
I don't think just having the buttons numbered sequentially is the best course of action, but this preserves the GPIO ordering while other options don't...
I'm thinking about either having them named after their function, or named after what they're labeled on the PCB of the device.
Can any of DT maintainers give their input on this?Personally, I'd prefer going with what is on the PCB or defined in the schematics.
This makes it way easier finding dt-elements either in schematics or on the board itself.
Quoted 7 lines
Quoted 5 lines
This is true for all names ;-)
On the Odroid-Go for example buttons are really named sw1, sw2, ... so the dt-name became button-sw1 etc.
Matching what's on the schematics/board makes sense.
I'll do my best (in regards to board name). Schematics won't be possible as Anbernic hasn't released them.
Quoted 3 lines
Best regards,
Krzysztof
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Re: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
In reply to Heiko Stübnerwt., 23 sie 2022 o 14:16 Heiko Stübner <[email protected]> napisał(a):
Quoted 51 lines
Am Samstag, 20. August 2022, 10:40:34 CEST schrieb Maya Matuszczyk:
Quoted 3 lines
sob., 20 sie 2022 o 00:26 Chris Morgan <[email protected]> napisał(a):
Quoted 2 lines
From: Chris Morgan <[email protected]>
[...]
Quoted 31 lines
Quoted 31 lines
+&gpio_keys_control {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +30
-0+ button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR2>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; +Quoted 8 lines
Quoted 1 line
+ button-15 {
I don't think just having the buttons numbered sequentially is the best course of action, but this preserves the GPIO ordering while other options don't...
I'm thinking about either having them named after their function, or named after what they're labeled on the PCB of the device.
Can any of DT maintainers give their input on this?Personally, I'd prefer going with what is on the PCB or defined in the schematics.
Quoted 7 lines
This makes it way easier finding dt-elements either in schematics or on the board itself.
This is true for all names ;-)
On the Odroid-Go for example buttons are really named sw1, sw2, ... so the dt-name became button-sw1 etc.
I disassembled my device and DPAD buttons on pcb have silkscreened labels U/D/L/R, for up/down/left/right, Select and start buttons are named SELECT and START, action buttons are named A/B/X/Y for East, South, North and West buttons, The "F" button on front of the device has F label, but on PCB it's "RECOVERY". And TR/TL/TR2/TL2 are named R1/L1/R2/L2 on their test points, I wasn't able to find a silkscreen label as they are on their own PCBs.
Volume buttons are SW3 for Volume up and SW2 for Volume down.
Quoted 22 lines
[...]
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arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts line 86
Quoted 6 lines
+&pinctrl {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +5
-0+ gpio-lcd { + lcd_rst: lcd-rst { + rockchip,pins = + <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + };Is it unused? If it is I think it would belong to patch that would add panel to this device
I tend to agree :-) .
Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi line 14
Quoted 3 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +3
-0+/ { + chosen: chosen { + stdout-path = "serial2:1500000n8";I'm wondering if this should be changed to 115200 baud rate so it would end up the same as on other devices, like Odroid Go Advance.
Quoted 6 lines
That heavily depends on the bootloader. I.e. speeds should be consistent between them.
A lot of cheaper usb-ttl adapters tend to have difficulties with the faster speeds, so 115200 is easier for those, but you need u-boot to also use this speed.
Yeah I've had troubles finding an adapter that could do the default 1500000 baud rate.
Quoted 4 lines
On the Odroid-Go I did both the u-boot and kernel parts, so could make sure those matched.
I think we can just use 115200 baud rate, as Odroid Go Advance already uses it, and it's likely that it's the first thing people would try.
Quoted 17 lines
[...]
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Quoted 13 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +13
-0+ adc_keys: adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <60>; + + /* + * Button is mapped to F key in BSP kernel, but + * according to input guidelines it should be mode. + */ + button-mode { + label = "MODE";
Quoted 5 lines
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The physical button is labeled "F", so maybe this should be "F" too?
same comment about ideally using board/schematics names. But then again, I won't make a fuss if it's named differently :-)
So I guess it'd be "btn-recovery" as it's labeled "RECOVERY" on PCB, with "F" label as it's what's the user sees?
Best Regards,
Maya Matuszczyk
Quoted 5 lines
Heiko
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Re: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
Quoted 69 lines · Maya Matuszczyk
wt., 23 sie 2022 o 14:16 Heiko Stübner <[email protected]> napisał(a):
Quoted 51 lines
Am Samstag, 20. August 2022, 10:40:34 CEST schrieb Maya Matuszczyk:
Quoted 3 lines
sob., 20 sie 2022 o 00:26 Chris Morgan <[email protected]> napisał(a):
Quoted 2 lines
From: Chris Morgan <[email protected]>
[...]
Quoted 31 lines
Quoted 31 lines
+&gpio_keys_control {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +30
-0+ button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR2>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; +Quoted 8 lines
Quoted 1 line
+ button-15 {
I don't think just having the buttons numbered sequentially is the best course of action, but this preserves the GPIO ordering while other options don't...
I'm thinking about either having them named after their function, or named after what they're labeled on the PCB of the device.
Can any of DT maintainers give their input on this?Personally, I'd prefer going with what is on the PCB or defined in the schematics.
Quoted 7 lines
This makes it way easier finding dt-elements either in schematics or on the board itself.
This is true for all names ;-)
On the Odroid-Go for example buttons are really named sw1, sw2, ... so the dt-name became button-sw1 etc.
I disassembled my device and DPAD buttons on pcb have silkscreened labels U/D/L/R, for up/down/left/right, Select and start buttons are named SELECT and START, action buttons are named A/B/X/Y for East, South, North and West buttons, The "F" button on front of the device has F label, but on PCB it's "RECOVERY". And TR/TL/TR2/TL2 are named R1/L1/R2/L2 on their test points, I wasn't able to find a silkscreen label as they are on their own PCBs.
Quoted 2 lines
Volume buttons are SW3 for Volume up and SW2 for Volume down.
Thanks Maya, this is for the 353P correct? I was looking at my spare 503 board to get the labels earlier. Of course, this brings up another intersting point... the labels are different on each board (at least for the R/L buttons, the volume buttons, and the recovery button which is sw11 on the 503). Does that warrant separating them out despite the GPIOs themselves being identical?
Quoted 60 lines
Quoted 23 lines
[...]
Quoted 8 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts line 86
Quoted 6 lines
+&pinctrl {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +5
-0+ gpio-lcd { + lcd_rst: lcd-rst { + rockchip,pins = + <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + };Is it unused? If it is I think it would belong to patch that would add panel to this device
I tend to agree :-) .
Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi line 14
Quoted 3 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +3
-0+/ { + chosen: chosen { + stdout-path = "serial2:1500000n8";I'm wondering if this should be changed to 115200 baud rate so it would end up the same as on other devices, like Odroid Go Advance.
Quoted 6 lines
That heavily depends on the bootloader. I.e. speeds should be consistent between them.
A lot of cheaper usb-ttl adapters tend to have difficulties with the faster speeds, so 115200 is easier for those, but you need u-boot to also use this speed.
Yeah I've had troubles finding an adapter that could do the default 1500000 baud rate.
Quoted 4 lines
On the Odroid-Go I did both the u-boot and kernel parts, so could make sure those matched.
I think we can just use 115200 baud rate, as Odroid Go Advance already uses it, and it's likely that it's the first thing people would try.
Quoted 20 lines
[...]
Quoted 15 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi line 73
Quoted 13 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +13
-0+ adc_keys: adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <60>; + + /* + * Button is mapped to F key in BSP kernel, but + * according to input guidelines it should be mode. + */ + button-mode { + label = "MODE";The physical button is labeled "F", so maybe this should be "F" too?
Quoted 13 lines
Quoted 2 lines
same comment about ideally using board/schematics names. But then again, I won't make a fuss if it's named differently :-)
So I guess it'd be "btn-recovery" as it's labeled "RECOVERY" on PCB, with "F" label as it's what's the user sees?
Best Regards,
Maya MatuszczykQuoted 5 lines
Heiko
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Re: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
In reply to Heiko StübnerQuoted 50 lines · Heiko Stübner
Am Samstag, 20. August 2022, 10:40:34 CEST schrieb Maya Matuszczyk:
Quoted 3 lines
sob., 20 sie 2022 o 00:26 Chris Morgan <[email protected]> napisał(a):
Quoted 2 lines
From: Chris Morgan <[email protected]>
[...]
Quoted 31 lines
Quoted 31 lines
+&gpio_keys_control {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +30
-0+ button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR2>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; +Quoted 8 lines
Quoted 1 line
+ button-15 {
I don't think just having the buttons numbered sequentially is the best course of action, but this preserves the GPIO ordering while other options don't...
I'm thinking about either having them named after their function, or named after what they're labeled on the PCB of the device.
Can any of DT maintainers give their input on this?Personally, I'd prefer going with what is on the PCB or defined in the schematics.
Quoted 7 lines
This makes it way easier finding dt-elements either in schematics or on the board itself.
This is true for all names ;-)
On the Odroid-Go for example buttons are really named sw1, sw2, ... so the dt-name became button-sw1 etc.
There are no schematics, so I'll see if I can locate names on the boards. If I can, I'll rename these, and if not leave them in numerical order. Will that work?
Quoted 10 lines
[...]
Quoted 6 lines
Quoted 6 lines
+&pinctrl {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +5
-0+ gpio-lcd { + lcd_rst: lcd-rst { + rockchip,pins = + <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + };
Quoted 4 lines
Quoted 2 lines
Is it unused? If it is I think it would belong to patch that would add panel to this device
I tend to agree :-) .
Okay, will remove.
Quoted 8 lines
Quoted 7 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi line 14
Quoted 4 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +3
-0+/ { + chosen: chosen { + stdout-path = "serial2:1500000n8";I'm wondering if this should be changed to 115200 baud rate so it would end up the same as on other devices, like Odroid Go Advance.
Quoted 7 lines
That heavily depends on the bootloader. I.e. speeds should be consistent between them.
A lot of cheaper usb-ttl adapters tend to have difficulties with the faster speeds, so 115200 is easier for those, but you need u-boot to also use this speed.
I don't have A-TF sources which have the output set at 1500000. I can recompile U-Boot, but the stock bootloader also has it at 1500000. I'd love to be at a sane 115200, but until we have A-TF sources that might not be possible, right?
Quoted 20 lines
On the Odroid-Go I did both the u-boot and kernel parts, so could make sure those matched.
[...]
Quoted 13 lines
Quoted 13 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +13
-0+ adc_keys: adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <60>; + + /* + * Button is mapped to F key in BSP kernel, but + * according to input guidelines it should be mode. + */ + button-mode { + label = "MODE";
Quoted 6 lines
Quoted 2 lines
The physical button is labeled "F", so maybe this should be "F" too?
same comment about ideally using board/schematics names. But then again, I won't make a fuss if it's named differently :-)
Ditto, I'll see if I can find names on the boards and rename accordingly. If not, will this work? Thank you.
Quoted 4 lines
Heiko
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A message that is not in the archive (sent off-list or not yet received): [email protected]
Re: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
Quoted 54 lines · Chris Morgan
Quoted 53 lines · Heiko Stübner
Am Samstag, 20. August 2022, 10:40:34 CEST schrieb Maya Matuszczyk:
Quoted 3 lines
sob., 20 sie 2022 o 00:26 Chris Morgan <[email protected]> napisał(a):
Quoted 2 lines
From: Chris Morgan <[email protected]>
[...]
Quoted 31 lines
Quoted 31 lines
+&gpio_keys_control {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +30
-0+ button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR2>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; +Quoted 8 lines
Quoted 1 line
+ button-15 {
I don't think just having the buttons numbered sequentially is the best course of action, but this preserves the GPIO ordering while other options don't...
I'm thinking about either having them named after their function, or named after what they're labeled on the PCB of the device.
Can any of DT maintainers give their input on this?Personally, I'd prefer going with what is on the PCB or defined in the schematics.
This makes it way easier finding dt-elements either in schematics or on the board itself.
Quoted 8 lines
Quoted 4 lines
This is true for all names ;-)
On the Odroid-Go for example buttons are really named sw1, sw2, ... so the dt-name became button-sw1 etc.
There are no schematics, so I'll see if I can locate names on the boards. If I can, I'll rename these, and if not leave them in numerical order. Will that work?
Okay, what if some have names and some don't? Should I just label it based on the board if they do have names, and function if they don't?
For example volume up is sw14 and volume down is sw15. The north button is labelled "X", and the south button "B". However, the thumb stick buttons and the L/R/L2/R2 don't have labels (at least on my revision). Should those then be named by their function?
Thank you.
Quoted 62 lines
Quoted 11 lines
[...]
Quoted 6 lines
Quoted 6 lines
+&pinctrl {
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +5
-0+ gpio-lcd { + lcd_rst: lcd-rst { + rockchip,pins = + <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + };Quoted 4 lines
Quoted 2 lines
Is it unused? If it is I think it would belong to patch that would add panel to this device
I tend to agree :-) .
Okay, will remove.
Quoted 8 lines
Quoted 7 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi line 14
Quoted 4 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +3
-0+/ { + chosen: chosen { + stdout-path = "serial2:1500000n8";I'm wondering if this should be changed to 115200 baud rate so it would end up the same as on other devices, like Odroid Go Advance.
Quoted 7 lines
That heavily depends on the bootloader. I.e. speeds should be consistent between them.
A lot of cheaper usb-ttl adapters tend to have difficulties with the faster speeds, so 115200 is easier for those, but you need u-boot to also use this speed.
I don't have A-TF sources which have the output set at 1500000. I can recompile U-Boot, but the stock bootloader also has it at 1500000. I'd love to be at a sane 115200, but until we have A-TF sources that might not be possible, right?
Quoted 23 lines
On the Odroid-Go I did both the u-boot and kernel parts, so could make sure those matched.
[...]
Quoted 15 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi line 73
Quoted 13 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +13
-0+ adc_keys: adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 0>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <60>; + + /* + * Button is mapped to F key in BSP kernel, but + * according to input guidelines it should be mode. + */ + button-mode { + label = "MODE";The physical button is labeled "F", so maybe this should be "F" too?
Quoted 11 lines
Quoted 3 lines
same comment about ideally using board/schematics names. But then again, I won't make a fuss if it's named differently :-)
Ditto, I'll see if I can find names on the boards and rename accordingly. If not, will this work? Thank you.
Quoted 4 lines
Heiko
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Re: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
In reply to Maya MatuszczykQuoted 137 lines · Maya Matuszczyk
Hello,
sob., 20 sie 2022 o 00:26 Chris Morgan <[email protected]> napisał(a):
Quoted 134 lines
From: Chris Morgan <[email protected]>
Anbernic RG353P and RG503 are both RK3566 based handheld gaming devices from Anbernic.
Both devices have:
- 2 SDMMC slots.
- A Realtek rtl8821cs WiFi/Bluetooth adapter.
- A mini HDMI port.
- A USB C host port and a USB C otg port (currently only working as device).
- Multiple GPIO buttons and a single ADC button.
- Dual analog joysticks controlled via a GPIO mux.
- A headphone jack with amplified stereo speakers via a SGM4865 amp.
- A PWM based vibrator for force feedback.The RG353P has:
- 2GB LPDDR4 RAM.
- A 32GB eMMC.
- A 3.5 inch 640x480 4-lane DSI panel of unknown origin with an i2c controlled touchscreen (touchscreen is a Hynitron CST340).The RG503 has:
- 1GB LPDDR4 RAM.
- A 5 inch 960x544 AMOLED 2-lane DSI/DBI panel manufactured by Samsung with part number ams495qa04. Data for this panel is provided via the DSI interface, however commands are sent via a 9-bit 3-wire SPI interface. The MISO pin of SPI3 of the SOC is wired to the input of the panel, so it must be bitbanged.This devicetree enables the following hardware:
- HDMI (plus audio).
- Analog audio, including speakers.
- All buttons.
- All SDMMC/eMMC/SDIO controllers.
- The ADC joysticks (note a pending patch is required to use them).
- WiFi/Bluetooth (note out of tree drivers are required).
- The PWM based vibrator motor.The following hardware is not enabled:
- The display panels (drivers are being written and there are issues with the upstream DSI and VOP2 subsystems).
- Battery (driver pending).
- Touchscreen on the RG353P (note the i2c2 bus is enabled for it).Signed-off-by Chris Morgan <[email protected]>--- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/rk3566-anbernic-rg353p.dts | 103 +++ .../dts/rockchip/rk3566-anbernic-rg503.dts | 93 ++ .../dts/rockchip/rk3566-anbernic-rgxx3.dtsi | 821 ++++++++++++++++++ 4 files changed, 1019 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsiarch/arm64/boot/dts/rockchip/Makefile +2
-0@@ -57,6 +57,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353p.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtbarch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +58
-0@@ -0,0 +1,103 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3566-anbernic-rgxx3.dtsi" + +/ { + model = "RG353P"; + compatible = "anbernic,rg353p", "rockchip,rk3566"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc0; + mmc2 = &sdmmc1; + mmc3 = &sdmmc2; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&vcc_sys>; + pwms = <&pwm4 0 25000 0>; + }; +}; + +&gpio_keys_control { + button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR2>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; +
Quoted 8 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts line 59
Quoted 1 line
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +1
-0+ button-15 {I don't think just having the buttons numbered sequentially is the best course of action, but this preserves the GPIO ordering while other options don't...
I'm thinking about either having them named after their function, or named after what they're labeled on the PCB of the device.
Can any of DT maintainers give their input on this?
Names should be generic and button-1 is a nice generic name. Adding specific prefix/suffix makes something less generic, more specific, thus I prefer without prefixes/suffixes. I don't mind them, though for the cases it brings value. Here the role is clearly described by label, so why adding suffix?
Best regards,
Krzysztof
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Re: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
In reply to Chris MorganQuoted 133 lines · Chris Morgan
From: Chris Morgan <[email protected]>
Anbernic RG353P and RG503 are both RK3566 based handheld gaming devices from Anbernic.
Both devices have:
- 2 SDMMC slots.
- A Realtek rtl8821cs WiFi/Bluetooth adapter.
- A mini HDMI port.
- A USB C host port and a USB C otg port (currently only working as device).
- Multiple GPIO buttons and a single ADC button.
- Dual analog joysticks controlled via a GPIO mux.
- A headphone jack with amplified stereo speakers via a SGM4865 amp.
- A PWM based vibrator for force feedback.The RG353P has:
- 2GB LPDDR4 RAM.
- A 32GB eMMC.
- A 3.5 inch 640x480 4-lane DSI panel of unknown origin with an i2c controlled touchscreen (touchscreen is a Hynitron CST340).The RG503 has:
- 1GB LPDDR4 RAM.
- A 5 inch 960x544 AMOLED 2-lane DSI/DBI panel manufactured by Samsung with part number ams495qa04. Data for this panel is provided via the DSI interface, however commands are sent via a 9-bit 3-wire SPI interface. The MISO pin of SPI3 of the SOC is wired to the input of the panel, so it must be bitbanged.This devicetree enables the following hardware:
- HDMI (plus audio).
- Analog audio, including speakers.
- All buttons.
- All SDMMC/eMMC/SDIO controllers.
- The ADC joysticks (note a pending patch is required to use them).
- WiFi/Bluetooth (note out of tree drivers are required).
- The PWM based vibrator motor.The following hardware is not enabled:
- The display panels (drivers are being written and there are issues with the upstream DSI and VOP2 subsystems).
- Battery (driver pending).
- Touchscreen on the RG353P (note the i2c2 bus is enabled for it).Signed-off-by Chris Morgan <[email protected]>--- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/rk3566-anbernic-rg353p.dts | 103 +++ .../dts/rockchip/rk3566-anbernic-rg503.dts | 93 ++ .../dts/rockchip/rk3566-anbernic-rgxx3.dtsi | 821 ++++++++++++++++++ 4 files changed, 1019 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsiarch/arm64/boot/dts/rockchip/Makefile +2
-0@@ -57,6 +57,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353p.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtbarch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +58
-0@@ -0,0 +1,103 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3566-anbernic-rgxx3.dtsi" + +/ { + model = "RG353P"; + compatible = "anbernic,rg353p", "rockchip,rk3566"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc0; + mmc2 = &sdmmc1; + mmc3 = &sdmmc2; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&vcc_sys>; + pwms = <&pwm4 0 25000 0>; + }; +}; + +&gpio_keys_control { + button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR2>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; +
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts line 68
Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +10
-0+ button-15 { + gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; + label = "EAST"; + linux,code = <BTN_EAST>; + }; +}; + +&i2c0 { + /* This hardware is physically present but unused. */ + cw2015@62 {
Node names should be generic.
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation
Quoted 12 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +12
-0+ compatible = "cellwise,cw2015"; + reg = <0x62>; + status = "disabled"; + }; +}; + +&i2c2 { + pintctrl-names = "default"; + pinctrl-0 = <&i2c2m1_xfer>; + status = "okay"; +}; +
(...)
Quoted 26 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +26
-0+ +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk817: pmic@20 { + compatible = "rockchip,rk817"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + #clock-cells = <1>; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_mclk>, <&pmic_int_l>; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>;
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts
Quoted 10 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +10
-0+ vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&dcdc_boost>; + + regulators { + vdd_logic: DCDC_REG1 {
I commented here and there was no feedback, so please implement the change.
Best regards,
Krzysztof
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Re: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
Quoted 138 lines · Krzysztof Kozlowski
Quoted 137 lines · Chris Morgan
From: Chris Morgan <[email protected]>
Anbernic RG353P and RG503 are both RK3566 based handheld gaming devices from Anbernic.
Both devices have:
- 2 SDMMC slots.
- A Realtek rtl8821cs WiFi/Bluetooth adapter.
- A mini HDMI port.
- A USB C host port and a USB C otg port (currently only working as device).
- Multiple GPIO buttons and a single ADC button.
- Dual analog joysticks controlled via a GPIO mux.
- A headphone jack with amplified stereo speakers via a SGM4865 amp.
- A PWM based vibrator for force feedback.The RG353P has:
- 2GB LPDDR4 RAM.
- A 32GB eMMC.
- A 3.5 inch 640x480 4-lane DSI panel of unknown origin with an i2c controlled touchscreen (touchscreen is a Hynitron CST340).The RG503 has:
- 1GB LPDDR4 RAM.
- A 5 inch 960x544 AMOLED 2-lane DSI/DBI panel manufactured by Samsung with part number ams495qa04. Data for this panel is provided via the DSI interface, however commands are sent via a 9-bit 3-wire SPI interface. The MISO pin of SPI3 of the SOC is wired to the input of the panel, so it must be bitbanged.This devicetree enables the following hardware:
- HDMI (plus audio).
- Analog audio, including speakers.
- All buttons.
- All SDMMC/eMMC/SDIO controllers.
- The ADC joysticks (note a pending patch is required to use them).
- WiFi/Bluetooth (note out of tree drivers are required).
- The PWM based vibrator motor.The following hardware is not enabled:
- The display panels (drivers are being written and there are issues with the upstream DSI and VOP2 subsystems).
- Battery (driver pending).
- Touchscreen on the RG353P (note the i2c2 bus is enabled for it).Signed-off-by Chris Morgan <[email protected]>--- arch/arm64/boot/dts/rockchip/Makefile | 2 + .../dts/rockchip/rk3566-anbernic-rg353p.dts | 103 +++ .../dts/rockchip/rk3566-anbernic-rg503.dts | 93 ++ .../dts/rockchip/rk3566-anbernic-rgxx3.dtsi | 821 ++++++++++++++++++ 4 files changed, 1019 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsiarch/arm64/boot/dts/rockchip/Makefile +2
-0@@ -57,6 +57,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353p.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtbarch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +62
-0@@ -0,0 +1,103 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3566-anbernic-rgxx3.dtsi" + +/ { + model = "RG353P"; + compatible = "anbernic,rg353p", "rockchip,rk3566"; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc0; + mmc2 = &sdmmc1; + mmc3 = &sdmmc2; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + power-supply = <&vcc_sys>; + pwms = <&pwm4 0 25000 0>; + }; +}; + +&gpio_keys_control { + button-5 { + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; + label = "DPAD-LEFT"; + linux,code = <BTN_DPAD_RIGHT>; + }; + + button-6 { + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; + label = "DPAD-RIGHT"; + linux,code = <BTN_DPAD_LEFT>; + }; + + button-9 { + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; + label = "TR"; + linux,code = <BTN_TR2>; + }; + + button-10 { + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + label = "TR2"; + linux,code = <BTN_TR>; + }; + + button-14 { + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; + label = "WEST"; + linux,code = <BTN_WEST>; + }; + + button-15 { + gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; + label = "EAST"; + linux,code = <BTN_EAST>;
Quoted 8 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts line 68
Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +6
-0+ }; +}; + +&i2c0 { + /* This hardware is physically present but unused. */ + cw2015@62 {Node names should be generic.
Understood, I was just copying an existing devicetree. I'll make it generic.
Quoted 46 lines
Quoted 13 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +12
-0+ compatible = "cellwise,cw2015"; + reg = <0x62>; + status = "disabled"; + }; +}; + +&i2c2 { + pintctrl-names = "default"; + pinctrl-0 = <&i2c2m1_xfer>; + status = "okay"; +}; +(...)
Quoted 30 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +30
-0+ +&hdmi_sound { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk817: pmic@20 { + compatible = "rockchip,rk817"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; + clock-names = "mclk"; + clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; + #clock-cells = <1>; + #sound-dai-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s1m0_mclk>, <&pmic_int_l>; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>;
Quoted 9 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts
Quoted 6 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts new file +6
-0+ vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_sys>; + vcc9-supply = <&dcdc_boost>; + + regulators { + vdd_logic: DCDC_REG1 {I commented here and there was no feedback, so please implement the change.
Sorry I didn't explicitly call it out, I only made a note in the revision notes. The regulator names for the RK808 series are hard-coded, so I can't change them without modifying the driver (and every existing DTS that uses them).
Quoted 3 lines
Best regards,
Krzysztof
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Re: [PATCH v2 3/3] arm64: dts: rockchip: add Anbernic RG353P and RG503
Quoted 10 lines · Chris Morgan
Quoted 5 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi line 388
Quoted 2 lines
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi new file +2
-0+ regulators { + vdd_logic: DCDC_REG1 {I commented here and there was no feedback, so please implement the change.
Sorry I didn't explicitly call it out, I only made a note in the revision notes. The regulator names for the RK808 series are hard-coded, so I can't change them without modifying the driver (and every existing DTS that uses them).
OK.
Best regards,
Krzysztof
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