riscv: Add GENERIC_ENTRY, irq stack support

#define DO_ERROR_INFO(name, signo, code, str) \
asmlinkage __visible __trap_section void name(struct pt_regs *regs) \
{ \

arch/riscv/kernel/traps.c +10 -0

+	irqentry_state_t state = irqentry_enter(regs);			\
 	do_trap_error(regs, signo, code, regs->epc, "Oops - " str);	\
+	irqentry_exit(regs, state);					\
 }
 
 DO_ERROR_INFO(do_trap_unknown,

@@ -123,18 +126,22 @@ int handle_misaligned_store(struct pt_regs *regs);
 
 asmlinkage void __trap_section do_trap_load_misaligned(struct pt_regs *regs)
 {
+	irqentry_state_t state = irqentry_enter(regs);
 	if (!handle_misaligned_load(regs))
 		return;
 	do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
 		      "Oops - load address misaligned");
+	irqentry_exit(regs, state);
 }
 
 asmlinkage void __trap_section do_trap_store_misaligned(struct pt_regs *regs)
 {
+	irqentry_state_t state = irqentry_enter(regs);
 	if (!handle_misaligned_store(regs))
 		return;
 	do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
 		      "Oops - store (or AMO) address misaligned");
+	irqentry_exit(regs, state);
 }
 #endif
 DO_ERROR_INFO(do_trap_store_fault,

@@ -158,6 +165,8 @@ static inline unsigned long get_break_insn_length(unsigned long pc)
 
 asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs)
 {
+	irqentry_state_t state = irqentry_enter(regs);
+
 #ifdef CONFIG_KPROBES
 	if (kprobe_single_step_handler(regs))
 		return;

@@ -185,6 +194,8 @@ asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs)
 		regs->epc += get_break_insn_length(regs->epc);
 	else
 		die(regs, "Kernel BUG");
+
+	irqentry_exit(regs, state);
 }
 NOKPROBE_SYMBOL(do_trap_break);

arch/riscv/kernel/irq.c void __init init_IRQ(void) · line 39

Quoted 13 lines · On Mon, Sep 05, 2022 at 11:54:20PM -0400, [email protected] wrote:

arch/riscv/kernel/irq.c +13 -0

+asmlinkage void noinstr do_riscv_irq(struct pt_regs *regs)
+{
+     struct pt_regs *old_regs;
+     irqentry_state_t state = irqentry_enter(regs);
+
+     irq_enter_rcu();
+     old_regs = set_irq_regs(regs);
+     handle_arch_irq(regs);
+     set_irq_regs(old_regs);
+     irq_exit_rcu();
+
+     irqentry_exit(regs, state);
+}

The above is right in that everything that calls irqentry_enter() should be noinstr; however all the below instances get it wrong:

Quoted 49 lines

#define DO_ERROR_INFO(name, signo, code, str) \
asmlinkage __visible __trap_section void name(struct pt_regs *regs) \
{ \

arch/riscv/kernel/traps.c +10 -0

+     irqentry_state_t state = irqentry_enter(regs);                  \
      do_trap_error(regs, signo, code, regs->epc, "Oops - " str);     \
+     irqentry_exit(regs, state);                                     \
 }
 
 DO_ERROR_INFO(do_trap_unknown,

@@ -123,18 +126,22 @@ int handle_misaligned_store(struct pt_regs *regs);
 
 asmlinkage void __trap_section do_trap_load_misaligned(struct pt_regs *regs)
 {
+     irqentry_state_t state = irqentry_enter(regs);
      if (!handle_misaligned_load(regs))
              return;
      do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
                    "Oops - load address misaligned");
+     irqentry_exit(regs, state);
 }
 
 asmlinkage void __trap_section do_trap_store_misaligned(struct pt_regs *regs)
 {
+     irqentry_state_t state = irqentry_enter(regs);
      if (!handle_misaligned_store(regs))
              return;
      do_trap_error(regs, SIGBUS, BUS_ADRALN, regs->epc,
                    "Oops - store (or AMO) address misaligned");
+     irqentry_exit(regs, state);
 }
 #endif
 DO_ERROR_INFO(do_trap_store_fault,

@@ -158,6 +165,8 @@ static inline unsigned long get_break_insn_length(unsigned long pc)
 
 asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs)
 {
+     irqentry_state_t state = irqentry_enter(regs);
+
 #ifdef CONFIG_KPROBES
      if (kprobe_single_step_handler(regs))
              return;

@@ -185,6 +194,8 @@ asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs)
              regs->epc += get_break_insn_length(regs->epc);
      else
              die(regs, "Kernel BUG");
+
+     irqentry_exit(regs, state);
 }
 NOKPROBE_SYMBOL(do_trap_break);

arch/riscv/mm/fault.c asmlinkage void do_page_fault(struct pt_regs *regs) · line 363

Quoted 9 lines

arch/riscv/mm/fault.c +8 -0

+asmlinkage void do_page_fault(struct pt_regs *regs)
+{
+     irqentry_state_t state = irqentry_enter(regs);
+
+     __do_page_fault(regs);
+
+     irqentry_exit(regs, state);
+}
 NOKPROBE_SYMBOL(do_page_fault);

Without noinstr the compiler is free to insert instrumentation (think all the k*SAN, KCov, GCov, ftrace etc..) which can call code we're not yet ready to run this early in the entry path, for instance it could rely on RCU which isn't on yet, or expect lockdep state.

From: Guo Ren <[email protected]>

The patches convert riscv to use the generic entry infrastructure from kernel/entry/*. Add independent irq stacks (IRQ_STACKS) for percpu to prevent kernel stack overflows. Add the HAVE_SOFTIRQ_ON_OWN_STACK feature for the IRQ_STACKS config. You can try it directly with [1].

[1] https://github.com/guoren83/linux/tree/generic_entry_v3

V3:
- Fixup CONFIG_COMPAT=n compile error
- Add THREAD_SIZE_ORDER config
- Optimize elf_kexec.c warning fixup
- Add static to irq_stack_ptr definition

V2:

Link https://lore.kernel.org/linux-riscv/[email protected]/ open here

- Fixup compile error by include "riscv: ptrace: Remove duplicate operation"
- Fixup compile warning

Reported-by kernel test robot <[email protected]>

- Add test repo link in cover letter

V1:

Link https://lore.kernel.org/linux-riscv/[email protected]/ open here

Guo Ren (7):
riscv: elf_kexec: Fixup compile warning
riscv: compat_syscall_table: Fixup compile warning
riscv: ptrace: Remove duplicate operation
riscv: convert to generic entry
riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK
riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK
riscv: Add config of thread stack size

 arch/riscv/Kconfig                    |  19 ++
 arch/riscv/include/asm/csr.h          |   1 -
 arch/riscv/include/asm/entry-common.h |   8 +
 arch/riscv/include/asm/irq.h          |   3 +
 arch/riscv/include/asm/ptrace.h       |  10 +-
 arch/riscv/include/asm/stacktrace.h   |   5 +
 arch/riscv/include/asm/syscall.h      |   6 +
 arch/riscv/include/asm/thread_info.h  |  19 +-
 arch/riscv/include/asm/vmap_stack.h   |  28 +++
 arch/riscv/kernel/Makefile            |   1 +
 arch/riscv/kernel/elf_kexec.c         |   2 +-
 arch/riscv/kernel/entry.S             | 255 +++++---------------------
 arch/riscv/kernel/irq.c               |  75 ++++++++

 arch/riscv/kernel/ptrace.c            |  41 -----
 arch/riscv/kernel/signal.c            |  21 +--
 arch/riscv/kernel/sys_riscv.c         |  27 +++
 arch/riscv/kernel/traps.c             |  11 ++
 arch/riscv/mm/fault.c                 |  12 +-
 18 files changed, 259 insertions(+), 285 deletions(-)
 create mode 100644 arch/riscv/include/asm/entry-common.h
 create mode 100644 arch/riscv/include/asm/vmap_stack.h

Quoted 6 lines · On 06/09/2022 04:54, [email protected] wrote:

From: Guo Ren <[email protected]>

The patches convert riscv to use the generic entry infrastructure from kernel/entry/*. Add independent irq stacks (IRQ_STACKS) for percpu to prevent kernel stack overflows. Add the HAVE_SOFTIRQ_ON_OWN_STACK feature for the IRQ_STACKS config. You can try it directly with [1].

Hey Guo Ren,
I applied this patchset to v6.0-rc4 & ran into a build error:
/stuff/linux/arch/riscv/kernel/entry.S:347:9: error: operand must be a bare symbol name
la a3, ((1 << (12)) << (2 + 0))

        ^

CC arch/riscv/kernel/process.o
make[5]: *** [/stuff/linux/scripts/Makefile.build:322: arch/riscv/kernel/entry.o] Error 1 make[5]: *** Waiting for unfinished jobs....

Thanks,
Conor.

Quoted 51 lines

[1] https://github.com/guoren83/linux/tree/generic_entry_v3

V3:
- Fixup CONFIG_COMPAT=n compile error
- Add THREAD_SIZE_ORDER config
- Optimize elf_kexec.c warning fixup
- Add static to irq_stack_ptr definition

V2:

Link https://lore.kernel.org/linux-riscv/[email protected]/ open here

- Fixup compile error by include "riscv: ptrace: Remove duplicate operation"
- Fixup compile warning

Reported-by kernel test robot <[email protected]>

- Add test repo link in cover letter

V1:

Link https://lore.kernel.org/linux-riscv/[email protected]/ open here

Guo Ren (7):
riscv: elf_kexec: Fixup compile warning
riscv: compat_syscall_table: Fixup compile warning
riscv: ptrace: Remove duplicate operation
riscv: convert to generic entry
riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK
riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK
riscv: Add config of thread stack size

 arch/riscv/Kconfig                    |  19 ++
 arch/riscv/include/asm/csr.h          |   1 -
 arch/riscv/include/asm/entry-common.h |   8 +
 arch/riscv/include/asm/irq.h          |   3 +
 arch/riscv/include/asm/ptrace.h       |  10 +-
 arch/riscv/include/asm/stacktrace.h   |   5 +
 arch/riscv/include/asm/syscall.h      |   6 +
 arch/riscv/include/asm/thread_info.h  |  19 +-
 arch/riscv/include/asm/vmap_stack.h   |  28 +++
 arch/riscv/kernel/Makefile            |   1 +
 arch/riscv/kernel/elf_kexec.c         |   2 +-
 arch/riscv/kernel/entry.S             | 255 +++++---------------------
 arch/riscv/kernel/irq.c               |  75 ++++++++
 arch/riscv/kernel/ptrace.c            |  41 -----
 arch/riscv/kernel/signal.c            |  21 +--
 arch/riscv/kernel/sys_riscv.c         |  27 +++
 arch/riscv/kernel/traps.c             |  11 ++
 arch/riscv/mm/fault.c                 |  12 +-
 18 files changed, 259 insertions(+), 285 deletions(-)
 create mode 100644 arch/riscv/include/asm/entry-common.h
 create mode 100644 arch/riscv/include/asm/vmap_stack.h

Quoted 9 lines · On Wed, Sep 7, 2022 at 1:42 AM <[email protected]> wrote:

Quoted 6 lines · On 06/09/2022 04:54, [email protected] wrote:

From: Guo Ren <[email protected]>

The patches convert riscv to use the generic entry infrastructure from kernel/entry/*. Add independent irq stacks (IRQ_STACKS) for percpu to prevent kernel stack overflows. Add the HAVE_SOFTIRQ_ON_OWN_STACK feature for the IRQ_STACKS config. You can try it directly with [1].

Quoted 4 lines

Hey Guo Ren,
I applied this patchset to v6.0-rc4 & ran into a build error:
/stuff/linux/arch/riscv/kernel/entry.S:347:9: error: operand must be a bare symbol name
la a3, ((1 << (12)) << (2 + 0))

Yes, please try:

(quoted diff) +1 -1

-       la      a3, IRQ_STACK_SIZE
+       li      a3, IRQ_STACK_SIZE

la is for the symbol, not immediate. But why does my toolchain not report the error?

➜ linux git:(generic_entry_v3) make ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- EXTRA_CFLAGS+=-g O=../build-riscv/ -kj62 all -kj
➜ linux git:(generic_entry_v3) riscv64-unknown-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=riscv64-unknown-linux-gnu-gcc COLLECT_LTO_WRAPPER=/opt/riscv/libexec/gcc/riscv64-unknown-linux-gnu/11.1.0/lto-wrapper
Target: riscv64-unknown-linux-gnu
Configured with:
/home/guoren/source/riscv-gnu-toolchain/riscv-gcc/configure --target=riscv64-unknown-linux-gnu --prefix=/opt/riscv --with-sysroot=/opt/riscv/sysroot --with-pkgversion=g5964b5cd7272 --with-system-zlib --enable-shared --enable-tls --enable-languages=c,c++,fortran --disable-libmudflap --disable-libssp --disable-libquadmath --disable-libsanitizer --disable-nls --disable-bootstrap --src=.././riscv-gcc --enable-multilib --with-abi=lp64d --with-arch=rv64imafdc --with-tune=rocket
--with-isa-spec=2.2 'CFLAGS_FOR_TARGET=-O2 -mcmodel=medlow'
'CXXFLAGS_FOR_TARGET=-O2 -mcmodel=medlow'
Thread model: posix
Supported LTO compression algorithms: zlib
gcc version 11.1.0 (g5964b5cd7272)

Quoted 58 lines

        ^

CC arch/riscv/kernel/process.o
make[5]: *** [/stuff/linux/scripts/Makefile.build:322: arch/riscv/kernel/entry.o] Error 1 make[5]: *** Waiting for unfinished jobs....

Thanks,
Conor.

Quoted 51 lines

[1] https://github.com/guoren83/linux/tree/generic_entry_v3

V3:
- Fixup CONFIG_COMPAT=n compile error
- Add THREAD_SIZE_ORDER config
- Optimize elf_kexec.c warning fixup
- Add static to irq_stack_ptr definition

V2:

Link https://lore.kernel.org/linux-riscv/[email protected]/ open here

- Fixup compile error by include "riscv: ptrace: Remove duplicate operation"
- Fixup compile warning

Reported-by kernel test robot <[email protected]>

- Add test repo link in cover letter

V1:

Link https://lore.kernel.org/linux-riscv/[email protected]/ open here

Guo Ren (7):
riscv: elf_kexec: Fixup compile warning
riscv: compat_syscall_table: Fixup compile warning
riscv: ptrace: Remove duplicate operation
riscv: convert to generic entry
riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK
riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK
riscv: Add config of thread stack size

 arch/riscv/Kconfig                    |  19 ++
 arch/riscv/include/asm/csr.h          |   1 -
 arch/riscv/include/asm/entry-common.h |   8 +
 arch/riscv/include/asm/irq.h          |   3 +
 arch/riscv/include/asm/ptrace.h       |  10 +-
 arch/riscv/include/asm/stacktrace.h   |   5 +
 arch/riscv/include/asm/syscall.h      |   6 +
 arch/riscv/include/asm/thread_info.h  |  19 +-
 arch/riscv/include/asm/vmap_stack.h   |  28 +++
 arch/riscv/kernel/Makefile            |   1 +
 arch/riscv/kernel/elf_kexec.c         |   2 +-
 arch/riscv/kernel/entry.S             | 255 +++++---------------------
 arch/riscv/kernel/irq.c               |  75 ++++++++
 arch/riscv/kernel/ptrace.c            |  41 -----
 arch/riscv/kernel/signal.c            |  21 +--
 arch/riscv/kernel/sys_riscv.c         |  27 +++
 arch/riscv/kernel/traps.c             |  11 ++
 arch/riscv/mm/fault.c                 |  12 +-
 18 files changed, 259 insertions(+), 285 deletions(-)
 create mode 100644 arch/riscv/include/asm/entry-common.h
 create mode 100644 arch/riscv/include/asm/vmap_stack.h

--
Best Regards
Guo Ren

EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe

Hi Conor,

I've found the root cause, you are using llvm:

$ grep "bare sym" llvm -rn |grep RISCV
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1296: return
Error(ErrorLoc, "operand must be a bare symbol name");
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1304: return
Error(ErrorLoc, "operand must be a bare symbol name");

That means we could fix up Binutils with a warning at least.

Thx for pointing it out.

Quoted 108 lines · Guo Ren

Quoted 9 lines · On Wed, Sep 7, 2022 at 1:42 AM <[email protected]> wrote:

Quoted 6 lines · On 06/09/2022 04:54, [email protected] wrote:

From: Guo Ren <[email protected]>

The patches convert riscv to use the generic entry infrastructure from kernel/entry/*. Add independent irq stacks (IRQ_STACKS) for percpu to prevent kernel stack overflows. Add the HAVE_SOFTIRQ_ON_OWN_STACK feature for the IRQ_STACKS config. You can try it directly with [1].

Quoted 4 lines

Hey Guo Ren,
I applied this patchset to v6.0-rc4 & ran into a build error:
/stuff/linux/arch/riscv/kernel/entry.S:347:9: error: operand must be a bare symbol name
la a3, ((1 << (12)) << (2 + 0))

Yes, please try:

(quoted diff) +1 -1

-       la      a3, IRQ_STACK_SIZE
+       li      a3, IRQ_STACK_SIZE

la is for the symbol, not immediate. But why does my toolchain not report the error?

➜ linux git:(generic_entry_v3) make ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- EXTRA_CFLAGS+=-g O=../build-riscv/ -kj62 all -kj
➜ linux git:(generic_entry_v3) riscv64-unknown-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=riscv64-unknown-linux-gnu-gcc COLLECT_LTO_WRAPPER=/opt/riscv/libexec/gcc/riscv64-unknown-linux-gnu/11.1.0/lto-wrapper
Target: riscv64-unknown-linux-gnu
Configured with:
/home/guoren/source/riscv-gnu-toolchain/riscv-gcc/configure --target=riscv64-unknown-linux-gnu --prefix=/opt/riscv --with-sysroot=/opt/riscv/sysroot --with-pkgversion=g5964b5cd7272 --with-system-zlib --enable-shared --enable-tls --enable-languages=c,c++,fortran --disable-libmudflap --disable-libssp --disable-libquadmath --disable-libsanitizer --disable-nls --disable-bootstrap --src=.././riscv-gcc --enable-multilib --with-abi=lp64d --with-arch=rv64imafdc --with-tune=rocket
--with-isa-spec=2.2 'CFLAGS_FOR_TARGET=-O2 -mcmodel=medlow'
'CXXFLAGS_FOR_TARGET=-O2 -mcmodel=medlow'
Thread model: posix
Supported LTO compression algorithms: zlib
gcc version 11.1.0 (g5964b5cd7272)

Quoted 58 lines

         ^

CC arch/riscv/kernel/process.o
make[5]: *** [/stuff/linux/scripts/Makefile.build:322: arch/riscv/kernel/entry.o] Error 1 make[5]: *** Waiting for unfinished jobs....

Thanks,
Conor.

Quoted 51 lines

[1] https://github.com/guoren83/linux/tree/generic_entry_v3

V3:
- Fixup CONFIG_COMPAT=n compile error
- Add THREAD_SIZE_ORDER config
- Optimize elf_kexec.c warning fixup
- Add static to irq_stack_ptr definition

V2:

Link https://lore.kernel.org/linux-riscv/[email protected]/ open here

- Fixup compile error by include "riscv: ptrace: Remove duplicate operation"
- Fixup compile warning

Reported-by kernel test robot <[email protected]>

- Add test repo link in cover letter

V1:

Link https://lore.kernel.org/linux-riscv/[email protected]/ open here

Guo Ren (7):
riscv: elf_kexec: Fixup compile warning
riscv: compat_syscall_table: Fixup compile warning
riscv: ptrace: Remove duplicate operation
riscv: convert to generic entry
riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK
riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK
riscv: Add config of thread stack size

  arch/riscv/Kconfig                    |  19 ++
  arch/riscv/include/asm/csr.h          |   1 -
  arch/riscv/include/asm/entry-common.h |   8 +
  arch/riscv/include/asm/irq.h          |   3 +
  arch/riscv/include/asm/ptrace.h       |  10 +-
  arch/riscv/include/asm/stacktrace.h   |   5 +
  arch/riscv/include/asm/syscall.h      |   6 +
  arch/riscv/include/asm/thread_info.h  |  19 +-
  arch/riscv/include/asm/vmap_stack.h   |  28 +++
  arch/riscv/kernel/Makefile            |   1 +
  arch/riscv/kernel/elf_kexec.c         |   2 +-
  arch/riscv/kernel/entry.S             | 255 +++++---------------------
  arch/riscv/kernel/irq.c               |  75 ++++++++
  arch/riscv/kernel/ptrace.c            |  41 -----
  arch/riscv/kernel/signal.c            |  21 +--
  arch/riscv/kernel/sys_riscv.c         |  27 +++
  arch/riscv/kernel/traps.c             |  11 ++
  arch/riscv/mm/fault.c                 |  12 +-
  18 files changed, 259 insertions(+), 285 deletions(-)

create mode 100644 arch/riscv/include/asm/entry-common.h create mode 100644 arch/riscv/include/asm/vmap_stack.h

Quoted 3 lines

--
Best Regards
Guo Ren

--
Best Regards
Guo Ren

Quoted 5 lines · Guo Ren

EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe

Hi Conor,

I've found the root cause, you are using llvm:

Yup, probably should have specified - sorry. I didn't realise that

that was something GCC wouldn't complain about. It was an LLVM=1 build with clang-15.

I usually do builds with clang while testing patches as it seems to be lesser used.

Thanks,
Conor.

Quoted 129 lines

$ grep "bare sym" llvm -rn |grep RISCV
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1296: return
Error(ErrorLoc, "operand must be a bare symbol name");
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1304: return
Error(ErrorLoc, "operand must be a bare symbol name");

That means we could fix up Binutils with a warning at least.

Thx for pointing it out.

Quoted 108 lines · Guo Ren

Quoted 9 lines · On Wed, Sep 7, 2022 at 1:42 AM <[email protected]> wrote:

Quoted 6 lines · On 06/09/2022 04:54, [email protected] wrote:

From: Guo Ren <[email protected]>

The patches convert riscv to use the generic entry infrastructure from kernel/entry/*. Add independent irq stacks (IRQ_STACKS) for percpu to prevent kernel stack overflows. Add the HAVE_SOFTIRQ_ON_OWN_STACK feature for the IRQ_STACKS config. You can try it directly with [1].

Quoted 4 lines

Hey Guo Ren,
I applied this patchset to v6.0-rc4 & ran into a build error:
/stuff/linux/arch/riscv/kernel/entry.S:347:9: error: operand must be a bare symbol name
la a3, ((1 << (12)) << (2 + 0))

Yes, please try:

(quoted diff) +1 -1

-       la      a3, IRQ_STACK_SIZE
+       li      a3, IRQ_STACK_SIZE

la is for the symbol, not immediate. But why does my toolchain not report the error?

➜ linux git:(generic_entry_v3) make ARCH=riscv CROSS_COMPILE=riscv64-unknown-linux-gnu- EXTRA_CFLAGS+=-g O=../build-riscv/ -kj62 all -kj
➜ linux git:(generic_entry_v3) riscv64-unknown-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=riscv64-unknown-linux-gnu-gcc COLLECT_LTO_WRAPPER=/opt/riscv/libexec/gcc/riscv64-unknown-linux-gnu/11.1.0/lto-wrapper
Target: riscv64-unknown-linux-gnu
Configured with:
/home/guoren/source/riscv-gnu-toolchain/riscv-gcc/configure --target=riscv64-unknown-linux-gnu --prefix=/opt/riscv --with-sysroot=/opt/riscv/sysroot --with-pkgversion=g5964b5cd7272 --with-system-zlib --enable-shared --enable-tls --enable-languages=c,c++,fortran --disable-libmudflap --disable-libssp --disable-libquadmath --disable-libsanitizer --disable-nls --disable-bootstrap --src=.././riscv-gcc --enable-multilib --with-abi=lp64d --with-arch=rv64imafdc --with-tune=rocket
--with-isa-spec=2.2 'CFLAGS_FOR_TARGET=-O2 -mcmodel=medlow'
'CXXFLAGS_FOR_TARGET=-O2 -mcmodel=medlow'
Thread model: posix
Supported LTO compression algorithms: zlib
gcc version 11.1.0 (g5964b5cd7272)

Quoted 58 lines

         ^

CC arch/riscv/kernel/process.o
make[5]: *** [/stuff/linux/scripts/Makefile.build:322: arch/riscv/kernel/entry.o] Error 1 make[5]: *** Waiting for unfinished jobs....

Thanks,
Conor.

Quoted 51 lines

[1] https://github.com/guoren83/linux/tree/generic_entry_v3

V3:
- Fixup CONFIG_COMPAT=n compile error
- Add THREAD_SIZE_ORDER config
- Optimize elf_kexec.c warning fixup
- Add static to irq_stack_ptr definition

V2:

Link https://lore.kernel.org/linux-riscv/[email protected]/ open here

- Fixup compile error by include "riscv: ptrace: Remove duplicate operation"
- Fixup compile warning

Reported-by kernel test robot <[email protected]>

- Add test repo link in cover letter

V1:

Link https://lore.kernel.org/linux-riscv/[email protected]/ open here

Guo Ren (7):
riscv: elf_kexec: Fixup compile warning
riscv: compat_syscall_table: Fixup compile warning
riscv: ptrace: Remove duplicate operation
riscv: convert to generic entry
riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK
riscv: Support HAVE_SOFTIRQ_ON_OWN_STACK
riscv: Add config of thread stack size

  arch/riscv/Kconfig                    |  19 ++
  arch/riscv/include/asm/csr.h          |   1 -
  arch/riscv/include/asm/entry-common.h |   8 +
  arch/riscv/include/asm/irq.h          |   3 +
  arch/riscv/include/asm/ptrace.h       |  10 +-
  arch/riscv/include/asm/stacktrace.h   |   5 +
  arch/riscv/include/asm/syscall.h      |   6 +
  arch/riscv/include/asm/thread_info.h  |  19 +-
  arch/riscv/include/asm/vmap_stack.h   |  28 +++
  arch/riscv/kernel/Makefile            |   1 +
  arch/riscv/kernel/elf_kexec.c         |   2 +-
  arch/riscv/kernel/entry.S             | 255 +++++---------------------
  arch/riscv/kernel/irq.c               |  75 ++++++++
  arch/riscv/kernel/ptrace.c            |  41 -----
  arch/riscv/kernel/signal.c            |  21 +--
  arch/riscv/kernel/sys_riscv.c         |  27 +++
  arch/riscv/kernel/traps.c             |  11 ++
  arch/riscv/mm/fault.c                 |  12 +-
  18 files changed, 259 insertions(+), 285 deletions(-)

create mode 100644 arch/riscv/include/asm/entry-common.h create mode 100644 arch/riscv/include/asm/vmap_stack.h

Quoted 3 lines

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Best Regards
Guo Ren

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Best Regards
Guo Ren