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x86/devicetree: Add support for boot time interrupt mode config

PATCH Superseded Rahul Tanwar 1 participant 1 message Sep 13, 2022 x86

v1 of 5 Superseded Latest is v5 →

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PATCH 1/1 x86/devicetree: Add support for boot time interrupt mode config

Presently, init/boot time interrupt delivery mode is enumerated only for ACPI enabled systems by parsing MADT table or for older systems by parsing MP table. But for OF based x86 systems, it is assumed & fixed to legacy PIC mode.

Add support for configuration of init time interrupt delivery mode for x86 OF based systems by introducing a new boolean property 'intel,no-imcr' for interrupt-controller node of local APIC. This property emulates IMCRP Bit 7 of MP feature info byte 2 of MP floating pointer structure.

Defaults to legacy PIC mode if absent. Configures it to virtual wire compatibility mode if present.

---
 arch/x86/kernel/devicetree.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)
arch/x86/kernel/devicetree.c +9 -1
index 5cd51f25f446..de14015317f8 100644
@@ -167,7 +167,15 @@ static void __init dtb_lapic_setup(void)
 			return;
 	}
 	smp_found_config = 1;
-	pic_mode = 1;
+	if (of_property_read_bool(dn, "intel,no-imcr")) {
+		pr_info("    Virtual Wire compatibility mode.\n");
+		pic_mode = 0;
+	}
+	else {
+		pr_info("    IMCR and PIC compatibility mode.\n");
+		pic_mode = 1;
+	}
+
 	register_lapic_address(lapic_addr);
 }
 
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