arm64/sysreg: Fix a few missed conversions
Subsystems (3)
PATCH 1/1 arm64/sysreg: Fix a few missed conversions
After the conversion to automatically generating the ID_AA64DFR0_EL1 definition names, the build fails in a few different places because some of the definitions were not changed to their new names along the way. Update the names to resolve the build errors.
--- drivers/hwtracing/coresight/coresight-etm4x-core.c | 4 ++-- drivers/hwtracing/coresight/coresight-trbe.h | 3 ++- drivers/perf/arm_spe_pmu.c | 6 +++--- 3 files changed, 7 insertions(+), 6 deletions(-)
drivers/hwtracing/coresight/coresight-etm4x-core.c +2 -2
@@ -966,7 +966,7 @@ static inline bool cpu_supports_sysreg_trace(void) {u64 dfr0 =read_sysreg_s (SYS_ID_AA64DFR0_EL1 ); -return ((dfr0 >>ID_AA64DFR0_TRACEVER_SHIFT ) &0xfUL ) >0 ; +return ((dfr0 >> ID_AA64DFR0_EL1_TraceVer_SHIFT) &0xfUL ) >0 ; } static bool etm4_init_sysreg_access(struct etmv4_drvdata *drvdata,
@@ -1054,7 +1054,7 @@ static void cpu_detect_trace_filtering(struct etmv4_drvdata *drvdata)u64 trfcr; drvdata->trfcr =0 ; -if (!cpuid_feature_extract_unsigned_field (dfr0,ID_AA64DFR0_TRACE_FILT_SHIFT )) +if (!cpuid_feature_extract_unsigned_field (dfr0, ID_AA64DFR0_EL1_TraceFilt_SHIFT))return ;/*
drivers/hwtracing/coresight/coresight-trbe.h +2 -1
@@ -20,7 +20,8 @@static inline bool is_trbe_available (void ) {u64 aa64dfr0 =read_sysreg_s (SYS_ID_AA64DFR0_EL1 ); -unsigned int trbe =cpuid_feature_extract_unsigned_field (aa64dfr0,ID_AA64DFR0_TRBE_SHIFT ); +unsigned int trbe =cpuid_feature_extract_unsigned_field (aa64dfr0, + ID_AA64DFR0_EL1_TraceBuffer_SHIFT);return trbe >=0b0001 ; }
drivers/perf/arm_spe_pmu.c +3 -3
@@ -674,9 +674,9 @@ static irqreturn_t arm_spe_pmu_irq_handler(int irq, void *dev)static u64 arm_spe_pmsevfr_res0 (u16 pmsver) {switch (pmsver) { -case ID_AA64DFR0_PMSVER_8_2 : +case ID_AA64DFR0_EL1_PMSVer_IMP:return SYS_PMSEVFR_EL1_RES0_8_2 ; -case ID_AA64DFR0_PMSVER_8_3 : +case ID_AA64DFR0_EL1_PMSVer_V1P1:/* Return the highest version we support in default */ default :return SYS_PMSEVFR_EL1_RES0_8_3 ;
@@ -958,7 +958,7 @@ static void __arm_spe_pmu_dev_probe(void *info)struct device *dev = &spe_pmu->pdev->dev; fld =cpuid_feature_extract_unsigned_field (read_cpuid (ID_AA64DFR0_EL1 ), -ID_AA64DFR0_PMSVER_SHIFT ); + ID_AA64DFR0_EL1_PMSVer_SHIFT);if (!fld) { dev_err(dev, "unsupported ID_AA64DFR0_EL1.PMSVer [%d] on CPU %d\n",
base-commit: 10453bf149c9539c446574932f00ea50438cede5
Signature · 1 line
2.37.3
Quoted 4 lines · Nathan Chancellor
After the conversion to automatically generating the
ID_AA64DFR0_EL1definition names, the build fails in a few different places because some of the definitions were not changed to their new names along the way. Update the names to resolve the build errors.
Ah, I was just working on the same fix:
Catalin Marinas
AppliedQuoted 6 lines · Nathan Chancellor
After the conversion to automatically generating the
ID_AA64DFR0_EL1definition names, the build fails in a few different places because some of the definitions were not changed to their new names along the way. Update the names to resolve the build errors.
Applied to arm64 (for-next/sysreg), thanks!
[1/1] arm64/sysreg: Fix a few missed conversions
https://git.kernel.org/arm64/c/db74cd6337d2
Signature · 1 line
Catalin