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mtd: spi-nor: micron-st: Enable locking for n25q256ax1/mt25qu256a

PATCH Superseded Eliav Farber 2 participants 7 messages Oct 19, 2022 – Oct 20, 2022

Subsystems (2)

v2 of 3 Superseded Latest is v3 →

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#0 lore raw

PATCH v2 1/1 mtd: spi-nor: micron-st: Enable locking for n25q256ax1/mt25qu256a

n25q256ax1 [1] and mt25qu256a [2] (both have same jedec_id - 0x20bb19) use the 4 bit Block Protection scheme and support Top/Bottom protection via the BP and TB bits of the Status Register.
BP3 is located in bit 6 of the Status Register.
Tested on both n25q256ax1 and mt25qu256a.

[1] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf
[2] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf

---
xxd -p /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 53464450060101ff00060110300000ff84000102800000ffffffffffffff ffffffffffffffffffffffffffffffffffffe520fbffffffff0f29eb276b 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e 03d4ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff ffffffffffffffffffe7ffff21dcffff

md5sum /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 5ea738216f68c9f98987bb3725699a32 /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id 20bb19104400

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/partname mt25qu256a

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer st

v2 --> v1:
- Enable locking also for mt25qu256a.
- Dump the SFDP tables.

 drivers/mtd/spi-nor/micron-st.c | 4 ++++
 1 file changed, 4 insertions(+)
drivers/mtd/spi-nor/micron-st.c +4 -0
index 3c9681a3f7a3..f4d0153a5b1b 100644
@@ -201,11 +201,15 @@ static const struct flash_info st_nor_parts[] = {
 		MFR_FLAGS(USE_FSR)
 	},
 	{ "mt25qu256a",  INFO6(0x20bb19, 0x104400, 64 * 1024,  512)
+		FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+		      SPI_NOR_BP3_SR_BIT6)
 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
 		FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
 		MFR_FLAGS(USE_FSR)
 	},
 	{ "n25q256ax1",  INFO(0x20bb19, 0, 64 * 1024,  512)
+		FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+		      SPI_NOR_BP3_SR_BIT6)
 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ)
 		MFR_FLAGS(USE_FSR)
 	},
Signature · 1 line
2.37.1
#1 lore raw

Hi,

Am 2022-10-19 09:16, schrieb Eliav Farber:

Quoted 8 lines

n25q256ax1 [1] and mt25qu256a [2] (both have same jedec_id - 0x20bb19) use the 4 bit Block Protection scheme and support Top/Bottom protection via the BP and TB bits of the Status Register.
BP3 is located in bit 6 of the Status Register.
Tested on both n25q256ax1 and mt25qu256a.

[1] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf
[2] https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf

If you respin, you can use a "Link:" tag for the URL above.

Quoted 19 lines

---
xxd -p /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 53464450060101ff00060110300000ff84000102800000ffffffffffffff ffffffffffffffffffffffffffffffffffffe520fbffffffff0f29eb276b 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e 03d4ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff ffffffffffffffffffe7ffff21dcffff

md5sum /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 5ea738216f68c9f98987bb3725699a32 /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id 20bb19104400

Quoted 7 lines

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/partname mt25qu256a

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer st

That's the mt25qu256a SFDP. What about the n25q256ax1?

Thanks!
-michael

Quoted 28 lines

v2 --> v1:
- Enable locking also for mt25qu256a.
- Dump the SFDP tables.

 drivers/mtd/spi-nor/micron-st.c | 4 ++++
 1 file changed, 4 insertions(+)
drivers/mtd/spi-nor/micron-st.c +4 -0
index 3c9681a3f7a3..f4d0153a5b1b 100644
@@ -201,11 +201,15 @@ static const struct flash_info st_nor_parts[] = {
 		MFR_FLAGS(USE_FSR)
 	},
 	{ "mt25qu256a",  INFO6(0x20bb19, 0x104400, 64 * 1024,  512)
+		FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+		      SPI_NOR_BP3_SR_BIT6)
 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
 		FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
 		MFR_FLAGS(USE_FSR)
 	},
 	{ "n25q256ax1",  INFO(0x20bb19, 0, 64 * 1024,  512)
+		FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
+		      SPI_NOR_BP3_SR_BIT6)
 		NO_SFDP_FLAGS(SECT_4K | SPI_NOR_QUAD_READ)
 		MFR_FLAGS(USE_FSR)
 	},
#2 lore raw
Quoted 9 lines · Michael Walle

Hi,

Am 2022-10-19 09:16, schrieb Eliav Farber:

Quoted 6 lines

n25q256ax1 [1] and mt25qu256a [2] (both have same jedec_id - 0x20bb19) use the 4 bit Block Protection scheme and support Top/Bottom protection via the BP and TB bits of the Status Register.
BP3 is located in bit 6 of the Status Register.
Tested on both n25q256ax1 and mt25qu256a.

Quoted 8 lines
Quoted 6 lines

[1]
https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf

[2]
https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf

If you respin, you can use a "Link:" tag for the URL above.

Ack.

Quoted 26 lines
Quoted 26 lines

---
xxd -p /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp

53464450060101ff00060110300000ff84000102800000ffffffffffffff ffffffffffffffffffffffffffffffffffffe520fbffffffff0f29eb276b 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e 03d4ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff ffffffffffffffffffe7ffff21dcffff

md5sum /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp

5ea738216f68c9f98987bb3725699a32 /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id

20bb19104400

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/partname

Quoted 8 lines
Quoted 6 lines

mt25qu256a

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer

st

That's the mt25qu256a SFDP. What about the n25q256ax1?

On the same card, with same NOR flash memory I'm running two different kernel versions.
First version is quite old - 4.19.239 which does not support mt25qu256a and therefore device is detected as n25q256ax1.
Second version is 6.1.0-rc1 and it detects the same device as mt25qu256a. So I was able to dump SFDP when running version 6.1.0-rc1, but not when running 4.19.239 which does not support the sysfs to dump the SFPD information.
I checked that locking works with my changes when running on both kernel versions.

--
Regards, Eliav

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

#3 lore raw

Am 2022-10-19 11:25, schrieb Farber, Eliav:

Quoted 40 lines · Michael Walle
Quoted 9 lines

Hi,

Am 2022-10-19 09:16, schrieb Eliav Farber:

Quoted 6 lines

n25q256ax1 [1] and mt25qu256a [2] (both have same jedec_id - 0x20bb19) use the 4 bit Block Protection scheme and support Top/Bottom protection via the BP and TB bits of the Status Register.
BP3 is located in bit 6 of the Status Register.
Tested on both n25q256ax1 and mt25qu256a.

Quoted 5 lines
Quoted 3 lines

[1]
https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf [2]
https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf

If you respin, you can use a "Link:" tag for the URL above.

Ack.

Quoted 14 lines
Quoted 14 lines

---
xxd -p
/sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 53464450060101ff00060110300000ff84000102800000ffffffffffffff ffffffffffffffffffffffffffffffffffffe520fbffffffff0f29eb276b 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e 03d4ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff
ffffffffffffffffffe7ffff21dcffff

md5sum
/sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 5ea738216f68c9f98987bb3725699a32 /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id 20bb19104400

Quoted 7 lines
Quoted 5 lines

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/partname mt25qu256a

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer st

That's the mt25qu256a SFDP. What about the n25q256ax1?

Quoted 10 lines

On the same card, with same NOR flash memory I'm running two different kernel versions.
First version is quite old - 4.19.239 which does not support mt25qu256a and therefore device is detected as n25q256ax1.
Second version is 6.1.0-rc1 and it detects the same device as mt25qu256a. So I was able to dump SFDP when running version 6.1.0-rc1, but not when running 4.19.239 which does not support the sysfs to dump the SFPD information.
I checked that locking works with my changes when running on both kernel versions.

So you've only tested on an mt25qu256a, correct? Then you should only add the locking to this flash device. (and maybe backport the mt25qu256a to your older kernel).

-michael

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

#4 lore raw
Quoted 71 lines · Michael Walle

Am 2022-10-19 11:25, schrieb Farber, Eliav:

Quoted 57 lines · Michael Walle
Quoted 11 lines

Hi,

Am 2022-10-19 09:16, schrieb Eliav Farber:

Quoted 8 lines

n25q256ax1 [1] and mt25qu256a [2] (both have same jedec_id - 0x20bb19)
use the 4 bit Block Protection scheme and support Top/Bottom protection
via the BP and TB bits of the Status Register.
BP3 is located in bit 6 of the Status Register. Tested on both n25q256ax1 and mt25qu256a.

Quoted 8 lines
Quoted 6 lines

[1]
https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf

[2]
https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf

If you respin, you can use a "Link:" tag for the URL above.

Ack.

Quoted 25 lines
Quoted 25 lines

---
xxd -p /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp

53464450060101ff00060110300000ff84000102800000ffffffffffffff ffffffffffffffffffffffffffffffffffffe520fbffffffff0f29eb276b 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e 03d4ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff ffffffffffffffffffe7ffff21dcffff

md5sum /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp

5ea738216f68c9f98987bb3725699a32 /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id

20bb19104400

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/partname

Quoted 8 lines
Quoted 6 lines

mt25qu256a

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer

st

That's the mt25qu256a SFDP. What about the n25q256ax1?

Quoted 12 lines

On the same card, with same NOR flash memory I'm running two different kernel versions.
First version is quite old - 4.19.239 which does not support mt25qu256a and therefore device is detected as n25q256ax1.
Second version is 6.1.0-rc1 and it detects the same device as mt25qu256a.
So I was able to dump SFDP when running version 6.1.0-rc1, but not when running 4.19.239 which does not support the sysfs to dump the SFPD information.
I checked that locking works with my changes when running on both kernel
versions.

Quoted 3 lines

So you've only tested on an mt25qu256a, correct? Then you should only add the locking to this flash device. (and maybe backport the mt25qu256a to your older kernel).

I dumped SFDP tables only for mt25qu256a, but as I mentioned I tested locking functionality for both (on 4.19.239 which detects the device as n25q256ax1 and on 6.1.0-rc1  which detects the device as mt25qu256a). This is the flow I used for testing the change on both versions:

# flash_lock -i /dev/mtd0
fDevice: /dev/mtd0
Start: 0
lLen: 0x1000000
Lock status: unlocked
Return code: 0
# flash_lock -l /dev/mtd0
# flash_lock -i /dev/mtd0
fDevice: /dev/mtd0
Start: 0
Len: 0x1000000
Lock status: locked
Return code: 1
# flash_lock -u /dev/mtd0
# flash_lock -i /dev/mtd0
Device: /dev/mtd0
Start: 0
Len: 0x1000000
Lock status: unlocked

Do you still want this patch to change only mt25qu256a?

--
Regards, Eliav

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

#5 lore raw

Am 2022-10-19 11:52, schrieb Farber, Eliav:

Quoted 57 lines · Michael Walle
Quoted 56 lines

Am 2022-10-19 11:25, schrieb Farber, Eliav:

Quoted 54 lines · Michael Walle
Quoted 11 lines

Hi,

Am 2022-10-19 09:16, schrieb Eliav Farber:

Quoted 8 lines

n25q256ax1 [1] and mt25qu256a [2] (both have same jedec_id - 0x20bb19)
use the 4 bit Block Protection scheme and support Top/Bottom protection
via the BP and TB bits of the Status Register.
BP3 is located in bit 6 of the Status Register. Tested on both n25q256ax1 and mt25qu256a.

Quoted 5 lines
Quoted 3 lines

[1]
https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf [2]
https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf

If you respin, you can use a "Link:" tag for the URL above.

Ack.

Quoted 14 lines
Quoted 14 lines

---
xxd -p
/sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 53464450060101ff00060110300000ff84000102800000ffffffffffffff ffffffffffffffffffffffffffffffffffffe520fbffffffff0f29eb276b 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e 03d4ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff
ffffffffffffffffffe7ffff21dcffff

md5sum
/sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp 5ea738216f68c9f98987bb3725699a32 /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id 20bb19104400

Quoted 7 lines
Quoted 5 lines

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/partname mt25qu256a

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer st

That's the mt25qu256a SFDP. What about the n25q256ax1?

On the same card, with same NOR flash memory I'm running two different kernel versions.
First version is quite old - 4.19.239 which does not support mt25qu256a and therefore device is detected as n25q256ax1.
Second version is 6.1.0-rc1 and it detects the same device as mt25qu256a.
So I was able to dump SFDP when running version 6.1.0-rc1, but not when running 4.19.239 which does not support the sysfs to dump the SFPD information.
I checked that locking works with my changes when running on both kernel
versions.

Quoted 8 lines
Quoted 3 lines

So you've only tested on an mt25qu256a, correct? Then you should only add the locking to this flash device. (and maybe backport the mt25qu256a to your older kernel).

I dumped SFDP tables only for mt25qu256a, but as I mentioned I tested locking functionality for both (on 4.19.239 which detects the device as n25q256ax1 and on 6.1.0-rc1  which detects the device as mt25qu256a). This is the flow I used for testing the change on both versions:

You said you've tested on the same board, thus it has the same flash device. But with the older kernel it was detected as a different part.

So the question is, what is the correct part number? I.e. what is the _actual_ flash device soldered on your board?

-michael

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

#6 lore raw
Quoted 86 lines · Michael Walle

Am 2022-10-19 11:52, schrieb Farber, Eliav:

Quoted 80 lines · Michael Walle
Quoted 74 lines

Am 2022-10-19 11:25, schrieb Farber, Eliav:

Quoted 57 lines · Michael Walle
Quoted 11 lines

Hi,

Am 2022-10-19 09:16, schrieb Eliav Farber:

Quoted 8 lines

n25q256ax1 [1] and mt25qu256a [2] (both have same jedec_id - 0x20bb19)
use the 4 bit Block Protection scheme and support Top/Bottom protection
via the BP and TB bits of the Status Register.
BP3 is located in bit 6 of the Status Register. Tested on both n25q256ax1 and mt25qu256a.

Quoted 8 lines
Quoted 6 lines

[1]
https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf

[2]
https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/mt25q/die-rev-a/mt25q_qljs_u_256_aba_0.pdf

If you respin, you can use a "Link:" tag for the URL above.

Ack.

Quoted 25 lines
Quoted 25 lines

---
xxd -p /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp

53464450060101ff00060110300000ff84000102800000ffffffffffffff ffffffffffffffffffffffffffffffffffffe520fbffffffff0f29eb276b 273b27bbffffffffffff27bbffff29eb0c2010d80f520000244a99008b8e 03d4ac0127387a757a75fbbdd55c4a0f82ff81bd3d36ffffffffffffffff ffffffffffffffffffe7ffff21dcffff

md5sum /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp

5ea738216f68c9f98987bb3725699a32 /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/sfdp

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/jedec_id

20bb19104400

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/partname

Quoted 8 lines
Quoted 6 lines

mt25qu256a

cat /sys/devices/platform/soc/fd882000.spi/spi_master/spi0/spi0.0/spi-nor/manufacturer

st

That's the mt25qu256a SFDP. What about the n25q256ax1?

Quoted 15 lines

On the same card, with same NOR flash memory I'm running two different
kernel versions.
First version is quite old - 4.19.239 which does not support mt25qu256a
and therefore device is detected as n25q256ax1.
Second version is 6.1.0-rc1 and it detects the same device as mt25qu256a.
So I was able to dump SFDP when running version 6.1.0-rc1, but not when
running 4.19.239 which does not support the sysfs to dump the SFPD information.
I checked that locking works with my changes when running on both kernel
versions.

Quoted 4 lines

So you've only tested on an mt25qu256a, correct? Then you should only add the locking to this flash device. (and maybe backport the mt25qu256a
to your older kernel).

Quoted 4 lines

I dumped SFDP tables only for mt25qu256a, but as I mentioned I tested locking functionality for both (on 4.19.239 which detects the device as n25q256ax1 and on 6.1.0-rc1  which detects the device as mt25qu256a). This is the flow I used for testing the change on both versions:

Quoted 5 lines

You said you've tested on the same board, thus it has the same flash device. But with the older kernel it was detected as a different part.

So the question is, what is the correct part number? I.e. what is the _actual_ flash device soldered on your board?

I have found out that we use MT25QU256ABA8ESF-0SIT so I'll release a patch for mt25qu256a only.

--
Thanks, Eliav