update mediatek MT7986 pinctrl driver
Subsystems (5)
v2 cover update mediatek MT7986 pinctrl driver
From: Frank Wunderlich <[email protected]>
This patch series introduces common bias-pull* pinconf support to MediaTek MT7986 pinctrl driver and fix some register offsets in the driver.
v2:
- added patches previously postes separately which are needed to have dt binding checks clean
- fixed odd numbers in comments for mt7986_pull_type
Frank Wunderlich (2):
dt-bindings: pinctrl: update pcie/pwm/spi bindings for MT7986 SoC
dt-bindings: pinctrl: update uart/mmc bindings for MT7986 SoC
Sam Shih (4):
dt-bindings: pinctrl: mt7986: add generic bias-pull* support
pinctrl: mediatek: fix the pinconf register offset of some pins
pinctrl: mediatek: extend pinctrl-moore to support new bias functions
pinctrl: mediatek: add pull_type attribute for mediatek MT7986 SoC
.../pinctrl/mediatek,mt7986-pinctrl.yaml | 108 ++++++++++++++++-- drivers/pinctrl/mediatek/pinctrl-moore.c | 49 ++++++-- drivers/pinctrl/mediatek/pinctrl-mt7986.c | 80 +++++++++++-- 3 files changed, 207 insertions(+), 30 deletions(-)
Signature · 1 line
2.34.1
PATCH v2 1/6 dt-bindings: pinctrl: update pcie/pwm/spi bindings for MT7986 SoC
From: Frank Wunderlich <[email protected]>
Allow multiple items for pcie, pwm and spi function.
--- .../bindings/pinctrl/mediatek,mt7986-pinctrl.yaml | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-)
Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml +9 -3
@@ -197,7 +197,9 @@ patternProperties: then: properties: groups: - enum: [pcie_clk, pcie_wake, pcie_pereset] + items: + enum: [pcie_clk, pcie_wake, pcie_pereset] + maxItems: 3 - if: properties: function:
@@ -205,7 +207,9 @@ patternProperties: then: properties: groups: - enum: [pwm0, pwm1_0, pwm1_1] + items: + enum: [pwm0, pwm1_0, pwm1_1] + maxItems: 2 - if: properties: function:
@@ -213,7 +217,9 @@ patternProperties: then: properties: groups: - enum: [spi0, spi0_wp_hold, spi1_0, spi1_1, spi1_2, spi1_3] + items: + enum: [spi0, spi0_wp_hold, spi1_0, spi1_1, spi1_2, spi1_3] + maxItems: 2 - if: properties: function:
Signature · 1 line
2.34.1
PATCH v2 2/6 dt-bindings: pinctrl: update uart/mmc bindings for MT7986 SoC
In reply to Frank WunderlichFrom: Frank Wunderlich <[email protected]>
Fix mmc and uart pins after uart splitting.
Some pinmux pins of the mt7986 pinctrl driver is composed of multiple pinctrl groups, the original binding only allows one pinctrl group per dts node, this patch sets "maxItems" for these groups and add new examples to the binding documentation.
---
v3:
- squashed version from sam
- v2 was ack'd by Krzysztof, but sams patch included updated emmc-names and different structure for uart to allow 2 pingroups
v2:
- wrap on col 80
--- .../pinctrl/mediatek,mt7986-pinctrl.yaml | 46 +++++++++++++++++-- 1 file changed, 41 insertions(+), 5 deletions(-)
Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml +41 -5
@@ -87,6 +87,8 @@ patternProperties: "wifi_led" "led" 1, 2 "i2c" "i2c" 3, 4 "uart1_0" "uart" 7, 8, 9, 10 + "uart1_rx_tx" "uart" 42, 43 + "uart1_cts_rts" "uart" 44, 45 "pcie_clk" "pcie" 9 "pcie_wake" "pcie" 10 "spi1_0" "spi" 11, 12, 13, 14
@@ -98,9 +100,11 @@ patternProperties: "emmc_45" "emmc" 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32 "spi1_1" "spi" 23, 24, 25, 26 - "uart1_2" "uart" 29, 30, 31, 32 + "uart1_2_rx_tx" "uart" 29, 30 + "uart1_2_cts_rts" "uart" 31, 32 "uart1_1" "uart" 23, 24, 25, 26 - "uart2_0" "uart" 29, 30, 31, 32 + "uart2_0_rx_tx" "uart" 29, 30 + "uart2_0_cts_rts" "uart" 31, 32 "spi0" "spi" 33, 34, 35, 36 "spi0_wp_hold" "spi" 37, 38 "uart1_3_rx_tx" "uart" 35, 36
@@ -157,7 +161,7 @@ patternProperties: then: properties: groups: - enum: [emmc, emmc_rst] + enum: [emmc_45, emmc_51] - if: properties: function:
@@ -227,8 +231,12 @@ patternProperties: then: properties: groups: - enum: [uart1_0, uart1_1, uart1_2, uart1_3_rx_tx, - uart1_3_cts_rts, uart2_0, uart2_1, uart0, uart1, uart2] + items: + enum: [uart1_0, uart1_rx_tx, uart1_cts_rts, uart1_1, + uart1_2_rx_tx, uart1_2_cts_rts, uart1_3_rx_tx, + uart1_3_cts_rts, uart2_0_rx_tx, uart2_0_cts_rts, + uart2_1, uart0, uart1, uart2] + maxItems: 2 - if: properties: function:
@@ -362,6 +370,27 @@ examples: interrupt-parent = <&gic>; #interrupt-cells = <2>; + pcie_pins: pcie-pins { + mux { + function = "pcie"; + groups = "pcie_clk", "pcie_wake", "pcie_pereset"; + }; + }; + + pwm_pins: pwm-pins { + mux { + function = "pwm"; + groups = "pwm0", "pwm1_0"; + }; + }; + + spi0_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + uart1_pins: uart1-pins { mux { function = "uart";
@@ -369,6 +398,13 @@ examples: }; }; + uart1_3_pins: uart1-3-pins { + mux { + function = "uart"; + groups = "uart1_3_rx_tx", "uart1_3_cts_rts"; + }; + }; + uart2_pins: uart2-pins { mux { function = "uart";
Signature · 1 line
2.34.1
Re: [PATCH v2 2/6] dt-bindings: pinctrl: update uart/mmc bindings for MT7986 SoC
Quoted 12 lines · Frank Wunderlich
From: Frank Wunderlich <[email protected]>
Fix mmc and uart pins after uart splitting.
Some pinmux pins of the mt7986 pinctrl driver is composed of multiple pinctrl groups, the original binding only allows one pinctrl group per dts node, this patch sets "maxItems" for these groups and add new examples to the binding documentation.
Fixes 65916a1ca90a ("dt-bindings: pinctrl: update bindings for MT7986 SoC")Signed-off-by Sam Shih <[email protected]>Signed-off-by Frank Wunderlich <[email protected]>
Quoted 6 lines
---
v3:
- squashed version from sam
- v2 was ack'd by Krzysztof, but sams patch included updated emmc-names and different structure for uart to allow 2 pingroups
v2:
Best regards,
Krzysztof
PATCH v2 3/6 dt-bindings: pinctrl: mt7986: add generic bias-pull* support
In reply to Frank WunderlichFrom: Sam Shih <[email protected]>
Since the bias-pull-{up,down} attribute already defines in pinctrl driver of mediatek MT7986 SoC, this patch updates bindings to support mediatek common bias-pull* function.
--- .../pinctrl/mediatek,mt7986-pinctrl.yaml | 50 +++++++++++++++++-- 1 file changed, 47 insertions(+), 3 deletions(-)
Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml +47 -3
@@ -292,9 +292,23 @@ patternProperties: bias-disable: true - bias-pull-up: true - - bias-pull-down: true + bias-pull-up: + oneOf: + - type: boolean + description: normal pull up. + - enum: [100, 101, 102, 103] + description: | + PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in + dt-bindings/pinctrl/mt65xx.h. + + bias-pull-down: + oneOf: + - type: boolean + description: normal pull down. + - enum: [100, 101, 102, 103] + description: | + PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0 defines in + dt-bindings/pinctrl/mt65xx.h. input-enable: true
@@ -346,6 +360,7 @@ examples: - | #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/pinctrl/mt65xx.h> soc { #address-cells = <2>;
@@ -412,5 +427,34 @@ examples: }; }; + mmc0_pins_default: mmc0-pins { + mux { + function = "emmc"; + groups = "emmc_51"; + }; + conf-cmd-dat { + pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", + "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", + "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; + input-enable; + drive-strength = <4>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ + }; + conf-clk { + pins = "EMMC_CK"; + drive-strength = <6>; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ + }; + conf-ds { + pins = "EMMC_DSL"; + bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */ + }; + conf-rst { + pins = "EMMC_RSTB"; + drive-strength = <4>; + bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */ + }; + }; + }; };
Signature · 1 line
2.34.1
Re: [PATCH v2 3/6] dt-bindings: pinctrl: mt7986: add generic bias-pull* support
Quoted 9 lines · Frank Wunderlich
From: Sam Shih <[email protected]>
Since the bias-pull-{up,down} attribute already defines in pinctrl driver of mediatek MT7986 SoC, this patch updates bindings to support mediatek common bias-pull* function.
Signed-off-by Sam Shih <[email protected]>Signed-off-by Frank Wunderlich <[email protected]>---
Best regards,
Krzysztof
PATCH v2 4/6 pinctrl: mediatek: fix the pinconf register offset of some pins
In reply to Frank WunderlichFrom: Sam Shih <[email protected]>
Correct the bias-pull-up, bias-pull-down and bias-disable register offset of mt7986 pin-42 to pin-49, in the original driver, the relative offset value was erroneously decremented by 1.
--- drivers/pinctrl/mediatek/pinctrl-mt7986.c | 24 +++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-)
drivers/pinctrl/mediatek/pinctrl-mt7986.c +12 -12
@@ -316,10 +316,10 @@ static const struct mtk_pin_field_calc mt7986_pin_pupd_range[] = {PIN_FIELD_BASE (38 ,38 ,IOCFG_LT_BASE ,0x30 ,0x10 ,9 ,1 ),PIN_FIELD_BASE (39 ,40 ,IOCFG_RB_BASE ,0x60 ,0x10 ,18 ,1 ),PIN_FIELD_BASE (41 ,41 ,IOCFG_RB_BASE ,0x60 ,0x10 ,12 ,1 ), -PIN_FIELD_BASE (42 ,43 ,IOCFG_RB_BASE ,0x60 ,0x10 ,22 ,1 ), -PIN_FIELD_BASE (44 ,45 ,IOCFG_RB_BASE ,0x60 ,0x10 ,20 ,1 ), -PIN_FIELD_BASE (46 ,47 ,IOCFG_RB_BASE ,0x60 ,0x10 ,26 ,1 ), -PIN_FIELD_BASE (48 ,49 ,IOCFG_RB_BASE ,0x60 ,0x10 ,24 ,1 ), +PIN_FIELD_BASE (42 ,43 ,IOCFG_RB_BASE ,0x60 ,0x10 ,23 ,1 ), +PIN_FIELD_BASE (44 ,45 ,IOCFG_RB_BASE ,0x60 ,0x10 ,21 ,1 ), +PIN_FIELD_BASE (46 ,47 ,IOCFG_RB_BASE ,0x60 ,0x10 ,27 ,1 ), +PIN_FIELD_BASE (48 ,49 ,IOCFG_RB_BASE ,0x60 ,0x10 ,25 ,1 ),PIN_FIELD_BASE (50 ,57 ,IOCFG_RT_BASE ,0x40 ,0x10 ,2 ,1 ),PIN_FIELD_BASE (58 ,58 ,IOCFG_RT_BASE ,0x40 ,0x10 ,1 ,1 ), PIN_FIELD_BASE(59, 59, IOCFG_RT_BASE, 0x40, 0x10, 0, 1),
@@ -354,10 +354,10 @@ static const struct mtk_pin_field_calc mt7986_pin_r0_range[] = {PIN_FIELD_BASE (38 ,38 ,IOCFG_LT_BASE ,0x40 ,0x10 ,9 ,1 ),PIN_FIELD_BASE (39 ,40 ,IOCFG_RB_BASE ,0x70 ,0x10 ,18 ,1 ),PIN_FIELD_BASE (41 ,41 ,IOCFG_RB_BASE ,0x70 ,0x10 ,12 ,1 ), -PIN_FIELD_BASE (42 ,43 ,IOCFG_RB_BASE ,0x70 ,0x10 ,22 ,1 ), -PIN_FIELD_BASE (44 ,45 ,IOCFG_RB_BASE ,0x70 ,0x10 ,20 ,1 ), -PIN_FIELD_BASE (46 ,47 ,IOCFG_RB_BASE ,0x70 ,0x10 ,26 ,1 ), -PIN_FIELD_BASE (48 ,49 ,IOCFG_RB_BASE ,0x70 ,0x10 ,24 ,1 ), +PIN_FIELD_BASE (42 ,43 ,IOCFG_RB_BASE ,0x70 ,0x10 ,23 ,1 ), +PIN_FIELD_BASE (44 ,45 ,IOCFG_RB_BASE ,0x70 ,0x10 ,21 ,1 ), +PIN_FIELD_BASE (46 ,47 ,IOCFG_RB_BASE ,0x70 ,0x10 ,27 ,1 ), +PIN_FIELD_BASE (48 ,49 ,IOCFG_RB_BASE ,0x70 ,0x10 ,25 ,1 ),PIN_FIELD_BASE (50 ,57 ,IOCFG_RT_BASE ,0x50 ,0x10 ,2 ,1 ),PIN_FIELD_BASE (58 ,58 ,IOCFG_RT_BASE ,0x50 ,0x10 ,1 ,1 ), PIN_FIELD_BASE(59, 59, IOCFG_RT_BASE, 0x50, 0x10, 0, 1),
@@ -392,10 +392,10 @@ static const struct mtk_pin_field_calc mt7986_pin_r1_range[] = {PIN_FIELD_BASE (38 ,38 ,IOCFG_LT_BASE ,0x50 ,0x10 ,9 ,1 ),PIN_FIELD_BASE (39 ,40 ,IOCFG_RB_BASE ,0x80 ,0x10 ,18 ,1 ),PIN_FIELD_BASE (41 ,41 ,IOCFG_RB_BASE ,0x80 ,0x10 ,12 ,1 ), -PIN_FIELD_BASE (42 ,43 ,IOCFG_RB_BASE ,0x80 ,0x10 ,22 ,1 ), -PIN_FIELD_BASE (44 ,45 ,IOCFG_RB_BASE ,0x80 ,0x10 ,20 ,1 ), -PIN_FIELD_BASE (46 ,47 ,IOCFG_RB_BASE ,0x80 ,0x10 ,26 ,1 ), -PIN_FIELD_BASE (48 ,49 ,IOCFG_RB_BASE ,0x80 ,0x10 ,24 ,1 ), +PIN_FIELD_BASE (42 ,43 ,IOCFG_RB_BASE ,0x80 ,0x10 ,23 ,1 ), +PIN_FIELD_BASE (44 ,45 ,IOCFG_RB_BASE ,0x80 ,0x10 ,21 ,1 ), +PIN_FIELD_BASE (46 ,47 ,IOCFG_RB_BASE ,0x80 ,0x10 ,27 ,1 ), +PIN_FIELD_BASE (48 ,49 ,IOCFG_RB_BASE ,0x80 ,0x10 ,25 ,1 ),PIN_FIELD_BASE (50 ,57 ,IOCFG_RT_BASE ,0x60 ,0x10 ,2 ,1 ),PIN_FIELD_BASE (58 ,58 ,IOCFG_RT_BASE ,0x60 ,0x10 ,1 ,1 ), PIN_FIELD_BASE(59, 59, IOCFG_RT_BASE, 0x60, 0x10, 0, 1),
Signature · 1 line
2.34.1
Re: [PATCH v2 4/6] pinctrl: mediatek: fix the pinconf register offset of some pins
Il 06/11/22 09:01, Frank Wunderlich ha scritto:
Quoted 9 lines
From: Sam Shih <[email protected]>
Correct the bias-pull-up, bias-pull-down and bias-disable register offset of mt7986 pin-42 to pin-49, in the original driver, the relative offset value was erroneously decremented by 1.
Fixes 360de6728064 ("pinctrl: mediatek: add support for MT7986 SoC")Signed-off-by Sam Shih <[email protected]>Signed-off-by Frank Wunderlich <[email protected]>
PATCH v2 5/6 pinctrl: mediatek: extend pinctrl-moore to support new bias functions
In reply to Frank WunderlichFrom: Sam Shih <[email protected]>
Commit fb34a9ae383a ("pinctrl: mediatek: support rsel feature") introduced SoC specify 'pull_type' attribute to mtk_pinconf_bias_set_combo and mtk_pinconf_bias_get_combo, and make the functions able to support almost all Mediatek SoCs that use pinctrl-mtk-common-v2.c.
This patch enables pinctrl_moore to support these functions.
--- drivers/pinctrl/mediatek/pinctrl-moore.c | 49 ++++++++++++++++++++---- 1 file changed, 42 insertions(+), 7 deletions(-)
drivers/pinctrl/mediatek/pinctrl-moore.c +42 -7
@@ -8,6 +8,7 @@* */ +#include <dt-bindings/pinctrl/mt65xx.h> #include <linux/gpio/driver.h> #include "pinctrl-moore.h"
@@ -105,7 +106,7 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev, {struct mtk_pinctrl *hw =pinctrl_dev_get_drvdata (pctldev);u32 param =pinconf_to_config_param (*config); -int val, val2, err, reg, ret =1 ; +int val, val2, err, pullup, reg, ret =1 ;const struct mtk_pin_desc *desc; desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
@@ -114,7 +115,13 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev,switch (param) {case PIN_CONFIG_BIAS_DISABLE : -if (hw->soc->bias_disable_get) { +if (hw->soc->bias_get_combo) { + err = hw->soc->bias_get_combo (hw, desc, &pullup, &ret); +if (err) +return err; +if (ret !=MTK_PUPD_SET_R1R0_00 && ret !=MTK_DISABLE ) +return -EINVAL ; + }else if (hw->soc->bias_disable_get) { err = hw->soc->bias_disable_get (hw, desc, &ret);if (err)return err;
@@ -123,7 +130,15 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev, }break ;case PIN_CONFIG_BIAS_PULL_UP : -if (hw->soc->bias_get) { +if (hw->soc->bias_get_combo) { + err = hw->soc->bias_get_combo (hw, desc, &pullup, &ret); +if (err) +return err; +if (ret ==MTK_PUPD_SET_R1R0_00 || ret ==MTK_DISABLE ) +return -EINVAL ; +if (!pullup) +return -EINVAL ; + }else if (hw->soc->bias_get) { err = hw->soc->bias_get (hw, desc,1 , &ret);if (err)return err;
@@ -132,7 +147,15 @@ static int mtk_pinconf_get(struct pinctrl_dev *pctldev, }break ;case PIN_CONFIG_BIAS_PULL_DOWN : -if (hw->soc->bias_get) { +if (hw->soc->bias_get_combo) { + err = hw->soc->bias_get_combo (hw, desc, &pullup, &ret); +if (err) +return err; +if (ret ==MTK_PUPD_SET_R1R0_00 || ret ==MTK_DISABLE ) +return -EINVAL ; +if (pullup) +return -EINVAL ; + }else if (hw->soc->bias_get) { err = hw->soc->bias_get (hw, desc,0 , &ret);if (err)return err;
@@ -235,7 +258,11 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,switch (param) {case PIN_CONFIG_BIAS_DISABLE : -if (hw->soc->bias_disable_set) { +if (hw->soc->bias_set_combo) { + err = hw->soc->bias_set_combo (hw, desc,0 ,MTK_DISABLE ); +if (err) +return err; + }else if (hw->soc->bias_disable_set) { err = hw->soc->bias_disable_set (hw, desc);if (err)return err;
@@ -244,7 +271,11 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, }break ;case PIN_CONFIG_BIAS_PULL_UP : -if (hw->soc->bias_set) { +if (hw->soc->bias_set_combo) { + err = hw->soc->bias_set_combo (hw, desc,1 , arg); +if (err) +return err; + }else if (hw->soc->bias_set) { err = hw->soc->bias_set (hw, desc,1 );if (err)return err;
@@ -253,7 +284,11 @@ static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, }break ;case PIN_CONFIG_BIAS_PULL_DOWN : -if (hw->soc->bias_set) { +if (hw->soc->bias_set_combo) { + err = hw->soc->bias_set_combo (hw, desc,0 , arg); +if (err) +return err; + }else if (hw->soc->bias_set) { err = hw->soc->bias_set (hw, desc,0 );if (err)return err;
Signature · 1 line
2.34.1
Re: [PATCH v2 5/6] pinctrl: mediatek: extend pinctrl-moore to support new bias functions
Il 06/11/22 09:01, Frank Wunderlich ha scritto:
Quoted 11 lines
From: Sam Shih <[email protected]>
Commit
fb34a9ae383a("pinctrl: mediatek: support rsel feature") introduced SoC specify 'pull_type' attribute tomtk_pinconf_bias_set_comboandmtk_pinconf_bias_get_combo, and make the functions able to support almost all Mediatek SoCs that usepinctrl-mtk-common-v2.c.This patch enables
pinctrl_mooreto support these functions.Signed-off-by Sam Shih <[email protected]>Signed-off-by Frank Wunderlich <[email protected]>
PATCH v2 6/6 pinctrl: mediatek: add pull_type attribute for mediatek MT7986 SoC
In reply to Frank WunderlichFrom: Sam Shih <[email protected]>
Commit fb34a9ae383a ("pinctrl: mediatek: support rsel feature") add SoC specify 'pull_type' attribute for bias configuration.
This patch add pull_type attribute to pinctrl-mt7986.c, and make bias_set_combo and bias_get_combo available to mediatek MT7986 SoC.
---
v2:
- fix odd numbers in comments
--- drivers/pinctrl/mediatek/pinctrl-mt7986.c | 56 +++++++++++++++++++++++ 1 file changed, 56 insertions(+)
drivers/pinctrl/mediatek/pinctrl-mt7986.c +56 -0
@@ -407,6 +407,60 @@ static const struct mtk_pin_field_calc mt7986_pin_r1_range[] = { PIN_FIELD_BASE(66, 68, IOCFG_LB_BASE, 0x60, 0x10, 2, 1), }; +static const unsigned int mt7986_pull_type[] = { +MTK_PULL_PUPD_R1R0_TYPE ,/*0*/ MTK_PULL_PUPD_R1R0_TYPE ,/*1*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*2*/ MTK_PULL_PUPD_R1R0_TYPE ,/*3*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*4*/ MTK_PULL_PUPD_R1R0_TYPE ,/*5*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*6*/ MTK_PULL_PUPD_R1R0_TYPE ,/*7*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*8*/ MTK_PULL_PUPD_R1R0_TYPE ,/*9*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*10*/ MTK_PULL_PUPD_R1R0_TYPE ,/*11*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*12*/ MTK_PULL_PUPD_R1R0_TYPE ,/*13*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*14*/ MTK_PULL_PUPD_R1R0_TYPE ,/*15*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*16*/ MTK_PULL_PUPD_R1R0_TYPE ,/*17*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*18*/ MTK_PULL_PUPD_R1R0_TYPE ,/*19*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*20*/ MTK_PULL_PUPD_R1R0_TYPE ,/*21*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*22*/ MTK_PULL_PUPD_R1R0_TYPE ,/*23*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*24*/ MTK_PULL_PUPD_R1R0_TYPE ,/*25*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*26*/ MTK_PULL_PUPD_R1R0_TYPE ,/*27*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*28*/ MTK_PULL_PUPD_R1R0_TYPE ,/*29*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*30*/ MTK_PULL_PUPD_R1R0_TYPE ,/*31*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*32*/ MTK_PULL_PUPD_R1R0_TYPE ,/*33*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*34*/ MTK_PULL_PUPD_R1R0_TYPE ,/*35*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*36*/ MTK_PULL_PUPD_R1R0_TYPE ,/*37*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*38*/ MTK_PULL_PUPD_R1R0_TYPE ,/*39*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*40*/ MTK_PULL_PUPD_R1R0_TYPE ,/*41*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*42*/ MTK_PULL_PUPD_R1R0_TYPE ,/*43*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*44*/ MTK_PULL_PUPD_R1R0_TYPE ,/*45*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*46*/ MTK_PULL_PUPD_R1R0_TYPE ,/*47*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*48*/ MTK_PULL_PUPD_R1R0_TYPE ,/*49*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*50*/ MTK_PULL_PUPD_R1R0_TYPE ,/*51*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*52*/ MTK_PULL_PUPD_R1R0_TYPE ,/*53*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*54*/ MTK_PULL_PUPD_R1R0_TYPE ,/*55*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*56*/ MTK_PULL_PUPD_R1R0_TYPE ,/*57*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*58*/ MTK_PULL_PUPD_R1R0_TYPE ,/*59*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*60*/ MTK_PULL_PUPD_R1R0_TYPE ,/*61*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*62*/ MTK_PULL_PUPD_R1R0_TYPE ,/*63*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*64*/ MTK_PULL_PUPD_R1R0_TYPE ,/*65*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*66*/ MTK_PULL_PUPD_R1R0_TYPE ,/*67*/ +MTK_PULL_PUPD_R1R0_TYPE ,/*68*/ MTK_PULL_PU_PD_TYPE ,/*69*/ +MTK_PULL_PU_PD_TYPE ,/*70*/ MTK_PULL_PU_PD_TYPE ,/*71*/ +MTK_PULL_PU_PD_TYPE ,/*72*/ MTK_PULL_PU_PD_TYPE ,/*73*/ +MTK_PULL_PU_PD_TYPE ,/*74*/ MTK_PULL_PU_PD_TYPE ,/*75*/ +MTK_PULL_PU_PD_TYPE ,/*76*/ MTK_PULL_PU_PD_TYPE ,/*77*/ +MTK_PULL_PU_PD_TYPE ,/*78*/ MTK_PULL_PU_PD_TYPE ,/*79*/ +MTK_PULL_PU_PD_TYPE ,/*80*/ MTK_PULL_PU_PD_TYPE ,/*81*/ +MTK_PULL_PU_PD_TYPE ,/*82*/ MTK_PULL_PU_PD_TYPE ,/*83*/ +MTK_PULL_PU_PD_TYPE ,/*84*/ MTK_PULL_PU_PD_TYPE ,/*85*/ +MTK_PULL_PU_PD_TYPE ,/*86*/ MTK_PULL_PU_PD_TYPE ,/*87*/ +MTK_PULL_PU_PD_TYPE ,/*88*/ MTK_PULL_PU_PD_TYPE ,/*89*/ +MTK_PULL_PU_PD_TYPE ,/*90*/ MTK_PULL_PU_PD_TYPE ,/*91*/ +MTK_PULL_PU_PD_TYPE ,/*92*/ MTK_PULL_PU_PD_TYPE ,/*93*/ +MTK_PULL_PU_PD_TYPE ,/*94*/ MTK_PULL_PU_PD_TYPE ,/*95*/ +MTK_PULL_PU_PD_TYPE ,/*96*/ MTK_PULL_PU_PD_TYPE ,/*97*/ +MTK_PULL_PU_PD_TYPE ,/*98*/ MTK_PULL_PU_PD_TYPE ,/*99*/ +MTK_PULL_PU_PD_TYPE ,/*100*/ +}; +static const struct mtk_pin_reg_calc mt7986_reg_cals[] = { [PINCTRL_PIN_REG_MODE ] =MTK_RANGE (mt7986_pin_mode_range), [PINCTRL_PIN_REG_DIR ] =MTK_RANGE (mt7986_pin_dir_range),
@@ -866,6 +920,7 @@ static struct mtk_pin_soc mt7986a_data = { .ies_present = false, .base_names = mt7986_pinctrl_register_base_names, .nbase_names = ARRAY_SIZE(mt7986_pinctrl_register_base_names), + .pull_type = mt7986_pull_type, .bias_set_combo = mtk_pinconf_bias_set_combo, .bias_get_combo = mtk_pinconf_bias_get_combo, .drive_set = mtk_pinconf_drive_set_rev1,
@@ -887,6 +942,7 @@ static struct mtk_pin_soc mt7986b_data = { .ies_present = false, .base_names = mt7986_pinctrl_register_base_names, .nbase_names = ARRAY_SIZE(mt7986_pinctrl_register_base_names), + .pull_type = mt7986_pull_type, .bias_set_combo = mtk_pinconf_bias_set_combo, .bias_get_combo = mtk_pinconf_bias_get_combo, .drive_set = mtk_pinconf_drive_set_rev1,
Signature · 1 line
2.34.1
Re: [PATCH v2 6/6] pinctrl: mediatek: add pull_type attribute for mediatek MT7986 SoC
Il 06/11/22 09:01, Frank Wunderlich ha scritto:
Quoted 10 lines
From: Sam Shih <[email protected]>
Commit
fb34a9ae383a("pinctrl: mediatek: support rsel feature") add SoC specify 'pull_type' attribute for bias configuration.This patch add
pull_typeattribute topinctrl-mt7986.c, and makebias_set_comboandbias_get_comboavailable to mediatek MT7986 SoC.Signed-off-by Sam Shih <[email protected]>Signed-off-by Frank Wunderlich <[email protected]>
Quoted 9 lines · Frank Wunderlich
From: Frank Wunderlich <[email protected]>
This patch series introduces common bias-pull* pinconf support to MediaTek MT7986 pinctrl driver and fix some register offsets in the driver.
v2:
- added patches previously postes separately which are needed to have dt binding checks clean
- fixed odd numbers in comments formt7986_pull_type
Oh OK thanks for collecting the stuff I need, I applied this series, I had to use some fuzz on patch 5/6 due to other patches I have applied so please check the result once I push it out.
Yours,
Linus Walleij