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clk: qcom: gcc-sc8280xp: add cxo as parent for three ufs ref clks

PATCH Applied Shazad Hussain 3 participants 4 messages Nov 15, 2022 – Nov 23, 2022

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Shazad Hussain

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#0 lore raw

PATCH v3 1/1 clk: qcom: gcc-sc8280xp: add cxo as parent for three ufs ref clks

The three UFS reference clocks, gcc_ufs_ref_clkref_clk for external UFS devices, gcc_ufs_card_clkref_clk and gcc_ufs_1_card_clkref_clk for two PHYs are all sourced from CXO.

Added parent_data for all three reference clocks described above to reflect that all three clocks are sourced from CXO to have valid frequency for the ref clock needed by UFS controller driver.

Fixes d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver")
Link https://lore.kernel.org/lkml/Y2Tber39cHuOSR%[email protected]/ open here
Signed-off-by Shazad Hussain <[email protected]>
Tested-by Johan Hovold <[email protected]>
Reviewed-by Johan Hovold <[email protected]>
Tested-by Andrew Halaney <[email protected]>
Reviewed-by Andrew Halaney <[email protected]>
Reviewed-by Reviewed-by: Brian Masney <[email protected]>

---
Changes since v2:
- Tweaked commit message and added R-b T-b from v2

v2 of this patch can be found at
https://lore.kernel.org/all/[email protected]/

v1 of this patch can be found at
https://lore.kernel.org/all/[email protected]/

used below patches for verification on next-20221114
https://lore.kernel.org/lkml/[email protected]/
https://lore.kernel.org/lkml/[email protected]/
https://lore.kernel.org/lkml/[email protected]/

 drivers/clk/qcom/gcc-sc8280xp.c | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/clk/qcom/gcc-sc8280xp.c +6 -0
index a18ed88f3b82..b3198784e1c3 100644
@@ -5364,6 +5364,8 @@ static struct clk_branch gcc_ufs_1_card_clkref_clk = {
 		.enable_mask = BIT(0),
 		.hw.init = &(const struct clk_init_data) {
 			.name = "gcc_ufs_1_card_clkref_clk",
+			.parent_data = &gcc_parent_data_tcxo,
+			.num_parents = 1,
 			.ops = &clk_branch2_ops,
 		},
 	},

@@ -5432,6 +5434,8 @@ static struct clk_branch gcc_ufs_card_clkref_clk = {
 		.enable_mask = BIT(0),
 		.hw.init = &(const struct clk_init_data) {
 			.name = "gcc_ufs_card_clkref_clk",
+			.parent_data = &gcc_parent_data_tcxo,
+			.num_parents = 1,
 			.ops = &clk_branch2_ops,
 		},
 	},

@@ -5848,6 +5852,8 @@ static struct clk_branch gcc_ufs_ref_clkref_clk = {
 		.enable_mask = BIT(0),
 		.hw.init = &(const struct clk_init_data) {
 			.name = "gcc_ufs_ref_clkref_clk",
+			.parent_data = &gcc_parent_data_tcxo,
+			.num_parents = 1,
 			.ops = &clk_branch2_ops,
 		},
 	},
Signature · 1 line
2.38.0
maintainer Reviewed-by on v3 1/1
#1 lore raw
Quoted 8 lines · Shazad Hussain

The three UFS reference clocks, gcc_ufs_ref_clkref_clk for external UFS devices, gcc_ufs_card_clkref_clk and gcc_ufs_1_card_clkref_clk for two PHYs are all sourced from CXO.

Added parent_data for all three reference clocks described above to reflect that all three clocks are sourced from CXO to have valid frequency for the ref clock needed by UFS controller driver.

Quoted 8 lines
Fixes d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver")
Link https://lore.kernel.org/lkml/Y2Tber39cHuOSR%[email protected]/ open here
Signed-off-by Shazad Hussain <[email protected]>
Tested-by Johan Hovold <[email protected]>
Reviewed-by Johan Hovold <[email protected]>
Tested-by Andrew Halaney <[email protected]>
Reviewed-by Andrew Halaney <[email protected]>
Reviewed-by Reviewed-by: Brian Masney <[email protected]>

Really-really-reviewed-by? ;)

Reviewed-by Bjorn Andersson <[email protected]>

@Stephen, could you please pick this for clk-fixes?

Thanks,
Bjorn

Quoted 52 lines

---
Changes since v2:
- Tweaked commit message and added R-b T-b from v2

v2 of this patch can be found at
https://lore.kernel.org/all/[email protected]/

v1 of this patch can be found at
https://lore.kernel.org/all/[email protected]/

used below patches for verification on next-20221114
https://lore.kernel.org/lkml/[email protected]/
https://lore.kernel.org/lkml/[email protected]/
https://lore.kernel.org/lkml/[email protected]/

 drivers/clk/qcom/gcc-sc8280xp.c | 6 ++++++
 1 file changed, 6 insertions(+)
drivers/clk/qcom/gcc-sc8280xp.c +6 -0
index a18ed88f3b82..b3198784e1c3 100644
@@ -5364,6 +5364,8 @@ static struct clk_branch gcc_ufs_1_card_clkref_clk = {
 		.enable_mask = BIT(0),
 		.hw.init = &(const struct clk_init_data) {
 			.name = "gcc_ufs_1_card_clkref_clk",
+			.parent_data = &gcc_parent_data_tcxo,
+			.num_parents = 1,
 			.ops = &clk_branch2_ops,
 		},
 	},

@@ -5432,6 +5434,8 @@ static struct clk_branch gcc_ufs_card_clkref_clk = {
 		.enable_mask = BIT(0),
 		.hw.init = &(const struct clk_init_data) {
 			.name = "gcc_ufs_card_clkref_clk",
+			.parent_data = &gcc_parent_data_tcxo,
+			.num_parents = 1,
 			.ops = &clk_branch2_ops,
 		},
 	},

@@ -5848,6 +5852,8 @@ static struct clk_branch gcc_ufs_ref_clkref_clk = {
 		.enable_mask = BIT(0),
 		.hw.init = &(const struct clk_init_data) {
 			.name = "gcc_ufs_ref_clkref_clk",
+			.parent_data = &gcc_parent_data_tcxo,
+			.num_parents = 1,
 			.ops = &clk_branch2_ops,
 		},
 	},
Signature · 1 line
2.38.0
author
#2 lore raw
Quoted 18 lines · Bjorn Andersson
Quoted 8 lines · Shazad Hussain

The three UFS reference clocks, gcc_ufs_ref_clkref_clk for external UFS devices, gcc_ufs_card_clkref_clk and gcc_ufs_1_card_clkref_clk for two PHYs are all sourced from CXO.

Added parent_data for all three reference clocks described above to reflect that all three clocks are sourced from CXO to have valid frequency for the ref clock needed by UFS controller driver.

Quoted 8 lines
Fixes d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver")
Link https://lore.kernel.org/lkml/Y2Tber39cHuOSR%[email protected]/ open here
Signed-off-by Shazad Hussain <[email protected]>
Tested-by Johan Hovold <[email protected]>
Reviewed-by Johan Hovold <[email protected]>
Tested-by Andrew Halaney <[email protected]>
Reviewed-by Andrew Halaney <[email protected]>
Reviewed-by Reviewed-by: Brian Masney <[email protected]>
Quoted 1 line

Really-really-reviewed-by? >

My bad, thanks for pointing it Bjorn :)

Quoted 61 lines
Reviewed-by Bjorn Andersson <[email protected]>

@Stephen, could you please pick this for clk-fixes?

Thanks,
Bjorn

Quoted 52 lines

---
Changes since v2:
- Tweaked commit message and added R-b T-b from v2

v2 of this patch can be found at
https://lore.kernel.org/all/[email protected]/

v1 of this patch can be found at
https://lore.kernel.org/all/[email protected]/

used below patches for verification on next-20221114
https://lore.kernel.org/lkml/[email protected]/
https://lore.kernel.org/lkml/[email protected]/
https://lore.kernel.org/lkml/[email protected]/

  drivers/clk/qcom/gcc-sc8280xp.c | 6 ++++++
  1 file changed, 6 insertions(+)
drivers/clk/qcom/gcc-sc8280xp.c +6 -0
index a18ed88f3b82..b3198784e1c3 100644
@@ -5364,6 +5364,8 @@ static struct clk_branch gcc_ufs_1_card_clkref_clk = {
  		.enable_mask = BIT(0),
  		.hw.init = &(const struct clk_init_data) {
  			.name = "gcc_ufs_1_card_clkref_clk",
+			.parent_data = &gcc_parent_data_tcxo,
+			.num_parents = 1,
  			.ops = &clk_branch2_ops,
  		},
  	},

@@ -5432,6 +5434,8 @@ static struct clk_branch gcc_ufs_card_clkref_clk = {
  		.enable_mask = BIT(0),
  		.hw.init = &(const struct clk_init_data) {
  			.name = "gcc_ufs_card_clkref_clk",
+			.parent_data = &gcc_parent_data_tcxo,
+			.num_parents = 1,
  			.ops = &clk_branch2_ops,
  		},
  	},

@@ -5848,6 +5852,8 @@ static struct clk_branch gcc_ufs_ref_clkref_clk = {
  		.enable_mask = BIT(0),
  		.hw.init = &(const struct clk_init_data) {
  			.name = "gcc_ufs_ref_clkref_clk",
+			.parent_data = &gcc_parent_data_tcxo,
+			.num_parents = 1,
  			.ops = &clk_branch2_ops,
  		},
  	},
Signature · 1 line
2.38.0
maintainer Applied
#3 lore raw
In reply to Shazad Hussain

Quoting Shazad Hussain (2022-11-15 07:29:56)

Quoted 16 lines

The three UFS reference clocks, gcc_ufs_ref_clkref_clk for external UFS devices, gcc_ufs_card_clkref_clk and gcc_ufs_1_card_clkref_clk for two PHYs are all sourced from CXO.

Added parent_data for all three reference clocks described above to reflect that all three clocks are sourced from CXO to have valid frequency for the ref clock needed by UFS controller driver.

Fixes d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver")
Link https://lore.kernel.org/lkml/Y2Tber39cHuOSR%[email protected]/ open here
Signed-off-by Shazad Hussain <[email protected]>
Tested-by Johan Hovold <[email protected]>
Reviewed-by Johan Hovold <[email protected]>
Tested-by Andrew Halaney <[email protected]>
Reviewed-by Andrew Halaney <[email protected]>
Reviewed-by Reviewed-by: Brian Masney <[email protected]>
Quoted 1 line

---

Fixed the double Rb

Applied to clk-fixes