riscv: Add GENERIC_ENTRY support
Subsystems (3)
v12 cover riscv: Add GENERIC_ENTRY support
From: Guo Ren <[email protected]>
The patches convert riscv to use the generic entry infrastructure from kernel/entry/*. Some optimization for entry.S with new .macro and merge ret_from_kernel_thread into ret_from_fork.
The 1,2 are the preparation of generic entry. 3~7 are the main part of generic entry.
All tested with rv64, rv32, rv64 + 32rootfs, all are passed.
You can directly try it with:
[1] https://github.com/guoren83/linux/tree/generic_entry_v12
Any reviews and tests are helpful.
v12:
- Rebase on newest for-next-20230103 (Linux 6.2-rc1)
- Add Reviewed-by: Björn Töpel
v11:
- Rebase on newest for-next-20221211
- Remove stack optimization patch series
- Optimize comments
- Replace ENTRY with SYM_CODE/FUNC_START in entry.S
v10:
https://lore.kernel.org/linux-riscv/[email protected]/
- Rebase on palmer/for-next branch (20221208)
- Remove unrelated patches from the series (Suggested-by: Bjorn)
- Fixup Typos.
v9:
https://lore.kernel.org/linux-riscv/[email protected]/
- Fixup NR_syscalls check (by Ben Hutchings)
- Add Tested-by: Jisheng Zhang
v8:
https://lore.kernel.org/linux-riscv/[email protected]/
- Rebase on palmer/for-next branch (20221102)
- Add save/restore_from_x5_to_x31 .macro (JishengZhang)
- Consolidate ret_from_kernel_thread into ret_from_fork (JishengZhang)
- Optimize __noinstr_section comment (JiangshanLai)
v7:
https://lore.kernel.org/linux-riscv/[email protected]/
- Fixup regs_irqs_disabled with SR_PIE
- Optimize stackleak_erase -> stackleak_erase_on_task_stack (Thx Mark Rutland)
- Add BUG_ON(!irqs_disabled()) in trap handlers
- Using regs_irqs_disabled in __do_page_fault
- Remove unnecessary irq disable in ret_from_exception and add comment
v6:
https://lore.kernel.org/linux-riscv/[email protected]/
- Use THEAD_SIZE_ORDER for thread size adjustment in kconfig (Thx Arnd)
- Move call_on_stack to inline style (Thx Peter Zijlstra)
- Fixup fp chain broken (Thx Chen Zhongjin)
- Remove common entry modification, and fixup page_fault entry (Thx Peter Zijlstra)
- Treat some traps as nmi entry (Thx Peter Zijlstra)
v5:
https://lore.kernel.org/linux-riscv/[email protected]/
- Add riscv own stackleak patch instead of generic entry modification (by Mark Rutland)
- Add EXPERT dependency for THREAD_SIZE (by Arnd)
- Add EXPERT dependency for IRQ_STACK (by Sebastian, David Laight)
- Corrected __trap_section (by Peter Zijlstra)
- Add Tested-by (Yipeng Zou)
- Use CONFIG_SOFTIRQ_ON_OWN_STACK replace "#ifndef CONFIG_PREEMPT_RT"
- Fixup systrace_enter compile error
- Fixup exit_to_user_mode_prepare preempt_disable warning
V4:
https://lore.kernel.org/linux-riscv/[email protected]/
- Fixup entry.S with "la" bug (by Conor.Dooley)
- Fixup missing noinstr bug (by Peter Zijlstra)
V3:
https://lore.kernel.org/linux-riscv/[email protected]/
- Fixup CONFIG_COMPAT=n compile error
- Add THREAD_SIZE_ORDER config
- Optimize elf_kexec.c warning fixup
- Add static to irq_stack_ptr definition
V2:
https://lore.kernel.org/linux-riscv/[email protected]/
- Fixup compile error by include "riscv: ptrace: Remove duplicate operation"
- Fixup compile warning
- Add test repo link in cover letter
V1:
https://lore.kernel.org/linux-riscv/[email protected]/
Guo Ren (3):
riscv: ptrace: Remove duplicate operation
riscv: entry: Add noinstr to prevent instrumentation inserted
riscv: entry: Convert to generic entry
Jisheng Zhang (3):
riscv: entry: Remove extra level wrappers of trace_hardirqs_{on,off}
riscv: entry: Consolidate ret_from_kernel_thread into ret_from_fork
riscv: entry: Consolidate general regs saving/restoring
Lai Jiangshan (1):
compiler_types.h: Add __noinstr_section() for noinstr
arch/riscv/Kconfig | 1 + arch/riscv/include/asm/asm.h | 63 +++++ arch/riscv/include/asm/csr.h | 1 - arch/riscv/include/asm/entry-common.h | 8 + arch/riscv/include/asm/ptrace.h | 10 +- arch/riscv/include/asm/stacktrace.h | 5 + arch/riscv/include/asm/syscall.h | 6 + arch/riscv/include/asm/thread_info.h | 13 +- arch/riscv/kernel/Makefile | 2 - arch/riscv/kernel/entry.S | 334 +++----------------------- arch/riscv/kernel/irq.c | 15 ++ arch/riscv/kernel/mcount-dyn.S | 56 +---- arch/riscv/kernel/process.c | 5 +- arch/riscv/kernel/ptrace.c | 44 ---- arch/riscv/kernel/signal.c | 29 +-- arch/riscv/kernel/sys_riscv.c | 31 +++ arch/riscv/kernel/trace_irq.c | 27 --- arch/riscv/kernel/trace_irq.h | 11 - arch/riscv/kernel/traps.c | 86 +++++-- arch/riscv/mm/fault.c | 16 +- include/linux/compiler_types.h | 15 +- 21 files changed, 279 insertions(+), 499 deletions(-) create mode 100644 arch/riscv/include/asm/entry-common.h delete mode 100644 arch/riscv/kernel/trace_irq.c delete mode 100644 arch/riscv/kernel/trace_irq.h
Signature · 1 line
2.36.1
PATCH v12 1/7 compiler_types.h: Add __noinstr_section() for noinstr
From: Lai Jiangshan <[email protected]>
Using __noinstr_section() doesn't automatically disable all instrumentations on the section. Inhibition for some instrumentations requires extra code. I.E. KPROBES explicitly avoids instrumenting on .noinstr.text.
--- include/linux/compiler_types.h | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-)
include/linux/compiler_types.h +11 -4
@@ -231,12 +231,19 @@ struct ftrace_likely_data {#define __no_sanitize_or_inline __always_inline#endif -/* Section for code which can't be instrumented at all */ -#define noinstr \ - noinline notrace __attribute((__section__(".noinstr.text"))) \ - __no_kcsan __no_sanitize_address __no_profile __no_sanitize_coverage \ +/* +* Using __noinstr_section() doesn't automatically disable all instrumentations +* on the section. Inhibition for some instrumentations requires extra code. +* I.E. KPROBES explicitly avoids instrumenting on .noinstr.text. +*/ +#define __noinstr_section (section) \ + noinline notrace __section(section) __no_profile \ + __no_kcsan __no_sanitize_address __no_sanitize_coverage \ __no_sanitize_memory +/* Section for code which can't be instrumented at all */ +#define noinstr __noinstr_section(".noinstr.text") +#endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */
Signature · 1 line
2.36.1
PATCH v12 2/7 riscv: ptrace: Remove duplicate operation
In reply to [email protected]From: Guo Ren <[email protected]>
The TIF_SYSCALL_TRACE is controlled by a common code, see kernel/ptrace.c and include/linux/thread_info.h.
clear_task_syscall_work(child, SYSCALL_TRACE);
--- arch/riscv/kernel/ptrace.c | 1 - 1 file changed, 1 deletion(-)
arch/riscv/kernel/ptrace.c +0 -1
@@ -212,7 +212,6 @@ unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)void ptrace_disable (struct task_struct *child) { -clear_tsk_thread_flag (child,TIF_SYSCALL_TRACE ); } long arch_ptrace(struct task_struct *child, long request,
Signature · 1 line
2.36.1
PATCH v12 3/7 riscv: entry: Add noinstr to prevent instrumentation inserted
In reply to [email protected]From: Guo Ren <[email protected]>
Without noinstr the compiler is free to insert instrumentation (think all the k*SAN, KCov, GCov, ftrace etc..) which can call code we're not yet ready to run this early in the entry path, for instance it could rely on RCU which isn't on yet, or expect lockdep state. (by peterz)
--- arch/riscv/kernel/traps.c | 4 ++-- arch/riscv/mm/fault.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)
arch/riscv/kernel/traps.c +2 -2
@@ -95,9 +95,9 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code, }#if defined(CONFIG_XIP_KERNEL ) && defined(CONFIG_RISCV_ALTERNATIVE ) -#define __trap_section __section(".xip.traps") +#define __trap_section __noinstr_section(".xip.traps")#else -#define __trap_section +#define __trap_section noinstr#endif #define DO_ERROR_INFO (name, signo, code, str) \ asmlinkage __visible __trap_section void name(struct pt_regs *regs) \
arch/riscv/mm/fault.c +1 -1
@@ -204,7 +204,7 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma)* This routine handles page faults. It determines the address and the * problem, and then passes it off to one of the appropriate routines. */ -asmlinkage void do_page_fault(struct pt_regs *regs) +asmlinkage void noinstr do_page_fault(struct pt_regs *regs) {struct task_struct *tsk;struct vm_area_struct *vma;
Signature · 1 line
2.36.1
Alexandre Ghiti
reviewerRe: [PATCH -next V12 3/7] riscv: entry: Add noinstr to prevent instrumentation inserted
Hi Guo,
Quoted 39 lines · On 1/3/23 04:35, [email protected] wrote:
From: Guo Ren <[email protected]>
Without noinstr the compiler is free to insert instrumentation (think all the k*SAN, KCov, GCov, ftrace etc..) which can call code we're not yet ready to run this early in the entry path, for instance it could rely on RCU which isn't on yet, or expect lockdep state. (by peterz)
Reviewed-by Björn Töpel <[email protected]>Suggested-by Peter Zijlstra <[email protected]>Tested-by Jisheng Zhang <[email protected]>Signed-off-by Guo Ren <[email protected]>Signed-off-by Guo Ren <[email protected]>--- arch/riscv/kernel/traps.c | 4 ++-- arch/riscv/mm/fault.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)arch/riscv/kernel/traps.c +2
-2@@ -95,9 +95,9 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code, }#if defined(CONFIG_XIP_KERNEL ) && defined(CONFIG_RISCV_ALTERNATIVE ) -#define __trap_section __section(".xip.traps") +#define __trap_section __noinstr_section(".xip.traps")#else -#define __trap_section +#define __trap_section noinstr#endif #define DO_ERROR_INFO (name, signo, code, str) \ asmlinkage __visible __trap_section void name(struct pt_regs *regs) \arch/riscv/mm/fault.c +0
-0
arch/riscv/mm/fault.c static inline bool access_error(unsigned long cause, struct vm_area_struct *vma) · line 207
Quoted 5 lines
arch/riscv/mm/fault.c +1
-1@@ -204,7 +204,7 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma)* This routine handles page faults. It determines the address and the * problem, and then passes it off to one of the appropriate routines. */ -asmlinkage void do_page_fault(struct pt_regs *regs) +asmlinkage void noinstr do_page_fault(struct pt_regs *regs)
(I dug the archive but can't find the series before v4, so sorry if it was already answered)
I think we should not disable the instrumentation of those trap handlers as at least profiling them with ftrace would provide valuable information (and gcov would be nice too): why do we need to do that? A trap very early in the boot process is not recoverable anyway.
And I took a look at other architectures, none of them disables the instrumentation on do_page_fault.
Quoted 3 lines
arch/riscv/mm/fault.c +0
-0{struct task_struct *tsk;struct vm_area_struct *vma;
Re: [PATCH -next V12 3/7] riscv: entry: Add noinstr to prevent instrumentation inserted
Quoted 53 lines · Alexandre Ghiti
Hi Guo,
Quoted 39 lines · On 1/3/23 04:35, [email protected] wrote:
From: Guo Ren <[email protected]>
Without noinstr the compiler is free to insert instrumentation (think all the k*SAN, KCov, GCov, ftrace etc..) which can call code we're not yet ready to run this early in the entry path, for instance it could rely on RCU which isn't on yet, or expect lockdep state. (by peterz)
Reviewed-by Björn Töpel <[email protected]>Suggested-by Peter Zijlstra <[email protected]>Tested-by Jisheng Zhang <[email protected]>Signed-off-by Guo Ren <[email protected]>Signed-off-by Guo Ren <[email protected]>--- arch/riscv/kernel/traps.c | 4 ++-- arch/riscv/mm/fault.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)arch/riscv/kernel/traps.c +2
-2@@ -95,9 +95,9 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code, }#if defined(CONFIG_XIP_KERNEL ) && defined(CONFIG_RISCV_ALTERNATIVE ) -#define __trap_section __section(".xip.traps") +#define __trap_section __noinstr_section(".xip.traps")#else -#define __trap_section +#define __trap_section noinstr#endif #define DO_ERROR_INFO (name, signo, code, str) \ asmlinkage __visible __trap_section void name(struct pt_regs *regs) \arch/riscv/mm/fault.c +0
-0arch/riscv/mm/fault.c static inline bool access_error(unsigned long cause, struct vm_area_struct *vma) · line 207
Quoted 5 lines
arch/riscv/mm/fault.c +1
-1@@ -204,7 +204,7 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma)* This routine handles page faults. It determines the address and the * problem, and then passes it off to one of the appropriate routines. */ -asmlinkage void do_page_fault(struct pt_regs *regs) +asmlinkage void noinstr do_page_fault(struct pt_regs *regs)(I dug the archive but can't find the series before v4, so sorry if it was already answered)
Quoted 4 lines
I think we should not disable the instrumentation of those trap handlers as at least profiling them with ftrace would provide valuable information (and gcov would be nice too): why do we need to do that? A trap very early in the boot process is not recoverable anyway.
Everything that calls irqentry_enter() should be noinstr, and this patch prepares for the next generic_entry convert.
eg:
asmlinkage void noinstr do_page_fault(struct pt_regs *regs)
{
irqentry_state_t state = irqentry_enter(regs);
__do_page_fault(regs);
local_irq_disable();
irqentry_exit(regs, state);
}NOKPROBE_SYMBOL(do_page_fault);
You still could profile __do_page_fault.
Quoted 3 lines
And I took a look at other architectures, none of them disables the instrumentation on
do_page_fault.
That's not true, have a look at power & arm64. All of them have some limitations at the entry of page_fault.
Quoted 5 lines
Quoted 5 lines
arch/riscv/mm/fault.c +0
-0{struct task_struct *tsk;struct vm_area_struct *vma;
Signature · 2 lines
Best Regards Guo Ren
Re: [PATCH -next V12 3/7] riscv: entry: Add noinstr to prevent instrumentation inserted
Quoted 74 lines · Guo Ren
Quoted 53 lines · Alexandre Ghiti
Hi Guo,
Quoted 39 lines · On 1/3/23 04:35, [email protected] wrote:
From: Guo Ren <[email protected]>
Without noinstr the compiler is free to insert instrumentation (think all the k*SAN, KCov, GCov, ftrace etc..) which can call code we're not yet ready to run this early in the entry path, for instance it could rely on RCU which isn't on yet, or expect lockdep state. (by peterz)
Reviewed-by Björn Töpel <[email protected]>Suggested-by Peter Zijlstra <[email protected]>Tested-by Jisheng Zhang <[email protected]>Signed-off-by Guo Ren <[email protected]>Signed-off-by Guo Ren <[email protected]>--- arch/riscv/kernel/traps.c | 4 ++-- arch/riscv/mm/fault.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)arch/riscv/kernel/traps.c +2
-2@@ -95,9 +95,9 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code, }#if defined(CONFIG_XIP_KERNEL ) && defined(CONFIG_RISCV_ALTERNATIVE ) -#define __trap_section __section(".xip.traps") +#define __trap_section __noinstr_section(".xip.traps")#else -#define __trap_section +#define __trap_section noinstr#endif #define DO_ERROR_INFO (name, signo, code, str) \ asmlinkage __visible __trap_section void name(struct pt_regs *regs) \arch/riscv/mm/fault.c +0
-0arch/riscv/mm/fault.c static inline bool access_error(unsigned long cause, struct vm_area_struct *vma) · line 207
Quoted 5 lines
arch/riscv/mm/fault.c +1
-1@@ -204,7 +204,7 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma)* This routine handles page faults. It determines the address and the * problem, and then passes it off to one of the appropriate routines. */ -asmlinkage void do_page_fault(struct pt_regs *regs) +asmlinkage void noinstr do_page_fault(struct pt_regs *regs)(I dug the archive but can't find the series before v4, so sorry if it was already answered)
Quoted 4 lines
I think we should not disable the instrumentation of those trap handlers as at least profiling them with ftrace would provide valuable information (and gcov would be nice too): why do we need to do that? A trap very early in the boot process is not recoverable anyway.
Everything that calls
irqentry_enter()should be noinstr, and this patch prepares for the nextgeneric_entryconvert.eg:
asmlinkage void noinstrdo_page_fault(struct pt_regs *regs){ irqentry_state_t state = irqentry_enter(regs); __do_page_fault(regs); local_irq_disable(); irqentry_exit(regs, state); }
NOKPROBE_SYMBOL(do_page_fault);
Quoted 7 lines
You still could profile
__do_page_fault.Quoted 3 lines
And I took a look at other architectures, none of them disables the instrumentation on
do_page_fault.That's not true, have a look at power & arm64. All of them have some limitations at the entry of
page_fault.
Well, arm64's can't be kprobed, but is *can* be traced with ftrace, and *can* be instrumented with KASAN and friends. I'm not sure that we actually need to inhibit kprobes for do_page_fault, and we might be able to relax that.
As a general thing, we've tried to centralize all the necesarily-noinstr bits in arch/arm64/kernel/entry-common.c, and keep everything else as instrumentable as possible.
I'd recommend doing similar, and have a central file for any entry bits which can't live in the generic entry code, and keep the rest instrumentable. That will make it easier to maintain and verify.
Thanks,
Mark.
Re: [PATCH -next V12 3/7] riscv: entry: Add noinstr to prevent instrumentation inserted
Quoted 88 lines · Mark Rutland
Quoted 74 lines · Guo Ren
Quoted 53 lines · Alexandre Ghiti
Hi Guo,
Quoted 39 lines · On 1/3/23 04:35, [email protected] wrote:
From: Guo Ren <[email protected]>
Without noinstr the compiler is free to insert instrumentation (think all the k*SAN, KCov, GCov, ftrace etc..) which can call code we're not yet ready to run this early in the entry path, for instance it could rely on RCU which isn't on yet, or expect lockdep state. (by peterz)
Reviewed-by Björn Töpel <[email protected]>Suggested-by Peter Zijlstra <[email protected]>Tested-by Jisheng Zhang <[email protected]>Signed-off-by Guo Ren <[email protected]>Signed-off-by Guo Ren <[email protected]>--- arch/riscv/kernel/traps.c | 4 ++-- arch/riscv/mm/fault.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)arch/riscv/kernel/traps.c +2
-2@@ -95,9 +95,9 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code, }#if defined(CONFIG_XIP_KERNEL ) && defined(CONFIG_RISCV_ALTERNATIVE ) -#define __trap_section __section(".xip.traps") +#define __trap_section __noinstr_section(".xip.traps")#else -#define __trap_section +#define __trap_section noinstr#endif #define DO_ERROR_INFO (name, signo, code, str) \ asmlinkage __visible __trap_section void name(struct pt_regs *regs) \arch/riscv/mm/fault.c +0
-0arch/riscv/mm/fault.c static inline bool access_error(unsigned long cause, struct vm_area_struct *vma) · line 207
Quoted 5 lines
arch/riscv/mm/fault.c +1
-1@@ -204,7 +204,7 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma)* This routine handles page faults. It determines the address and the * problem, and then passes it off to one of the appropriate routines. */ -asmlinkage void do_page_fault(struct pt_regs *regs) +asmlinkage void noinstr do_page_fault(struct pt_regs *regs)(I dug the archive but can't find the series before v4, so sorry if it was already answered)
Quoted 4 lines
I think we should not disable the instrumentation of those trap handlers as at least profiling them with ftrace would provide valuable information (and gcov would be nice too): why do we need to do that? A trap very early in the boot process is not recoverable anyway.
Everything that calls
irqentry_enter()should be noinstr, and this patch prepares for the nextgeneric_entryconvert.eg:
asmlinkage void noinstrdo_page_fault(struct pt_regs *regs){ irqentry_state_t state = irqentry_enter(regs); __do_page_fault(regs); local_irq_disable(); irqentry_exit(regs, state); }
NOKPROBE_SYMBOL(do_page_fault);Quoted 7 lines
You still could profile
__do_page_fault.Quoted 3 lines
And I took a look at other architectures, none of them disables the instrumentation on
do_page_fault.That's not true, have a look at power & arm64. All of them have some limitations at the entry of
page_fault.Well, arm64's can't be kprobed, but is *can* be traced with ftrace, and *can* be instrumented with KASAN and friends. I'm not sure that we actually need to inhibit kprobes for
do_page_fault, and we might be able to relax that.
Quoted 7 lines
As a general thing, we've tried to centralize all the necesarily-noinstr bits in
arch/arm64/kernel/entry-common.c, and keep everything else as instrumentable as possible.I'd recommend doing similar, and have a central file for any entry bits which can't live in the generic entry code, and keep the rest instrumentable. That will make it easier to maintain and verify.
Okay, here is the v13 [1]. I've centralized all the necesarily-noinstr bits in arch/riscv/kernel/traps.c.
[1] https://lore.kernel.org/linux-riscv/[email protected]/
Quoted 3 lines
Thanks,
Mark.
Signature · 7 lines
Best Regards Guo Ren _______________________________________________ linux-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-riscv
Re: [PATCH -next V12 3/7] riscv: entry: Add noinstr to prevent instrumentation inserted
In reply to [email protected]Quoted 6 lines · On Mon, Jan 02, 2023 at 10:35:27PM -0500, [email protected] wrote:
From: Guo Ren <[email protected]>
Without noinstr the compiler is free to insert instrumentation (think all the k*SAN, KCov, GCov, ftrace etc..) which can call code we're not yet ready to run this early in the entry path, for instance it could rely on RCU which isn't on yet, or expect lockdep state. (by peterz)
That's generally true, and makes sense to me, but ....
Quoted 32 lines
Reviewed-by Björn Töpel <[email protected]>Suggested-by Peter Zijlstra <[email protected]>Tested-by Jisheng Zhang <[email protected]>Signed-off-by Guo Ren <[email protected]>Signed-off-by Guo Ren <[email protected]>--- arch/riscv/kernel/traps.c | 4 ++-- arch/riscv/mm/fault.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)arch/riscv/kernel/traps.c +2
-2@@ -95,9 +95,9 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code, }#if defined(CONFIG_XIP_KERNEL ) && defined(CONFIG_RISCV_ALTERNATIVE ) -#define __trap_section __section(".xip.traps") +#define __trap_section __noinstr_section(".xip.traps")#else -#define __trap_section +#define __trap_section noinstr#endif #define DO_ERROR_INFO (name, signo, code, str) \ asmlinkage __visible __trap_section void name(struct pt_regs *regs) \arch/riscv/mm/fault.c +0
-0
arch/riscv/mm/fault.c static inline bool access_error(unsigned long cause, struct vm_area_struct *vma) · line 207
Quoted 5 lines
arch/riscv/mm/fault.c +1
-1@@ -204,7 +204,7 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma)* This routine handles page faults. It determines the address and the * problem, and then passes it off to one of the appropriate routines. */ -asmlinkage void do_page_fault(struct pt_regs *regs) +asmlinkage void noinstr do_page_fault(struct pt_regs *regs)
... why do you need that for do_page_fault? That doesn't (currently) do any entry/exit logic, so this seems unnecessary per the commit description.
Thanks,
Mark.
Quoted 6 lines
arch/riscv/mm/fault.c +0
-0{struct task_struct *tsk;struct vm_area_struct *vma;Signature · 1 line
2.36.1
Re: [PATCH -next V12 3/7] riscv: entry: Add noinstr to prevent instrumentation inserted
Quoted 43 lines · Mark Rutland
Quoted 6 lines · On Mon, Jan 02, 2023 at 10:35:27PM -0500, [email protected] wrote:
From: Guo Ren <[email protected]>
Without noinstr the compiler is free to insert instrumentation (think all the k*SAN, KCov, GCov, ftrace etc..) which can call code we're not yet ready to run this early in the entry path, for instance it could rely on RCU which isn't on yet, or expect lockdep state. (by peterz)
That's generally true, and makes sense to me, but ....
Quoted 32 lines
Reviewed-by Björn Töpel <[email protected]>Suggested-by Peter Zijlstra <[email protected]>Tested-by Jisheng Zhang <[email protected]>Signed-off-by Guo Ren <[email protected]>Signed-off-by Guo Ren <[email protected]>--- arch/riscv/kernel/traps.c | 4 ++-- arch/riscv/mm/fault.c | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-)arch/riscv/kernel/traps.c +2
-2@@ -95,9 +95,9 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code, }#if defined(CONFIG_XIP_KERNEL ) && defined(CONFIG_RISCV_ALTERNATIVE ) -#define __trap_section __section(".xip.traps") +#define __trap_section __noinstr_section(".xip.traps")#else -#define __trap_section +#define __trap_section noinstr#endif #define DO_ERROR_INFO (name, signo, code, str) \ asmlinkage __visible __trap_section void name(struct pt_regs *regs) \arch/riscv/mm/fault.c +0
-0@@ -204,7 +204,7 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma)
Quoted 8 lines
arch/riscv/mm/fault.c static inline bool access_error(unsigned long cause, struct vm_area_struct *vma) · line 207
Quoted 5 lines
arch/riscv/mm/fault.c +1
-1* This routine handles page faults. It determines the address and the * problem, and then passes it off to one of the appropriate routines. */ -asmlinkage void do_page_fault(struct pt_regs *regs) +asmlinkage void noinstr do_page_fault(struct pt_regs *regs)... why do you need that for
do_page_fault? That doesn't (currently) do any entry/exit logic, so this seems unnecessary per the commit description.
Yes, the above is unnecessary; I've fixed it in v13.
Quoted 10 lines
Thanks,
Mark.Quoted 6 lines
arch/riscv/mm/fault.c +0
-1{struct task_struct *tsk;struct vm_area_struct *vma; --2.36.1
Signature · 7 lines
Best Regards Guo Ren _______________________________________________ linux-riscv mailing list [email protected] http://lists.infradead.org/mailman/listinfo/linux-riscv
PATCH v12 4/7 riscv: entry: Convert to generic entry
In reply to [email protected]From: Guo Ren <[email protected]>
This patch converts riscv to use the generic entry infrastructure from kernel/entry/*. The generic entry makes maintainers' work easier and codes more elegant. Here are the changes:
- More clear entry.S with handle_exception and ret_from_exception
- Get rid of complex custom signal implementation
- Move syscall procedure from assembly to C, which is much more readable.
- Connect ret_from_fork & ret_from_kernel_thread to generic entry.
- Wrap with irqentry_enter/exit and syscall_enter/exit_from_user_mode
- Use the standard preemption code instead of custom
--- arch/riscv/Kconfig | 1 + arch/riscv/include/asm/csr.h | 1 - arch/riscv/include/asm/entry-common.h | 8 + arch/riscv/include/asm/ptrace.h | 10 +- arch/riscv/include/asm/stacktrace.h | 5 + arch/riscv/include/asm/syscall.h | 6 + arch/riscv/include/asm/thread_info.h | 13 +- arch/riscv/kernel/entry.S | 252 ++++---------------------- arch/riscv/kernel/irq.c | 15 ++ arch/riscv/kernel/ptrace.c | 43 ----- arch/riscv/kernel/signal.c | 29 +-- arch/riscv/kernel/sys_riscv.c | 31 ++++ arch/riscv/kernel/traps.c | 82 +++++++-- arch/riscv/mm/fault.c | 16 +- 14 files changed, 200 insertions(+), 312 deletions(-) create mode 100644 arch/riscv/include/asm/entry-common.h
arch/riscv/Kconfig +1 -0
@@ -58,6 +58,7 @@ config RISCV select GENERIC_ATOMIC64 if !64BIT select GENERIC_CLOCKEVENTS_BROADCAST if SMP select GENERIC_EARLY_IOREMAP + select GENERIC_ENTRY select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO select GENERIC_IDLE_POLL_SETUP select GENERIC_IOREMAP if MMU
arch/riscv/include/asm/csr.h +0 -1
@@ -40,7 +40,6 @@#define SR_UXL _AC(0x300000000, UL)/* XLEN mask for U-mode */ #define SR_UXL_32 _AC(0x100000000, UL)/* XLEN = 32 for U-mode */ #define SR_UXL_64 _AC(0x200000000, UL)/* XLEN = 64 for U-mode */ -#define SR_UXL_SHIFT 32#endif /* SATP flags */
arch/riscv/include/asm/entry-common.h new file +8 -0
@@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef _ASM_RISCV_ENTRY_COMMON_H +#define _ASM_RISCV_ENTRY_COMMON_H + +#include <asm/stacktrace.h> + +#endif /* _ASM_RISCV_ENTRY_COMMON_H */
arch/riscv/include/asm/ptrace.h +8 -2
@@ -53,6 +53,9 @@ struct pt_regs {unsigned long orig_a0; }; +#define PTRACE_SYSEMU 0x1f +#define PTRACE_SYSEMU_SINGLESTEP 0x20 +#ifdef CONFIG_64BIT #define REG_FMT "%016lx"#else
@@ -121,8 +124,6 @@ extern unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs,void prepare_ftrace_return (unsigned long *parent,unsigned long self_addr,unsigned long frame_pointer); -int do_syscall_trace_enter (struct pt_regs *regs); -void do_syscall_trace_exit (struct pt_regs *regs);/** * regs_get_register() - get register value from its offset
@@ -172,6 +173,11 @@ static inline unsigned long regs_get_kernel_argument(struct pt_regs *regs,return 0 ; } +static inline int regs_irqs_disabled (struct pt_regs *regs) +{ +return !(regs->status &SR_PIE ); +} +#endif /* __ASSEMBLY__ */ #endif /* _ASM_RISCV_PTRACE_H */
arch/riscv/include/asm/stacktrace.h +5 -0
@@ -16,4 +16,9 @@ extern void notrace walk_stackframe(struct task_struct *task, struct pt_regs *reextern void dump_backtrace (struct pt_regs *regs,struct task_struct *task,const char *loglvl); +static inline bool on_thread_stack (void ) +{ +return !(((unsigned long )(current->stack) ^ current_stack_pointer) & ~(THREAD_SIZE -1 )); +} +#endif /* _ASM_RISCV_STACKTRACE_H */
arch/riscv/include/asm/syscall.h +6 -0
@@ -74,5 +74,11 @@ static inline int syscall_get_arch(struct task_struct *task)#endif } +static inline bool arch_syscall_is_vdso_sigreturn (struct pt_regs *regs) +{ +return false; +} +asmlinkage long sys_riscv_flush_icache (uintptr_t ,uintptr_t ,uintptr_t ); +asmlinkage void do_sys_ecall_u(struct pt_regs *regs);#endif /* _ASM_RISCV_SYSCALL_H */
arch/riscv/include/asm/thread_info.h +1 -12
@@ -66,6 +66,7 @@ struct thread_info {long kernel_sp;/* Kernel stack pointer */ long user_sp;/* User stack pointer */ int cpu; +unsigned long syscall_work;/* SYSCALL_WORK_ flags */ };/*
@@ -88,26 +89,18 @@ struct thread_info {* - pending work-to-be-done flags are in lowest half-word * - other flags in upper half-word(s) */ -#define TIF_SYSCALL_TRACE 0/* syscall trace active */ #define TIF_NOTIFY_RESUME 1/* callback before returning to user */ #define TIF_SIGPENDING 2/* signal pending */ #define TIF_NEED_RESCHED 3/* rescheduling necessary */ #define TIF_RESTORE_SIGMASK 4/* restore signal mask in do_signal() */ #define TIF_MEMDIE 5/* is terminating due to OOM killer */ -#define TIF_SYSCALL_TRACEPOINT 6/* syscall tracepoint instrumentation */ -#define TIF_SYSCALL_AUDIT 7/* syscall auditing */ -#define TIF_SECCOMP 8/* syscall secure computing */ #define TIF_NOTIFY_SIGNAL 9/* signal notifications exist */ #define TIF_UPROBE 10/* uprobe breakpoint or singlestep */ #define TIF_32BIT 11/* compat-mode 32bit process */ -#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)#define _TIF_NOTIFY_RESUME (1 << TIF_NOTIFY_RESUME)#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED) -#define _TIF_SYSCALL_TRACEPOINT (1 << TIF_SYSCALL_TRACEPOINT) -#define _TIF_SYSCALL_AUDIT (1 << TIF_SYSCALL_AUDIT) -#define _TIF_SECCOMP (1 << TIF_SECCOMP)#define _TIF_NOTIFY_SIGNAL (1 << TIF_NOTIFY_SIGNAL)#define _TIF_UPROBE (1 << TIF_UPROBE)
@@ -115,8 +108,4 @@ struct thread_info { (_TIF_NOTIFY_RESUME | _TIF_SIGPENDING | _TIF_NEED_RESCHED | \ _TIF_NOTIFY_SIGNAL | _TIF_UPROBE) -#define _TIF_SYSCALL_WORK \ - (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_TRACEPOINT | _TIF_SYSCALL_AUDIT | \ - _TIF_SECCOMP) -#endif /* _ASM_RISCV_THREAD_INFO_H */
arch/riscv/kernel/entry.S +40 -212
358 lines not on this page · raw message
arch/riscv/kernel/irq.c +15 -0
@@ -5,6 +5,7 @@* Copyright (C) 2018 Christoph Hellwig */ +#include <linux/entry-common.h> #include <linux/interrupt.h> #include <linux/irqchip.h> #include <linux/seq_file.h>
@@ -22,3 +23,17 @@ void __init init_IRQ(void)if (!handle_arch_irq)panic ("No interrupt controller found." ); } + +asmlinkage void noinstr do_riscv_irq(struct pt_regs *regs) +{ +struct pt_regs *old_regs; +irqentry_state_t state =irqentry_enter (regs); + +irq_enter_rcu (); + old_regs =set_irq_regs (regs); +handle_arch_irq (regs); +set_irq_regs (old_regs); +irq_exit_rcu (); + +irqentry_exit (regs, state); +}
arch/riscv/kernel/ptrace.c +0 -43
55 lines not on this page · raw message
arch/riscv/kernel/signal.c +2 -27
@@ -12,6 +12,7 @@#include <linux/syscalls.h> #include <linux/resume_user_mode.h> #include <linux/linkage.h> +#include <linux/entry-common.h> #include <asm/ucontext.h> #include <asm/vdso.h>
@@ -274,7 +275,7 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)signal_setup_done (ret, ksig,0 ); } -static void do_signal (struct pt_regs *regs) +void arch_do_signal_or_restart (struct pt_regs *regs) {struct ksignal ksig;
@@ -311,29 +312,3 @@ static void do_signal(struct pt_regs *regs)*/ restore_saved_sigmask (); } - -/* -* Handle any pending work on the resume-to-userspace path, as indicated by -* _TIF_WORK_MASK. Entered from assembly with IRQs off. -*/ -asmlinkage __visible void do_work_pending(struct pt_regs *regs, -unsigned long thread_info_flags) -{ -do { -if (thread_info_flags & _TIF_NEED_RESCHED) { -schedule (); - }else { -local_irq_enable (); -if (thread_info_flags & _TIF_UPROBE) -uprobe_notify_resume (regs); -/* Handle pending signal delivery */ -if (thread_info_flags & (_TIF_SIGPENDING | - _TIF_NOTIFY_SIGNAL)) -do_signal (regs); -if (thread_info_flags & _TIF_NOTIFY_RESUME) -resume_user_mode_work (regs); - } -local_irq_disable (); - thread_info_flags =read_thread_flags (); - }while (thread_info_flags & _TIF_WORK_MASK); -}
arch/riscv/kernel/sys_riscv.c +31 -0
@@ -5,8 +5,10 @@* Copyright (C) 2017 SiFive */ +#include <linux/entry-common.h> #include <linux/syscalls.h> #include <asm/unistd.h> +#include <asm/syscall.h> #include <asm/cacheflush.h> #include <asm-generic/mman-common.h>
@@ -69,3 +71,32 @@ SYSCALL_DEFINE3(riscv_flush_icache, uintptr_t, start, uintptr_t, end,return 0 ; } + +typedef long (*syscall_t )(ulong ,ulong ,ulong ,ulong ,ulong ,ulong ,ulong ); + +asmlinkage void do_sys_ecall_u(struct pt_regs *regs) +{ +syscall_t syscall; +ulong nr = regs->a7; + + regs->epc +=4 ; + regs->orig_a0 = regs->a0; + + nr =syscall_enter_from_user_mode (regs, nr); + +if (nr < NR_syscalls) { +#ifdef CONFIG_COMPAT +if ((regs->status &SR_UXL ) ==SR_UXL_32 ) + syscall = compat_sys_call_table[nr]; + else +#endif + syscall = sys_call_table[nr]; + + regs->a0 =syscall (regs->orig_a0, regs->a1, regs->a2, + regs->a3, regs->a4, regs->a5, regs->a6); + }else { + regs->a0 = -ENOSYS ; + } + +syscall_exit_to_user_mode (regs); +}
arch/riscv/kernel/traps.c +69 -13
116 lines not on this page · raw message
arch/riscv/mm/fault.c +14 -2
@@ -15,6 +15,7 @@#include <linux/uaccess.h> #include <linux/kprobes.h> #include <linux/kfence.h> +#include <linux/entry-common.h> #include <asm/ptrace.h> #include <asm/tlbflush.h>
@@ -204,7 +205,7 @@ static inline bool access_error(unsigned long cause, struct vm_area_struct *vma)* This routine handles page faults. It determines the address and the * problem, and then passes it off to one of the appropriate routines. */ -asmlinkage void noinstr do_page_fault(struct pt_regs *regs) +static void __do_page_fault (struct pt_regs *regs) {struct task_struct *tsk;struct vm_area_struct *vma;
@@ -251,7 +252,7 @@ asmlinkage void noinstr do_page_fault(struct pt_regs *regs) }#endif /* Enable interrupts if they were enabled in the parent context. */ -if (likely (regs->status &SR_PIE )) +if (!regs_irqs_disabled (regs))local_irq_enable ();/*
@@ -351,4 +352,15 @@ asmlinkage void noinstr do_page_fault(struct pt_regs *regs) }return ; } + +asmlinkage void noinstr do_page_fault(struct pt_regs *regs) +{ +irqentry_state_t state =irqentry_enter (regs); + +__do_page_fault (regs); + +local_irq_disable (); + +irqentry_exit (regs, state); +}NOKPROBE_SYMBOL (do_page_fault);
Signature · 1 line
2.36.1
PATCH v12 5/7 riscv: entry: Remove extra level wrappers of trace_hardirqs_{on,off}
In reply to [email protected]From: Jisheng Zhang <[email protected]>
Since riscv is converted to generic entry, there's no need for the extra wrappers of trace_hardirqs_{on,off}.
--- arch/riscv/kernel/Makefile | 2 -- arch/riscv/kernel/trace_irq.c | 27 --------------------------- arch/riscv/kernel/trace_irq.h | 11 ----------- 3 files changed, 40 deletions(-) delete mode 100644 arch/riscv/kernel/trace_irq.c delete mode 100644 arch/riscv/kernel/trace_irq.h
arch/riscv/kernel/Makefile +0 -2
@@ -68,8 +68,6 @@ obj-$(CONFIG_CPU_PM) += suspend_entry.o suspend.o obj-$(CONFIG_FUNCTION_TRACER) += mcount.o ftrace.o obj-$(CONFIG_DYNAMIC_FTRACE) += mcount-dyn.o -obj-$(CONFIG_TRACE_IRQFLAGS) += trace_irq.o - obj-$(CONFIG_PERF_EVENTS) += perf_callchain.o obj-$(CONFIG_HAVE_PERF_REGS) += perf_regs.o obj-$(CONFIG_RISCV_SBI) += sbi.o
arch/riscv/kernel/trace_irq.c deleted +0 -27
@@ -1,27 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* -* Copyright (C) 2022 Changbin Du <[email protected]> -*/ - -#include <linux/irqflags.h> -#include <linux/kprobes.h> -#include "trace_irq.h" - -/* -* trace_hardirqs_on/off require the caller to setup frame pointer properly. -* Otherwise, CALLER_ADDR1 might trigger an pagging exception in kernel. -* Here we add one extra level so they can be safely called by low -* level entry code which $fp is used for other purpose. -*/ - -void __trace_hardirqs_on (void ) -{ -trace_hardirqs_on (); -} -NOKPROBE_SYMBOL (__trace_hardirqs_on); - -void __trace_hardirqs_off (void ) -{ -trace_hardirqs_off (); -} -NOKPROBE_SYMBOL (__trace_hardirqs_off);
arch/riscv/kernel/trace_irq.h deleted +0 -11
@@ -1,11 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* -* Copyright (C) 2022 Changbin Du <[email protected]> -*/ -#ifndef __TRACE_IRQ_H -#define __TRACE_IRQ_H - -void __trace_hardirqs_on (void ); -void __trace_hardirqs_off (void ); - -#endif /* __TRACE_IRQ_H */
Signature · 1 line
2.36.1
PATCH v12 6/7 riscv: entry: Consolidate ret_from_kernel_thread into ret_from_fork
In reply to [email protected]From: Jisheng Zhang <[email protected]>
The ret_from_kernel_thread() behaves similarly with ret_from_fork(), the only difference is whether call the fn(arg) or not, this can be achieved by testing fn is NULL or not, I.E s0 is 0 or not. Many architectures have done the same thing, it makes entry.S more clean.
--- arch/riscv/kernel/entry.S | 12 +++--------- arch/riscv/kernel/process.c | 5 ++--- 2 files changed, 5 insertions(+), 12 deletions(-)
arch/riscv/kernel/entry.S +3 -9
@@ -132,7 +132,6 @@ SYM_CODE_END(handle_exception) * caller list: * - handle_exception * - ret_from_fork - * - ret_from_kernel_thread */ SYM_CODE_START_NOALIGN(ret_from_exception) REG_L s0, PT_STATUS(sp)
@@ -336,20 +335,15 @@ SYM_CODE_END(handle_kernel_stack_overflow) SYM_CODE_START(ret_from_fork) call schedule_tail - move a0, sp /* pt_regs */ - la ra, ret_from_exception - tail syscall_exit_to_user_mode -SYM_CODE_END(ret_from_fork) - -SYM_CODE_START(ret_from_kernel_thread) - call schedule_tail + beqz s0, 1f /* not from kernel thread */ /* Call fn(arg) */ move a0, s1 jalr s0 +1: move a0, sp /* pt_regs */ la ra, ret_from_exception tail syscall_exit_to_user_mode -SYM_CODE_END(ret_from_kernel_thread) +SYM_CODE_END(ret_from_fork) /* * Integer register context switch
arch/riscv/kernel/process.c +2 -3
@@ -34,7 +34,6 @@ EXPORT_SYMBOL(__stack_chk_guard);#endif extern asmlinkage void ret_from_fork(void); -extern asmlinkage void ret_from_kernel_thread(void);void arch_cpu_idle (void ) {
@@ -174,7 +173,6 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)/* Supervisor/Machine, irqs on: */ childregs->status =SR_PP |SR_PIE ; - p->thread.ra = (unsigned long )ret_from_kernel_thread; p->thread.s[0 ] = (unsigned long )args->fn; p->thread.s[1 ] = (unsigned long )args->fn_arg; }else {
@@ -184,8 +182,9 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)if (clone_flags &CLONE_SETTLS ) childregs->tp = tls; childregs->a0 =0 ;/* Return value of fork() */ - p->thread.ra = (unsigned long )ret_from_fork; + p->thread.s[0 ] =0 ; } + p->thread.ra = (unsigned long )ret_from_fork; p->thread.sp = (unsigned long )childregs;/* kernel sp */ return 0 ; }
Signature · 1 line
2.36.1
PATCH v12 7/7 riscv: entry: Consolidate general regs saving/restoring
In reply to [email protected]From: Jisheng Zhang <[email protected]>
Consolidate the saving/restoring GPs(except zero, ra, sp, gp and tp) into save_from_x5_to_x31/restore_from_x5_to_x31 macros.
No functional change intended.
--- arch/riscv/include/asm/asm.h | 63 +++++++++++++++++++++++++ arch/riscv/kernel/entry.S | 84 ++-------------------------------- arch/riscv/kernel/mcount-dyn.S | 56 +---------------------- 3 files changed, 68 insertions(+), 135 deletions(-)
arch/riscv/include/asm/asm.h +63 -0
@@ -69,6 +69,7 @@#endif #ifdef __ASSEMBLY__ +#include <asm/asm-offsets.h> /* Common assembly source macros */
@@ -81,6 +82,68 @@ .endr .endm + /* save all GPs except zero, ra, sp, gp and tp */ + .macro save_from_x5_to_x31 + REG_S x5, PT_T0(sp) + REG_S x6, PT_T1(sp) + REG_S x7, PT_T2(sp) + REG_S x8, PT_S0(sp) + REG_S x9, PT_S1(sp) + REG_S x10, PT_A0(sp) + REG_S x11, PT_A1(sp) + REG_S x12, PT_A2(sp) + REG_S x13, PT_A3(sp) + REG_S x14, PT_A4(sp) + REG_S x15, PT_A5(sp) + REG_S x16, PT_A6(sp) + REG_S x17, PT_A7(sp) + REG_S x18, PT_S2(sp) + REG_S x19, PT_S3(sp) + REG_S x20, PT_S4(sp) + REG_S x21, PT_S5(sp) + REG_S x22, PT_S6(sp) + REG_S x23, PT_S7(sp) + REG_S x24, PT_S8(sp) + REG_S x25, PT_S9(sp) + REG_S x26, PT_S10(sp) + REG_S x27, PT_S11(sp) + REG_S x28, PT_T3(sp) + REG_S x29, PT_T4(sp) + REG_S x30, PT_T5(sp) + REG_S x31, PT_T6(sp) + .endm + + /* restore all GPs except zero, ra, sp, gp and tp */ + .macro restore_from_x5_to_x31 + REG_L x5, PT_T0(sp) + REG_L x6, PT_T1(sp) + REG_L x7, PT_T2(sp) + REG_L x8, PT_S0(sp) + REG_L x9, PT_S1(sp) + REG_L x10, PT_A0(sp) + REG_L x11, PT_A1(sp) + REG_L x12, PT_A2(sp) + REG_L x13, PT_A3(sp) + REG_L x14, PT_A4(sp) + REG_L x15, PT_A5(sp) + REG_L x16, PT_A6(sp) + REG_L x17, PT_A7(sp) + REG_L x18, PT_S2(sp) + REG_L x19, PT_S3(sp) + REG_L x20, PT_S4(sp) + REG_L x21, PT_S5(sp) + REG_L x22, PT_S6(sp) + REG_L x23, PT_S7(sp) + REG_L x24, PT_S8(sp) + REG_L x25, PT_S9(sp) + REG_L x26, PT_S10(sp) + REG_L x27, PT_S11(sp) + REG_L x28, PT_T3(sp) + REG_L x29, PT_T4(sp) + REG_L x30, PT_T5(sp) + REG_L x31, PT_T6(sp) + .endm +#endif /* __ASSEMBLY__ */ #endif /* _ASM_RISCV_ASM_H */
arch/riscv/kernel/entry.S +3 -81
102 lines not on this page · raw message
arch/riscv/kernel/mcount-dyn.S +2 -54
68 lines not on this page · raw message
Signature · 1 line
2.36.1