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arm64: dts: qcom: sa8450p-pmics: rename pmic labels

PATCH Superseded Johan Hovold 5 participants 9 messages Jan 11, 2023

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v1 of 2 Superseded Latest is v2 →

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Johan Hovold

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#0 lore raw

cover arm64: dts: qcom: sa8450p-pmics: rename pmic labels

These patches add a missing include to the new sa8540p-pmics dtsi and rename the PMIC labels so that they reflect the actual name of the PMICs.

Johan

Johan Hovold (2):
arm64: dts: qcom: sa8450p-pmics: add missing interrupt include
arm64: dts: qcom: sa8450p-pmics: rename pmic labels

 arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi | 25 +++++++++++----------
 1 file changed, 13 insertions(+), 12 deletions(-)
Signature · 1 line
2.38.2
author
#1 lore raw

PATCH 1/2 arm64: dts: qcom: sa8450p-pmics: add missing interrupt include

Add the missing interrupt-controller include which is needed by the RTC node.

Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi | 1 +
 1 file changed, 1 insertion(+)
arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi +1 -0
index c9b8da43b237..8c393f0bd6a8 100644
@@ -4,6 +4,7 @@
  * Copyright (c) 2022, Linaro Limited
  */
 
+#include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/spmi/spmi.h>
 
 &spmi_bus {
Signature · 1 line
2.38.2
Reviewed-by on v1 1/2
#3 lore raw

Re: [PATCH 1/2] arm64: dts: qcom: sa8450p-pmics: add missing interrupt include

In reply to Johan Hovold
Quoted 4 lines · Johan Hovold

Add the missing interrupt-controller include which is needed by the RTC node.

Signed-off-by Johan Hovold <[email protected]>
Reviewed-by Eric Chanudet <[email protected]>

Nit: sa8450p-pmics -> sa8540p-pmics in the subject. It was mistyped in the commit renaming the file unfortunately.

Signature · 1 line
Eric Chanudet
#4 lore raw

Re: [PATCH 1/2] arm64: dts: qcom: sa8450p-pmics: add missing interrupt include

Quoted 10 lines · Eric Chanudet
Quoted 4 lines · Johan Hovold

Add the missing interrupt-controller include which is needed by the RTC node.

Signed-off-by Johan Hovold <[email protected]>
Reviewed-by Eric Chanudet <[email protected]>

Nit: sa8450p-pmics -> sa8540p-pmics in the subject. It was mistyped in the commit renaming the file unfortunately.

Ah, good catch. I'll resend with that fixed. Thanks.

Johan

author
#5 lore raw

PATCH 2/2 arm64: dts: qcom: sa8450p-pmics: rename pmic labels

In reply to Johan Hovold

The SA8540P PMICs are named PMM8540. Rename the devicetree source labels to reflect this.

Signed-off-by Johan Hovold <[email protected]>
---
 arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi | 24 ++++++++++-----------
 1 file changed, 12 insertions(+), 12 deletions(-)
arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi +12 -12
index 8c393f0bd6a8..1221be89b3de 100644
@@ -8,7 +8,7 @@
 #include <dt-bindings/spmi/spmi.h>
 
 &spmi_bus {
-	pm8450a: pmic@0 {
+	pmm8540a: pmic@0 {
 		compatible = "qcom,pm8150", "qcom,spmi-pmic";
 		reg = <0x0 SPMI_USID>;
 		#address-cells = <1>;

@@ -22,62 +22,62 @@ rtc@6000 {
 			wakeup-source;
 		};
 
-		pm8450a_gpios: gpio@c000 {
+		pmm8540a_gpios: gpio@c000 {
 			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
 			reg = <0xc000>;
 			gpio-controller;
-			gpio-ranges = <&pm8450a_gpios 0 0 10>;
+			gpio-ranges = <&pmm8540a_gpios 0 0 10>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
 	};
 
-	pm8450c: pmic@4 {
+	pmm8540c: pmic@4 {
 		compatible = "qcom,pm8150", "qcom,spmi-pmic";
 		reg = <0x4 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		pm8450c_gpios: gpio@c000 {
+		pmm8540c_gpios: gpio@c000 {
 			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
 			reg = <0xc000>;
 			gpio-controller;
-			gpio-ranges = <&pm8450c_gpios 0 0 10>;
+			gpio-ranges = <&pmm8540c_gpios 0 0 10>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
 	};
 
-	pm8450e: pmic@8 {
+	pmm8540e: pmic@8 {
 		compatible = "qcom,pm8150", "qcom,spmi-pmic";
 		reg = <0x8 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		pm8450e_gpios: gpio@c000 {
+		pmm8540e_gpios: gpio@c000 {
 			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
 			reg = <0xc000>;
 			gpio-controller;
-			gpio-ranges = <&pm8450e_gpios 0 0 10>;
+			gpio-ranges = <&pmm8540e_gpios 0 0 10>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
 	};
 
-	pm8450g: pmic@c {
+	pmm8540g: pmic@c {
 		compatible = "qcom,pm8150", "qcom,spmi-pmic";
 		reg = <0xc SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		pm8450g_gpios: gpio@c000 {
+		pmm8540g_gpios: gpio@c000 {
 			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
 			reg = <0xc000>;
 			gpio-controller;
-			gpio-ranges = <&pm8450g_gpios 0 0 10>;
+			gpio-ranges = <&pmm8540g_gpios 0 0 10>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
Signature · 1 line
2.38.2
Reviewed-by on v1 2/2
#7 lore raw
In reply to Johan Hovold
Quoted 5 lines · Johan Hovold

The SA8540P PMICs are named PMM8540. Rename the devicetree source labels to reflect this.

Signed-off-by Johan Hovold <[email protected]>

---

Reviewed-by Konrad Dybcio <[email protected]>

Konrad

Quoted 90 lines
 arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi | 24 ++++++++++-----------
 1 file changed, 12 insertions(+), 12 deletions(-)
arch/arm64/boot/dts/qcom/sa8540p-pmics.dtsi +12 -12
index 8c393f0bd6a8..1221be89b3de 100644
@@ -8,7 +8,7 @@
 #include <dt-bindings/spmi/spmi.h>
 
 &spmi_bus {
-	pm8450a: pmic@0 {
+	pmm8540a: pmic@0 {
 		compatible = "qcom,pm8150", "qcom,spmi-pmic";
 		reg = <0x0 SPMI_USID>;
 		#address-cells = <1>;

@@ -22,62 +22,62 @@ rtc@6000 {
 			wakeup-source;
 		};
 
-		pm8450a_gpios: gpio@c000 {
+		pmm8540a_gpios: gpio@c000 {
 			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
 			reg = <0xc000>;
 			gpio-controller;
-			gpio-ranges = <&pm8450a_gpios 0 0 10>;
+			gpio-ranges = <&pmm8540a_gpios 0 0 10>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
 	};
 
-	pm8450c: pmic@4 {
+	pmm8540c: pmic@4 {
 		compatible = "qcom,pm8150", "qcom,spmi-pmic";
 		reg = <0x4 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		pm8450c_gpios: gpio@c000 {
+		pmm8540c_gpios: gpio@c000 {
 			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
 			reg = <0xc000>;
 			gpio-controller;
-			gpio-ranges = <&pm8450c_gpios 0 0 10>;
+			gpio-ranges = <&pmm8540c_gpios 0 0 10>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
 	};
 
-	pm8450e: pmic@8 {
+	pmm8540e: pmic@8 {
 		compatible = "qcom,pm8150", "qcom,spmi-pmic";
 		reg = <0x8 SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		pm8450e_gpios: gpio@c000 {
+		pmm8540e_gpios: gpio@c000 {
 			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
 			reg = <0xc000>;
 			gpio-controller;
-			gpio-ranges = <&pm8450e_gpios 0 0 10>;
+			gpio-ranges = <&pmm8540e_gpios 0 0 10>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;
 		};
 	};
 
-	pm8450g: pmic@c {
+	pmm8540g: pmic@c {
 		compatible = "qcom,pm8150", "qcom,spmi-pmic";
 		reg = <0xc SPMI_USID>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 
-		pm8450g_gpios: gpio@c000 {
+		pmm8540g_gpios: gpio@c000 {
 			compatible = "qcom,pm8150-gpio", "qcom,spmi-gpio";
 			reg = <0xc000>;
 			gpio-controller;
-			gpio-ranges = <&pm8450g_gpios 0 0 10>;
+			gpio-ranges = <&pmm8540g_gpios 0 0 10>;
 			#gpio-cells = <2>;
 			interrupt-controller;
 			#interrupt-cells = <2>;