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arm64: tegra: Populate address/size cells for Tegra234 I2C

PATCH In review Jon Hunter 2 participants 3 messages Jan 16, 2023 – Jan 17, 2023

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Jon Hunter

author maintainer
#0 lore raw

PATCH v2 1/2 arm64: tegra: Populate address/size cells for Tegra234 I2C

Populate the address and size cells properties for the I2C devices on Tegra234.

Signed-off-by Jon Hunter <[email protected]>

---
Changes V1->V2: Added address/size cells for i2c@c240000

 arch/arm64/boot/dts/nvidia/tegra234.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
arch/arm64/boot/dts/nvidia/tegra234.dtsi +16 -0
index d71b0b5b931c..242bf59711f8 100644
@@ -785,6 +785,8 @@ gen1_i2c: i2c@3160000 {
 			reg = <0x3160000 0x100>;
 			status = "disabled";
 			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			clock-frequency = <400000>;
 			clocks = <&bpmp TEGRA234_CLK_I2C1
 				  &bpmp TEGRA234_CLK_PLLP_OUT0>;

@@ -803,6 +805,8 @@ cam_i2c: i2c@3180000 {
 			compatible = "nvidia,tegra194-i2c";
 			reg = <0x3180000 0x100>;
 			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			status = "disabled";
 			clock-frequency = <400000>;
 			clocks = <&bpmp TEGRA234_CLK_I2C3

@@ -822,6 +826,8 @@ dp_aux_ch1_i2c: i2c@3190000 {
 			compatible = "nvidia,tegra194-i2c";
 			reg = <0x3190000 0x100>;
 			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			status = "disabled";
 			clock-frequency = <100000>;
 			clocks = <&bpmp TEGRA234_CLK_I2C4

@@ -841,6 +847,8 @@ dp_aux_ch0_i2c: i2c@31b0000 {
 			compatible = "nvidia,tegra194-i2c";
 			reg = <0x31b0000 0x100>;
 			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			status = "disabled";
 			clock-frequency = <100000>;
 			clocks = <&bpmp TEGRA234_CLK_I2C6

@@ -860,6 +868,8 @@ dp_aux_ch2_i2c: i2c@31c0000 {
 			compatible = "nvidia,tegra194-i2c";
 			reg = <0x31c0000 0x100>;
 			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			status = "disabled";
 			clock-frequency = <100000>;
 			clocks = <&bpmp TEGRA234_CLK_I2C7

@@ -886,6 +896,8 @@ dp_aux_ch3_i2c: i2c@31e0000 {
 			compatible = "nvidia,tegra194-i2c";
 			reg = <0x31e0000 0x100>;
 			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			status = "disabled";
 			clock-frequency = <100000>;
 			clocks = <&bpmp TEGRA234_CLK_I2C9

@@ -1872,6 +1884,8 @@ gen2_i2c: i2c@c240000 {
 			compatible = "nvidia,tegra194-i2c";
 			reg = <0xc240000 0x100>;
 			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			status = "disabled";
 			clock-frequency = <100000>;
 			clocks = <&bpmp TEGRA234_CLK_I2C2

@@ -1891,6 +1905,8 @@ gen8_i2c: i2c@c250000 {
 			compatible = "nvidia,tegra194-i2c";
 			reg = <0xc250000 0x100>;
 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			status = "disabled";
 			clock-frequency = <400000>;
 			clocks = <&bpmp TEGRA234_CLK_I2C8
Signature · 1 line
2.25.1
author maintainer
#1 lore raw

PATCH v2 2/2 arm64: tegra: Populate Jetson AGX Orin EEPROMs

Populate the module and system EEPROMs on the Jetson AGX Orin platform.

Signed-off-by Jon Hunter <[email protected]>

---
Changes V1->V2: None

 .../boot/dts/nvidia/tegra234-p3701-0000.dtsi  | 24 +++++++++++++++++++
 .../boot/dts/nvidia/tegra234-p3737-0000.dtsi  | 24 +++++++++++++++++++
 2 files changed, 48 insertions(+)
arch/arm64/boot/dts/nvidia/tegra234-p3701-0000.dtsi +24 -0
index 4fae2547e90e..ee8bc57e4ebe 100644
@@ -6,6 +6,14 @@ / {
 	model = "NVIDIA Jetson AGX Orin";
 	compatible = "nvidia,p3701-0000", "nvidia,tegra234";
 
+	vdd_1v8_hs: regulator-vdd-1v8-hs {
+		compatible = "regulator-fixed";
+		regulator-name = "VDD_1V8_HS";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+	};
+
 	vdd_1v8_ls: regulator-vdd-1v8-ls {
 		compatible = "regulator-fixed";
 		regulator-name = "VDD_1V8_LS";

@@ -42,6 +50,22 @@ vdd_12v_pcie: regulator-vdd-12v-pcie {
 	};
 
 	bus@0 {
+		i2c@3160000 {
+			status = "okay";
+
+			eeprom@50 {
+				compatible = "atmel,24c02";
+				reg = <0x50>;
+
+				label = "module";
+				vcc-supply = <&vdd_1v8_hs>;
+				address-width = <8>;
+				pagesize = <8>;
+				size = <256>;
+				read-only;
+			};
+		};
+
 		spi@3270000 {
 			status = "okay";
arch/arm64/boot/dts/nvidia/tegra234-p3737-0000.dtsi +24 -0
index e76894574d32..dc6667191bd2 100644
@@ -3,7 +3,31 @@
 / {
 	compatible = "nvidia,p3737-0000";
 
+	vdd_1v8_sys: regulator-vdd-1v8-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "VDD_1V8_SYS";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+	};
+
 	bus@0 {
+		i2c@3160000 {
+			status = "okay";
+
+			eeprom@56 {
+				compatible = "atmel,24c02";
+				reg = <0x56>;
+
+				label = "system";
+				vcc-supply = <&vdd_1v8_sys>;
+				address-width = <8>;
+				pagesize = <8>;
+				size = <256>;
+				read-only;
+			};
+		};
+
 		pwm@3280000 {
 			status = "okay";
 		};
Signature · 1 line
2.25.1
#2 lore raw
In reply to Jon Hunter
Quoted 9 lines · Jon Hunter

Populate the address and size cells properties for the I2C devices on Tegra234.

Signed-off-by Jon Hunter <[email protected]>

---
Changes V1->V2: Added address/size cells for i2c@c240000

 arch/arm64/boot/dts/nvidia/tegra234.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

Both patches applied, though I had to reshuffle some of the regulators. They should always be listed after the nodes with unit-addresses.

Thanks,
Thierry